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Fork of USBDevice by mbed official

USBDevice/USBHAL_LPC11U.cpp@51:a3c50882f2c5, 2015-04-20 (annotated)

Committer:
mbed_official
Date:
Mon Apr 20 10:45:54 2015 +0100
Revision:
51:a3c50882f2c5
Parent:
30:4408411999c8 
Synchronized with git revision 016b9ad9cba789b99acee1102802355338120b29



Full URL: https://github.com/mbedmicro/mbed/commit/016b9ad9cba789b99acee1102802355338120b29/



NXP's HAL - Fix PwmOut period using SCT

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 1:80ab0d068708 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:80ab0d068708 2 *
samux 1:80ab0d068708 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:80ab0d068708 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:80ab0d068708 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:80ab0d068708 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:80ab0d068708 7 * Software is furnished to do so, subject to the following conditions:
samux 1:80ab0d068708 8 *
samux 1:80ab0d068708 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:80ab0d068708 10 * substantial portions of the Software.
samux 1:80ab0d068708 11 *
samux 1:80ab0d068708 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:80ab0d068708 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:80ab0d068708 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:80ab0d068708 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:80ab0d068708 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:80ab0d068708 17 */
samux 1:80ab0d068708 18
mbed_official 30:4408411999c8 19 #if defined(TARGET_LPC11UXX) || defined(TARGET_LPC11U6X) || defined(TARGET_LPC1347) || defined(TARGET_LPC1549)
bogdanm 11:eeb3cbbaa996 20
mbed_official 27:0c6524151939 21 #if defined(TARGET_LPC1347) || defined(TARGET_LPC1549)
bogdanm 11:eeb3cbbaa996 22 #define USB_IRQ USB_IRQ_IRQn
mbed_official 30:4408411999c8 23 #else
bogdanm 11:eeb3cbbaa996 24 #define USB_IRQ USB_IRQn
bogdanm 11:eeb3cbbaa996 25 #endif
samux 1:80ab0d068708 26
samux 1:80ab0d068708 27 #include "USBHAL.h"
samux 1:80ab0d068708 28
samux 1:80ab0d068708 29 USBHAL * USBHAL::instance;
mbed_official 27:0c6524151939 30 #if defined(TARGET_LPC1549)
mbed_official 27:0c6524151939 31 static uint8_t usbmem[2048] __attribute__((aligned(2048)));
mbed_official 27:0c6524151939 32 #endif
samux 1:80ab0d068708 33
samux 1:80ab0d068708 34 // Valid physical endpoint numbers are 0 to (NUMBER_OF_PHYSICAL_ENDPOINTS-1)
samux 1:80ab0d068708 35 #define LAST_PHYSICAL_ENDPOINT (NUMBER_OF_PHYSICAL_ENDPOINTS-1)
samux 1:80ab0d068708 36
samux 1:80ab0d068708 37 // Convert physical endpoint number to register bit
samux 1:80ab0d068708 38 #define EP(endpoint) (1UL<<endpoint)
samux 1:80ab0d068708 39
samux 1:80ab0d068708 40 // Convert physical to logical
samux 1:80ab0d068708 41 #define PHY_TO_LOG(endpoint) ((endpoint)>>1)
samux 1:80ab0d068708 42
samux 1:80ab0d068708 43 // Get endpoint direction
samux 1:80ab0d068708 44 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
samux 1:80ab0d068708 45 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
samux 1:80ab0d068708 46
samux 1:80ab0d068708 47 // USB RAM
mbed_official 27:0c6524151939 48 #if defined(TARGET_LPC1549)
mbed_official 27:0c6524151939 49 #define USB_RAM_START ((uint32_t)usbmem)
mbed_official 27:0c6524151939 50 #define USB_RAM_SIZE sizeof(usbmem)
mbed_official 27:0c6524151939 51 #else
samux 1:80ab0d068708 52 #define USB_RAM_START (0x20004000)
samux 1:80ab0d068708 53 #define USB_RAM_SIZE (0x00000800)
mbed_official 27:0c6524151939 54 #endif
samux 1:80ab0d068708 55
samux 1:80ab0d068708 56 // SYSAHBCLKCTRL
mbed_official 27:0c6524151939 57 #if defined(TARGET_LPC1549)
mbed_official 27:0c6524151939 58 #define CLK_USB (1UL<<23)
mbed_official 27:0c6524151939 59 #else
samux 1:80ab0d068708 60 #define CLK_USB (1UL<<14)
samux 1:80ab0d068708 61 #define CLK_USBRAM (1UL<<27)
mbed_official 27:0c6524151939 62 #endif
samux 1:80ab0d068708 63
samux 1:80ab0d068708 64 // USB Information register
samux 1:80ab0d068708 65 #define FRAME_NR(a) ((a) & 0x7ff) // Frame number
samux 1:80ab0d068708 66
samux 1:80ab0d068708 67 // USB Device Command/Status register
samux 1:80ab0d068708 68 #define DEV_ADDR_MASK (0x7f) // Device address
samux 1:80ab0d068708 69 #define DEV_ADDR(a) ((a) & DEV_ADDR_MASK)
samux 1:80ab0d068708 70 #define DEV_EN (1UL<<7) // Device enable
samux 1:80ab0d068708 71 #define SETUP (1UL<<8) // SETUP token received
samux 1:80ab0d068708 72 #define PLL_ON (1UL<<9) // PLL enabled in suspend
samux 1:80ab0d068708 73 #define DCON (1UL<<16) // Device status - connect
samux 1:80ab0d068708 74 #define DSUS (1UL<<17) // Device status - suspend
samux 1:80ab0d068708 75 #define DCON_C (1UL<<24) // Connect change
samux 1:80ab0d068708 76 #define DSUS_C (1UL<<25) // Suspend change
samux 1:80ab0d068708 77 #define DRES_C (1UL<<26) // Reset change
samux 1:80ab0d068708 78 #define VBUSDEBOUNCED (1UL<<28) // Vbus detected
samux 1:80ab0d068708 79
samux 1:80ab0d068708 80 // Endpoint Command/Status list
samux 1:80ab0d068708 81 #define CMDSTS_A (1UL<<31) // Active
samux 1:80ab0d068708 82 #define CMDSTS_D (1UL<<30) // Disable
samux 1:80ab0d068708 83 #define CMDSTS_S (1UL<<29) // Stall
samux 1:80ab0d068708 84 #define CMDSTS_TR (1UL<<28) // Toggle Reset
samux 1:80ab0d068708 85 #define CMDSTS_RF (1UL<<27) // Rate Feedback mode
samux 1:80ab0d068708 86 #define CMDSTS_TV (1UL<<27) // Toggle Value
samux 1:80ab0d068708 87 #define CMDSTS_T (1UL<<26) // Endpoint Type
samux 1:80ab0d068708 88 #define CMDSTS_NBYTES(n) (((n)&0x3ff)<<16) // Number of bytes
samux 1:80ab0d068708 89 #define CMDSTS_ADDRESS_OFFSET(a) (((a)>>6)&0xffff) // Buffer start address
samux 1:80ab0d068708 90
samux 1:80ab0d068708 91 #define BYTES_REMAINING(s) (((s)>>16)&0x3ff) // Bytes remaining after transfer
samux 1:80ab0d068708 92
samux 1:80ab0d068708 93 // USB Non-endpoint interrupt sources
samux 1:80ab0d068708 94 #define FRAME_INT (1UL<<30)
samux 1:80ab0d068708 95 #define DEV_INT (1UL<<31)
samux 1:80ab0d068708 96
samux 1:80ab0d068708 97 static volatile int epComplete = 0;
samux 1:80ab0d068708 98
samux 1:80ab0d068708 99 // One entry for a double-buffered logical endpoint in the endpoint
samux 1:80ab0d068708 100 // command/status list. Endpoint 0 is single buffered, out[1] is used
samux 1:80ab0d068708 101 // for the SETUP packet and in[1] is not used
bogdanm 11:eeb3cbbaa996 102 typedef struct {
samux 1:80ab0d068708 103 uint32_t out[2];
samux 1:80ab0d068708 104 uint32_t in[2];
bogdanm 11:eeb3cbbaa996 105 } PACKED EP_COMMAND_STATUS;
samux 1:80ab0d068708 106
bogdanm 11:eeb3cbbaa996 107 typedef struct {
samux 1:80ab0d068708 108 uint8_t out[MAX_PACKET_SIZE_EP0];
samux 1:80ab0d068708 109 uint8_t in[MAX_PACKET_SIZE_EP0];
samux 1:80ab0d068708 110 uint8_t setup[SETUP_PACKET_SIZE];
bogdanm 11:eeb3cbbaa996 111 } PACKED CONTROL_TRANSFER;
samux 1:80ab0d068708 112
bogdanm 11:eeb3cbbaa996 113 typedef struct {
samux 1:80ab0d068708 114 uint32_t maxPacket;
samux 1:80ab0d068708 115 uint32_t buffer[2];
samux 1:80ab0d068708 116 uint32_t options;
bogdanm 11:eeb3cbbaa996 117 } PACKED EP_STATE;
samux 1:80ab0d068708 118
samux 1:80ab0d068708 119 static volatile EP_STATE endpointState[NUMBER_OF_PHYSICAL_ENDPOINTS];
samux 1:80ab0d068708 120
samux 1:80ab0d068708 121 // Pointer to the endpoint command/status list
samux 1:80ab0d068708 122 static EP_COMMAND_STATUS *ep = NULL;
samux 1:80ab0d068708 123
samux 1:80ab0d068708 124 // Pointer to endpoint 0 data (IN/OUT and SETUP)
samux 1:80ab0d068708 125 static CONTROL_TRANSFER *ct = NULL;
samux 1:80ab0d068708 126
samux 1:80ab0d068708 127 // Shadow DEVCMDSTAT register to avoid accidentally clearing flags or
samux 1:80ab0d068708 128 // initiating a remote wakeup event.
samux 1:80ab0d068708 129 static volatile uint32_t devCmdStat;
samux 1:80ab0d068708 130
samux 1:80ab0d068708 131 // Pointers used to allocate USB RAM
samux 1:80ab0d068708 132 static uint32_t usbRamPtr = USB_RAM_START;
samux 1:80ab0d068708 133 static uint32_t epRamPtr = 0; // Buffers for endpoints > 0 start here
samux 1:80ab0d068708 134
samux 1:80ab0d068708 135 #define ROUND_UP_TO_MULTIPLE(x, m) ((((x)+((m)-1))/(m))*(m))
samux 1:80ab0d068708 136
samux 1:80ab0d068708 137 void USBMemCopy(uint8_t *dst, uint8_t *src, uint32_t size);
samux 1:80ab0d068708 138 void USBMemCopy(uint8_t *dst, uint8_t *src, uint32_t size) {
samux 1:80ab0d068708 139 if (size > 0) {
samux 1:80ab0d068708 140 do {
samux 1:80ab0d068708 141 *dst++ = *src++;
samux 1:80ab0d068708 142 } while (--size > 0);
samux 1:80ab0d068708 143 }
samux 1:80ab0d068708 144 }
samux 1:80ab0d068708 145
samux 1:80ab0d068708 146
samux 1:80ab0d068708 147 USBHAL::USBHAL(void) {
bogdanm 11:eeb3cbbaa996 148 NVIC_DisableIRQ(USB_IRQ);
mbed_official 25:7c72828865f3 149
samux 8:335f2506f422 150 // fill in callback array
samux 8:335f2506f422 151 epCallback[0] = &USBHAL::EP1_OUT_callback;
samux 8:335f2506f422 152 epCallback[1] = &USBHAL::EP1_IN_callback;
samux 8:335f2506f422 153 epCallback[2] = &USBHAL::EP2_OUT_callback;
samux 8:335f2506f422 154 epCallback[3] = &USBHAL::EP2_IN_callback;
samux 8:335f2506f422 155 epCallback[4] = &USBHAL::EP3_OUT_callback;
samux 8:335f2506f422 156 epCallback[5] = &USBHAL::EP3_IN_callback;
samux 8:335f2506f422 157 epCallback[6] = &USBHAL::EP4_OUT_callback;
samux 8:335f2506f422 158 epCallback[7] = &USBHAL::EP4_IN_callback;
samux 1:80ab0d068708 159
mbed_official 27:0c6524151939 160 #if defined(TARGET_LPC1549)
mbed_official 27:0c6524151939 161 /* Set USB PLL input to system oscillator */
mbed_official 27:0c6524151939 162 LPC_SYSCON->USBPLLCLKSEL = 0x01;
mbed_official 27:0c6524151939 163
mbed_official 27:0c6524151939 164 /* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz
mbed_official 27:0c6524151939 165 MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
mbed_official 27:0c6524151939 166 FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
mbed_official 27:0c6524151939 167 FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
mbed_official 27:0c6524151939 168 LPC_SYSCON->USBPLLCTRL = (0x3 | (1UL << 6));
mbed_official 27:0c6524151939 169
mbed_official 30:4408411999c8 170 /* Powerup USB PLL */
mbed_official 27:0c6524151939 171 LPC_SYSCON->PDRUNCFG &= ~(CLK_USB);
mbed_official 27:0c6524151939 172
mbed_official 27:0c6524151939 173 /* Wait for PLL to lock */
mbed_official 27:0c6524151939 174 while(!(LPC_SYSCON->USBPLLSTAT & 0x01));
mbed_official 27:0c6524151939 175
mbed_official 27:0c6524151939 176 /* enable USB main clock */
mbed_official 27:0c6524151939 177 LPC_SYSCON->USBCLKSEL = 0x02;
mbed_official 27:0c6524151939 178 LPC_SYSCON->USBCLKDIV = 1;
mbed_official 27:0c6524151939 179
mbed_official 27:0c6524151939 180 /* Enable AHB clock to the USB block. */
mbed_official 27:0c6524151939 181 LPC_SYSCON->SYSAHBCLKCTRL1 |= CLK_USB;
mbed_official 27:0c6524151939 182
mbed_official 27:0c6524151939 183 /* power UP USB Phy */
mbed_official 27:0c6524151939 184 LPC_SYSCON->PDRUNCFG &= ~(1UL << 9);
mbed_official 27:0c6524151939 185
mbed_official 27:0c6524151939 186 /* Reset USB block */
mbed_official 27:0c6524151939 187 LPC_SYSCON->PRESETCTRL1 |= (CLK_USB);
mbed_official 27:0c6524151939 188 LPC_SYSCON->PRESETCTRL1 &= ~(CLK_USB);
mbed_official 27:0c6524151939 189
mbed_official 27:0c6524151939 190 #else
mbed_official 23:ecbbaf64bc3d 191 #if defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501)
mbed_official 17:bbd6dac92961 192 // USB_VBUS input with pull-down
mbed_official 17:bbd6dac92961 193 LPC_IOCON->PIO0_3 = 0x00000009;
mbed_official 17:bbd6dac92961 194 #endif
mbed_official 25:7c72828865f3 195
samux 1:80ab0d068708 196 // nUSB_CONNECT output
samux 1:80ab0d068708 197 LPC_IOCON->PIO0_6 = 0x00000001;
samux 1:80ab0d068708 198
samux 1:80ab0d068708 199 // Enable clocks (USB registers, USB RAM)
samux 1:80ab0d068708 200 LPC_SYSCON->SYSAHBCLKCTRL |= CLK_USB | CLK_USBRAM;
samux 1:80ab0d068708 201
samux 1:80ab0d068708 202 // Ensure device disconnected (DCON not set)
samux 1:80ab0d068708 203 LPC_USB->DEVCMDSTAT = 0;
mbed_official 27:0c6524151939 204 #endif
samux 1:80ab0d068708 205 // to ensure that the USB host sees the device as
samux 1:80ab0d068708 206 // disconnected if the target CPU is reset.
samux 1:80ab0d068708 207 wait(0.3);
samux 1:80ab0d068708 208
samux 1:80ab0d068708 209 // Reserve space in USB RAM for endpoint command/status list
samux 1:80ab0d068708 210 // Must be 256 byte aligned
samux 1:80ab0d068708 211 usbRamPtr = ROUND_UP_TO_MULTIPLE(usbRamPtr, 256);
samux 1:80ab0d068708 212 ep = (EP_COMMAND_STATUS *)usbRamPtr;
samux 1:80ab0d068708 213 usbRamPtr += (sizeof(EP_COMMAND_STATUS) * NUMBER_OF_LOGICAL_ENDPOINTS);
samux 1:80ab0d068708 214 LPC_USB->EPLISTSTART = (uint32_t)(ep) & 0xffffff00;
samux 1:80ab0d068708 215
samux 1:80ab0d068708 216 // Reserve space in USB RAM for Endpoint 0
samux 1:80ab0d068708 217 // Must be 64 byte aligned
samux 1:80ab0d068708 218 usbRamPtr = ROUND_UP_TO_MULTIPLE(usbRamPtr, 64);
samux 1:80ab0d068708 219 ct = (CONTROL_TRANSFER *)usbRamPtr;
samux 1:80ab0d068708 220 usbRamPtr += sizeof(CONTROL_TRANSFER);
samux 1:80ab0d068708 221 LPC_USB->DATABUFSTART =(uint32_t)(ct) & 0xffc00000;
samux 1:80ab0d068708 222
samux 1:80ab0d068708 223 // Setup command/status list for EP0
samux 1:80ab0d068708 224 ep[0].out[0] = 0;
samux 1:80ab0d068708 225 ep[0].in[0] = 0;
samux 1:80ab0d068708 226 ep[0].out[1] = CMDSTS_ADDRESS_OFFSET((uint32_t)ct->setup);
samux 1:80ab0d068708 227
samux 1:80ab0d068708 228 // Route all interrupts to IRQ, some can be routed to
samux 1:80ab0d068708 229 // USB_FIQ if you wish.
samux 1:80ab0d068708 230 LPC_USB->INTROUTING = 0;
samux 1:80ab0d068708 231
samux 1:80ab0d068708 232 // Set device address 0, enable USB device, no remote wakeup
samux 1:80ab0d068708 233 devCmdStat = DEV_ADDR(0) | DEV_EN | DSUS;
samux 1:80ab0d068708 234 LPC_USB->DEVCMDSTAT = devCmdStat;
samux 1:80ab0d068708 235
samux 1:80ab0d068708 236 // Enable interrupts for device events and EP0
samux 1:80ab0d068708 237 LPC_USB->INTEN = DEV_INT | EP(EP0IN) | EP(EP0OUT) | FRAME_INT;
samux 1:80ab0d068708 238 instance = this;
samux 1:80ab0d068708 239
samux 1:80ab0d068708 240 //attach IRQ handler and enable interrupts
bogdanm 11:eeb3cbbaa996 241 NVIC_SetVector(USB_IRQ, (uint32_t)&_usbisr);
samux 1:80ab0d068708 242 }
samux 1:80ab0d068708 243
samux 1:80ab0d068708 244 USBHAL::~USBHAL(void) {
samux 1:80ab0d068708 245 // Ensure device disconnected (DCON not set)
samux 1:80ab0d068708 246 LPC_USB->DEVCMDSTAT = 0;
samux 1:80ab0d068708 247 // Disable USB interrupts
bogdanm 11:eeb3cbbaa996 248 NVIC_DisableIRQ(USB_IRQ);
samux 1:80ab0d068708 249 }
samux 1:80ab0d068708 250
samux 1:80ab0d068708 251 void USBHAL::connect(void) {
bogdanm 11:eeb3cbbaa996 252 NVIC_EnableIRQ(USB_IRQ);
samux 1:80ab0d068708 253 devCmdStat |= DCON;
samux 1:80ab0d068708 254 LPC_USB->DEVCMDSTAT = devCmdStat;
samux 1:80ab0d068708 255 }
samux 1:80ab0d068708 256
samux 1:80ab0d068708 257 void USBHAL::disconnect(void) {
bogdanm 11:eeb3cbbaa996 258 NVIC_DisableIRQ(USB_IRQ);
samux 1:80ab0d068708 259 devCmdStat &= ~DCON;
samux 1:80ab0d068708 260 LPC_USB->DEVCMDSTAT = devCmdStat;
samux 1:80ab0d068708 261 }
samux 1:80ab0d068708 262
samux 1:80ab0d068708 263 void USBHAL::configureDevice(void) {
samux 8:335f2506f422 264 // Not required
samux 1:80ab0d068708 265 }
samux 1:80ab0d068708 266
samux 1:80ab0d068708 267 void USBHAL::unconfigureDevice(void) {
samux 8:335f2506f422 268 // Not required
samux 1:80ab0d068708 269 }
samux 1:80ab0d068708 270
samux 1:80ab0d068708 271 void USBHAL::EP0setup(uint8_t *buffer) {
samux 1:80ab0d068708 272 // Copy setup packet data
samux 1:80ab0d068708 273 USBMemCopy(buffer, ct->setup, SETUP_PACKET_SIZE);
samux 1:80ab0d068708 274 }
samux 1:80ab0d068708 275
samux 1:80ab0d068708 276 void USBHAL::EP0read(void) {
samux 1:80ab0d068708 277 // Start an endpoint 0 read
samux 1:80ab0d068708 278
samux 1:80ab0d068708 279 // The USB ISR will call USBDevice_EP0out() when a packet has been read,
samux 1:80ab0d068708 280 // the USBDevice layer then calls USBBusInterface_EP0getReadResult() to
samux 1:80ab0d068708 281 // read the data.
samux 1:80ab0d068708 282
samux 1:80ab0d068708 283 ep[0].out[0] = CMDSTS_A |CMDSTS_NBYTES(MAX_PACKET_SIZE_EP0) \
samux 1:80ab0d068708 284 | CMDSTS_ADDRESS_OFFSET((uint32_t)ct->out);
samux 1:80ab0d068708 285 }
samux 1:80ab0d068708 286
samux 1:80ab0d068708 287 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
samux 1:80ab0d068708 288 // Complete an endpoint 0 read
samux 1:80ab0d068708 289 uint32_t bytesRead;
samux 1:80ab0d068708 290
samux 1:80ab0d068708 291 // Find how many bytes were read
samux 1:80ab0d068708 292 bytesRead = MAX_PACKET_SIZE_EP0 - BYTES_REMAINING(ep[0].out[0]);
samux 1:80ab0d068708 293
samux 1:80ab0d068708 294 // Copy data
samux 1:80ab0d068708 295 USBMemCopy(buffer, ct->out, bytesRead);
samux 1:80ab0d068708 296 return bytesRead;
samux 1:80ab0d068708 297 }
samux 1:80ab0d068708 298
samux 8:335f2506f422 299
samux 8:335f2506f422 300 void USBHAL::EP0readStage(void) {
samux 8:335f2506f422 301 // Not required
samux 8:335f2506f422 302 }
samux 8:335f2506f422 303
samux 1:80ab0d068708 304 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
samux 1:80ab0d068708 305 // Start and endpoint 0 write
samux 1:80ab0d068708 306
samux 1:80ab0d068708 307 // The USB ISR will call USBDevice_EP0in() when the data has
samux 1:80ab0d068708 308 // been written, the USBDevice layer then calls
samux 1:80ab0d068708 309 // USBBusInterface_EP0getWriteResult() to complete the transaction.
samux 1:80ab0d068708 310
samux 1:80ab0d068708 311 // Copy data
samux 1:80ab0d068708 312 USBMemCopy(ct->in, buffer, size);
samux 1:80ab0d068708 313
samux 1:80ab0d068708 314 // Start transfer
samux 1:80ab0d068708 315 ep[0].in[0] = CMDSTS_A | CMDSTS_NBYTES(size) \
samux 1:80ab0d068708 316 | CMDSTS_ADDRESS_OFFSET((uint32_t)ct->in);
samux 1:80ab0d068708 317 }
samux 1:80ab0d068708 318
samux 1:80ab0d068708 319
samux 1:80ab0d068708 320 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
samux 1:80ab0d068708 321 uint8_t bf = 0;
samux 1:80ab0d068708 322 uint32_t flags = 0;
samux 1:80ab0d068708 323
samux 1:80ab0d068708 324 //check which buffer must be filled
samux 1:80ab0d068708 325 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 326 // Double buffered
samux 1:80ab0d068708 327 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 328 bf = 1;
samux 1:80ab0d068708 329 } else {
samux 1:80ab0d068708 330 bf = 0;
samux 1:80ab0d068708 331 }
samux 1:80ab0d068708 332 }
mbed_official 25:7c72828865f3 333
samux 1:80ab0d068708 334 // if isochronous endpoint, T = 1
samux 1:80ab0d068708 335 if(endpointState[endpoint].options & ISOCHRONOUS)
samux 1:80ab0d068708 336 {
samux 1:80ab0d068708 337 flags |= CMDSTS_T;
samux 1:80ab0d068708 338 }
mbed_official 25:7c72828865f3 339
samux 1:80ab0d068708 340 //Active the endpoint for reading
samux 1:80ab0d068708 341 ep[PHY_TO_LOG(endpoint)].out[bf] = CMDSTS_A | CMDSTS_NBYTES(maximumSize) \
samux 1:80ab0d068708 342 | CMDSTS_ADDRESS_OFFSET((uint32_t)ct->out) | flags;
samux 1:80ab0d068708 343 return EP_PENDING;
samux 1:80ab0d068708 344 }
samux 1:80ab0d068708 345
samux 1:80ab0d068708 346 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *data, uint32_t *bytesRead) {
samux 1:80ab0d068708 347
samux 1:80ab0d068708 348 uint8_t bf = 0;
samux 1:80ab0d068708 349
samux 1:80ab0d068708 350 if (!(epComplete & EP(endpoint)))
samux 1:80ab0d068708 351 return EP_PENDING;
samux 1:80ab0d068708 352 else {
samux 1:80ab0d068708 353 epComplete &= ~EP(endpoint);
samux 1:80ab0d068708 354
samux 1:80ab0d068708 355 //check which buffer has been filled
samux 1:80ab0d068708 356 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 357 // Double buffered (here we read the previous buffer which was used)
samux 1:80ab0d068708 358 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 359 bf = 0;
samux 1:80ab0d068708 360 } else {
samux 1:80ab0d068708 361 bf = 1;
samux 1:80ab0d068708 362 }
samux 1:80ab0d068708 363 }
samux 1:80ab0d068708 364
samux 1:80ab0d068708 365 // Find how many bytes were read
samux 1:80ab0d068708 366 *bytesRead = (uint32_t) (endpointState[endpoint].maxPacket - BYTES_REMAINING(ep[PHY_TO_LOG(endpoint)].out[bf]));
samux 1:80ab0d068708 367
samux 1:80ab0d068708 368 // Copy data
samux 1:80ab0d068708 369 USBMemCopy(data, ct->out, *bytesRead);
samux 1:80ab0d068708 370 return EP_COMPLETED;
samux 1:80ab0d068708 371 }
samux 1:80ab0d068708 372 }
samux 1:80ab0d068708 373
samux 1:80ab0d068708 374 void USBHAL::EP0getWriteResult(void) {
samux 8:335f2506f422 375 // Not required
samux 1:80ab0d068708 376 }
samux 1:80ab0d068708 377
samux 1:80ab0d068708 378 void USBHAL::EP0stall(void) {
samux 1:80ab0d068708 379 ep[0].in[0] = CMDSTS_S;
samux 1:80ab0d068708 380 ep[0].out[0] = CMDSTS_S;
samux 1:80ab0d068708 381 }
samux 1:80ab0d068708 382
samux 1:80ab0d068708 383 void USBHAL::setAddress(uint8_t address) {
samux 1:80ab0d068708 384 devCmdStat &= ~DEV_ADDR_MASK;
samux 1:80ab0d068708 385 devCmdStat |= DEV_ADDR(address);
samux 1:80ab0d068708 386 LPC_USB->DEVCMDSTAT = devCmdStat;
samux 1:80ab0d068708 387 }
samux 1:80ab0d068708 388
samux 1:80ab0d068708 389 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
samux 1:80ab0d068708 390 uint32_t flags = 0;
samux 1:80ab0d068708 391 uint32_t bf;
samux 1:80ab0d068708 392
samux 1:80ab0d068708 393 // Validate parameters
samux 1:80ab0d068708 394 if (data == NULL) {
samux 1:80ab0d068708 395 return EP_INVALID;
samux 1:80ab0d068708 396 }
samux 1:80ab0d068708 397
samux 1:80ab0d068708 398 if (endpoint > LAST_PHYSICAL_ENDPOINT) {
samux 1:80ab0d068708 399 return EP_INVALID;
samux 1:80ab0d068708 400 }
samux 1:80ab0d068708 401
samux 1:80ab0d068708 402 if ((endpoint==EP0IN) || (endpoint==EP0OUT)) {
samux 1:80ab0d068708 403 return EP_INVALID;
samux 1:80ab0d068708 404 }
samux 1:80ab0d068708 405
samux 1:80ab0d068708 406 if (size > endpointState[endpoint].maxPacket) {
samux 1:80ab0d068708 407 return EP_INVALID;
samux 1:80ab0d068708 408 }
samux 1:80ab0d068708 409
samux 1:80ab0d068708 410 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 411 // Double buffered
samux 1:80ab0d068708 412 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 413 bf = 1;
samux 1:80ab0d068708 414 } else {
samux 1:80ab0d068708 415 bf = 0;
samux 1:80ab0d068708 416 }
samux 1:80ab0d068708 417 } else {
samux 1:80ab0d068708 418 // Single buffered
samux 1:80ab0d068708 419 bf = 0;
samux 1:80ab0d068708 420 }
samux 1:80ab0d068708 421
samux 1:80ab0d068708 422 // Check if already active
samux 1:80ab0d068708 423 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_A) {
samux 1:80ab0d068708 424 return EP_INVALID;
samux 1:80ab0d068708 425 }
samux 1:80ab0d068708 426
samux 1:80ab0d068708 427 // Check if stalled
samux 1:80ab0d068708 428 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_S) {
samux 1:80ab0d068708 429 return EP_STALLED;
samux 1:80ab0d068708 430 }
samux 1:80ab0d068708 431
samux 1:80ab0d068708 432 // Copy data to USB RAM
samux 1:80ab0d068708 433 USBMemCopy((uint8_t *)endpointState[endpoint].buffer[bf], data, size);
samux 1:80ab0d068708 434
samux 1:80ab0d068708 435 // Add options
samux 1:80ab0d068708 436 if (endpointState[endpoint].options & RATE_FEEDBACK_MODE) {
samux 1:80ab0d068708 437 flags |= CMDSTS_RF;
samux 1:80ab0d068708 438 }
samux 1:80ab0d068708 439
samux 1:80ab0d068708 440 if (endpointState[endpoint].options & ISOCHRONOUS) {
samux 1:80ab0d068708 441 flags |= CMDSTS_T;
samux 1:80ab0d068708 442 }
samux 1:80ab0d068708 443
samux 1:80ab0d068708 444 // Add transfer
samux 1:80ab0d068708 445 ep[PHY_TO_LOG(endpoint)].in[bf] = CMDSTS_ADDRESS_OFFSET( \
samux 1:80ab0d068708 446 endpointState[endpoint].buffer[bf]) \
samux 1:80ab0d068708 447 | CMDSTS_NBYTES(size) | CMDSTS_A | flags;
samux 1:80ab0d068708 448
samux 1:80ab0d068708 449 return EP_PENDING;
samux 1:80ab0d068708 450 }
samux 1:80ab0d068708 451
samux 1:80ab0d068708 452 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
samux 1:80ab0d068708 453 uint32_t bf;
mbed_official 25:7c72828865f3 454
samux 1:80ab0d068708 455 // Validate parameters
samux 1:80ab0d068708 456 if (endpoint > LAST_PHYSICAL_ENDPOINT) {
samux 1:80ab0d068708 457 return EP_INVALID;
samux 1:80ab0d068708 458 }
samux 1:80ab0d068708 459
samux 1:80ab0d068708 460 if (OUT_EP(endpoint)) {
samux 1:80ab0d068708 461 return EP_INVALID;
samux 1:80ab0d068708 462 }
samux 1:80ab0d068708 463
samux 1:80ab0d068708 464 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 465 // Double buffered // TODO: FIX THIS
samux 1:80ab0d068708 466 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 467 bf = 1;
samux 1:80ab0d068708 468 } else {
samux 1:80ab0d068708 469 bf = 0;
samux 1:80ab0d068708 470 }
samux 1:80ab0d068708 471 } else {
samux 1:80ab0d068708 472 // Single buffered
samux 1:80ab0d068708 473 bf = 0;
samux 1:80ab0d068708 474 }
samux 1:80ab0d068708 475
samux 1:80ab0d068708 476 // Check if endpoint still active
samux 1:80ab0d068708 477 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_A) {
samux 1:80ab0d068708 478 return EP_PENDING;
samux 1:80ab0d068708 479 }
samux 1:80ab0d068708 480
samux 1:80ab0d068708 481 // Check if stalled
samux 1:80ab0d068708 482 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_S) {
samux 1:80ab0d068708 483 return EP_STALLED;
samux 1:80ab0d068708 484 }
samux 1:80ab0d068708 485
samux 1:80ab0d068708 486 return EP_COMPLETED;
samux 1:80ab0d068708 487 }
samux 1:80ab0d068708 488
samux 1:80ab0d068708 489 void USBHAL::stallEndpoint(uint8_t endpoint) {
samux 1:80ab0d068708 490
samux 8:335f2506f422 491 // FIX: should this clear active bit?
samux 1:80ab0d068708 492 if (IN_EP(endpoint)) {
samux 1:80ab0d068708 493 ep[PHY_TO_LOG(endpoint)].in[0] |= CMDSTS_S;
samux 1:80ab0d068708 494 ep[PHY_TO_LOG(endpoint)].in[1] |= CMDSTS_S;
samux 1:80ab0d068708 495 } else {
samux 1:80ab0d068708 496 ep[PHY_TO_LOG(endpoint)].out[0] |= CMDSTS_S;
samux 1:80ab0d068708 497 ep[PHY_TO_LOG(endpoint)].out[1] |= CMDSTS_S;
samux 1:80ab0d068708 498 }
samux 1:80ab0d068708 499 }
samux 1:80ab0d068708 500
samux 1:80ab0d068708 501 void USBHAL::unstallEndpoint(uint8_t endpoint) {
samux 1:80ab0d068708 502 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 503 // Double buffered
samux 1:80ab0d068708 504 if (IN_EP(endpoint)) {
samux 1:80ab0d068708 505 ep[PHY_TO_LOG(endpoint)].in[0] = 0; // S = 0
samux 1:80ab0d068708 506 ep[PHY_TO_LOG(endpoint)].in[1] = 0; // S = 0
samux 1:80ab0d068708 507
samux 1:80ab0d068708 508 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 8:335f2506f422 509 ep[PHY_TO_LOG(endpoint)].in[1] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 510 } else {
samux 8:335f2506f422 511 ep[PHY_TO_LOG(endpoint)].in[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 512 }
samux 1:80ab0d068708 513 } else {
samux 1:80ab0d068708 514 ep[PHY_TO_LOG(endpoint)].out[0] = 0; // S = 0
samux 1:80ab0d068708 515 ep[PHY_TO_LOG(endpoint)].out[1] = 0; // S = 0
samux 1:80ab0d068708 516
samux 1:80ab0d068708 517 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 8:335f2506f422 518 ep[PHY_TO_LOG(endpoint)].out[1] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 519 } else {
samux 8:335f2506f422 520 ep[PHY_TO_LOG(endpoint)].out[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 521 }
samux 1:80ab0d068708 522 }
samux 1:80ab0d068708 523 } else {
samux 1:80ab0d068708 524 // Single buffered
samux 1:80ab0d068708 525 if (IN_EP(endpoint)) {
samux 8:335f2506f422 526 ep[PHY_TO_LOG(endpoint)].in[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 527 } else {
samux 8:335f2506f422 528 ep[PHY_TO_LOG(endpoint)].out[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 529 }
samux 1:80ab0d068708 530 }
samux 1:80ab0d068708 531 }
samux 1:80ab0d068708 532
samux 1:80ab0d068708 533 bool USBHAL::getEndpointStallState(unsigned char endpoint) {
samux 1:80ab0d068708 534 if (IN_EP(endpoint)) {
samux 1:80ab0d068708 535 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 536 if (ep[PHY_TO_LOG(endpoint)].in[1] & CMDSTS_S) {
samux 1:80ab0d068708 537 return true;
samux 1:80ab0d068708 538 }
samux 1:80ab0d068708 539 } else {
samux 1:80ab0d068708 540 if (ep[PHY_TO_LOG(endpoint)].in[0] & CMDSTS_S) {
samux 1:80ab0d068708 541 return true;
samux 1:80ab0d068708 542 }
samux 1:80ab0d068708 543 }
samux 1:80ab0d068708 544 } else {
samux 1:80ab0d068708 545 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 546 if (ep[PHY_TO_LOG(endpoint)].out[1] & CMDSTS_S) {
samux 1:80ab0d068708 547 return true;
samux 1:80ab0d068708 548 }
samux 1:80ab0d068708 549 } else {
samux 1:80ab0d068708 550 if (ep[PHY_TO_LOG(endpoint)].out[0] & CMDSTS_S) {
samux 1:80ab0d068708 551 return true;
samux 1:80ab0d068708 552 }
samux 1:80ab0d068708 553 }
samux 1:80ab0d068708 554 }
samux 1:80ab0d068708 555
samux 1:80ab0d068708 556 return false;
samux 1:80ab0d068708 557 }
samux 1:80ab0d068708 558
samux 1:80ab0d068708 559 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t options) {
samux 1:80ab0d068708 560 uint32_t tmpEpRamPtr;
samux 1:80ab0d068708 561
samux 1:80ab0d068708 562 if (endpoint > LAST_PHYSICAL_ENDPOINT) {
samux 1:80ab0d068708 563 return false;
samux 1:80ab0d068708 564 }
samux 1:80ab0d068708 565
samux 1:80ab0d068708 566 // Not applicable to the control endpoints
samux 1:80ab0d068708 567 if ((endpoint==EP0IN) || (endpoint==EP0OUT)) {
samux 1:80ab0d068708 568 return false;
samux 1:80ab0d068708 569 }
samux 1:80ab0d068708 570
samux 1:80ab0d068708 571 // Allocate buffers in USB RAM
samux 1:80ab0d068708 572 tmpEpRamPtr = epRamPtr;
samux 1:80ab0d068708 573
samux 1:80ab0d068708 574 // Must be 64 byte aligned
samux 1:80ab0d068708 575 tmpEpRamPtr = ROUND_UP_TO_MULTIPLE(tmpEpRamPtr, 64);
samux 1:80ab0d068708 576
samux 1:80ab0d068708 577 if ((tmpEpRamPtr + maxPacket) > (USB_RAM_START + USB_RAM_SIZE)) {
samux 1:80ab0d068708 578 // Out of memory
samux 1:80ab0d068708 579 return false;
samux 1:80ab0d068708 580 }
samux 1:80ab0d068708 581
samux 1:80ab0d068708 582 // Allocate first buffer
samux 1:80ab0d068708 583 endpointState[endpoint].buffer[0] = tmpEpRamPtr;
samux 1:80ab0d068708 584 tmpEpRamPtr += maxPacket;
samux 1:80ab0d068708 585
samux 1:80ab0d068708 586 if (!(options & SINGLE_BUFFERED)) {
samux 1:80ab0d068708 587 // Must be 64 byte aligned
samux 1:80ab0d068708 588 tmpEpRamPtr = ROUND_UP_TO_MULTIPLE(tmpEpRamPtr, 64);
samux 1:80ab0d068708 589
samux 1:80ab0d068708 590 if ((tmpEpRamPtr + maxPacket) > (USB_RAM_START + USB_RAM_SIZE)) {
samux 1:80ab0d068708 591 // Out of memory
samux 1:80ab0d068708 592 return false;
samux 1:80ab0d068708 593 }
samux 1:80ab0d068708 594
samux 1:80ab0d068708 595 // Allocate second buffer
samux 1:80ab0d068708 596 endpointState[endpoint].buffer[1] = tmpEpRamPtr;
samux 1:80ab0d068708 597 tmpEpRamPtr += maxPacket;
samux 1:80ab0d068708 598 }
samux 1:80ab0d068708 599
samux 1:80ab0d068708 600 // Commit to this USB RAM allocation
samux 1:80ab0d068708 601 epRamPtr = tmpEpRamPtr;
samux 1:80ab0d068708 602
samux 1:80ab0d068708 603 // Remaining endpoint state values
samux 1:80ab0d068708 604 endpointState[endpoint].maxPacket = maxPacket;
samux 1:80ab0d068708 605 endpointState[endpoint].options = options;
samux 1:80ab0d068708 606
samux 1:80ab0d068708 607 // Enable double buffering if required
samux 1:80ab0d068708 608 if (options & SINGLE_BUFFERED) {
samux 1:80ab0d068708 609 LPC_USB->EPBUFCFG &= ~EP(endpoint);
samux 1:80ab0d068708 610 } else {
samux 1:80ab0d068708 611 // Double buffered
samux 1:80ab0d068708 612 LPC_USB->EPBUFCFG |= EP(endpoint);
samux 1:80ab0d068708 613 }
samux 1:80ab0d068708 614
samux 1:80ab0d068708 615 // Enable interrupt
samux 1:80ab0d068708 616 LPC_USB->INTEN |= EP(endpoint);
samux 1:80ab0d068708 617
samux 1:80ab0d068708 618 // Enable endpoint
samux 1:80ab0d068708 619 unstallEndpoint(endpoint);
samux 1:80ab0d068708 620 return true;
samux 1:80ab0d068708 621 }
samux 1:80ab0d068708 622
samux 1:80ab0d068708 623 void USBHAL::remoteWakeup(void) {
samux 1:80ab0d068708 624 // Clearing DSUS bit initiates a remote wakeup if the
samux 1:80ab0d068708 625 // device is currently enabled and suspended - otherwise
samux 1:80ab0d068708 626 // it has no effect.
samux 1:80ab0d068708 627 LPC_USB->DEVCMDSTAT = devCmdStat & ~DSUS;
samux 1:80ab0d068708 628 }
samux 1:80ab0d068708 629
samux 1:80ab0d068708 630
samux 1:80ab0d068708 631 static void disableEndpoints(void) {
samux 1:80ab0d068708 632 uint32_t logEp;
samux 1:80ab0d068708 633
samux 1:80ab0d068708 634 // Ref. Table 158 "When a bus reset is received, software
samux 1:80ab0d068708 635 // must set the disable bit of all endpoints to 1".
samux 1:80ab0d068708 636
samux 1:80ab0d068708 637 for (logEp = 1; logEp < NUMBER_OF_LOGICAL_ENDPOINTS; logEp++) {
samux 1:80ab0d068708 638 ep[logEp].out[0] = CMDSTS_D;
samux 1:80ab0d068708 639 ep[logEp].out[1] = CMDSTS_D;
samux 1:80ab0d068708 640 ep[logEp].in[0] = CMDSTS_D;
samux 1:80ab0d068708 641 ep[logEp].in[1] = CMDSTS_D;
samux 1:80ab0d068708 642 }
samux 1:80ab0d068708 643
samux 1:80ab0d068708 644 // Start of USB RAM for endpoints > 0
samux 1:80ab0d068708 645 epRamPtr = usbRamPtr;
samux 1:80ab0d068708 646 }
samux 1:80ab0d068708 647
samux 1:80ab0d068708 648
samux 1:80ab0d068708 649
samux 1:80ab0d068708 650 void USBHAL::_usbisr(void) {
samux 1:80ab0d068708 651 instance->usbisr();
samux 1:80ab0d068708 652 }
samux 1:80ab0d068708 653
samux 1:80ab0d068708 654 void USBHAL::usbisr(void) {
samux 1:80ab0d068708 655 // Start of frame
samux 1:80ab0d068708 656 if (LPC_USB->INTSTAT & FRAME_INT) {
samux 1:80ab0d068708 657 // Clear SOF interrupt
samux 1:80ab0d068708 658 LPC_USB->INTSTAT = FRAME_INT;
samux 1:80ab0d068708 659
samux 1:80ab0d068708 660 // SOF event, read frame number
samux 1:80ab0d068708 661 SOF(FRAME_NR(LPC_USB->INFO));
samux 1:80ab0d068708 662 }
samux 1:80ab0d068708 663
samux 1:80ab0d068708 664 // Device state
samux 1:80ab0d068708 665 if (LPC_USB->INTSTAT & DEV_INT) {
samux 1:80ab0d068708 666 LPC_USB->INTSTAT = DEV_INT;
samux 1:80ab0d068708 667
samux 1:80ab0d068708 668 if (LPC_USB->DEVCMDSTAT & DSUS_C) {
samux 1:80ab0d068708 669 // Suspend status changed
samux 1:80ab0d068708 670 LPC_USB->DEVCMDSTAT = devCmdStat | DSUS_C;
samux 1:80ab0d068708 671 if((LPC_USB->DEVCMDSTAT & DSUS) != 0) {
samux 1:80ab0d068708 672 suspendStateChanged(1);
samux 1:80ab0d068708 673 }
samux 1:80ab0d068708 674 }
samux 1:80ab0d068708 675
samux 1:80ab0d068708 676 if (LPC_USB->DEVCMDSTAT & DRES_C) {
samux 1:80ab0d068708 677 // Bus reset
samux 1:80ab0d068708 678 LPC_USB->DEVCMDSTAT = devCmdStat | DRES_C;
samux 1:80ab0d068708 679
samux 1:80ab0d068708 680 suspendStateChanged(0);
samux 1:80ab0d068708 681
samux 1:80ab0d068708 682 // Disable endpoints > 0
samux 1:80ab0d068708 683 disableEndpoints();
samux 1:80ab0d068708 684
samux 1:80ab0d068708 685 // Bus reset event
samux 1:80ab0d068708 686 busReset();
samux 1:80ab0d068708 687 }
samux 1:80ab0d068708 688 }
samux 1:80ab0d068708 689
samux 1:80ab0d068708 690 // Endpoint 0
samux 1:80ab0d068708 691 if (LPC_USB->INTSTAT & EP(EP0OUT)) {
samux 1:80ab0d068708 692 // Clear EP0OUT/SETUP interrupt
samux 1:80ab0d068708 693 LPC_USB->INTSTAT = EP(EP0OUT);
samux 1:80ab0d068708 694
samux 1:80ab0d068708 695 // Check if SETUP
samux 1:80ab0d068708 696 if (LPC_USB->DEVCMDSTAT & SETUP) {
samux 1:80ab0d068708 697 // Clear Active and Stall bits for EP0
samux 1:80ab0d068708 698 // Documentation does not make it clear if we must use the
samux 1:80ab0d068708 699 // EPSKIP register to achieve this, Fig. 16 and NXP reference
samux 1:80ab0d068708 700 // code suggests we can just clear the Active bits - check with
samux 1:80ab0d068708 701 // NXP to be sure.
samux 1:80ab0d068708 702 ep[0].in[0] = 0;
samux 1:80ab0d068708 703 ep[0].out[0] = 0;
samux 1:80ab0d068708 704
samux 1:80ab0d068708 705 // Clear EP0IN interrupt
samux 1:80ab0d068708 706 LPC_USB->INTSTAT = EP(EP0IN);
samux 1:80ab0d068708 707
samux 1:80ab0d068708 708 // Clear SETUP (and INTONNAK_CI/O) in device status register
samux 1:80ab0d068708 709 LPC_USB->DEVCMDSTAT = devCmdStat | SETUP;
samux 1:80ab0d068708 710
samux 1:80ab0d068708 711 // EP0 SETUP event (SETUP data received)
samux 1:80ab0d068708 712 EP0setupCallback();
samux 1:80ab0d068708 713 } else {
samux 1:80ab0d068708 714 // EP0OUT ACK event (OUT data received)
samux 1:80ab0d068708 715 EP0out();
samux 1:80ab0d068708 716 }
samux 1:80ab0d068708 717 }
samux 1:80ab0d068708 718
samux 1:80ab0d068708 719 if (LPC_USB->INTSTAT & EP(EP0IN)) {
samux 1:80ab0d068708 720 // Clear EP0IN interrupt
samux 1:80ab0d068708 721 LPC_USB->INTSTAT = EP(EP0IN);
samux 1:80ab0d068708 722
samux 1:80ab0d068708 723 // EP0IN ACK event (IN data sent)
samux 1:80ab0d068708 724 EP0in();
samux 1:80ab0d068708 725 }
mbed_official 25:7c72828865f3 726
samux 8:335f2506f422 727 for (uint8_t num = 2; num < 5*2; num++) {
samux 8:335f2506f422 728 if (LPC_USB->INTSTAT & EP(num)) {
samux 8:335f2506f422 729 LPC_USB->INTSTAT = EP(num);
samux 8:335f2506f422 730 epComplete |= EP(num);
samux 8:335f2506f422 731 if ((instance->*(epCallback[num - 2]))()) {
samux 8:335f2506f422 732 epComplete &= ~EP(num);
samux 8:335f2506f422 733 }
samux 8:335f2506f422 734 }
samux 1:80ab0d068708 735 }
samux 1:80ab0d068708 736 }
samux 1:80ab0d068708 737
samux 1:80ab0d068708 738 #endif