Diff: MAX11043/MAX11043.cpp

Revision:

57:1c9da8e90737

Parent:

53:3d5a3d241a5e

Child:

58:2fea32db466b

--- a/MAX11043/MAX11043.cpp	Wed Feb 12 00:37:04 2020 +0000
+++ b/MAX11043/MAX11043.cpp	Thu Feb 13 22:52:57 2020 +0000
@@ -598,7 +598,7 @@
 //----------------------------------------
 // Write a MAX11043 register.
 //
-// CMD_1aaa_aaaa_REGISTER_READ bit is cleared 0 indicating a write operation.
+// CMDOP_1aaa_aaaa_ReadRegister bit is cleared 0 indicating a write operation.
 //
 // MAX11043 register length can be determined by function RegSize.
 //
@@ -632,7 +632,7 @@
     
     //----------------------------------------
     // switch based on register address szie RegSize(commandByte)
-    //commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMD_0aaa_aa10_RdAddr_ReadAnyRegister) & 0xFF);
+    //commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
     switch(RegSize(commandByte))
     {
         case 8:  // 8-bit register size
@@ -681,7 +681,7 @@
 //----------------------------------------
 // Read an 8-bit MAX11043 register
 //
-// CMD_1aaa_aaaa_REGISTER_READ bit is set 1 indicating a read operation.
+// CMDOP_1aaa_aaaa_ReadRegister bit is set 1 indicating a read operation.
 //
 // MAX11043 register length can be determined by function RegSize.
 //
@@ -716,7 +716,7 @@
     
     //----------------------------------------
     // switch based on register address szie RegSize(regAddress)
-    //commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMD_0aaa_aa10_RdAddr_ReadAnyRegister) & 0xFF);
+    //commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
     switch(RegSize(commandByte))
     {
         case 8:  // 8-bit register size
@@ -724,7 +724,7 @@
                 // SPI 16-bit transfer
                 // SPI MOSI = 1aaa_aaaa_0000_0000
                 // SPI MISO = xxxx_xxxx_dddd_dddd
-                int16_t mosiData16 = ((CMD_0aaa_aa10_RdAddr_ReadAnyRegister | (int16_t)commandByte) << 8) | ((int16_t)0);
+                int16_t mosiData16 = ((CMDOP_0aaa_aa10_ReadRegister | (int16_t)commandByte) << 8) | ((int16_t)0);
                 SPIoutputCS(0);
                 int16_t misoData16 = SPIreadWrite16bits(mosiData16);
                 SPIoutputCS(1);
@@ -739,7 +739,7 @@
                 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
                 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
                 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_xxxx_xxxx
-                int32_t mosiData32 = ((CMD_0aaa_aa10_RdAddr_ReadAnyRegister | (int32_t)commandByte) << 24);
+                int32_t mosiData32 = ((CMDOP_0aaa_aa10_ReadRegister | (int32_t)commandByte) << 24);
                 SPIoutputCS(0);
                 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
                 SPIoutputCS(1);
@@ -751,7 +751,7 @@
                 // SPI 32-bit transfer
                 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
                 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
-                int32_t mosiData32 = ((CMD_0aaa_aa10_RdAddr_ReadAnyRegister | (int32_t)commandByte) << 24);
+                int32_t mosiData32 = ((CMDOP_0aaa_aa10_ReadRegister | (int32_t)commandByte) << 24);
                 SPIoutputCS(0);
                 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
                 SPIoutputCS(1);
@@ -774,13 +774,13 @@
     
     //----------------------------------------
     // switch based on register address value regAddress
-    // commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMD_0aaa_aa10_RdAddr_ReadAnyRegister) & 0xFF);
+    // commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
     switch(commandByte)
     {
         default:
-        case CMD_0aaa_aa00_WrAddr_WriteAnyRegister:
-        case CMD_0aaa_aa10_RdAddr_ReadAnyRegister:
-        case CMD_1111_1111_NoOperationMOSIidleHigh:
+        // case CMDOP_0aaa_aa00_WriteRegister:
+        // case CMDOP_0aaa_aa10_ReadRegister:
+        // case CMDOP_1111_1111_NoOperationMOSIidleHigh:
             return 0;  // undefined register size
         case CMD_0001_1110_d8_Rd07_Status:
         case CMD_0101_0100_d8_Wr15_FilterCAddress:
@@ -839,6 +839,26 @@
 }
 
 //----------------------------------------
+// Decode operation from commandByte
+//
+// @return operation such as idle, read register, write register, etc.
+MAX11043::MAX11043_CMDOP_enum_t MAX11043::DecodeCommand(MAX11043_CMD_enum_t commandByte)
+{
+    
+    //----------------------------------------
+    // decode operation from command byte
+    switch (commandByte & 0x83)
+    {
+    case CMDOP_0aaa_aa10_ReadRegister:
+        return CMDOP_0aaa_aa10_ReadRegister;
+    case CMDOP_0aaa_aa00_WriteRegister:
+        return CMDOP_0aaa_aa00_WriteRegister;
+    default:
+        return CMDOP_1111_1111_NoOperationMOSIidleHigh;
+    }
+}
+
+//----------------------------------------
 // Return the address field of a MAX11043 register
 //
 // @return register address field as given in datasheet
@@ -847,7 +867,7 @@
     
     //----------------------------------------
     // extract register address value from command byte
-    return (uint8_t)((commandByte &~ 0x83) >> 2); // CMD_0aaa_aa10_RdAddr_ReadAnyRegister
+    return (uint8_t)((commandByte &~ 0x83) >> 2); // CMDOP_0aaa_aa10_ReadRegister
 }
 
 //----------------------------------------
@@ -859,7 +879,7 @@
     
     //----------------------------------------
     // Test whether a command byte is a register read command
-    return (commandByte &~ 0x02) ? 1 : 0; // CMD_0aaa_aa10_RdAddr_ReadAnyRegister
+    return (commandByte &~ 0x02) ? 1 : 0; // CMDOP_0aaa_aa10_ReadRegister
 }
 
 //----------------------------------------
@@ -871,14 +891,14 @@
     
     //----------------------------------------
     // switch based on register address value regAddress
-    // commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMD_0aaa_aa10_RdAddr_ReadAnyRegister) & 0xFF);
+    // commandByte = (MAX11043_CMD_enum_t)((commandByte &~ CMDOP_0aaa_aa10_ReadRegister) & 0xFF);
     switch(commandByte)
     {
         default:
             return "";  // undefined register
-        // case CMD_0aaa_aa00_WrAddr_WriteAnyRegister: return "_______";
-        // case CMD_0aaa_aa10_RdAddr_ReadAnyRegister: return "_______";
-        // case CMD_1111_1111_NoOperationMOSIidleHigh: return "_______";
+        // case CMDOP_0aaa_aa00_WriteRegister: return "_______";
+        // case CMDOP_0aaa_aa10_ReadRegister: return "_______";
+        // case CMDOP_1111_1111_NoOperationMOSIidleHigh: return "_______";
         case CMD_0000_0010_d24_Rd00_ADCa: return "ADCa";
         case CMD_0000_0110_d24_Rd01_ADCb: return "ADCb";
         case CMD_0000_1010_d24_Rd02_ADCc: return "ADCc";