sw ADC SPI interface for the SOLID Slow control beta!!
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SWSPI_BI.cpp
00001 /* SWSPI, Software SPI library 00002 * Copyright (c) 2012-2014, David R. Van Wagner, http://techwithdave.blogspot.com 00003 * 00004 * Permission is hereby granted, free of charge, to any person obtaining a copy 00005 * of this software and associated documentation files (the "Software"), to deal 00006 * in the Software without restriction, including without limitation the rights 00007 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 00008 * copies of the Software, and to permit persons to whom the Software is 00009 * furnished to do so, subject to the following conditions: 00010 * 00011 * The above copyright notice and this permission notice shall be included in 00012 * all copies or substantial portions of the Software. 00013 * 00014 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 00015 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 00016 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 00017 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 00018 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 00019 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 00020 * THE SOFTWARE. 00021 00022 00023 * modified the software for adapt to the AD9249 ADC ( bi directional ) with LVDS interface 00024 * Software adapted for the SM1 project of the SOLID colaboration 00025 * (C) Wim Beaumont Univeristeit Antwerpen 2014 , 2015 00026 00027 */ 00028 00029 #include <mbed.h> 00030 #include "SWSPI_BI.h" 00031 #include "S_SCTRL_SM1_hwfunct.h" 00032 00033 #define SWSPI_BI_SRC_VER "1.50" 00034 00035 /** 00036 PARAM 00037 @misopin pointer to the input / output pin for the data communication 00038 @rdir_pin pointer to the output pin that sets the remote LVDS buffer to read / write 00039 @ldir_pin pointer to the output pin that sets the local LVDS buffer to read / write 00040 @sclk_pin pointer to the output pin that act as the clock signal for the interface 00041 00042 */ 00043 SWSPI_BI::SWSPI_BI(DigitalInOut *msio_pin, DigitalOut *rdir_pin,DigitalOut *ldir_pin, DigitalOut *sclk_pin) 00044 :getVersion( SWSPI_BI_HDR_VER , SWSPI_BI_SRC_VER , __TIME__, __DATE__) 00045 { 00046 00047 msio = msio_pin; 00048 rdir = rdir_pin; 00049 ldir = ldir_pin; 00050 sclk = sclk_pin; 00051 set_bi_spi_mo(1, msio,ldir,rdir); 00052 00053 format(8); 00054 frequency(500000); 00055 } 00056 00057 SWSPI_BI::~SWSPI_BI() 00058 { 00059 } 00060 00061 void SWSPI_BI::format( int bitsin, int modein ){ 00062 bits = bitsin; 00063 mode = modein; 00064 polarity = !((modein >> 1) & 1); 00065 phase = modein & 1; 00066 sclk->write(polarity); 00067 } 00068 00069 void SWSPI_BI::frequency(int hz) 00070 { 00071 this->freq = hz; 00072 } 00073 00074 void SWSPI_BI::write(unsigned int value, DigitalOut * cs, bool lastdata, int cs_pol,bool nxtrd ){ 00075 00076 // write data to output 00077 // assumption is that the cs line was just set from high to low so that the SPI slave is in read mode 00078 value= ~value; 00079 set_bi_spi_mo(1,msio,ldir,rdir); 00080 cs->write(cs_pol); 00081 for (int bit = bits-1; bit >= 0; --bit) { 00082 msio->write(((value >> bit) & 0x01) != 0); 00083 if(phase) { sclk->write(!polarity); wait(1.0/freq/2); sclk->write(polarity); 00084 if(!bit and nxtrd) set_bi_spi_mo(0,msio,ldir,rdir); // set already to input mode 00085 wait(1.0/freq/2); } 00086 else { wait(1.0/freq/2); sclk->write(!polarity); wait(1.0/freq/2); sclk->write(polarity); } 00087 00088 00089 } 00090 if( lastdata) { 00091 set_bi_spi_mo(0,msio,ldir,rdir); 00092 cs->write(!cs_pol); 00093 } 00094 else { 00095 } 00096 } 00097 00098 unsigned int SWSPI_BI::read( DigitalOut * cs, bool lastdata, int cs_pol ){ 00099 unsigned int read = 0; 00100 set_bi_spi_mo(0,msio,ldir,rdir); 00101 cs->write(cs_pol); 00102 wait(1.0/freq/2); 00103 for (int bit = bits-1; bit >= 0; --bit) { 00104 if (phase == 0) { 00105 if (msio->read()) read |= (1 << bit); 00106 00107 } 00108 sclk->write(!polarity); 00109 wait(1.0/freq/2); 00110 if (phase == 1) { 00111 if (msio->read()) read |= (1 << bit); 00112 } 00113 00114 sclk->write(polarity); 00115 wait(1.0/freq/2); 00116 } 00117 if( lastdata) { 00118 cs->write(!cs_pol); 00119 } 00120 // else keep current io config 00121 00122 00123 return ~read; 00124 } 00125
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