AD9249.cpp

00001 #include <mbed.h>
00002 /*
00003  * (C) Wim Beaumont Univeristeit Antwerpen  2014 , 2015
00004 */ 
00005 
00006 #include "AD9249.h"
00007 #include "SWSPI_BI.h"
00008 
00009 
00010 #define AD9249_SRC_VER  "1.22" 
00011 
00012 #define CS_POL 1
00013 #define NCS_POL 0
00014 /*
00015  const u16 AD9249::configreg=           0x0;
00016     const u16 AD9249::chip_id_reg=         0x1;
00017     const u16 AD9249::chip_grade_reg=      0x2;
00018    // const u16 AD9249::unused_reg= { 0x3, 0x07, 0xA, 0xE, 0xF ,0x11, 0x12,0x13, 0x17, 0x1D, 0x1E, 0x1F,0x20 };
00019     const u16 AD9249::dev_index2_reg=      0x4;
00020     const u16 AD9249::dev_index1_reg=      0x4;
00021     const u16 AD9249::transfer_reg=      0xFF;
00022     const u16 AD9249::power_mode_reg=      0x8;
00023     const u16 AD9249::clock_gobal_reg=      0x9;
00024     const u16 AD9249::clock_divide_reg=      0xB;
00025     const u16 AD9249::enhancement_ctr_reg=      0xC;
00026     const u16 AD9249::test_mode_reg=      0xD;
00027     const u16 AD9249::offset_adj_reg=      0x10;
00028     const u16 AD9249::output_mode_reg=      0x14;
00029     const u16 AD9249::output_adj_reg=      0x15;
00030     const u16 AD9249::output_phase_reg=      0x16;
00031     const u16 AD9249::vref_reg=      0x18;
00032     const u16 AD9249::usserpatt1_LSB_reg=      0x19;
00033     const u16 AD9249::usserpatt1_MSB_reg=      0x1A;
00034     const u16 AD9249::usserpatt2_LSB_reg=      0x1B;
00035     const u16 AD9249::usserpatt2_MSB_reg=      0x1C;
00036     const u16 AD9249::serial_out_cntr_reg=      0x21;
00037     const u16 AD9249::serial_status_reg=      0x22;
00038     const u16 AD9249::sample_rate_reg=      0x100;
00039     const u16 AD9249::user_io_ctr2_reg=      0x101;
00040     const u16 AD9249::user_io_ctr3_reg=      0x102;
00041     const u16 AD9249::sync_reg=      0x109;
00042   */ 
00043 
00044 
00045 AD9249::AD9249( SWSPI_BI* spi_dev, DigitalOut* csb_pin):getVersion( AD9249_HDR_VER,AD9249_SRC_VER, __TIME__, __DATE__) {  
00046     spi=spi_dev;csb=csb_pin;
00047 }
00048 
00049 
00050 AD9249::u32 AD9249::spi_cycle( u16 reg , bool rw , u16 nrbytes, u32 data){
00051     // format instruction 
00052         u32 read =0;
00053         reg = 0x1FFF & reg;  
00054         if (rw) reg |=0x8000;
00055         if (nrbytes > 2) return 0; // this function doesn't support stream 
00056         u32 stnrbytes = (nrbytes-1);
00057         stnrbytes =stnrbytes  <<13;
00058         reg|=stnrbytes;  // reg is now the instruction 
00059         spi->format(16,0); // should make sure the sclk is high 
00060         printf("send %04X \n\r",reg);
00061         
00062     
00063         
00064         if (rw) {
00065             spi->write(reg, csb , false ,CS_POL,true );
00066             spi->format((nrbytes)*8 ,0);
00067             read=spi->read(csb , true ,CS_POL );                                        
00068          }
00069          else{
00070             spi->write(reg, csb , false ,CS_POL );
00071             spi->format((nrbytes)*8 ,0);
00072             spi->write(data, csb , true ,CS_POL );
00073             
00074         }
00075                 
00076         return read;
00077     }
00078     
00079     
00080      bool AD9249::getDevInfo(u8&chipid,u8& grade ,u16 &rb ){
00081             u32 data=spi_cycle( chip_grade_reg, true , 2 , 0);
00082             rb=data;
00083             chipid= data & 0XFF;
00084             grade= (data >> 8) & 0xFF;
00085             return true;
00086          }
00087          
00088      bool AD9249::getDevId(u8&chipid ){
00089             bool rv=readReg8(chip_id_reg,chipid); 
00090             return rv;
00091          }
00092      bool AD9249::getGrade(u8&chipid ){          
00093             bool rv=readReg8(chip_grade_reg,chipid);                       
00094             return rv;
00095          }      
00096   
00097    bool AD9249::readReg16( u16 regaddr, u16& data){
00098        u32 datai=spi_cycle( regaddr , true , 2 , 0);
00099        data=(u16)( datai & 0XFFFF);
00100        return true;
00101   }
00102        
00103    bool AD9249::readReg8 ( u16 regaddr, u8& data){
00104         u32 datai=spi_cycle( regaddr, true , 1 , 0);
00105        data=(u8)( datai & 0XFF);
00106        return true;
00107   }         
00108  
00109  
00110          
00111    bool AD9249::setReg16( u16 regaddr, u16 data){
00112         u32 datai=spi_cycle( regaddr, false , 2 , (u32)data);
00113         return true;
00114     }
00115     
00116    bool AD9249::setReg8 ( u16 regaddr, u8 data){
00117        u32 datai=spi_cycle( regaddr, false , 1 , (u32)data);
00118        return true;
00119     }
00120     
00121          
00122     bool AD9249::setPattern1(u16 pattern){
00123         bool rv=setReg16( usserpatt1_MSB_reg,pattern);
00124         return rv;
00125         }
00126    bool AD9249::setPattern2(u16 pattern){
00127        bool rv=setReg16( usserpatt2_MSB_reg,pattern);
00128        return rv;
00129        }
00130    
00131    bool AD9249::readPattern1(u16& pattern){
00132         bool rv= readReg16( usserpatt1_MSB_reg,pattern);
00133         return rv;
00134        }
00135    bool AD9249::readPattern2(u16& pattern){
00136          bool rv= readReg16( usserpatt2_MSB_reg,pattern);
00137         return rv;
00138        
00139        }
00140        
00141        void AD9249::init1(){}
00142        void AD9249::init2(){}