valeria toffoli / Mbed OS COG4050_adxrs290_adxrs453

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Dependencies:   COG4050_ADT7420

Fork of COG4050_adxl355_adxl357-ver2 by ADI_CAC

ADXRS290/ADXRS290.h@9:1afd906c5ed2, 2018-09-07 (annotated)

Committer:
vtoffoli
Date:
Fri Sep 07 15:49:25 2018 +0000
Revision:
9:1afd906c5ed2
Parent:
6:45d2393ef468 
basic driver;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vtoffoli 6:45d2393ef468 1
vtoffoli 6:45d2393ef468 2 #ifndef ADXRS290_H_
vtoffoli 6:45d2393ef468 3 #define ADXRS290_H_
vtoffoli 6:45d2393ef468 4
vtoffoli 6:45d2393ef468 5 class ADXRS290
vtoffoli 6:45d2393ef468 6 {
vtoffoli 6:45d2393ef468 7 public:
vtoffoli 9:1afd906c5ed2 8 #define gyro_sens 0.005; // 200 [LSB/°/s]
vtoffoli 9:1afd906c5ed2 9 #define t_sens 0.1; // 10 [LSB/°C]
vtoffoli 6:45d2393ef468 10 // -------------------------- //
vtoffoli 6:45d2393ef468 11 // REGISTERS //
vtoffoli 6:45d2393ef468 12 // -------------------------- //
vtoffoli 6:45d2393ef468 13 typedef enum {
vtoffoli 9:1afd906c5ed2 14 ADI_ID = 0x00,
vtoffoli 9:1afd906c5ed2 15 MEMS_ID = 0x01,
vtoffoli 9:1afd906c5ed2 16 DEV_ID = 0x02,
vtoffoli 9:1afd906c5ed2 17 REV_ID = 0x03,
vtoffoli 6:45d2393ef468 18 SN0 = 0x04,
vtoffoli 6:45d2393ef468 19 SN1 = 0x05,
vtoffoli 6:45d2393ef468 20 SN2 = 0x06,
vtoffoli 6:45d2393ef468 21 SN3 = 0x07,
vtoffoli 6:45d2393ef468 22 DATAX0 = 0x08,
vtoffoli 6:45d2393ef468 23 DATAX1 = 0x09,
vtoffoli 6:45d2393ef468 24 DATAY0 = 0x0A,
vtoffoli 6:45d2393ef468 25 DATAY1 = 0x0B,
vtoffoli 6:45d2393ef468 26 TEMP0 = 0x0C,
vtoffoli 6:45d2393ef468 27 TEMP1 = 0x0D,
vtoffoli 6:45d2393ef468 28 POWER_CTL = 0x10,
vtoffoli 6:45d2393ef468 29 FILTER = 0x11,
vtoffoli 6:45d2393ef468 30 DATA_READY = 0x12
vtoffoli 6:45d2393ef468 31 } ADXRS290_register_t;
vtoffoli 6:45d2393ef468 32 // -------------------------- //
vtoffoli 6:45d2393ef468 33 // REGISTERS - DEFAULT VALUES //
vtoffoli 6:45d2393ef468 34 // -------------------------- //
vtoffoli 6:45d2393ef468 35 // Modes - POWER_CTL
vtoffoli 6:45d2393ef468 36 typedef enum {
vtoffoli 6:45d2393ef468 37 TEMP_ON = 0x00,
vtoffoli 6:45d2393ef468 38 TEMP_OFF = 0x01,
vtoffoli 6:45d2393ef468 39 STANDBY = 0x00,
vtoffoli 6:45d2393ef468 40 MEASUREMENT = 0x02
vtoffoli 6:45d2393ef468 41 } ADXL355_modes_t;
vtoffoli 6:45d2393ef468 42 // High-Pass and Low-Pass Filter - FILTER
vtoffoli 6:45d2393ef468 43 typedef enum {
vtoffoli 6:45d2393ef468 44 LPF480 = 0x00,
vtoffoli 6:45d2393ef468 45 LPF320 = 0x01,
vtoffoli 6:45d2393ef468 46 LPF160 = 0x02,
vtoffoli 6:45d2393ef468 47 LPF80 = 0x03,
vtoffoli 6:45d2393ef468 48 LPF56 = 0x04,
vtoffoli 6:45d2393ef468 49 LPF40 = 0x05,
vtoffoli 6:45d2393ef468 50 LPF28 = 0x06,
vtoffoli 6:45d2393ef468 51 LPF20 = 0x07,
vtoffoli 6:45d2393ef468 52 HPFOFF = 0x00,
vtoffoli 6:45d2393ef468 53 HPF001 = 0x10,
vtoffoli 6:45d2393ef468 54 HPF002 = 0x20,
vtoffoli 6:45d2393ef468 55 HPF004 = 0x30,
vtoffoli 6:45d2393ef468 56 HPF008 = 0x40,
vtoffoli 6:45d2393ef468 57 HPF017 = 0x50,
vtoffoli 6:45d2393ef468 58 HPF035 = 0x60,
vtoffoli 6:45d2393ef468 59 HPF070 = 0x70,
vtoffoli 6:45d2393ef468 60 HPF140 = 0x80,
vtoffoli 6:45d2393ef468 61 HPF280 = 0x90,
vtoffoli 6:45d2393ef468 62 HPF1130 = 0xA0
vtoffoli 6:45d2393ef468 63 } ADXRS290_filter_ctl_t;
vtoffoli 6:45d2393ef468 64 // External timing register - INT_MAP
vtoffoli 6:45d2393ef468 65 typedef enum {
vtoffoli 6:45d2393ef468 66 OVR_EN = 0x04,
vtoffoli 6:45d2393ef468 67 FULL_EN = 0x02,
vtoffoli 6:45d2393ef468 68 RDY_EN = 0x01
vtoffoli 6:45d2393ef468 69 } ADXRS290_intmap_ctl_t;
vtoffoli 6:45d2393ef468 70 // External timing register - SYNC
vtoffoli 6:45d2393ef468 71 typedef enum {
vtoffoli 6:45d2393ef468 72 ANAL_SYNC = 0x00,
vtoffoli 6:45d2393ef468 73 DIGI_SYNC = 0x01
vtoffoli 6:45d2393ef468 74 } ADXRS290_dataready_ctl_t;
vtoffoli 9:1afd906c5ed2 75 // -------------------------- //
vtoffoli 9:1afd906c5ed2 76 // OUTPUT DATA //
vtoffoli 9:1afd906c5ed2 77 // -------------------------- //
vtoffoli 9:1afd906c5ed2 78 typedef struct {
vtoffoli 9:1afd906c5ed2 79 float rt_x;
vtoffoli 9:1afd906c5ed2 80 float rt_y;
vtoffoli 9:1afd906c5ed2 81 float rt_z;
vtoffoli 9:1afd906c5ed2 82 } ADXRS290_rate_t;
vtoffoli 9:1afd906c5ed2 83 ADXRS290_rate_t rate_data;
vtoffoli 6:45d2393ef468 84 // -------------------------- //
vtoffoli 6:45d2393ef468 85 // FUNCTIONS //
vtoffoli 6:45d2393ef468 86 // -------------------------- //
vtoffoli 6:45d2393ef468 87 // SPI configuration & constructor
vtoffoli 6:45d2393ef468 88 ADXRS290(PinName cs_pin , PinName MOSI , PinName MISO , PinName SCK );
vtoffoli 6:45d2393ef468 89 void frequency(int hz);
vtoffoli 6:45d2393ef468 90 // SPI configuration & constructor
vtoffoli 6:45d2393ef468 91 void write_reg(ADXRS290_register_t reg, uint8_t data);
vtoffoli 6:45d2393ef468 92 uint8_t read_reg(ADXRS290_register_t reg);
vtoffoli 6:45d2393ef468 93 uint16_t read_reg_u16(ADXRS290_register_t reg);
vtoffoli 6:45d2393ef468 94 // ADXRS general register R/W methods
vtoffoli 6:45d2393ef468 95 void set_power_ctl_reg(uint8_t data);
vtoffoli 6:45d2393ef468 96 void set_filter_ctl_reg(ADXRS290_filter_ctl_t hpf, ADXRS290_filter_ctl_t odr);
vtoffoli 6:45d2393ef468 97 void set_sync(ADXRS290_dataready_ctl_t data);
vtoffoli 6:45d2393ef468 98 // ADXRS X/Y/T scanning methods
vtoffoli 6:45d2393ef468 99 uint16_t scanx();
vtoffoli 6:45d2393ef468 100 uint16_t scany();
vtoffoli 6:45d2393ef468 101 uint16_t scant();
vtoffoli 9:1afd906c5ed2 102 ADXRS290_rate_t scan();
vtoffoli 6:45d2393ef468 103 private:
vtoffoli 6:45d2393ef468 104 // SPI adxl355; ///< SPI instance of the ADXL
vtoffoli 9:1afd906c5ed2 105 Timeout conv_time;
vtoffoli 6:45d2393ef468 106 SPI adxrs290; DigitalOut cs;
vtoffoli 6:45d2393ef468 107 const static uint8_t _DEVICE_AD = 0x92; // contect of DEVID_AD (only-read) register
vtoffoli 6:45d2393ef468 108 const static uint8_t _DUMMY_BYTE = 0xAA; // 10101010
vtoffoli 6:45d2393ef468 109 const static uint8_t _WRITE_REG_CMD = 0x00; // write register
vtoffoli 6:45d2393ef468 110 const static uint8_t _READ_REG_CMD = 0x80; // read register
vtoffoli 6:45d2393ef468 111 const static uint8_t _SPI_MODE = 4; // timing scheme
vtoffoli 6:45d2393ef468 112 };
vtoffoli 6:45d2393ef468 113
vtoffoli 6:45d2393ef468 114 #endif