valeria toffoli
/
COG4050_adxrs290_adxrs453
driver for gyro
Fork of COG4050_adxl355_adxl357-ver2 by
ADXRS453/ADXRS453.h@9:1afd906c5ed2, 2018-09-07 (annotated)
- Committer:
- vtoffoli
- Date:
- Fri Sep 07 15:49:25 2018 +0000
- Revision:
- 9:1afd906c5ed2
basic driver;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
vtoffoli | 9:1afd906c5ed2 | 1 | |
vtoffoli | 9:1afd906c5ed2 | 2 | #ifndef ADXRS453_H_ |
vtoffoli | 9:1afd906c5ed2 | 3 | #define ADXRS453_H_ |
vtoffoli | 9:1afd906c5ed2 | 4 | |
vtoffoli | 9:1afd906c5ed2 | 5 | class ADXRS453 |
vtoffoli | 9:1afd906c5ed2 | 6 | { |
vtoffoli | 9:1afd906c5ed2 | 7 | public: |
vtoffoli | 9:1afd906c5ed2 | 8 | #define gyro_sens 0.0125; // 80 [LSB/°/s] |
vtoffoli | 9:1afd906c5ed2 | 9 | #define t_sens 0.2; // 5 [LSB/°C] |
vtoffoli | 9:1afd906c5ed2 | 10 | // -------------------------- // |
vtoffoli | 9:1afd906c5ed2 | 11 | // REGISTERS // |
vtoffoli | 9:1afd906c5ed2 | 12 | // -------------------------- // |
vtoffoli | 9:1afd906c5ed2 | 13 | typedef enum { |
vtoffoli | 9:1afd906c5ed2 | 14 | RATE1 = 0x00, |
vtoffoli | 9:1afd906c5ed2 | 15 | RATE0 = 0x01, |
vtoffoli | 9:1afd906c5ed2 | 16 | TEMP1 = 0x02, |
vtoffoli | 9:1afd906c5ed2 | 17 | TEMP0 = 0x03, |
vtoffoli | 9:1afd906c5ed2 | 18 | LOCST1 = 0x04, |
vtoffoli | 9:1afd906c5ed2 | 19 | LOCST0 = 0x05, |
vtoffoli | 9:1afd906c5ed2 | 20 | HICST1 = 0x06, |
vtoffoli | 9:1afd906c5ed2 | 21 | HICST0 = 0x07, |
vtoffoli | 9:1afd906c5ed2 | 22 | QUAD1 = 0x08, |
vtoffoli | 9:1afd906c5ed2 | 23 | QUAD0 = 0x09, |
vtoffoli | 9:1afd906c5ed2 | 24 | FAULT1 = 0x0A, |
vtoffoli | 9:1afd906c5ed2 | 25 | FAULT0 = 0x0B, |
vtoffoli | 9:1afd906c5ed2 | 26 | PID1 = 0x0C, |
vtoffoli | 9:1afd906c5ed2 | 27 | PID0 = 0x0D, |
vtoffoli | 9:1afd906c5ed2 | 28 | SN3 = 0x0E, |
vtoffoli | 9:1afd906c5ed2 | 29 | SN2 = 0x0F, |
vtoffoli | 9:1afd906c5ed2 | 30 | SN1 = 0x10, |
vtoffoli | 9:1afd906c5ed2 | 31 | SN0 = 0x11 |
vtoffoli | 9:1afd906c5ed2 | 32 | } ADXRS453_register_t; |
vtoffoli | 9:1afd906c5ed2 | 33 | // -------------------------- // |
vtoffoli | 9:1afd906c5ed2 | 34 | // OUTPUT DATA // |
vtoffoli | 9:1afd906c5ed2 | 35 | // -------------------------- // |
vtoffoli | 9:1afd906c5ed2 | 36 | typedef struct { |
vtoffoli | 9:1afd906c5ed2 | 37 | float rt_x; |
vtoffoli | 9:1afd906c5ed2 | 38 | float rt_y; |
vtoffoli | 9:1afd906c5ed2 | 39 | float rt_z; |
vtoffoli | 9:1afd906c5ed2 | 40 | } ADXRS453_rate_t; |
vtoffoli | 9:1afd906c5ed2 | 41 | ADXRS453_rate_t rate_data; |
vtoffoli | 9:1afd906c5ed2 | 42 | ADXRS453_rate_t selftest_data; |
vtoffoli | 9:1afd906c5ed2 | 43 | // -------------------------- // |
vtoffoli | 9:1afd906c5ed2 | 44 | // FUNCTIONS // |
vtoffoli | 9:1afd906c5ed2 | 45 | // -------------------------- // |
vtoffoli | 9:1afd906c5ed2 | 46 | // SPI configuration & constructor |
vtoffoli | 9:1afd906c5ed2 | 47 | ADXRS453(PinName cs_pin , PinName MOSI , PinName MISO , PinName SCK ); |
vtoffoli | 9:1afd906c5ed2 | 48 | void frequency(int hz); |
vtoffoli | 9:1afd906c5ed2 | 49 | // SPI configuration & constructor |
vtoffoli | 9:1afd906c5ed2 | 50 | void write_reg(ADXRS453_register_t reg, uint16_t data); |
vtoffoli | 9:1afd906c5ed2 | 51 | uint16_t read_reg(ADXRS453_register_t reg); |
vtoffoli | 9:1afd906c5ed2 | 52 | // ADXRS X/T/SelfTest scanning methods |
vtoffoli | 9:1afd906c5ed2 | 53 | uint16_t scanx(); |
vtoffoli | 9:1afd906c5ed2 | 54 | uint16_t scant(); |
vtoffoli | 9:1afd906c5ed2 | 55 | uint16_t scanst(); |
vtoffoli | 9:1afd906c5ed2 | 56 | uint16_t fault(); |
vtoffoli | 9:1afd906c5ed2 | 57 | // |
vtoffoli | 9:1afd906c5ed2 | 58 | void st(); |
vtoffoli | 9:1afd906c5ed2 | 59 | private: |
vtoffoli | 9:1afd906c5ed2 | 60 | // SPI adxl355; ///< SPI instance of the ADXL |
vtoffoli | 9:1afd906c5ed2 | 61 | SPI adxrs453; DigitalOut cs; |
vtoffoli | 9:1afd906c5ed2 | 62 | const static uint8_t _DEVICE_AD = 0xR01; // contect of DEVID_AD (only-read) register |
vtoffoli | 9:1afd906c5ed2 | 63 | const static uint8_t _DUMMY_BYTE = 0xAA; // 10101010 |
vtoffoli | 9:1afd906c5ed2 | 64 | const static uint8_t _WRITE_REG_CMD = 0x40; // write register |
vtoffoli | 9:1afd906c5ed2 | 65 | const static uint8_t _READ_REG_CMD = 0x80; // read register |
vtoffoli | 9:1afd906c5ed2 | 66 | const static uint8_t _SPI_MODE = 0; // timing scheme |
vtoffoli | 9:1afd906c5ed2 | 67 | }; |
vtoffoli | 9:1afd906c5ed2 | 68 | |
vtoffoli | 9:1afd906c5ed2 | 69 | #endif |