Vergil Cola / Mbed OS MQTTGatewayK64

Fork of my MQTTGateway

Dependencies:   mbed-http

easy-connect/mcr20a-rf-driver/source/MCR20Drv.h@0:f1d3878b8dd9, 2017-04-08 (annotated)

Committer:
vpcola
Date:
Sat Apr 08 14:45:51 2017 +0000
Revision:
0:f1d3878b8dd9
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vpcola 0:f1d3878b8dd9 1 /*!
vpcola 0:f1d3878b8dd9 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
vpcola 0:f1d3878b8dd9 3 * All rights reserved.
vpcola 0:f1d3878b8dd9 4 *
vpcola 0:f1d3878b8dd9 5 * \file MCR20Drv.h
vpcola 0:f1d3878b8dd9 6 *
vpcola 0:f1d3878b8dd9 7 * Redistribution and use in source and binary forms, with or without modification,
vpcola 0:f1d3878b8dd9 8 * are permitted provided that the following conditions are met:
vpcola 0:f1d3878b8dd9 9 *
vpcola 0:f1d3878b8dd9 10 * o Redistributions of source code must retain the above copyright notice, this list
vpcola 0:f1d3878b8dd9 11 * of conditions and the following disclaimer.
vpcola 0:f1d3878b8dd9 12 *
vpcola 0:f1d3878b8dd9 13 * o Redistributions in binary form must reproduce the above copyright notice, this
vpcola 0:f1d3878b8dd9 14 * list of conditions and the following disclaimer in the documentation and/or
vpcola 0:f1d3878b8dd9 15 * other materials provided with the distribution.
vpcola 0:f1d3878b8dd9 16 *
vpcola 0:f1d3878b8dd9 17 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
vpcola 0:f1d3878b8dd9 18 * contributors may be used to endorse or promote products derived from this
vpcola 0:f1d3878b8dd9 19 * software without specific prior written permission.
vpcola 0:f1d3878b8dd9 20 *
vpcola 0:f1d3878b8dd9 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
vpcola 0:f1d3878b8dd9 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
vpcola 0:f1d3878b8dd9 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vpcola 0:f1d3878b8dd9 24 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
vpcola 0:f1d3878b8dd9 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
vpcola 0:f1d3878b8dd9 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
vpcola 0:f1d3878b8dd9 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
vpcola 0:f1d3878b8dd9 28 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
vpcola 0:f1d3878b8dd9 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
vpcola 0:f1d3878b8dd9 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vpcola 0:f1d3878b8dd9 31 */
vpcola 0:f1d3878b8dd9 32
vpcola 0:f1d3878b8dd9 33 #ifndef __MCR20_DRV_H__
vpcola 0:f1d3878b8dd9 34 #define __MCR20_DRV_H__
vpcola 0:f1d3878b8dd9 35
vpcola 0:f1d3878b8dd9 36
vpcola 0:f1d3878b8dd9 37 /*****************************************************************************
vpcola 0:f1d3878b8dd9 38 * INCLUDED HEADERS *
vpcola 0:f1d3878b8dd9 39 *---------------------------------------------------------------------------*
vpcola 0:f1d3878b8dd9 40 * Add to this section all the headers that this module needs to include. *
vpcola 0:f1d3878b8dd9 41 * Note that it is not a good practice to include header files into header *
vpcola 0:f1d3878b8dd9 42 * files, so use this section only if there is no other better solution. *
vpcola 0:f1d3878b8dd9 43 *---------------------------------------------------------------------------*
vpcola 0:f1d3878b8dd9 44 *****************************************************************************/
vpcola 0:f1d3878b8dd9 45
vpcola 0:f1d3878b8dd9 46 /*****************************************************************************
vpcola 0:f1d3878b8dd9 47 * PRIVATE MACROS *
vpcola 0:f1d3878b8dd9 48 *---------------------------------------------------------------------------*
vpcola 0:f1d3878b8dd9 49 * Add to this section all the access macros, registers mappings, bit access *
vpcola 0:f1d3878b8dd9 50 * macros, masks, flags etc ...
vpcola 0:f1d3878b8dd9 51 *---------------------------------------------------------------------------*
vpcola 0:f1d3878b8dd9 52 *****************************************************************************/
vpcola 0:f1d3878b8dd9 53
vpcola 0:f1d3878b8dd9 54 /* Disable XCVR clock output by default, to reduce power consumption */
vpcola 0:f1d3878b8dd9 55 #ifndef gMCR20_ClkOutFreq_d
vpcola 0:f1d3878b8dd9 56 #define gMCR20_ClkOutFreq_d gCLK_OUT_FREQ_DISABLE
vpcola 0:f1d3878b8dd9 57 #endif
vpcola 0:f1d3878b8dd9 58
vpcola 0:f1d3878b8dd9 59 /*****************************************************************************
vpcola 0:f1d3878b8dd9 60 * PUBLIC FUNCTIONS *
vpcola 0:f1d3878b8dd9 61 *---------------------------------------------------------------------------*
vpcola 0:f1d3878b8dd9 62 * Add to this section all the global functions prototype preceded (as a *
vpcola 0:f1d3878b8dd9 63 * good practice) by the keyword 'extern' *
vpcola 0:f1d3878b8dd9 64 *---------------------------------------------------------------------------*
vpcola 0:f1d3878b8dd9 65 *****************************************************************************/
vpcola 0:f1d3878b8dd9 66
vpcola 0:f1d3878b8dd9 67 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 68 * Name: MCR20Drv_Init
vpcola 0:f1d3878b8dd9 69 * Description: -
vpcola 0:f1d3878b8dd9 70 * Parameters: -
vpcola 0:f1d3878b8dd9 71 * Return: -
vpcola 0:f1d3878b8dd9 72 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 73 extern void MCR20Drv_Init
vpcola 0:f1d3878b8dd9 74 (
vpcola 0:f1d3878b8dd9 75 void
vpcola 0:f1d3878b8dd9 76 );
vpcola 0:f1d3878b8dd9 77
vpcola 0:f1d3878b8dd9 78 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 79 * Name: MCR20Drv_SPI_DMA_Init
vpcola 0:f1d3878b8dd9 80 * Description: -
vpcola 0:f1d3878b8dd9 81 * Parameters: -
vpcola 0:f1d3878b8dd9 82 * Return: -
vpcola 0:f1d3878b8dd9 83 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 84 void MCR20Drv_SPI_DMA_Init
vpcola 0:f1d3878b8dd9 85 (
vpcola 0:f1d3878b8dd9 86 void
vpcola 0:f1d3878b8dd9 87 );
vpcola 0:f1d3878b8dd9 88
vpcola 0:f1d3878b8dd9 89 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 90 * Name: MCR20Drv_Start_PB_DMA_SPI_Write
vpcola 0:f1d3878b8dd9 91 * Description: -
vpcola 0:f1d3878b8dd9 92 * Parameters: -
vpcola 0:f1d3878b8dd9 93 * Return: -
vpcola 0:f1d3878b8dd9 94 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 95 void MCR20Drv_Start_PB_DMA_SPI_Write
vpcola 0:f1d3878b8dd9 96 (
vpcola 0:f1d3878b8dd9 97 uint8_t * srcAddress,
vpcola 0:f1d3878b8dd9 98 uint8_t numOfBytes
vpcola 0:f1d3878b8dd9 99 );
vpcola 0:f1d3878b8dd9 100
vpcola 0:f1d3878b8dd9 101 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 102 * Name: MCR20Drv_Start_PB_DMA_SPI_Read
vpcola 0:f1d3878b8dd9 103 * Description: -
vpcola 0:f1d3878b8dd9 104 * Parameters: -
vpcola 0:f1d3878b8dd9 105 * Return: -
vpcola 0:f1d3878b8dd9 106 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 107 void MCR20Drv_Start_PB_DMA_SPI_Read
vpcola 0:f1d3878b8dd9 108 (
vpcola 0:f1d3878b8dd9 109 uint8_t * dstAddress,
vpcola 0:f1d3878b8dd9 110 uint8_t numOfBytes
vpcola 0:f1d3878b8dd9 111 );
vpcola 0:f1d3878b8dd9 112
vpcola 0:f1d3878b8dd9 113 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 114 * Name: MCR20Drv_DirectAccessSPIWrite
vpcola 0:f1d3878b8dd9 115 * Description: -
vpcola 0:f1d3878b8dd9 116 * Parameters: -
vpcola 0:f1d3878b8dd9 117 * Return: -
vpcola 0:f1d3878b8dd9 118 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 119 void MCR20Drv_DirectAccessSPIWrite
vpcola 0:f1d3878b8dd9 120 (
vpcola 0:f1d3878b8dd9 121 uint8_t address,
vpcola 0:f1d3878b8dd9 122 uint8_t value
vpcola 0:f1d3878b8dd9 123 );
vpcola 0:f1d3878b8dd9 124
vpcola 0:f1d3878b8dd9 125 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 126 * Name: MCR20Drv_DirectAccessSPIMultiByteWrite
vpcola 0:f1d3878b8dd9 127 * Description: -
vpcola 0:f1d3878b8dd9 128 * Parameters: -
vpcola 0:f1d3878b8dd9 129 * Return: -
vpcola 0:f1d3878b8dd9 130 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 131 void MCR20Drv_DirectAccessSPIMultiByteWrite
vpcola 0:f1d3878b8dd9 132 (
vpcola 0:f1d3878b8dd9 133 uint8_t startAddress,
vpcola 0:f1d3878b8dd9 134 uint8_t * byteArray,
vpcola 0:f1d3878b8dd9 135 uint8_t numOfBytes
vpcola 0:f1d3878b8dd9 136 );
vpcola 0:f1d3878b8dd9 137
vpcola 0:f1d3878b8dd9 138 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 139 * Name: MCR20Drv_PB_SPIBurstWrite
vpcola 0:f1d3878b8dd9 140 * Description: -
vpcola 0:f1d3878b8dd9 141 * Parameters: -
vpcola 0:f1d3878b8dd9 142 * Return: -
vpcola 0:f1d3878b8dd9 143 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 144 void MCR20Drv_PB_SPIBurstWrite
vpcola 0:f1d3878b8dd9 145 (
vpcola 0:f1d3878b8dd9 146 uint8_t * byteArray,
vpcola 0:f1d3878b8dd9 147 uint8_t numOfBytes
vpcola 0:f1d3878b8dd9 148 );
vpcola 0:f1d3878b8dd9 149
vpcola 0:f1d3878b8dd9 150 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 151 * Name: MCR20Drv_DirectAccessSPIRead
vpcola 0:f1d3878b8dd9 152 * Description: -
vpcola 0:f1d3878b8dd9 153 * Parameters: -
vpcola 0:f1d3878b8dd9 154 * Return: -
vpcola 0:f1d3878b8dd9 155 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 156 uint8_t MCR20Drv_DirectAccessSPIRead
vpcola 0:f1d3878b8dd9 157 (
vpcola 0:f1d3878b8dd9 158 uint8_t address
vpcola 0:f1d3878b8dd9 159 );
vpcola 0:f1d3878b8dd9 160
vpcola 0:f1d3878b8dd9 161 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 162 * Name: MCR20Drv_DirectAccessSPIMultyByteRead
vpcola 0:f1d3878b8dd9 163 * Description: -
vpcola 0:f1d3878b8dd9 164 * Parameters: -
vpcola 0:f1d3878b8dd9 165 * Return: -
vpcola 0:f1d3878b8dd9 166 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 167
vpcola 0:f1d3878b8dd9 168 uint8_t MCR20Drv_DirectAccessSPIMultiByteRead
vpcola 0:f1d3878b8dd9 169 (
vpcola 0:f1d3878b8dd9 170 uint8_t startAddress,
vpcola 0:f1d3878b8dd9 171 uint8_t * byteArray,
vpcola 0:f1d3878b8dd9 172 uint8_t numOfBytes
vpcola 0:f1d3878b8dd9 173 );
vpcola 0:f1d3878b8dd9 174
vpcola 0:f1d3878b8dd9 175 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 176 * Name: MCR20Drv_PB_SPIByteWrite
vpcola 0:f1d3878b8dd9 177 * Description: -
vpcola 0:f1d3878b8dd9 178 * Parameters: -
vpcola 0:f1d3878b8dd9 179 * Return: -
vpcola 0:f1d3878b8dd9 180 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 181 void MCR20Drv_PB_SPIByteWrite
vpcola 0:f1d3878b8dd9 182 (
vpcola 0:f1d3878b8dd9 183 uint8_t address,
vpcola 0:f1d3878b8dd9 184 uint8_t value
vpcola 0:f1d3878b8dd9 185 );
vpcola 0:f1d3878b8dd9 186
vpcola 0:f1d3878b8dd9 187 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 188 * Name: MCR20Drv_PB_SPIBurstRead
vpcola 0:f1d3878b8dd9 189 * Description: -
vpcola 0:f1d3878b8dd9 190 * Parameters: -
vpcola 0:f1d3878b8dd9 191 * Return: -
vpcola 0:f1d3878b8dd9 192 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 193 uint8_t MCR20Drv_PB_SPIBurstRead
vpcola 0:f1d3878b8dd9 194 (
vpcola 0:f1d3878b8dd9 195 uint8_t * byteArray,
vpcola 0:f1d3878b8dd9 196 uint8_t numOfBytes
vpcola 0:f1d3878b8dd9 197 );
vpcola 0:f1d3878b8dd9 198
vpcola 0:f1d3878b8dd9 199 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 200 * Name: MCR20Drv_IndirectAccessSPIWrite
vpcola 0:f1d3878b8dd9 201 * Description: -
vpcola 0:f1d3878b8dd9 202 * Parameters: -
vpcola 0:f1d3878b8dd9 203 * Return: -
vpcola 0:f1d3878b8dd9 204 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 205 void MCR20Drv_IndirectAccessSPIWrite
vpcola 0:f1d3878b8dd9 206 (
vpcola 0:f1d3878b8dd9 207 uint8_t address,
vpcola 0:f1d3878b8dd9 208 uint8_t value
vpcola 0:f1d3878b8dd9 209 );
vpcola 0:f1d3878b8dd9 210
vpcola 0:f1d3878b8dd9 211 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 212 * Name: MCR20Drv_IndirectAccessSPIMultiByteWrite
vpcola 0:f1d3878b8dd9 213 * Description: -
vpcola 0:f1d3878b8dd9 214 * Parameters: -
vpcola 0:f1d3878b8dd9 215 * Return: -
vpcola 0:f1d3878b8dd9 216 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 217 void MCR20Drv_IndirectAccessSPIMultiByteWrite
vpcola 0:f1d3878b8dd9 218 (
vpcola 0:f1d3878b8dd9 219 uint8_t startAddress,
vpcola 0:f1d3878b8dd9 220 uint8_t * byteArray,
vpcola 0:f1d3878b8dd9 221 uint8_t numOfBytes
vpcola 0:f1d3878b8dd9 222 );
vpcola 0:f1d3878b8dd9 223
vpcola 0:f1d3878b8dd9 224 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 225 * Name: MCR20Drv_IndirectAccessSPIRead
vpcola 0:f1d3878b8dd9 226 * Description: -
vpcola 0:f1d3878b8dd9 227 * Parameters: -
vpcola 0:f1d3878b8dd9 228 * Return: -
vpcola 0:f1d3878b8dd9 229 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 230 uint8_t MCR20Drv_IndirectAccessSPIRead
vpcola 0:f1d3878b8dd9 231 (
vpcola 0:f1d3878b8dd9 232 uint8_t address
vpcola 0:f1d3878b8dd9 233 );
vpcola 0:f1d3878b8dd9 234 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 235 * Name: MCR20Drv_IndirectAccessSPIMultiByteRead
vpcola 0:f1d3878b8dd9 236 * Description: -
vpcola 0:f1d3878b8dd9 237 * Parameters: -
vpcola 0:f1d3878b8dd9 238 * Return: -
vpcola 0:f1d3878b8dd9 239 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 240 void MCR20Drv_IndirectAccessSPIMultiByteRead
vpcola 0:f1d3878b8dd9 241 (
vpcola 0:f1d3878b8dd9 242 uint8_t startAddress,
vpcola 0:f1d3878b8dd9 243 uint8_t * byteArray,
vpcola 0:f1d3878b8dd9 244 uint8_t numOfBytes
vpcola 0:f1d3878b8dd9 245 );
vpcola 0:f1d3878b8dd9 246
vpcola 0:f1d3878b8dd9 247 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 248 * Name: MCR20Drv_IsIrqPending
vpcola 0:f1d3878b8dd9 249 * Description: -
vpcola 0:f1d3878b8dd9 250 * Parameters: -
vpcola 0:f1d3878b8dd9 251 * Return: -
vpcola 0:f1d3878b8dd9 252 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 253 uint32_t MCR20Drv_IsIrqPending
vpcola 0:f1d3878b8dd9 254 (
vpcola 0:f1d3878b8dd9 255 void
vpcola 0:f1d3878b8dd9 256 );
vpcola 0:f1d3878b8dd9 257
vpcola 0:f1d3878b8dd9 258 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 259 * Name: MCR20Drv_IRQ_Disable
vpcola 0:f1d3878b8dd9 260 * Description: -
vpcola 0:f1d3878b8dd9 261 * Parameters: -
vpcola 0:f1d3878b8dd9 262 * Return: -
vpcola 0:f1d3878b8dd9 263 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 264 void MCR20Drv_IRQ_Disable
vpcola 0:f1d3878b8dd9 265 (
vpcola 0:f1d3878b8dd9 266 void
vpcola 0:f1d3878b8dd9 267 );
vpcola 0:f1d3878b8dd9 268
vpcola 0:f1d3878b8dd9 269 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 270 * Name: MCR20Drv_IRQ_Enable
vpcola 0:f1d3878b8dd9 271 * Description: -
vpcola 0:f1d3878b8dd9 272 * Parameters: -
vpcola 0:f1d3878b8dd9 273 * Return: -
vpcola 0:f1d3878b8dd9 274 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 275 void MCR20Drv_IRQ_Enable
vpcola 0:f1d3878b8dd9 276 (
vpcola 0:f1d3878b8dd9 277 void
vpcola 0:f1d3878b8dd9 278 );
vpcola 0:f1d3878b8dd9 279
vpcola 0:f1d3878b8dd9 280 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 281 * Name: MCR20Drv_RST_PortConfig
vpcola 0:f1d3878b8dd9 282 * Description: -
vpcola 0:f1d3878b8dd9 283 * Parameters: -
vpcola 0:f1d3878b8dd9 284 * Return: -
vpcola 0:f1d3878b8dd9 285 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 286 void MCR20Drv_RST_B_PortConfig
vpcola 0:f1d3878b8dd9 287 (
vpcola 0:f1d3878b8dd9 288 void
vpcola 0:f1d3878b8dd9 289 );
vpcola 0:f1d3878b8dd9 290
vpcola 0:f1d3878b8dd9 291 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 292 * Name: MCR20Drv_RST_Assert
vpcola 0:f1d3878b8dd9 293 * Description: -
vpcola 0:f1d3878b8dd9 294 * Parameters: -
vpcola 0:f1d3878b8dd9 295 * Return: -
vpcola 0:f1d3878b8dd9 296 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 297 void MCR20Drv_RST_B_Assert
vpcola 0:f1d3878b8dd9 298 (
vpcola 0:f1d3878b8dd9 299 void
vpcola 0:f1d3878b8dd9 300 );
vpcola 0:f1d3878b8dd9 301
vpcola 0:f1d3878b8dd9 302 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 303 * Name: MCR20Drv_RST_Deassert
vpcola 0:f1d3878b8dd9 304 * Description: -
vpcola 0:f1d3878b8dd9 305 * Parameters: -
vpcola 0:f1d3878b8dd9 306 * Return: -
vpcola 0:f1d3878b8dd9 307 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 308 void MCR20Drv_RST_B_Deassert
vpcola 0:f1d3878b8dd9 309 (
vpcola 0:f1d3878b8dd9 310 void
vpcola 0:f1d3878b8dd9 311 );
vpcola 0:f1d3878b8dd9 312
vpcola 0:f1d3878b8dd9 313 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 314 * Name: MCR20Drv_SoftRST_Assert
vpcola 0:f1d3878b8dd9 315 * Description: -
vpcola 0:f1d3878b8dd9 316 * Parameters: -
vpcola 0:f1d3878b8dd9 317 * Return: -
vpcola 0:f1d3878b8dd9 318 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 319 void MCR20Drv_SoftRST_Assert
vpcola 0:f1d3878b8dd9 320 (
vpcola 0:f1d3878b8dd9 321 void
vpcola 0:f1d3878b8dd9 322 );
vpcola 0:f1d3878b8dd9 323
vpcola 0:f1d3878b8dd9 324 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 325 * Name: MCR20Drv_SoftRST_Deassert
vpcola 0:f1d3878b8dd9 326 * Description: -
vpcola 0:f1d3878b8dd9 327 * Parameters: -
vpcola 0:f1d3878b8dd9 328 * Return: -
vpcola 0:f1d3878b8dd9 329 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 330 void MCR20Drv_SoftRST_Deassert
vpcola 0:f1d3878b8dd9 331 (
vpcola 0:f1d3878b8dd9 332 void
vpcola 0:f1d3878b8dd9 333 );
vpcola 0:f1d3878b8dd9 334
vpcola 0:f1d3878b8dd9 335
vpcola 0:f1d3878b8dd9 336 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 337 * Name: MCR20Drv_RESET
vpcola 0:f1d3878b8dd9 338 * Description: -
vpcola 0:f1d3878b8dd9 339 * Parameters: -
vpcola 0:f1d3878b8dd9 340 * Return: -
vpcola 0:f1d3878b8dd9 341 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 342 void MCR20Drv_RESET
vpcola 0:f1d3878b8dd9 343 (
vpcola 0:f1d3878b8dd9 344 void
vpcola 0:f1d3878b8dd9 345 );
vpcola 0:f1d3878b8dd9 346
vpcola 0:f1d3878b8dd9 347 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 348 * Name: MCR20Drv_Soft_RESET
vpcola 0:f1d3878b8dd9 349 * Description: -
vpcola 0:f1d3878b8dd9 350 * Parameters: -
vpcola 0:f1d3878b8dd9 351 * Return: -
vpcola 0:f1d3878b8dd9 352 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 353 void MCR20Drv_Soft_RESET
vpcola 0:f1d3878b8dd9 354 (
vpcola 0:f1d3878b8dd9 355 void
vpcola 0:f1d3878b8dd9 356 );
vpcola 0:f1d3878b8dd9 357
vpcola 0:f1d3878b8dd9 358 /*---------------------------------------------------------------------------
vpcola 0:f1d3878b8dd9 359 * Name: MCR20Drv_Set_CLK_OUT_Freq
vpcola 0:f1d3878b8dd9 360 * Description: -
vpcola 0:f1d3878b8dd9 361 * Parameters: -
vpcola 0:f1d3878b8dd9 362 * Return: -
vpcola 0:f1d3878b8dd9 363 *---------------------------------------------------------------------------*/
vpcola 0:f1d3878b8dd9 364 void MCR20Drv_Set_CLK_OUT_Freq
vpcola 0:f1d3878b8dd9 365 (
vpcola 0:f1d3878b8dd9 366 uint8_t freqDiv
vpcola 0:f1d3878b8dd9 367 );
vpcola 0:f1d3878b8dd9 368
vpcola 0:f1d3878b8dd9 369 #define ProtectFromMCR20Interrupt() MCR20Drv_IRQ_Disable()
vpcola 0:f1d3878b8dd9 370 #define UnprotectFromMCR20Interrupt() MCR20Drv_IRQ_Enable()
vpcola 0:f1d3878b8dd9 371
vpcola 0:f1d3878b8dd9 372 #endif /* __MCR20_DRV_H__ */