V M / Mbed 2 deprecated NRF24L01_receiver

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Dependencies:   mbed nRF24L01P

mbed-rtos/rtx/KL25Z/ARM/HAL_CM0.c@0:fdfe93cb9255, 2013-05-27 (annotated)

Committer:
vmihalcut
Date:
Mon May 27 06:06:31 2013 +0000
Revision:
0:fdfe93cb9255
NRF24L01 receiver

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vmihalcut 0:fdfe93cb9255 1 /*----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 2 * RL-ARM - RTX
vmihalcut 0:fdfe93cb9255 3 *----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 4 * Name: HAL_CM0.C
vmihalcut 0:fdfe93cb9255 5 * Purpose: Hardware Abstraction Layer for Cortex-M0
vmihalcut 0:fdfe93cb9255 6 * Rev.: V4.60
vmihalcut 0:fdfe93cb9255 7 *----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 8 *
vmihalcut 0:fdfe93cb9255 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
vmihalcut 0:fdfe93cb9255 10 * All rights reserved.
vmihalcut 0:fdfe93cb9255 11 * Redistribution and use in source and binary forms, with or without
vmihalcut 0:fdfe93cb9255 12 * modification, are permitted provided that the following conditions are met:
vmihalcut 0:fdfe93cb9255 13 * - Redistributions of source code must retain the above copyright
vmihalcut 0:fdfe93cb9255 14 * notice, this list of conditions and the following disclaimer.
vmihalcut 0:fdfe93cb9255 15 * - Redistributions in binary form must reproduce the above copyright
vmihalcut 0:fdfe93cb9255 16 * notice, this list of conditions and the following disclaimer in the
vmihalcut 0:fdfe93cb9255 17 * documentation and/or other materials provided with the distribution.
vmihalcut 0:fdfe93cb9255 18 * - Neither the name of ARM nor the names of its contributors may be used
vmihalcut 0:fdfe93cb9255 19 * to endorse or promote products derived from this software without
vmihalcut 0:fdfe93cb9255 20 * specific prior written permission.
vmihalcut 0:fdfe93cb9255 21 *
vmihalcut 0:fdfe93cb9255 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vmihalcut 0:fdfe93cb9255 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vmihalcut 0:fdfe93cb9255 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
vmihalcut 0:fdfe93cb9255 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
vmihalcut 0:fdfe93cb9255 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
vmihalcut 0:fdfe93cb9255 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
vmihalcut 0:fdfe93cb9255 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
vmihalcut 0:fdfe93cb9255 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
vmihalcut 0:fdfe93cb9255 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
vmihalcut 0:fdfe93cb9255 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
vmihalcut 0:fdfe93cb9255 32 * POSSIBILITY OF SUCH DAMAGE.
vmihalcut 0:fdfe93cb9255 33 *---------------------------------------------------------------------------*/
vmihalcut 0:fdfe93cb9255 34
vmihalcut 0:fdfe93cb9255 35 #include "rt_TypeDef.h"
vmihalcut 0:fdfe93cb9255 36 #include "RTX_Conf.h"
vmihalcut 0:fdfe93cb9255 37 #include "rt_System.h"
vmihalcut 0:fdfe93cb9255 38 #include "rt_HAL_CM.h"
vmihalcut 0:fdfe93cb9255 39 #include "rt_Task.h"
vmihalcut 0:fdfe93cb9255 40 #include "rt_MemBox.h"
vmihalcut 0:fdfe93cb9255 41
vmihalcut 0:fdfe93cb9255 42
vmihalcut 0:fdfe93cb9255 43 /*----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 44 * Functions
vmihalcut 0:fdfe93cb9255 45 *---------------------------------------------------------------------------*/
vmihalcut 0:fdfe93cb9255 46
vmihalcut 0:fdfe93cb9255 47
vmihalcut 0:fdfe93cb9255 48 /*--------------------------- rt_set_PSP ------------------------------------*/
vmihalcut 0:fdfe93cb9255 49
vmihalcut 0:fdfe93cb9255 50 __asm void rt_set_PSP (U32 stack) {
vmihalcut 0:fdfe93cb9255 51 MSR PSP,R0
vmihalcut 0:fdfe93cb9255 52 BX LR
vmihalcut 0:fdfe93cb9255 53 }
vmihalcut 0:fdfe93cb9255 54
vmihalcut 0:fdfe93cb9255 55
vmihalcut 0:fdfe93cb9255 56 /*--------------------------- rt_get_PSP ------------------------------------*/
vmihalcut 0:fdfe93cb9255 57
vmihalcut 0:fdfe93cb9255 58 __asm U32 rt_get_PSP (void) {
vmihalcut 0:fdfe93cb9255 59 MRS R0,PSP
vmihalcut 0:fdfe93cb9255 60 BX LR
vmihalcut 0:fdfe93cb9255 61 }
vmihalcut 0:fdfe93cb9255 62
vmihalcut 0:fdfe93cb9255 63
vmihalcut 0:fdfe93cb9255 64 /*--------------------------- os_set_env ------------------------------------*/
vmihalcut 0:fdfe93cb9255 65
vmihalcut 0:fdfe93cb9255 66 __asm void os_set_env (void) {
vmihalcut 0:fdfe93cb9255 67 /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
vmihalcut 0:fdfe93cb9255 68 MOV R0,SP ; PSP = MSP
vmihalcut 0:fdfe93cb9255 69 MSR PSP,R0
vmihalcut 0:fdfe93cb9255 70 LDR R0,=__cpp(&os_flags)
vmihalcut 0:fdfe93cb9255 71 LDRB R0,[R0]
vmihalcut 0:fdfe93cb9255 72 LSLS R0,#31
vmihalcut 0:fdfe93cb9255 73 BNE PrivilegedE
vmihalcut 0:fdfe93cb9255 74 MOVS R0,#0x03 ; Unprivileged Thread mode, use PSP
vmihalcut 0:fdfe93cb9255 75 MSR CONTROL,R0
vmihalcut 0:fdfe93cb9255 76 BX LR
vmihalcut 0:fdfe93cb9255 77 PrivilegedE
vmihalcut 0:fdfe93cb9255 78 MOVS R0,#0x02 ; Privileged Thread mode, use PSP
vmihalcut 0:fdfe93cb9255 79 MSR CONTROL,R0
vmihalcut 0:fdfe93cb9255 80 BX LR
vmihalcut 0:fdfe93cb9255 81
vmihalcut 0:fdfe93cb9255 82 ALIGN
vmihalcut 0:fdfe93cb9255 83 }
vmihalcut 0:fdfe93cb9255 84
vmihalcut 0:fdfe93cb9255 85
vmihalcut 0:fdfe93cb9255 86 /*--------------------------- _alloc_box ------------------------------------*/
vmihalcut 0:fdfe93cb9255 87
vmihalcut 0:fdfe93cb9255 88 __asm void *_alloc_box (void *box_mem) {
vmihalcut 0:fdfe93cb9255 89 /* Function wrapper for Unprivileged/Privileged mode. */
vmihalcut 0:fdfe93cb9255 90 LDR R3,=__cpp(rt_alloc_box)
vmihalcut 0:fdfe93cb9255 91 MOV R12,R3
vmihalcut 0:fdfe93cb9255 92 MRS R3,IPSR
vmihalcut 0:fdfe93cb9255 93 LSLS R3,#24
vmihalcut 0:fdfe93cb9255 94 BNE PrivilegedA
vmihalcut 0:fdfe93cb9255 95 MRS R3,CONTROL
vmihalcut 0:fdfe93cb9255 96 LSLS R3,#31
vmihalcut 0:fdfe93cb9255 97 BEQ PrivilegedA
vmihalcut 0:fdfe93cb9255 98 SVC 0
vmihalcut 0:fdfe93cb9255 99 BX LR
vmihalcut 0:fdfe93cb9255 100 PrivilegedA
vmihalcut 0:fdfe93cb9255 101 BX R12
vmihalcut 0:fdfe93cb9255 102
vmihalcut 0:fdfe93cb9255 103 ALIGN
vmihalcut 0:fdfe93cb9255 104 }
vmihalcut 0:fdfe93cb9255 105
vmihalcut 0:fdfe93cb9255 106
vmihalcut 0:fdfe93cb9255 107 /*--------------------------- _free_box -------------------------------------*/
vmihalcut 0:fdfe93cb9255 108
vmihalcut 0:fdfe93cb9255 109 __asm int _free_box (void *box_mem, void *box) {
vmihalcut 0:fdfe93cb9255 110 /* Function wrapper for Unprivileged/Privileged mode. */
vmihalcut 0:fdfe93cb9255 111 LDR R3,=__cpp(rt_free_box)
vmihalcut 0:fdfe93cb9255 112 MOV R12,R3
vmihalcut 0:fdfe93cb9255 113 MRS R3,IPSR
vmihalcut 0:fdfe93cb9255 114 LSLS R3,#24
vmihalcut 0:fdfe93cb9255 115 BNE PrivilegedF
vmihalcut 0:fdfe93cb9255 116 MRS R3,CONTROL
vmihalcut 0:fdfe93cb9255 117 LSLS R3,#31
vmihalcut 0:fdfe93cb9255 118 BEQ PrivilegedF
vmihalcut 0:fdfe93cb9255 119 SVC 0
vmihalcut 0:fdfe93cb9255 120 BX LR
vmihalcut 0:fdfe93cb9255 121 PrivilegedF
vmihalcut 0:fdfe93cb9255 122 BX R12
vmihalcut 0:fdfe93cb9255 123
vmihalcut 0:fdfe93cb9255 124 ALIGN
vmihalcut 0:fdfe93cb9255 125 }
vmihalcut 0:fdfe93cb9255 126
vmihalcut 0:fdfe93cb9255 127
vmihalcut 0:fdfe93cb9255 128 /*-------------------------- SVC_Handler ------------------------------------*/
vmihalcut 0:fdfe93cb9255 129
vmihalcut 0:fdfe93cb9255 130 __asm void SVC_Handler (void) {
vmihalcut 0:fdfe93cb9255 131 PRESERVE8
vmihalcut 0:fdfe93cb9255 132
vmihalcut 0:fdfe93cb9255 133 IMPORT SVC_Count
vmihalcut 0:fdfe93cb9255 134 IMPORT SVC_Table
vmihalcut 0:fdfe93cb9255 135 IMPORT rt_stk_check
vmihalcut 0:fdfe93cb9255 136
vmihalcut 0:fdfe93cb9255 137 MRS R0,PSP ; Read PSP
vmihalcut 0:fdfe93cb9255 138 LDR R1,[R0,#24] ; Read Saved PC from Stack
vmihalcut 0:fdfe93cb9255 139 SUBS R1,R1,#2 ; Point to SVC Instruction
vmihalcut 0:fdfe93cb9255 140 LDRB R1,[R1] ; Load SVC Number
vmihalcut 0:fdfe93cb9255 141 CMP R1,#0
vmihalcut 0:fdfe93cb9255 142 BNE SVC_User ; User SVC Number > 0
vmihalcut 0:fdfe93cb9255 143
vmihalcut 0:fdfe93cb9255 144 MOV LR,R4
vmihalcut 0:fdfe93cb9255 145 LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
vmihalcut 0:fdfe93cb9255 146 MOV R12,R4
vmihalcut 0:fdfe93cb9255 147 MOV R4,LR
vmihalcut 0:fdfe93cb9255 148 BLX R12 ; Call SVC Function
vmihalcut 0:fdfe93cb9255 149
vmihalcut 0:fdfe93cb9255 150 MRS R3,PSP ; Read PSP
vmihalcut 0:fdfe93cb9255 151 STMIA R3!,{R0-R2} ; Store return values
vmihalcut 0:fdfe93cb9255 152
vmihalcut 0:fdfe93cb9255 153 LDR R3,=__cpp(&os_tsk)
vmihalcut 0:fdfe93cb9255 154 LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
vmihalcut 0:fdfe93cb9255 155 CMP R1,R2
vmihalcut 0:fdfe93cb9255 156 BEQ SVC_Exit ; no task switch
vmihalcut 0:fdfe93cb9255 157
vmihalcut 0:fdfe93cb9255 158 SUBS R3,#8
vmihalcut 0:fdfe93cb9255 159 CMP R1,#0 ; Runtask deleted?
vmihalcut 0:fdfe93cb9255 160 BEQ SVC_Next
vmihalcut 0:fdfe93cb9255 161
vmihalcut 0:fdfe93cb9255 162 MRS R0,PSP ; Read PSP
vmihalcut 0:fdfe93cb9255 163 SUBS R0,R0,#32 ; Adjust Start Address
vmihalcut 0:fdfe93cb9255 164 STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
vmihalcut 0:fdfe93cb9255 165 STMIA R0!,{R4-R7} ; Save old context (R4-R7)
vmihalcut 0:fdfe93cb9255 166 MOV R4,R8
vmihalcut 0:fdfe93cb9255 167 MOV R5,R9
vmihalcut 0:fdfe93cb9255 168 MOV R6,R10
vmihalcut 0:fdfe93cb9255 169 MOV R7,R11
vmihalcut 0:fdfe93cb9255 170 STMIA R0!,{R4-R7} ; Save old context (R8-R11)
vmihalcut 0:fdfe93cb9255 171
vmihalcut 0:fdfe93cb9255 172 PUSH {R2,R3}
vmihalcut 0:fdfe93cb9255 173 BL rt_stk_check ; Check for Stack overflow
vmihalcut 0:fdfe93cb9255 174 POP {R2,R3}
vmihalcut 0:fdfe93cb9255 175
vmihalcut 0:fdfe93cb9255 176 SVC_Next
vmihalcut 0:fdfe93cb9255 177 STR R2,[R3] ; os_tsk.run = os_tsk.new
vmihalcut 0:fdfe93cb9255 178
vmihalcut 0:fdfe93cb9255 179 LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
vmihalcut 0:fdfe93cb9255 180 ADDS R0,R0,#16 ; Adjust Start Address
vmihalcut 0:fdfe93cb9255 181 LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
vmihalcut 0:fdfe93cb9255 182 MOV R8,R4
vmihalcut 0:fdfe93cb9255 183 MOV R9,R5
vmihalcut 0:fdfe93cb9255 184 MOV R10,R6
vmihalcut 0:fdfe93cb9255 185 MOV R11,R7
vmihalcut 0:fdfe93cb9255 186 MSR PSP,R0 ; Write PSP
vmihalcut 0:fdfe93cb9255 187 SUBS R0,R0,#32 ; Adjust Start Address
vmihalcut 0:fdfe93cb9255 188 LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
vmihalcut 0:fdfe93cb9255 189
vmihalcut 0:fdfe93cb9255 190 SVC_Exit
vmihalcut 0:fdfe93cb9255 191 MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
vmihalcut 0:fdfe93cb9255 192 MVNS R0,R0
vmihalcut 0:fdfe93cb9255 193 BX R0 ; RETI to Thread Mode, use PSP
vmihalcut 0:fdfe93cb9255 194
vmihalcut 0:fdfe93cb9255 195 /*------------------- User SVC ------------------------------*/
vmihalcut 0:fdfe93cb9255 196
vmihalcut 0:fdfe93cb9255 197 SVC_User
vmihalcut 0:fdfe93cb9255 198 PUSH {R4,LR} ; Save Registers
vmihalcut 0:fdfe93cb9255 199 LDR R2,=SVC_Count
vmihalcut 0:fdfe93cb9255 200 LDR R2,[R2]
vmihalcut 0:fdfe93cb9255 201 CMP R1,R2
vmihalcut 0:fdfe93cb9255 202 BHI SVC_Done ; Overflow
vmihalcut 0:fdfe93cb9255 203
vmihalcut 0:fdfe93cb9255 204 LDR R4,=SVC_Table-4
vmihalcut 0:fdfe93cb9255 205 LSLS R1,R1,#2
vmihalcut 0:fdfe93cb9255 206 LDR R4,[R4,R1] ; Load SVC Function Address
vmihalcut 0:fdfe93cb9255 207 MOV LR,R4
vmihalcut 0:fdfe93cb9255 208
vmihalcut 0:fdfe93cb9255 209 LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
vmihalcut 0:fdfe93cb9255 210 MOV R12,R4
vmihalcut 0:fdfe93cb9255 211 BLX LR ; Call SVC Function
vmihalcut 0:fdfe93cb9255 212
vmihalcut 0:fdfe93cb9255 213 MRS R4,PSP ; Read PSP
vmihalcut 0:fdfe93cb9255 214 STMIA R4!,{R0-R3} ; Function return values
vmihalcut 0:fdfe93cb9255 215 SVC_Done
vmihalcut 0:fdfe93cb9255 216 POP {R4,PC} ; RETI
vmihalcut 0:fdfe93cb9255 217
vmihalcut 0:fdfe93cb9255 218 ALIGN
vmihalcut 0:fdfe93cb9255 219 }
vmihalcut 0:fdfe93cb9255 220
vmihalcut 0:fdfe93cb9255 221
vmihalcut 0:fdfe93cb9255 222 /*-------------------------- PendSV_Handler ---------------------------------*/
vmihalcut 0:fdfe93cb9255 223
vmihalcut 0:fdfe93cb9255 224 __asm void PendSV_Handler (void) {
vmihalcut 0:fdfe93cb9255 225 PRESERVE8
vmihalcut 0:fdfe93cb9255 226
vmihalcut 0:fdfe93cb9255 227 BL __cpp(rt_pop_req)
vmihalcut 0:fdfe93cb9255 228
vmihalcut 0:fdfe93cb9255 229 Sys_Switch
vmihalcut 0:fdfe93cb9255 230 LDR R3,=__cpp(&os_tsk)
vmihalcut 0:fdfe93cb9255 231 LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
vmihalcut 0:fdfe93cb9255 232 CMP R1,R2
vmihalcut 0:fdfe93cb9255 233 BEQ Sys_Exit ; no task switch
vmihalcut 0:fdfe93cb9255 234
vmihalcut 0:fdfe93cb9255 235 SUBS R3,#8
vmihalcut 0:fdfe93cb9255 236
vmihalcut 0:fdfe93cb9255 237 MRS R0,PSP ; Read PSP
vmihalcut 0:fdfe93cb9255 238 SUBS R0,R0,#32 ; Adjust Start Address
vmihalcut 0:fdfe93cb9255 239 STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
vmihalcut 0:fdfe93cb9255 240 STMIA R0!,{R4-R7} ; Save old context (R4-R7)
vmihalcut 0:fdfe93cb9255 241 MOV R4,R8
vmihalcut 0:fdfe93cb9255 242 MOV R5,R9
vmihalcut 0:fdfe93cb9255 243 MOV R6,R10
vmihalcut 0:fdfe93cb9255 244 MOV R7,R11
vmihalcut 0:fdfe93cb9255 245 STMIA R0!,{R4-R7} ; Save old context (R8-R11)
vmihalcut 0:fdfe93cb9255 246
vmihalcut 0:fdfe93cb9255 247 PUSH {R2,R3}
vmihalcut 0:fdfe93cb9255 248 BL rt_stk_check ; Check for Stack overflow
vmihalcut 0:fdfe93cb9255 249 POP {R2,R3}
vmihalcut 0:fdfe93cb9255 250
vmihalcut 0:fdfe93cb9255 251 STR R2,[R3] ; os_tsk.run = os_tsk.new
vmihalcut 0:fdfe93cb9255 252
vmihalcut 0:fdfe93cb9255 253 LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
vmihalcut 0:fdfe93cb9255 254 ADDS R0,R0,#16 ; Adjust Start Address
vmihalcut 0:fdfe93cb9255 255 LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
vmihalcut 0:fdfe93cb9255 256 MOV R8,R4
vmihalcut 0:fdfe93cb9255 257 MOV R9,R5
vmihalcut 0:fdfe93cb9255 258 MOV R10,R6
vmihalcut 0:fdfe93cb9255 259 MOV R11,R7
vmihalcut 0:fdfe93cb9255 260 MSR PSP,R0 ; Write PSP
vmihalcut 0:fdfe93cb9255 261 SUBS R0,R0,#32 ; Adjust Start Address
vmihalcut 0:fdfe93cb9255 262 LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
vmihalcut 0:fdfe93cb9255 263
vmihalcut 0:fdfe93cb9255 264 Sys_Exit
vmihalcut 0:fdfe93cb9255 265 MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
vmihalcut 0:fdfe93cb9255 266 MVNS R0,R0
vmihalcut 0:fdfe93cb9255 267 BX R0 ; RETI to Thread Mode, use PSP
vmihalcut 0:fdfe93cb9255 268
vmihalcut 0:fdfe93cb9255 269 ALIGN
vmihalcut 0:fdfe93cb9255 270 }
vmihalcut 0:fdfe93cb9255 271
vmihalcut 0:fdfe93cb9255 272
vmihalcut 0:fdfe93cb9255 273 /*-------------------------- SysTick_Handler --------------------------------*/
vmihalcut 0:fdfe93cb9255 274
vmihalcut 0:fdfe93cb9255 275 __asm void SysTick_Handler (void) {
vmihalcut 0:fdfe93cb9255 276 PRESERVE8
vmihalcut 0:fdfe93cb9255 277
vmihalcut 0:fdfe93cb9255 278 BL __cpp(rt_systick)
vmihalcut 0:fdfe93cb9255 279 B Sys_Switch
vmihalcut 0:fdfe93cb9255 280
vmihalcut 0:fdfe93cb9255 281 ALIGN
vmihalcut 0:fdfe93cb9255 282 }
vmihalcut 0:fdfe93cb9255 283
vmihalcut 0:fdfe93cb9255 284
vmihalcut 0:fdfe93cb9255 285 /*-------------------------- OS_Tick_Handler --------------------------------*/
vmihalcut 0:fdfe93cb9255 286
vmihalcut 0:fdfe93cb9255 287 __asm void OS_Tick_Handler (void) {
vmihalcut 0:fdfe93cb9255 288 PRESERVE8
vmihalcut 0:fdfe93cb9255 289
vmihalcut 0:fdfe93cb9255 290 BL __cpp(os_tick_irqack)
vmihalcut 0:fdfe93cb9255 291 BL __cpp(rt_systick)
vmihalcut 0:fdfe93cb9255 292 B Sys_Switch
vmihalcut 0:fdfe93cb9255 293
vmihalcut 0:fdfe93cb9255 294 ALIGN
vmihalcut 0:fdfe93cb9255 295 }
vmihalcut 0:fdfe93cb9255 296
vmihalcut 0:fdfe93cb9255 297
vmihalcut 0:fdfe93cb9255 298 /*----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 299 * end of file
vmihalcut 0:fdfe93cb9255 300 *---------------------------------------------------------------------------*/
vmihalcut 0:fdfe93cb9255 301