NRF com

Dependencies:   mbed nRF24L01P

Committer:
vmihalcut
Date:
Mon May 27 06:06:31 2013 +0000
Revision:
0:fdfe93cb9255
NRF24L01 receiver

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vmihalcut 0:fdfe93cb9255 1 /*----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 2 * RL-ARM - RTX
vmihalcut 0:fdfe93cb9255 3 *----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 4 * Name: HAL_CM.C
vmihalcut 0:fdfe93cb9255 5 * Purpose: Hardware Abstraction Layer for Cortex-M
vmihalcut 0:fdfe93cb9255 6 * Rev.: V4.60
vmihalcut 0:fdfe93cb9255 7 *----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 8 *
vmihalcut 0:fdfe93cb9255 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
vmihalcut 0:fdfe93cb9255 10 * All rights reserved.
vmihalcut 0:fdfe93cb9255 11 * Redistribution and use in source and binary forms, with or without
vmihalcut 0:fdfe93cb9255 12 * modification, are permitted provided that the following conditions are met:
vmihalcut 0:fdfe93cb9255 13 * - Redistributions of source code must retain the above copyright
vmihalcut 0:fdfe93cb9255 14 * notice, this list of conditions and the following disclaimer.
vmihalcut 0:fdfe93cb9255 15 * - Redistributions in binary form must reproduce the above copyright
vmihalcut 0:fdfe93cb9255 16 * notice, this list of conditions and the following disclaimer in the
vmihalcut 0:fdfe93cb9255 17 * documentation and/or other materials provided with the distribution.
vmihalcut 0:fdfe93cb9255 18 * - Neither the name of ARM nor the names of its contributors may be used
vmihalcut 0:fdfe93cb9255 19 * to endorse or promote products derived from this software without
vmihalcut 0:fdfe93cb9255 20 * specific prior written permission.
vmihalcut 0:fdfe93cb9255 21 *
vmihalcut 0:fdfe93cb9255 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vmihalcut 0:fdfe93cb9255 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vmihalcut 0:fdfe93cb9255 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
vmihalcut 0:fdfe93cb9255 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
vmihalcut 0:fdfe93cb9255 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
vmihalcut 0:fdfe93cb9255 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
vmihalcut 0:fdfe93cb9255 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
vmihalcut 0:fdfe93cb9255 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
vmihalcut 0:fdfe93cb9255 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
vmihalcut 0:fdfe93cb9255 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
vmihalcut 0:fdfe93cb9255 32 * POSSIBILITY OF SUCH DAMAGE.
vmihalcut 0:fdfe93cb9255 33 *---------------------------------------------------------------------------*/
vmihalcut 0:fdfe93cb9255 34
vmihalcut 0:fdfe93cb9255 35 #include "rt_TypeDef.h"
vmihalcut 0:fdfe93cb9255 36 #include "RTX_Conf.h"
vmihalcut 0:fdfe93cb9255 37 #include "rt_HAL_CM.h"
vmihalcut 0:fdfe93cb9255 38
vmihalcut 0:fdfe93cb9255 39
vmihalcut 0:fdfe93cb9255 40 /*----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 41 * Global Variables
vmihalcut 0:fdfe93cb9255 42 *---------------------------------------------------------------------------*/
vmihalcut 0:fdfe93cb9255 43
vmihalcut 0:fdfe93cb9255 44 #ifdef DBG_MSG
vmihalcut 0:fdfe93cb9255 45 BIT dbg_msg;
vmihalcut 0:fdfe93cb9255 46 #endif
vmihalcut 0:fdfe93cb9255 47
vmihalcut 0:fdfe93cb9255 48 /*----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 49 * Functions
vmihalcut 0:fdfe93cb9255 50 *---------------------------------------------------------------------------*/
vmihalcut 0:fdfe93cb9255 51
vmihalcut 0:fdfe93cb9255 52
vmihalcut 0:fdfe93cb9255 53 /*--------------------------- rt_init_stack ---------------------------------*/
vmihalcut 0:fdfe93cb9255 54
vmihalcut 0:fdfe93cb9255 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
vmihalcut 0:fdfe93cb9255 56 /* Prepare TCB and saved context for a first time start of a task. */
vmihalcut 0:fdfe93cb9255 57 U32 *stk,i,size;
vmihalcut 0:fdfe93cb9255 58
vmihalcut 0:fdfe93cb9255 59 /* Prepare a complete interrupt frame for first task start */
vmihalcut 0:fdfe93cb9255 60 size = p_TCB->priv_stack >> 2;
vmihalcut 0:fdfe93cb9255 61
vmihalcut 0:fdfe93cb9255 62 /* Write to the top of stack. */
vmihalcut 0:fdfe93cb9255 63 stk = &p_TCB->stack[size];
vmihalcut 0:fdfe93cb9255 64
vmihalcut 0:fdfe93cb9255 65 /* Auto correct to 8-byte ARM stack alignment. */
vmihalcut 0:fdfe93cb9255 66 if ((U32)stk & 0x04) {
vmihalcut 0:fdfe93cb9255 67 stk--;
vmihalcut 0:fdfe93cb9255 68 }
vmihalcut 0:fdfe93cb9255 69
vmihalcut 0:fdfe93cb9255 70 stk -= 16;
vmihalcut 0:fdfe93cb9255 71
vmihalcut 0:fdfe93cb9255 72 /* Default xPSR and initial PC */
vmihalcut 0:fdfe93cb9255 73 stk[15] = INITIAL_xPSR;
vmihalcut 0:fdfe93cb9255 74 stk[14] = (U32)task_body;
vmihalcut 0:fdfe93cb9255 75
vmihalcut 0:fdfe93cb9255 76 /* Clear R4-R11,R0-R3,R12,LR registers. */
vmihalcut 0:fdfe93cb9255 77 for (i = 0; i < 14; i++) {
vmihalcut 0:fdfe93cb9255 78 stk[i] = 0;
vmihalcut 0:fdfe93cb9255 79 }
vmihalcut 0:fdfe93cb9255 80
vmihalcut 0:fdfe93cb9255 81 /* Assign a void pointer to R0. */
vmihalcut 0:fdfe93cb9255 82 stk[8] = (U32)p_TCB->msg;
vmihalcut 0:fdfe93cb9255 83
vmihalcut 0:fdfe93cb9255 84 /* Initial Task stack pointer. */
vmihalcut 0:fdfe93cb9255 85 p_TCB->tsk_stack = (U32)stk;
vmihalcut 0:fdfe93cb9255 86
vmihalcut 0:fdfe93cb9255 87 /* Task entry point. */
vmihalcut 0:fdfe93cb9255 88 p_TCB->ptask = task_body;
vmihalcut 0:fdfe93cb9255 89
vmihalcut 0:fdfe93cb9255 90 /* Set a magic word for checking of stack overflow.
vmihalcut 0:fdfe93cb9255 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
vmihalcut 0:fdfe93cb9255 92 heap, therefore the last word of the stack is a moving target.
vmihalcut 0:fdfe93cb9255 93 We want to do stack/heap collision detection instead.
vmihalcut 0:fdfe93cb9255 94 */
vmihalcut 0:fdfe93cb9255 95 if (p_TCB->task_id != 0x01)
vmihalcut 0:fdfe93cb9255 96 p_TCB->stack[0] = MAGIC_WORD;
vmihalcut 0:fdfe93cb9255 97 }
vmihalcut 0:fdfe93cb9255 98
vmihalcut 0:fdfe93cb9255 99
vmihalcut 0:fdfe93cb9255 100 /*--------------------------- rt_ret_val ----------------------------------*/
vmihalcut 0:fdfe93cb9255 101
vmihalcut 0:fdfe93cb9255 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
vmihalcut 0:fdfe93cb9255 103 /* Get pointer to task return value registers (R0..R3) in Stack */
vmihalcut 0:fdfe93cb9255 104 #if (__TARGET_FPU_VFP)
vmihalcut 0:fdfe93cb9255 105 if (p_TCB->stack_frame) {
vmihalcut 0:fdfe93cb9255 106 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
vmihalcut 0:fdfe93cb9255 107 return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
vmihalcut 0:fdfe93cb9255 108 } else {
vmihalcut 0:fdfe93cb9255 109 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
vmihalcut 0:fdfe93cb9255 110 return (U32 *)(p_TCB->tsk_stack + 8*4);
vmihalcut 0:fdfe93cb9255 111 }
vmihalcut 0:fdfe93cb9255 112 #else
vmihalcut 0:fdfe93cb9255 113 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
vmihalcut 0:fdfe93cb9255 114 return (U32 *)(p_TCB->tsk_stack + 8*4);
vmihalcut 0:fdfe93cb9255 115 #endif
vmihalcut 0:fdfe93cb9255 116 }
vmihalcut 0:fdfe93cb9255 117
vmihalcut 0:fdfe93cb9255 118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
vmihalcut 0:fdfe93cb9255 119 U32 *ret;
vmihalcut 0:fdfe93cb9255 120
vmihalcut 0:fdfe93cb9255 121 ret = rt_ret_regs(p_TCB);
vmihalcut 0:fdfe93cb9255 122 ret[0] = v0;
vmihalcut 0:fdfe93cb9255 123 }
vmihalcut 0:fdfe93cb9255 124
vmihalcut 0:fdfe93cb9255 125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
vmihalcut 0:fdfe93cb9255 126 U32 *ret;
vmihalcut 0:fdfe93cb9255 127
vmihalcut 0:fdfe93cb9255 128 ret = rt_ret_regs(p_TCB);
vmihalcut 0:fdfe93cb9255 129 ret[0] = v0;
vmihalcut 0:fdfe93cb9255 130 ret[1] = v1;
vmihalcut 0:fdfe93cb9255 131 }
vmihalcut 0:fdfe93cb9255 132
vmihalcut 0:fdfe93cb9255 133
vmihalcut 0:fdfe93cb9255 134 /*--------------------------- dbg_init --------------------------------------*/
vmihalcut 0:fdfe93cb9255 135
vmihalcut 0:fdfe93cb9255 136 #ifdef DBG_MSG
vmihalcut 0:fdfe93cb9255 137 void dbg_init (void) {
vmihalcut 0:fdfe93cb9255 138 if ((DEMCR & DEMCR_TRCENA) &&
vmihalcut 0:fdfe93cb9255 139 (ITM_CONTROL & ITM_ITMENA) &&
vmihalcut 0:fdfe93cb9255 140 (ITM_ENABLE & (1UL << 31))) {
vmihalcut 0:fdfe93cb9255 141 dbg_msg = __TRUE;
vmihalcut 0:fdfe93cb9255 142 }
vmihalcut 0:fdfe93cb9255 143 }
vmihalcut 0:fdfe93cb9255 144 #endif
vmihalcut 0:fdfe93cb9255 145
vmihalcut 0:fdfe93cb9255 146 /*--------------------------- dbg_task_notify -------------------------------*/
vmihalcut 0:fdfe93cb9255 147
vmihalcut 0:fdfe93cb9255 148 #ifdef DBG_MSG
vmihalcut 0:fdfe93cb9255 149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
vmihalcut 0:fdfe93cb9255 150 while (ITM_PORT31_U32 == 0);
vmihalcut 0:fdfe93cb9255 151 ITM_PORT31_U32 = (U32)p_tcb->ptask;
vmihalcut 0:fdfe93cb9255 152 while (ITM_PORT31_U32 == 0);
vmihalcut 0:fdfe93cb9255 153 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
vmihalcut 0:fdfe93cb9255 154 }
vmihalcut 0:fdfe93cb9255 155 #endif
vmihalcut 0:fdfe93cb9255 156
vmihalcut 0:fdfe93cb9255 157 /*--------------------------- dbg_task_switch -------------------------------*/
vmihalcut 0:fdfe93cb9255 158
vmihalcut 0:fdfe93cb9255 159 #ifdef DBG_MSG
vmihalcut 0:fdfe93cb9255 160 void dbg_task_switch (U32 task_id) {
vmihalcut 0:fdfe93cb9255 161 while (ITM_PORT31_U32 == 0);
vmihalcut 0:fdfe93cb9255 162 ITM_PORT31_U8 = task_id;
vmihalcut 0:fdfe93cb9255 163 }
vmihalcut 0:fdfe93cb9255 164 #endif
vmihalcut 0:fdfe93cb9255 165
vmihalcut 0:fdfe93cb9255 166
vmihalcut 0:fdfe93cb9255 167 /*----------------------------------------------------------------------------
vmihalcut 0:fdfe93cb9255 168 * end of file
vmihalcut 0:fdfe93cb9255 169 *---------------------------------------------------------------------------*/
vmihalcut 0:fdfe93cb9255 170