pro vyuku PSS v Jecne
TARGET_NUCLEO_F103RB/stm32f1xx_hal_sram.h@0:23d1f73bf130, 2017-09-24 (annotated)
- Committer:
- vladvana
- Date:
- Sun Sep 24 12:31:52 2017 +0000
- Revision:
- 0:23d1f73bf130
podklady pro cviceni z PSS
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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vladvana | 0:23d1f73bf130 | 1 | /** |
vladvana | 0:23d1f73bf130 | 2 | ****************************************************************************** |
vladvana | 0:23d1f73bf130 | 3 | * @file stm32f1xx_hal_sram.h |
vladvana | 0:23d1f73bf130 | 4 | * @author MCD Application Team |
vladvana | 0:23d1f73bf130 | 5 | * @version V1.0.0 |
vladvana | 0:23d1f73bf130 | 6 | * @date 15-December-2014 |
vladvana | 0:23d1f73bf130 | 7 | * @brief Header file of SRAM HAL module. |
vladvana | 0:23d1f73bf130 | 8 | ****************************************************************************** |
vladvana | 0:23d1f73bf130 | 9 | * @attention |
vladvana | 0:23d1f73bf130 | 10 | * |
vladvana | 0:23d1f73bf130 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
vladvana | 0:23d1f73bf130 | 12 | * |
vladvana | 0:23d1f73bf130 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
vladvana | 0:23d1f73bf130 | 14 | * are permitted provided that the following conditions are met: |
vladvana | 0:23d1f73bf130 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
vladvana | 0:23d1f73bf130 | 16 | * this list of conditions and the following disclaimer. |
vladvana | 0:23d1f73bf130 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
vladvana | 0:23d1f73bf130 | 18 | * this list of conditions and the following disclaimer in the documentation |
vladvana | 0:23d1f73bf130 | 19 | * and/or other materials provided with the distribution. |
vladvana | 0:23d1f73bf130 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
vladvana | 0:23d1f73bf130 | 21 | * may be used to endorse or promote products derived from this software |
vladvana | 0:23d1f73bf130 | 22 | * without specific prior written permission. |
vladvana | 0:23d1f73bf130 | 23 | * |
vladvana | 0:23d1f73bf130 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
vladvana | 0:23d1f73bf130 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
vladvana | 0:23d1f73bf130 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
vladvana | 0:23d1f73bf130 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
vladvana | 0:23d1f73bf130 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
vladvana | 0:23d1f73bf130 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
vladvana | 0:23d1f73bf130 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
vladvana | 0:23d1f73bf130 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
vladvana | 0:23d1f73bf130 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
vladvana | 0:23d1f73bf130 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
vladvana | 0:23d1f73bf130 | 34 | * |
vladvana | 0:23d1f73bf130 | 35 | ****************************************************************************** |
vladvana | 0:23d1f73bf130 | 36 | */ |
vladvana | 0:23d1f73bf130 | 37 | |
vladvana | 0:23d1f73bf130 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
vladvana | 0:23d1f73bf130 | 39 | #ifndef __STM32F1xx_HAL_SRAM_H |
vladvana | 0:23d1f73bf130 | 40 | #define __STM32F1xx_HAL_SRAM_H |
vladvana | 0:23d1f73bf130 | 41 | |
vladvana | 0:23d1f73bf130 | 42 | #ifdef __cplusplus |
vladvana | 0:23d1f73bf130 | 43 | extern "C" { |
vladvana | 0:23d1f73bf130 | 44 | #endif |
vladvana | 0:23d1f73bf130 | 45 | |
vladvana | 0:23d1f73bf130 | 46 | /* Includes ------------------------------------------------------------------*/ |
vladvana | 0:23d1f73bf130 | 47 | #include "stm32f1xx_ll_fsmc.h" |
vladvana | 0:23d1f73bf130 | 48 | |
vladvana | 0:23d1f73bf130 | 49 | /** @addtogroup STM32F1xx_HAL_Driver |
vladvana | 0:23d1f73bf130 | 50 | * @{ |
vladvana | 0:23d1f73bf130 | 51 | */ |
vladvana | 0:23d1f73bf130 | 52 | |
vladvana | 0:23d1f73bf130 | 53 | #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE) |
vladvana | 0:23d1f73bf130 | 54 | |
vladvana | 0:23d1f73bf130 | 55 | /** @addtogroup SRAM |
vladvana | 0:23d1f73bf130 | 56 | * @{ |
vladvana | 0:23d1f73bf130 | 57 | */ |
vladvana | 0:23d1f73bf130 | 58 | |
vladvana | 0:23d1f73bf130 | 59 | /* Exported typedef ----------------------------------------------------------*/ |
vladvana | 0:23d1f73bf130 | 60 | |
vladvana | 0:23d1f73bf130 | 61 | /** @defgroup SRAM_Exported_Types SRAM Exported Types |
vladvana | 0:23d1f73bf130 | 62 | * @{ |
vladvana | 0:23d1f73bf130 | 63 | */ |
vladvana | 0:23d1f73bf130 | 64 | /** |
vladvana | 0:23d1f73bf130 | 65 | * @brief HAL SRAM State structures definition |
vladvana | 0:23d1f73bf130 | 66 | */ |
vladvana | 0:23d1f73bf130 | 67 | typedef enum |
vladvana | 0:23d1f73bf130 | 68 | { |
vladvana | 0:23d1f73bf130 | 69 | HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */ |
vladvana | 0:23d1f73bf130 | 70 | HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */ |
vladvana | 0:23d1f73bf130 | 71 | HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */ |
vladvana | 0:23d1f73bf130 | 72 | HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */ |
vladvana | 0:23d1f73bf130 | 73 | HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */ |
vladvana | 0:23d1f73bf130 | 74 | |
vladvana | 0:23d1f73bf130 | 75 | }HAL_SRAM_StateTypeDef; |
vladvana | 0:23d1f73bf130 | 76 | |
vladvana | 0:23d1f73bf130 | 77 | /** |
vladvana | 0:23d1f73bf130 | 78 | * @brief SRAM handle Structure definition |
vladvana | 0:23d1f73bf130 | 79 | */ |
vladvana | 0:23d1f73bf130 | 80 | typedef struct |
vladvana | 0:23d1f73bf130 | 81 | { |
vladvana | 0:23d1f73bf130 | 82 | FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ |
vladvana | 0:23d1f73bf130 | 83 | |
vladvana | 0:23d1f73bf130 | 84 | FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ |
vladvana | 0:23d1f73bf130 | 85 | |
vladvana | 0:23d1f73bf130 | 86 | FSMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */ |
vladvana | 0:23d1f73bf130 | 87 | |
vladvana | 0:23d1f73bf130 | 88 | HAL_LockTypeDef Lock; /*!< SRAM locking object */ |
vladvana | 0:23d1f73bf130 | 89 | |
vladvana | 0:23d1f73bf130 | 90 | __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */ |
vladvana | 0:23d1f73bf130 | 91 | |
vladvana | 0:23d1f73bf130 | 92 | DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ |
vladvana | 0:23d1f73bf130 | 93 | |
vladvana | 0:23d1f73bf130 | 94 | }SRAM_HandleTypeDef; |
vladvana | 0:23d1f73bf130 | 95 | |
vladvana | 0:23d1f73bf130 | 96 | /** |
vladvana | 0:23d1f73bf130 | 97 | * @} |
vladvana | 0:23d1f73bf130 | 98 | */ |
vladvana | 0:23d1f73bf130 | 99 | |
vladvana | 0:23d1f73bf130 | 100 | /* Exported constants --------------------------------------------------------*/ |
vladvana | 0:23d1f73bf130 | 101 | /* Exported macro ------------------------------------------------------------*/ |
vladvana | 0:23d1f73bf130 | 102 | |
vladvana | 0:23d1f73bf130 | 103 | /** @defgroup SRAM_Exported_Macros SRAM Exported Macros |
vladvana | 0:23d1f73bf130 | 104 | * @{ |
vladvana | 0:23d1f73bf130 | 105 | */ |
vladvana | 0:23d1f73bf130 | 106 | |
vladvana | 0:23d1f73bf130 | 107 | /** @brief Reset SRAM handle state |
vladvana | 0:23d1f73bf130 | 108 | * @param __HANDLE__: SRAM handle |
vladvana | 0:23d1f73bf130 | 109 | * @retval None |
vladvana | 0:23d1f73bf130 | 110 | */ |
vladvana | 0:23d1f73bf130 | 111 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET) |
vladvana | 0:23d1f73bf130 | 112 | |
vladvana | 0:23d1f73bf130 | 113 | /** |
vladvana | 0:23d1f73bf130 | 114 | * @} |
vladvana | 0:23d1f73bf130 | 115 | */ |
vladvana | 0:23d1f73bf130 | 116 | |
vladvana | 0:23d1f73bf130 | 117 | /* Exported functions --------------------------------------------------------*/ |
vladvana | 0:23d1f73bf130 | 118 | |
vladvana | 0:23d1f73bf130 | 119 | /** @addtogroup SRAM_Exported_Functions |
vladvana | 0:23d1f73bf130 | 120 | * @{ |
vladvana | 0:23d1f73bf130 | 121 | */ |
vladvana | 0:23d1f73bf130 | 122 | |
vladvana | 0:23d1f73bf130 | 123 | /** @addtogroup SRAM_Exported_Functions_Group1 |
vladvana | 0:23d1f73bf130 | 124 | * @{ |
vladvana | 0:23d1f73bf130 | 125 | */ |
vladvana | 0:23d1f73bf130 | 126 | |
vladvana | 0:23d1f73bf130 | 127 | /* Initialization/de-initialization functions **********************************/ |
vladvana | 0:23d1f73bf130 | 128 | HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming); |
vladvana | 0:23d1f73bf130 | 129 | HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram); |
vladvana | 0:23d1f73bf130 | 130 | void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram); |
vladvana | 0:23d1f73bf130 | 131 | void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram); |
vladvana | 0:23d1f73bf130 | 132 | |
vladvana | 0:23d1f73bf130 | 133 | void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); |
vladvana | 0:23d1f73bf130 | 134 | void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); |
vladvana | 0:23d1f73bf130 | 135 | |
vladvana | 0:23d1f73bf130 | 136 | /** |
vladvana | 0:23d1f73bf130 | 137 | * @} |
vladvana | 0:23d1f73bf130 | 138 | */ |
vladvana | 0:23d1f73bf130 | 139 | |
vladvana | 0:23d1f73bf130 | 140 | /** @addtogroup SRAM_Exported_Functions_Group2 |
vladvana | 0:23d1f73bf130 | 141 | * @{ |
vladvana | 0:23d1f73bf130 | 142 | */ |
vladvana | 0:23d1f73bf130 | 143 | |
vladvana | 0:23d1f73bf130 | 144 | /* I/O operation functions *****************************************************/ |
vladvana | 0:23d1f73bf130 | 145 | HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); |
vladvana | 0:23d1f73bf130 | 146 | HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); |
vladvana | 0:23d1f73bf130 | 147 | HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); |
vladvana | 0:23d1f73bf130 | 148 | HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); |
vladvana | 0:23d1f73bf130 | 149 | HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
vladvana | 0:23d1f73bf130 | 150 | HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
vladvana | 0:23d1f73bf130 | 151 | HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
vladvana | 0:23d1f73bf130 | 152 | HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
vladvana | 0:23d1f73bf130 | 153 | |
vladvana | 0:23d1f73bf130 | 154 | /** |
vladvana | 0:23d1f73bf130 | 155 | * @} |
vladvana | 0:23d1f73bf130 | 156 | */ |
vladvana | 0:23d1f73bf130 | 157 | |
vladvana | 0:23d1f73bf130 | 158 | /** @addtogroup SRAM_Exported_Functions_Group3 |
vladvana | 0:23d1f73bf130 | 159 | * @{ |
vladvana | 0:23d1f73bf130 | 160 | */ |
vladvana | 0:23d1f73bf130 | 161 | |
vladvana | 0:23d1f73bf130 | 162 | /* SRAM Control functions ******************************************************/ |
vladvana | 0:23d1f73bf130 | 163 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram); |
vladvana | 0:23d1f73bf130 | 164 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram); |
vladvana | 0:23d1f73bf130 | 165 | |
vladvana | 0:23d1f73bf130 | 166 | /** |
vladvana | 0:23d1f73bf130 | 167 | * @} |
vladvana | 0:23d1f73bf130 | 168 | */ |
vladvana | 0:23d1f73bf130 | 169 | |
vladvana | 0:23d1f73bf130 | 170 | /** @addtogroup SRAM_Exported_Functions_Group4 |
vladvana | 0:23d1f73bf130 | 171 | * @{ |
vladvana | 0:23d1f73bf130 | 172 | */ |
vladvana | 0:23d1f73bf130 | 173 | |
vladvana | 0:23d1f73bf130 | 174 | /* SRAM State functions *********************************************************/ |
vladvana | 0:23d1f73bf130 | 175 | HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram); |
vladvana | 0:23d1f73bf130 | 176 | |
vladvana | 0:23d1f73bf130 | 177 | /** |
vladvana | 0:23d1f73bf130 | 178 | * @} |
vladvana | 0:23d1f73bf130 | 179 | */ |
vladvana | 0:23d1f73bf130 | 180 | |
vladvana | 0:23d1f73bf130 | 181 | /** |
vladvana | 0:23d1f73bf130 | 182 | * @} |
vladvana | 0:23d1f73bf130 | 183 | */ |
vladvana | 0:23d1f73bf130 | 184 | |
vladvana | 0:23d1f73bf130 | 185 | /** |
vladvana | 0:23d1f73bf130 | 186 | * @} |
vladvana | 0:23d1f73bf130 | 187 | */ |
vladvana | 0:23d1f73bf130 | 188 | |
vladvana | 0:23d1f73bf130 | 189 | #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */ |
vladvana | 0:23d1f73bf130 | 190 | |
vladvana | 0:23d1f73bf130 | 191 | /** |
vladvana | 0:23d1f73bf130 | 192 | * @} |
vladvana | 0:23d1f73bf130 | 193 | */ |
vladvana | 0:23d1f73bf130 | 194 | |
vladvana | 0:23d1f73bf130 | 195 | #ifdef __cplusplus |
vladvana | 0:23d1f73bf130 | 196 | } |
vladvana | 0:23d1f73bf130 | 197 | #endif |
vladvana | 0:23d1f73bf130 | 198 | |
vladvana | 0:23d1f73bf130 | 199 | #endif /* __STM32F1xx_HAL_SRAM_H */ |
vladvana | 0:23d1f73bf130 | 200 | |
vladvana | 0:23d1f73bf130 | 201 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |