Vladimir Vana / mbed

pro vyuku PSS v Jecne

TARGET_NUCLEO_F103RB/stm32f1xx_hal_pwr.h@0:23d1f73bf130, 2017-09-24 (annotated)

Committer:
vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
Revision:
0:23d1f73bf130
podklady pro cviceni z PSS

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vladvana 0:23d1f73bf130 1 /**
vladvana 0:23d1f73bf130 2 ******************************************************************************
vladvana 0:23d1f73bf130 3 * @file stm32f1xx_hal_pwr.h
vladvana 0:23d1f73bf130 4 * @author MCD Application Team
vladvana 0:23d1f73bf130 5 * @version V1.0.0
vladvana 0:23d1f73bf130 6 * @date 15-December-2014
vladvana 0:23d1f73bf130 7 * @brief Header file of PWR HAL module.
vladvana 0:23d1f73bf130 8 ******************************************************************************
vladvana 0:23d1f73bf130 9 * @attention
vladvana 0:23d1f73bf130 10 *
vladvana 0:23d1f73bf130 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
vladvana 0:23d1f73bf130 12 *
vladvana 0:23d1f73bf130 13 * Redistribution and use in source and binary forms, with or without modification,
vladvana 0:23d1f73bf130 14 * are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 * 1. Redistributions of source code must retain the above copyright notice,
vladvana 0:23d1f73bf130 16 * this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
vladvana 0:23d1f73bf130 18 * this list of conditions and the following disclaimer in the documentation
vladvana 0:23d1f73bf130 19 * and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vladvana 0:23d1f73bf130 21 * may be used to endorse or promote products derived from this software
vladvana 0:23d1f73bf130 22 * without specific prior written permission.
vladvana 0:23d1f73bf130 23 *
vladvana 0:23d1f73bf130 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vladvana 0:23d1f73bf130 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vladvana 0:23d1f73bf130 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vladvana 0:23d1f73bf130 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vladvana 0:23d1f73bf130 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vladvana 0:23d1f73bf130 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vladvana 0:23d1f73bf130 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vladvana 0:23d1f73bf130 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 34 *
vladvana 0:23d1f73bf130 35 ******************************************************************************
vladvana 0:23d1f73bf130 36 */
vladvana 0:23d1f73bf130 37
vladvana 0:23d1f73bf130 38 /* Define to prevent recursive inclusion -------------------------------------*/
vladvana 0:23d1f73bf130 39 #ifndef __STM32F1xx_HAL_PWR_H
vladvana 0:23d1f73bf130 40 #define __STM32F1xx_HAL_PWR_H
vladvana 0:23d1f73bf130 41
vladvana 0:23d1f73bf130 42 #ifdef __cplusplus
vladvana 0:23d1f73bf130 43 extern "C" {
vladvana 0:23d1f73bf130 44 #endif
vladvana 0:23d1f73bf130 45
vladvana 0:23d1f73bf130 46 /* Includes ------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 47 #include "stm32f1xx_hal_def.h"
vladvana 0:23d1f73bf130 48
vladvana 0:23d1f73bf130 49 /** @addtogroup STM32F1xx_HAL_Driver
vladvana 0:23d1f73bf130 50 * @{
vladvana 0:23d1f73bf130 51 */
vladvana 0:23d1f73bf130 52
vladvana 0:23d1f73bf130 53 /** @addtogroup PWR
vladvana 0:23d1f73bf130 54 * @{
vladvana 0:23d1f73bf130 55 */
vladvana 0:23d1f73bf130 56
vladvana 0:23d1f73bf130 57 /* Exported types ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 58
vladvana 0:23d1f73bf130 59 /** @defgroup PWR_Exported_Types PWR Exported Types
vladvana 0:23d1f73bf130 60 * @{
vladvana 0:23d1f73bf130 61 */
vladvana 0:23d1f73bf130 62
vladvana 0:23d1f73bf130 63 /**
vladvana 0:23d1f73bf130 64 * @brief PWR PVD configuration structure definition
vladvana 0:23d1f73bf130 65 */
vladvana 0:23d1f73bf130 66 typedef struct
vladvana 0:23d1f73bf130 67 {
vladvana 0:23d1f73bf130 68 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
vladvana 0:23d1f73bf130 69 This parameter can be a value of @ref PWR_PVD_detection_level */
vladvana 0:23d1f73bf130 70
vladvana 0:23d1f73bf130 71 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
vladvana 0:23d1f73bf130 72 This parameter can be a value of @ref PWR_PVD_Mode */
vladvana 0:23d1f73bf130 73 }PWR_PVDTypeDef;
vladvana 0:23d1f73bf130 74
vladvana 0:23d1f73bf130 75
vladvana 0:23d1f73bf130 76 /**
vladvana 0:23d1f73bf130 77 * @}
vladvana 0:23d1f73bf130 78 */
vladvana 0:23d1f73bf130 79
vladvana 0:23d1f73bf130 80
vladvana 0:23d1f73bf130 81 /* Internal constants --------------------------------------------------------*/
vladvana 0:23d1f73bf130 82
vladvana 0:23d1f73bf130 83 /** @addtogroup PWR_Private_Constants
vladvana 0:23d1f73bf130 84 * @{
vladvana 0:23d1f73bf130 85 */
vladvana 0:23d1f73bf130 86
vladvana 0:23d1f73bf130 87 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
vladvana 0:23d1f73bf130 88
vladvana 0:23d1f73bf130 89 /**
vladvana 0:23d1f73bf130 90 * @}
vladvana 0:23d1f73bf130 91 */
vladvana 0:23d1f73bf130 92
vladvana 0:23d1f73bf130 93
vladvana 0:23d1f73bf130 94 /* Exported constants --------------------------------------------------------*/
vladvana 0:23d1f73bf130 95
vladvana 0:23d1f73bf130 96 /** @defgroup PWR_Exported_Constants PWR Exported Constants
vladvana 0:23d1f73bf130 97 * @{
vladvana 0:23d1f73bf130 98 */
vladvana 0:23d1f73bf130 99
vladvana 0:23d1f73bf130 100 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
vladvana 0:23d1f73bf130 101 * @{
vladvana 0:23d1f73bf130 102 */
vladvana 0:23d1f73bf130 103 #define PWR_PVDLEVEL_0 PWR_CR_PLS_2V2
vladvana 0:23d1f73bf130 104 #define PWR_PVDLEVEL_1 PWR_CR_PLS_2V3
vladvana 0:23d1f73bf130 105 #define PWR_PVDLEVEL_2 PWR_CR_PLS_2V4
vladvana 0:23d1f73bf130 106 #define PWR_PVDLEVEL_3 PWR_CR_PLS_2V5
vladvana 0:23d1f73bf130 107 #define PWR_PVDLEVEL_4 PWR_CR_PLS_2V6
vladvana 0:23d1f73bf130 108 #define PWR_PVDLEVEL_5 PWR_CR_PLS_2V7
vladvana 0:23d1f73bf130 109 #define PWR_PVDLEVEL_6 PWR_CR_PLS_2V8
vladvana 0:23d1f73bf130 110 #define PWR_PVDLEVEL_7 PWR_CR_PLS_2V9
vladvana 0:23d1f73bf130 111
vladvana 0:23d1f73bf130 112 /**
vladvana 0:23d1f73bf130 113 * @}
vladvana 0:23d1f73bf130 114 */
vladvana 0:23d1f73bf130 115
vladvana 0:23d1f73bf130 116 /** @defgroup PWR_PVD_Mode PWR PVD Mode
vladvana 0:23d1f73bf130 117 * @{
vladvana 0:23d1f73bf130 118 */
vladvana 0:23d1f73bf130 119 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
vladvana 0:23d1f73bf130 120 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
vladvana 0:23d1f73bf130 121 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
vladvana 0:23d1f73bf130 122 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
vladvana 0:23d1f73bf130 123 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
vladvana 0:23d1f73bf130 124 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
vladvana 0:23d1f73bf130 125 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
vladvana 0:23d1f73bf130 126
vladvana 0:23d1f73bf130 127 /**
vladvana 0:23d1f73bf130 128 * @}
vladvana 0:23d1f73bf130 129 */
vladvana 0:23d1f73bf130 130
vladvana 0:23d1f73bf130 131
vladvana 0:23d1f73bf130 132 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
vladvana 0:23d1f73bf130 133 * @{
vladvana 0:23d1f73bf130 134 */
vladvana 0:23d1f73bf130 135
vladvana 0:23d1f73bf130 136 #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP
vladvana 0:23d1f73bf130 137
vladvana 0:23d1f73bf130 138 /**
vladvana 0:23d1f73bf130 139 * @}
vladvana 0:23d1f73bf130 140 */
vladvana 0:23d1f73bf130 141
vladvana 0:23d1f73bf130 142 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
vladvana 0:23d1f73bf130 143 * @{
vladvana 0:23d1f73bf130 144 */
vladvana 0:23d1f73bf130 145 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
vladvana 0:23d1f73bf130 146 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
vladvana 0:23d1f73bf130 147
vladvana 0:23d1f73bf130 148 /**
vladvana 0:23d1f73bf130 149 * @}
vladvana 0:23d1f73bf130 150 */
vladvana 0:23d1f73bf130 151
vladvana 0:23d1f73bf130 152 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
vladvana 0:23d1f73bf130 153 * @{
vladvana 0:23d1f73bf130 154 */
vladvana 0:23d1f73bf130 155 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
vladvana 0:23d1f73bf130 156 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
vladvana 0:23d1f73bf130 157
vladvana 0:23d1f73bf130 158 /**
vladvana 0:23d1f73bf130 159 * @}
vladvana 0:23d1f73bf130 160 */
vladvana 0:23d1f73bf130 161
vladvana 0:23d1f73bf130 162 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
vladvana 0:23d1f73bf130 163 * @{
vladvana 0:23d1f73bf130 164 */
vladvana 0:23d1f73bf130 165 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
vladvana 0:23d1f73bf130 166 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
vladvana 0:23d1f73bf130 167
vladvana 0:23d1f73bf130 168 /**
vladvana 0:23d1f73bf130 169 * @}
vladvana 0:23d1f73bf130 170 */
vladvana 0:23d1f73bf130 171
vladvana 0:23d1f73bf130 172 /** @defgroup PWR_Flag PWR Flag
vladvana 0:23d1f73bf130 173 * @{
vladvana 0:23d1f73bf130 174 */
vladvana 0:23d1f73bf130 175 #define PWR_FLAG_WU PWR_CSR_WUF
vladvana 0:23d1f73bf130 176 #define PWR_FLAG_SB PWR_CSR_SBF
vladvana 0:23d1f73bf130 177 #define PWR_FLAG_PVDO PWR_CSR_PVDO
vladvana 0:23d1f73bf130 178
vladvana 0:23d1f73bf130 179
vladvana 0:23d1f73bf130 180 /**
vladvana 0:23d1f73bf130 181 * @}
vladvana 0:23d1f73bf130 182 */
vladvana 0:23d1f73bf130 183
vladvana 0:23d1f73bf130 184 /**
vladvana 0:23d1f73bf130 185 * @}
vladvana 0:23d1f73bf130 186 */
vladvana 0:23d1f73bf130 187
vladvana 0:23d1f73bf130 188 /* Exported macro ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 189 /** @defgroup PWR_Exported_Macros PWR Exported Macros
vladvana 0:23d1f73bf130 190 * @{
vladvana 0:23d1f73bf130 191 */
vladvana 0:23d1f73bf130 192
vladvana 0:23d1f73bf130 193 /** @brief Check PWR flag is set or not.
vladvana 0:23d1f73bf130 194 * @param __FLAG__: specifies the flag to check.
vladvana 0:23d1f73bf130 195 * This parameter can be one of the following values:
vladvana 0:23d1f73bf130 196 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
vladvana 0:23d1f73bf130 197 * was received from the WKUP pin or from the RTC alarm
vladvana 0:23d1f73bf130 198 * An additional wakeup event is detected if the WKUP pin is enabled
vladvana 0:23d1f73bf130 199 * (by setting the EWUP bit) when the WKUP pin level is already high.
vladvana 0:23d1f73bf130 200 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
vladvana 0:23d1f73bf130 201 * resumed from StandBy mode.
vladvana 0:23d1f73bf130 202 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
vladvana 0:23d1f73bf130 203 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
vladvana 0:23d1f73bf130 204 * For this reason, this bit is equal to 0 after Standby or reset
vladvana 0:23d1f73bf130 205 * until the PVDE bit is set.
vladvana 0:23d1f73bf130 206 * @retval The new state of __FLAG__ (TRUE or FALSE).
vladvana 0:23d1f73bf130 207 */
vladvana 0:23d1f73bf130 208 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
vladvana 0:23d1f73bf130 209
vladvana 0:23d1f73bf130 210 /** @brief Clear the PWR's pending flags.
vladvana 0:23d1f73bf130 211 * @param __FLAG__: specifies the flag to clear.
vladvana 0:23d1f73bf130 212 * This parameter can be one of the following values:
vladvana 0:23d1f73bf130 213 * @arg PWR_FLAG_WU: Wake Up flag
vladvana 0:23d1f73bf130 214 * @arg PWR_FLAG_SB: StandBy flag
vladvana 0:23d1f73bf130 215 */
vladvana 0:23d1f73bf130 216 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2))
vladvana 0:23d1f73bf130 217
vladvana 0:23d1f73bf130 218 /**
vladvana 0:23d1f73bf130 219 * @brief Enable interrupt on PVD Exti Line 16.
vladvana 0:23d1f73bf130 220 * @retval None.
vladvana 0:23d1f73bf130 221 */
vladvana 0:23d1f73bf130 222 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
vladvana 0:23d1f73bf130 223
vladvana 0:23d1f73bf130 224 /**
vladvana 0:23d1f73bf130 225 * @brief Disable interrupt on PVD Exti Line 16.
vladvana 0:23d1f73bf130 226 * @retval None.
vladvana 0:23d1f73bf130 227 */
vladvana 0:23d1f73bf130 228 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
vladvana 0:23d1f73bf130 229
vladvana 0:23d1f73bf130 230 /**
vladvana 0:23d1f73bf130 231 * @brief Enable event on PVD Exti Line 16.
vladvana 0:23d1f73bf130 232 * @retval None.
vladvana 0:23d1f73bf130 233 */
vladvana 0:23d1f73bf130 234 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
vladvana 0:23d1f73bf130 235
vladvana 0:23d1f73bf130 236 /**
vladvana 0:23d1f73bf130 237 * @brief Disable event on PVD Exti Line 16.
vladvana 0:23d1f73bf130 238 * @retval None.
vladvana 0:23d1f73bf130 239 */
vladvana 0:23d1f73bf130 240 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
vladvana 0:23d1f73bf130 241
vladvana 0:23d1f73bf130 242
vladvana 0:23d1f73bf130 243 /**
vladvana 0:23d1f73bf130 244 * @brief PVD EXTI line configuration: set falling edge trigger.
vladvana 0:23d1f73bf130 245 * @retval None.
vladvana 0:23d1f73bf130 246 */
vladvana 0:23d1f73bf130 247 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
vladvana 0:23d1f73bf130 248
vladvana 0:23d1f73bf130 249
vladvana 0:23d1f73bf130 250 /**
vladvana 0:23d1f73bf130 251 * @brief Disable the PVD Extended Interrupt Falling Trigger.
vladvana 0:23d1f73bf130 252 * @retval None.
vladvana 0:23d1f73bf130 253 */
vladvana 0:23d1f73bf130 254 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
vladvana 0:23d1f73bf130 255
vladvana 0:23d1f73bf130 256
vladvana 0:23d1f73bf130 257 /**
vladvana 0:23d1f73bf130 258 * @brief PVD EXTI line configuration: set rising edge trigger.
vladvana 0:23d1f73bf130 259 * @retval None.
vladvana 0:23d1f73bf130 260 */
vladvana 0:23d1f73bf130 261 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
vladvana 0:23d1f73bf130 262
vladvana 0:23d1f73bf130 263 /**
vladvana 0:23d1f73bf130 264 * @brief Disable the PVD Extended Interrupt Rising Trigger.
vladvana 0:23d1f73bf130 265 * This parameter can be:
vladvana 0:23d1f73bf130 266 * @retval None.
vladvana 0:23d1f73bf130 267 */
vladvana 0:23d1f73bf130 268 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
vladvana 0:23d1f73bf130 269
vladvana 0:23d1f73bf130 270 /**
vladvana 0:23d1f73bf130 271 * @brief PVD EXTI line configuration: set rising & falling edge trigger.
vladvana 0:23d1f73bf130 272 * @retval None.
vladvana 0:23d1f73bf130 273 */
vladvana 0:23d1f73bf130 274 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
vladvana 0:23d1f73bf130 275
vladvana 0:23d1f73bf130 276 /**
vladvana 0:23d1f73bf130 277 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
vladvana 0:23d1f73bf130 278 * This parameter can be:
vladvana 0:23d1f73bf130 279 * @retval None.
vladvana 0:23d1f73bf130 280 */
vladvana 0:23d1f73bf130 281 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
vladvana 0:23d1f73bf130 282
vladvana 0:23d1f73bf130 283
vladvana 0:23d1f73bf130 284
vladvana 0:23d1f73bf130 285 /**
vladvana 0:23d1f73bf130 286 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
vladvana 0:23d1f73bf130 287 * @retval EXTI PVD Line Status.
vladvana 0:23d1f73bf130 288 */
vladvana 0:23d1f73bf130 289 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
vladvana 0:23d1f73bf130 290
vladvana 0:23d1f73bf130 291 /**
vladvana 0:23d1f73bf130 292 * @brief Clear the PVD EXTI flag.
vladvana 0:23d1f73bf130 293 * @retval None.
vladvana 0:23d1f73bf130 294 */
vladvana 0:23d1f73bf130 295 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
vladvana 0:23d1f73bf130 296
vladvana 0:23d1f73bf130 297 /**
vladvana 0:23d1f73bf130 298 * @brief Generate a Software interrupt on selected EXTI line.
vladvana 0:23d1f73bf130 299 * @retval None.
vladvana 0:23d1f73bf130 300 */
vladvana 0:23d1f73bf130 301 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
vladvana 0:23d1f73bf130 302 /**
vladvana 0:23d1f73bf130 303 * @}
vladvana 0:23d1f73bf130 304 */
vladvana 0:23d1f73bf130 305
vladvana 0:23d1f73bf130 306 /* Private macro -------------------------------------------------------------*/
vladvana 0:23d1f73bf130 307 /** @defgroup PWR_Private_Macros PWR Private Macros
vladvana 0:23d1f73bf130 308 * @{
vladvana 0:23d1f73bf130 309 */
vladvana 0:23d1f73bf130 310 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
vladvana 0:23d1f73bf130 311 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
vladvana 0:23d1f73bf130 312 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
vladvana 0:23d1f73bf130 313 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
vladvana 0:23d1f73bf130 314
vladvana 0:23d1f73bf130 315
vladvana 0:23d1f73bf130 316 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
vladvana 0:23d1f73bf130 317 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
vladvana 0:23d1f73bf130 318 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
vladvana 0:23d1f73bf130 319 ((MODE) == PWR_PVD_MODE_NORMAL))
vladvana 0:23d1f73bf130 320
vladvana 0:23d1f73bf130 321 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1))
vladvana 0:23d1f73bf130 322
vladvana 0:23d1f73bf130 323 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
vladvana 0:23d1f73bf130 324 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
vladvana 0:23d1f73bf130 325
vladvana 0:23d1f73bf130 326 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
vladvana 0:23d1f73bf130 327
vladvana 0:23d1f73bf130 328 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
vladvana 0:23d1f73bf130 329
vladvana 0:23d1f73bf130 330 /**
vladvana 0:23d1f73bf130 331 * @}
vladvana 0:23d1f73bf130 332 */
vladvana 0:23d1f73bf130 333
vladvana 0:23d1f73bf130 334
vladvana 0:23d1f73bf130 335
vladvana 0:23d1f73bf130 336 /* Exported functions --------------------------------------------------------*/
vladvana 0:23d1f73bf130 337
vladvana 0:23d1f73bf130 338 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
vladvana 0:23d1f73bf130 339 * @{
vladvana 0:23d1f73bf130 340 */
vladvana 0:23d1f73bf130 341
vladvana 0:23d1f73bf130 342 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
vladvana 0:23d1f73bf130 343 * @{
vladvana 0:23d1f73bf130 344 */
vladvana 0:23d1f73bf130 345
vladvana 0:23d1f73bf130 346 /* Initialization and de-initialization functions *******************************/
vladvana 0:23d1f73bf130 347 void HAL_PWR_DeInit(void);
vladvana 0:23d1f73bf130 348 void HAL_PWR_EnableBkUpAccess(void);
vladvana 0:23d1f73bf130 349 void HAL_PWR_DisableBkUpAccess(void);
vladvana 0:23d1f73bf130 350
vladvana 0:23d1f73bf130 351 /**
vladvana 0:23d1f73bf130 352 * @}
vladvana 0:23d1f73bf130 353 */
vladvana 0:23d1f73bf130 354
vladvana 0:23d1f73bf130 355 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
vladvana 0:23d1f73bf130 356 * @{
vladvana 0:23d1f73bf130 357 */
vladvana 0:23d1f73bf130 358
vladvana 0:23d1f73bf130 359 /* Peripheral Control functions ************************************************/
vladvana 0:23d1f73bf130 360 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
vladvana 0:23d1f73bf130 361 /* #define HAL_PWR_ConfigPVD 12*/
vladvana 0:23d1f73bf130 362 void HAL_PWR_EnablePVD(void);
vladvana 0:23d1f73bf130 363 void HAL_PWR_DisablePVD(void);
vladvana 0:23d1f73bf130 364
vladvana 0:23d1f73bf130 365 /* WakeUp pins configuration functions ****************************************/
vladvana 0:23d1f73bf130 366 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
vladvana 0:23d1f73bf130 367 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
vladvana 0:23d1f73bf130 368
vladvana 0:23d1f73bf130 369 /* Low Power modes configuration functions ************************************/
vladvana 0:23d1f73bf130 370 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
vladvana 0:23d1f73bf130 371 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
vladvana 0:23d1f73bf130 372 void HAL_PWR_EnterSTANDBYMode(void);
vladvana 0:23d1f73bf130 373
vladvana 0:23d1f73bf130 374 void HAL_PWR_EnableSleepOnExit(void);
vladvana 0:23d1f73bf130 375 void HAL_PWR_DisableSleepOnExit(void);
vladvana 0:23d1f73bf130 376 void HAL_PWR_EnableSEVOnPend(void);
vladvana 0:23d1f73bf130 377 void HAL_PWR_DisableSEVOnPend(void);
vladvana 0:23d1f73bf130 378
vladvana 0:23d1f73bf130 379
vladvana 0:23d1f73bf130 380
vladvana 0:23d1f73bf130 381 void HAL_PWR_PVD_IRQHandler(void);
vladvana 0:23d1f73bf130 382 void HAL_PWR_PVDCallback(void);
vladvana 0:23d1f73bf130 383 /**
vladvana 0:23d1f73bf130 384 * @}
vladvana 0:23d1f73bf130 385 */
vladvana 0:23d1f73bf130 386
vladvana 0:23d1f73bf130 387 /**
vladvana 0:23d1f73bf130 388 * @}
vladvana 0:23d1f73bf130 389 */
vladvana 0:23d1f73bf130 390
vladvana 0:23d1f73bf130 391 /**
vladvana 0:23d1f73bf130 392 * @}
vladvana 0:23d1f73bf130 393 */
vladvana 0:23d1f73bf130 394
vladvana 0:23d1f73bf130 395 /**
vladvana 0:23d1f73bf130 396 * @}
vladvana 0:23d1f73bf130 397 */
vladvana 0:23d1f73bf130 398
vladvana 0:23d1f73bf130 399 #ifdef __cplusplus
vladvana 0:23d1f73bf130 400 }
vladvana 0:23d1f73bf130 401 #endif
vladvana 0:23d1f73bf130 402
vladvana 0:23d1f73bf130 403
vladvana 0:23d1f73bf130 404 #endif /* __STM32F1xx_HAL_PWR_H */
vladvana 0:23d1f73bf130 405
vladvana 0:23d1f73bf130 406 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/