Vladimir Vana / mbed

pro vyuku PSS v Jecne

TARGET_NUCLEO_F103RB/stm32f1xx_hal_cec.h@0:23d1f73bf130, 2017-09-24 (annotated)

Committer:
vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
Revision:
0:23d1f73bf130
podklady pro cviceni z PSS

Who changed what in which revision?

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vladvana 0:23d1f73bf130 1 /**
vladvana 0:23d1f73bf130 2 ******************************************************************************
vladvana 0:23d1f73bf130 3 * @file stm32f1xx_hal_cec.h
vladvana 0:23d1f73bf130 4 * @author MCD Application Team
vladvana 0:23d1f73bf130 5 * @version V1.0.0
vladvana 0:23d1f73bf130 6 * @date 15-December-2014
vladvana 0:23d1f73bf130 7 * @brief Header file of CEC HAL module.
vladvana 0:23d1f73bf130 8 ******************************************************************************
vladvana 0:23d1f73bf130 9 * @attention
vladvana 0:23d1f73bf130 10 *
vladvana 0:23d1f73bf130 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
vladvana 0:23d1f73bf130 12 *
vladvana 0:23d1f73bf130 13 * Redistribution and use in source and binary forms, with or without modification,
vladvana 0:23d1f73bf130 14 * are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 * 1. Redistributions of source code must retain the above copyright notice,
vladvana 0:23d1f73bf130 16 * this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
vladvana 0:23d1f73bf130 18 * this list of conditions and the following disclaimer in the documentation
vladvana 0:23d1f73bf130 19 * and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vladvana 0:23d1f73bf130 21 * may be used to endorse or promote products derived from this software
vladvana 0:23d1f73bf130 22 * without specific prior written permission.
vladvana 0:23d1f73bf130 23 *
vladvana 0:23d1f73bf130 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vladvana 0:23d1f73bf130 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vladvana 0:23d1f73bf130 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vladvana 0:23d1f73bf130 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vladvana 0:23d1f73bf130 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vladvana 0:23d1f73bf130 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vladvana 0:23d1f73bf130 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vladvana 0:23d1f73bf130 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 34 *
vladvana 0:23d1f73bf130 35 ******************************************************************************
vladvana 0:23d1f73bf130 36 */
vladvana 0:23d1f73bf130 37
vladvana 0:23d1f73bf130 38 /* Define to prevent recursive inclusion -------------------------------------*/
vladvana 0:23d1f73bf130 39 #ifndef __STM32F1xx_HAL_CEC_H
vladvana 0:23d1f73bf130 40 #define __STM32F1xx_HAL_CEC_H
vladvana 0:23d1f73bf130 41
vladvana 0:23d1f73bf130 42 #ifdef __cplusplus
vladvana 0:23d1f73bf130 43 extern "C" {
vladvana 0:23d1f73bf130 44 #endif
vladvana 0:23d1f73bf130 45
vladvana 0:23d1f73bf130 46 #if defined(STM32F100xB) || defined(STM32F100xE)
vladvana 0:23d1f73bf130 47 /* Includes ------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 48 #include "stm32f1xx_hal_def.h"
vladvana 0:23d1f73bf130 49
vladvana 0:23d1f73bf130 50 /** @addtogroup STM32F1xx_HAL_Driver
vladvana 0:23d1f73bf130 51 * @{
vladvana 0:23d1f73bf130 52 */
vladvana 0:23d1f73bf130 53
vladvana 0:23d1f73bf130 54 /** @addtogroup CEC
vladvana 0:23d1f73bf130 55 * @{
vladvana 0:23d1f73bf130 56 */
vladvana 0:23d1f73bf130 57
vladvana 0:23d1f73bf130 58 /** @addtogroup CEC_Private_Constants
vladvana 0:23d1f73bf130 59 * @{
vladvana 0:23d1f73bf130 60 */
vladvana 0:23d1f73bf130 61 #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BIT_TIMING_ERROR_MODE_STANDARD) || \
vladvana 0:23d1f73bf130 62 ((MODE) == CEC_BIT_TIMING_ERROR_MODE_ERRORFREE))
vladvana 0:23d1f73bf130 63 #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BIT_PERIOD_ERROR_MODE_STANDARD) || \
vladvana 0:23d1f73bf130 64 ((MODE) == CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE))
vladvana 0:23d1f73bf130 65
vladvana 0:23d1f73bf130 66 /** @brief Check CEC device Own Address Register (OAR) setting.
vladvana 0:23d1f73bf130 67 * @param __ADDRESS__: CEC own address.
vladvana 0:23d1f73bf130 68 * @retval Test result (TRUE or FALSE).
vladvana 0:23d1f73bf130 69 */
vladvana 0:23d1f73bf130 70 #define IS_CEC_OAR_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
vladvana 0:23d1f73bf130 71
vladvana 0:23d1f73bf130 72 /** @brief Check CEC initiator or destination logical address setting.
vladvana 0:23d1f73bf130 73 * Initiator and destination addresses are coded over 4 bits.
vladvana 0:23d1f73bf130 74 * @param __ADDRESS__: CEC initiator or logical address.
vladvana 0:23d1f73bf130 75 * @retval Test result (TRUE or FALSE).
vladvana 0:23d1f73bf130 76 */
vladvana 0:23d1f73bf130 77 #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
vladvana 0:23d1f73bf130 78
vladvana 0:23d1f73bf130 79 /** @brief Check CEC message size.
vladvana 0:23d1f73bf130 80 * The message size is the payload size: without counting the header,
vladvana 0:23d1f73bf130 81 * it varies from 0 byte (ping operation, one header only, no payload) to
vladvana 0:23d1f73bf130 82 * 15 bytes (1 opcode and up to 14 operands following the header).
vladvana 0:23d1f73bf130 83 * @param __SIZE__: CEC message size.
vladvana 0:23d1f73bf130 84 * @retval Test result (TRUE or FALSE).
vladvana 0:23d1f73bf130 85 */
vladvana 0:23d1f73bf130 86 #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0xF)
vladvana 0:23d1f73bf130 87
vladvana 0:23d1f73bf130 88 /**
vladvana 0:23d1f73bf130 89 * @}
vladvana 0:23d1f73bf130 90 */
vladvana 0:23d1f73bf130 91
vladvana 0:23d1f73bf130 92 /* Exported types ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 93 /** @defgroup CEC_Exported_Types CEC Exported Types
vladvana 0:23d1f73bf130 94 * @{
vladvana 0:23d1f73bf130 95 */
vladvana 0:23d1f73bf130 96 /**
vladvana 0:23d1f73bf130 97 * @brief CEC Init Structure definition
vladvana 0:23d1f73bf130 98 */
vladvana 0:23d1f73bf130 99 typedef struct
vladvana 0:23d1f73bf130 100 {
vladvana 0:23d1f73bf130 101 uint32_t TimingErrorFree; /*!< Configures the CEC Bit Timing Error Mode.
vladvana 0:23d1f73bf130 102 This parameter can be a value of @ref CEC_BitTimingErrorMode */
vladvana 0:23d1f73bf130 103 uint32_t PeriodErrorFree; /*!< Configures the CEC Bit Period Error Mode.
vladvana 0:23d1f73bf130 104 This parameter can be a value of @ref CEC_BitPeriodErrorMode */
vladvana 0:23d1f73bf130 105 uint8_t InitiatorAddress; /*!< Initiator address (source logical address, sent in each header)
vladvana 0:23d1f73bf130 106 This parameter can be a value <= 0xF */
vladvana 0:23d1f73bf130 107 }CEC_InitTypeDef;
vladvana 0:23d1f73bf130 108
vladvana 0:23d1f73bf130 109 /**
vladvana 0:23d1f73bf130 110 * @brief HAL CEC State structures definition
vladvana 0:23d1f73bf130 111 */
vladvana 0:23d1f73bf130 112 typedef enum
vladvana 0:23d1f73bf130 113 {
vladvana 0:23d1f73bf130 114 HAL_CEC_STATE_RESET = 0x00, /*!< Peripheral Reset state */
vladvana 0:23d1f73bf130 115 HAL_CEC_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
vladvana 0:23d1f73bf130 116 HAL_CEC_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
vladvana 0:23d1f73bf130 117 HAL_CEC_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
vladvana 0:23d1f73bf130 118 HAL_CEC_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
vladvana 0:23d1f73bf130 119 HAL_CEC_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */
vladvana 0:23d1f73bf130 120 HAL_CEC_STATE_TIMEOUT = 0x06, /*!< Timeout state */
vladvana 0:23d1f73bf130 121 HAL_CEC_STATE_ERROR = 0x07 /*!< State Error */
vladvana 0:23d1f73bf130 122 }HAL_CEC_StateTypeDef;
vladvana 0:23d1f73bf130 123
vladvana 0:23d1f73bf130 124 /**
vladvana 0:23d1f73bf130 125 * @brief HAL Error structures definition
vladvana 0:23d1f73bf130 126 */
vladvana 0:23d1f73bf130 127 typedef enum
vladvana 0:23d1f73bf130 128 {
vladvana 0:23d1f73bf130 129 HAL_CEC_ERROR_NONE = (uint32_t) 0x0, /*!< no error */
vladvana 0:23d1f73bf130 130 HAL_CEC_ERROR_BTE = CEC_ESR_BTE, /*!< Bit Timing Error */
vladvana 0:23d1f73bf130 131 HAL_CEC_ERROR_BPE = CEC_ESR_BPE, /*!< Bit Period Error */
vladvana 0:23d1f73bf130 132 HAL_CEC_ERROR_RBTFE = CEC_ESR_RBTFE, /*!< Rx Block Transfer Finished Error */
vladvana 0:23d1f73bf130 133 HAL_CEC_ERROR_SBE = CEC_ESR_SBE, /*!< Start Bit Error */
vladvana 0:23d1f73bf130 134 HAL_CEC_ERROR_ACKE = CEC_ESR_ACKE, /*!< Block Acknowledge Error */
vladvana 0:23d1f73bf130 135 HAL_CEC_ERROR_LINE = CEC_ESR_LINE, /*!< Line Error */
vladvana 0:23d1f73bf130 136 HAL_CEC_ERROR_TBTFE = CEC_ESR_TBTFE, /*!< Tx Block Transfer Finished Error */
vladvana 0:23d1f73bf130 137 }HAL_CEC_ErrorTypeDef;
vladvana 0:23d1f73bf130 138
vladvana 0:23d1f73bf130 139 /**
vladvana 0:23d1f73bf130 140 * @brief CEC handle Structure definition
vladvana 0:23d1f73bf130 141 */
vladvana 0:23d1f73bf130 142 typedef struct
vladvana 0:23d1f73bf130 143 {
vladvana 0:23d1f73bf130 144 CEC_TypeDef *Instance; /*!< CEC registers base address */
vladvana 0:23d1f73bf130 145
vladvana 0:23d1f73bf130 146 CEC_InitTypeDef Init; /*!< CEC communication parameters */
vladvana 0:23d1f73bf130 147
vladvana 0:23d1f73bf130 148 uint8_t *pTxBuffPtr; /*!< Pointer to CEC Tx transfer Buffer */
vladvana 0:23d1f73bf130 149
vladvana 0:23d1f73bf130 150 uint16_t TxXferCount; /*!< CEC Tx Transfer Counter */
vladvana 0:23d1f73bf130 151
vladvana 0:23d1f73bf130 152 uint8_t *pRxBuffPtr; /*!< Pointer to CEC Rx transfer Buffer */
vladvana 0:23d1f73bf130 153
vladvana 0:23d1f73bf130 154 uint16_t RxXferSize; /*!< CEC Rx Transfer size, 0: header received only */
vladvana 0:23d1f73bf130 155
vladvana 0:23d1f73bf130 156 uint32_t ErrorCode; /*!< For errors handling purposes, copy of ESR register in case error is reported */
vladvana 0:23d1f73bf130 157
vladvana 0:23d1f73bf130 158 HAL_LockTypeDef Lock; /*!< Locking object */
vladvana 0:23d1f73bf130 159
vladvana 0:23d1f73bf130 160 HAL_CEC_StateTypeDef State; /*!< CEC communication state */
vladvana 0:23d1f73bf130 161
vladvana 0:23d1f73bf130 162 }CEC_HandleTypeDef;
vladvana 0:23d1f73bf130 163
vladvana 0:23d1f73bf130 164 /**
vladvana 0:23d1f73bf130 165 * @}
vladvana 0:23d1f73bf130 166 */
vladvana 0:23d1f73bf130 167
vladvana 0:23d1f73bf130 168 /* Exported constants --------------------------------------------------------*/
vladvana 0:23d1f73bf130 169 /** @defgroup CEC_Exported_Constants CEC Exported Constants
vladvana 0:23d1f73bf130 170 * @{
vladvana 0:23d1f73bf130 171 */
vladvana 0:23d1f73bf130 172
vladvana 0:23d1f73bf130 173 /** @defgroup CEC_BitTimingErrorMode Bit Timing Error Mode
vladvana 0:23d1f73bf130 174 * @{
vladvana 0:23d1f73bf130 175 */
vladvana 0:23d1f73bf130 176 #define CEC_BIT_TIMING_ERROR_MODE_STANDARD ((uint32_t)0x00) /*!< Bit timing error Standard Mode */
vladvana 0:23d1f73bf130 177 #define CEC_BIT_TIMING_ERROR_MODE_ERRORFREE CEC_CFGR_BTEM /*!< Bit timing error Free Mode */
vladvana 0:23d1f73bf130 178 /**
vladvana 0:23d1f73bf130 179 * @}
vladvana 0:23d1f73bf130 180 */
vladvana 0:23d1f73bf130 181
vladvana 0:23d1f73bf130 182 /** @defgroup CEC_BitPeriodErrorMode Bit Period Error Mode
vladvana 0:23d1f73bf130 183 * @{
vladvana 0:23d1f73bf130 184 */
vladvana 0:23d1f73bf130 185 #define CEC_BIT_PERIOD_ERROR_MODE_STANDARD ((uint32_t)0x00) /*!< Bit period error Standard Mode */
vladvana 0:23d1f73bf130 186 #define CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */
vladvana 0:23d1f73bf130 187 /**
vladvana 0:23d1f73bf130 188 * @}
vladvana 0:23d1f73bf130 189 */
vladvana 0:23d1f73bf130 190
vladvana 0:23d1f73bf130 191 /** @defgroup CEC_Initiator_Position Initiator logical address position in message header
vladvana 0:23d1f73bf130 192 * @{
vladvana 0:23d1f73bf130 193 */
vladvana 0:23d1f73bf130 194 #define CEC_INITIATOR_LSB_POS ((uint32_t) 4)
vladvana 0:23d1f73bf130 195 /**
vladvana 0:23d1f73bf130 196 * @}
vladvana 0:23d1f73bf130 197 */
vladvana 0:23d1f73bf130 198 /** @defgroup CEC_Interrupts_Definitions Interrupts definition
vladvana 0:23d1f73bf130 199 * @{
vladvana 0:23d1f73bf130 200 */
vladvana 0:23d1f73bf130 201 #define CEC_IT_IE CEC_CFGR_IE
vladvana 0:23d1f73bf130 202 /**
vladvana 0:23d1f73bf130 203 * @}
vladvana 0:23d1f73bf130 204 */
vladvana 0:23d1f73bf130 205
vladvana 0:23d1f73bf130 206 /** @defgroup CEC_Flags_Definitions Flags definition
vladvana 0:23d1f73bf130 207 * @{
vladvana 0:23d1f73bf130 208 */
vladvana 0:23d1f73bf130 209 #define CEC_FLAG_TSOM CEC_CSR_TSOM
vladvana 0:23d1f73bf130 210 #define CEC_FLAG_TEOM CEC_CSR_TEOM
vladvana 0:23d1f73bf130 211 #define CEC_FLAG_TERR CEC_CSR_TERR
vladvana 0:23d1f73bf130 212 #define CEC_FLAG_TBTRF CEC_CSR_TBTRF
vladvana 0:23d1f73bf130 213 #define CEC_FLAG_RSOM CEC_CSR_RSOM
vladvana 0:23d1f73bf130 214 #define CEC_FLAG_REOM CEC_CSR_REOM
vladvana 0:23d1f73bf130 215 #define CEC_FLAG_RERR CEC_CSR_RERR
vladvana 0:23d1f73bf130 216 #define CEC_FLAG_RBTF CEC_CSR_RBTF
vladvana 0:23d1f73bf130 217 /**
vladvana 0:23d1f73bf130 218 * @}
vladvana 0:23d1f73bf130 219 */
vladvana 0:23d1f73bf130 220
vladvana 0:23d1f73bf130 221 /**
vladvana 0:23d1f73bf130 222 * @}
vladvana 0:23d1f73bf130 223 */
vladvana 0:23d1f73bf130 224
vladvana 0:23d1f73bf130 225 /* Exported macros -----------------------------------------------------------*/
vladvana 0:23d1f73bf130 226 /** @defgroup CEC_Exported_Macros CEC Exported Macros
vladvana 0:23d1f73bf130 227 * @{
vladvana 0:23d1f73bf130 228 */
vladvana 0:23d1f73bf130 229
vladvana 0:23d1f73bf130 230 /** @brief Reset CEC handle state
vladvana 0:23d1f73bf130 231 * @param __HANDLE__: CEC handle.
vladvana 0:23d1f73bf130 232 * @retval None
vladvana 0:23d1f73bf130 233 */
vladvana 0:23d1f73bf130 234 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CEC_STATE_RESET)
vladvana 0:23d1f73bf130 235
vladvana 0:23d1f73bf130 236 /** @brief Checks whether or not the specified CEC interrupt flag is set.
vladvana 0:23d1f73bf130 237 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 238 * @param __INTERRUPT__: specifies the interrupt to check.
vladvana 0:23d1f73bf130 239 * @arg CEC_FLAG_TERR: Tx Error
vladvana 0:23d1f73bf130 240 * @arg CEC_FLAG_TBTF: Tx Block Transfer Finished
vladvana 0:23d1f73bf130 241 * @arg CEC_FLAG_RERR: Rx Error
vladvana 0:23d1f73bf130 242 * @arg CEC_FLAG_RBTF: Rx Block Transfer Finished
vladvana 0:23d1f73bf130 243 * @retval ITStatus
vladvana 0:23d1f73bf130 244 */
vladvana 0:23d1f73bf130 245 #define __HAL_CEC_GET_FLAG(__HANDLE__, __INTERRUPT__) READ_BIT((__HANDLE__)->Instance->CSR,(__INTERRUPT__))
vladvana 0:23d1f73bf130 246
vladvana 0:23d1f73bf130 247 /** @brief Clears the CEC's pending flags.
vladvana 0:23d1f73bf130 248 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 249 * @param __FLAG__: specifies the flag to clear.
vladvana 0:23d1f73bf130 250 * This parameter can be any combination of the following values:
vladvana 0:23d1f73bf130 251 * @arg CEC_CSR_TERR: Tx Error
vladvana 0:23d1f73bf130 252 * @arg CEC_CSR_TBTF: Tx Block Transfer Finished
vladvana 0:23d1f73bf130 253 * @arg CEC_CSR_RERR: Rx Error
vladvana 0:23d1f73bf130 254 * @arg CEC_CSR_RBTF: Rx Block Transfer Finished
vladvana 0:23d1f73bf130 255 * @retval none
vladvana 0:23d1f73bf130 256 */
vladvana 0:23d1f73bf130 257 #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) \
vladvana 0:23d1f73bf130 258 do { \
vladvana 0:23d1f73bf130 259 uint32_t tmp = 0x0; \
vladvana 0:23d1f73bf130 260 tmp = (__HANDLE__)->Instance->CSR & 0x2; \
vladvana 0:23d1f73bf130 261 (__HANDLE__)->Instance->CSR &= (uint32_t)(((~(uint32_t)(__FLAG__)) & 0xFFFFFFFC) | tmp);\
vladvana 0:23d1f73bf130 262 } while(0)
vladvana 0:23d1f73bf130 263
vladvana 0:23d1f73bf130 264 /** @brief Enables the specified CEC interrupt.
vladvana 0:23d1f73bf130 265 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 266 * @param __INTERRUPT__: The CEC interrupt to enable.
vladvana 0:23d1f73bf130 267 * This parameter can be:
vladvana 0:23d1f73bf130 268 * @arg CEC_IT_IE : Interrupt Enable
vladvana 0:23d1f73bf130 269 * @retval none
vladvana 0:23d1f73bf130 270 */
vladvana 0:23d1f73bf130 271 #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
vladvana 0:23d1f73bf130 272
vladvana 0:23d1f73bf130 273 /** @brief Disables the specified CEC interrupt.
vladvana 0:23d1f73bf130 274 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 275 * @param __INTERRUPT__: The CEC interrupt to enable.
vladvana 0:23d1f73bf130 276 * This parameter can be:
vladvana 0:23d1f73bf130 277 * @arg CEC_IT_IE : Interrupt Enable
vladvana 0:23d1f73bf130 278 * @retval none
vladvana 0:23d1f73bf130 279 */
vladvana 0:23d1f73bf130 280 #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
vladvana 0:23d1f73bf130 281
vladvana 0:23d1f73bf130 282 /** @brief Checks whether or not the specified CEC interrupt is enabled.
vladvana 0:23d1f73bf130 283 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 284 * @param __INTERRUPT__: The CEC interrupt to enable.
vladvana 0:23d1f73bf130 285 * This parameter can be:
vladvana 0:23d1f73bf130 286 * @arg CEC_IT_IE : Interrupt Enable
vladvana 0:23d1f73bf130 287 * @retval FlagStatus
vladvana 0:23d1f73bf130 288 */
vladvana 0:23d1f73bf130 289 #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) READ_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
vladvana 0:23d1f73bf130 290
vladvana 0:23d1f73bf130 291 /** @brief Enables the CEC device
vladvana 0:23d1f73bf130 292 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 293 * @retval none
vladvana 0:23d1f73bf130 294 */
vladvana 0:23d1f73bf130 295 #define __HAL_CEC_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
vladvana 0:23d1f73bf130 296
vladvana 0:23d1f73bf130 297 /** @brief Disables the CEC device
vladvana 0:23d1f73bf130 298 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 299 * @retval none
vladvana 0:23d1f73bf130 300 */
vladvana 0:23d1f73bf130 301 #define __HAL_CEC_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
vladvana 0:23d1f73bf130 302
vladvana 0:23d1f73bf130 303 /** @brief Set Transmission Start flag
vladvana 0:23d1f73bf130 304 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 305 * @retval none
vladvana 0:23d1f73bf130 306 */
vladvana 0:23d1f73bf130 307 #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
vladvana 0:23d1f73bf130 308
vladvana 0:23d1f73bf130 309 /** @brief Set Transmission End flag
vladvana 0:23d1f73bf130 310 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 311 * @retval none
vladvana 0:23d1f73bf130 312 */
vladvana 0:23d1f73bf130 313 #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
vladvana 0:23d1f73bf130 314
vladvana 0:23d1f73bf130 315 /** @brief Get Transmission Start flag
vladvana 0:23d1f73bf130 316 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 317 * @retval FlagStatus
vladvana 0:23d1f73bf130 318 */
vladvana 0:23d1f73bf130 319 #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
vladvana 0:23d1f73bf130 320
vladvana 0:23d1f73bf130 321 /** @brief Get Transmission End flag
vladvana 0:23d1f73bf130 322 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 323 * @retval FlagStatus
vladvana 0:23d1f73bf130 324 */
vladvana 0:23d1f73bf130 325 #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
vladvana 0:23d1f73bf130 326
vladvana 0:23d1f73bf130 327 /** @brief Clear OAR register
vladvana 0:23d1f73bf130 328 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 329 * @retval none
vladvana 0:23d1f73bf130 330 */
vladvana 0:23d1f73bf130 331 #define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->OAR, CEC_OAR_OA)
vladvana 0:23d1f73bf130 332
vladvana 0:23d1f73bf130 333 /** @brief Set OAR register
vladvana 0:23d1f73bf130 334 * @param __HANDLE__: specifies the CEC Handle.
vladvana 0:23d1f73bf130 335 * @param __ADDRESS__: Own Address value.
vladvana 0:23d1f73bf130 336 * @retval none
vladvana 0:23d1f73bf130 337 */
vladvana 0:23d1f73bf130 338 #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) MODIFY_REG((__HANDLE__)->Instance->OAR, CEC_OAR_OA, (__ADDRESS__));
vladvana 0:23d1f73bf130 339
vladvana 0:23d1f73bf130 340 /**
vladvana 0:23d1f73bf130 341 * @}
vladvana 0:23d1f73bf130 342 */
vladvana 0:23d1f73bf130 343
vladvana 0:23d1f73bf130 344 /* Exported functions --------------------------------------------------------*/
vladvana 0:23d1f73bf130 345 /** @addtogroup CEC_Exported_Functions CEC Exported Functions
vladvana 0:23d1f73bf130 346 * @{
vladvana 0:23d1f73bf130 347 */
vladvana 0:23d1f73bf130 348
vladvana 0:23d1f73bf130 349 /** @addtogroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
vladvana 0:23d1f73bf130 350 * @brief Initialization and Configuration functions
vladvana 0:23d1f73bf130 351 * @{
vladvana 0:23d1f73bf130 352 */
vladvana 0:23d1f73bf130 353 /* Initialization and de-initialization functions ****************************/
vladvana 0:23d1f73bf130 354 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 355 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 356 void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 357 void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 358 /**
vladvana 0:23d1f73bf130 359 * @}
vladvana 0:23d1f73bf130 360 */
vladvana 0:23d1f73bf130 361
vladvana 0:23d1f73bf130 362 /** @addtogroup CEC_Exported_Functions_Group2 Input and Output operation functions
vladvana 0:23d1f73bf130 363 * @brief CEC Transmit/Receive functions
vladvana 0:23d1f73bf130 364 * @{
vladvana 0:23d1f73bf130 365 */
vladvana 0:23d1f73bf130 366 /* IO operation functions *****************************************************/
vladvana 0:23d1f73bf130 367 HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout);
vladvana 0:23d1f73bf130 368 HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout);
vladvana 0:23d1f73bf130 369 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
vladvana 0:23d1f73bf130 370 HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData);
vladvana 0:23d1f73bf130 371 uint32_t HAL_CEC_GetReceivedFrameSize(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 372 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 373 void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 374 void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 375 void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 376 /**
vladvana 0:23d1f73bf130 377 * @}
vladvana 0:23d1f73bf130 378 */
vladvana 0:23d1f73bf130 379
vladvana 0:23d1f73bf130 380 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control functions
vladvana 0:23d1f73bf130 381 * @brief CEC control functions
vladvana 0:23d1f73bf130 382 * @{
vladvana 0:23d1f73bf130 383 */
vladvana 0:23d1f73bf130 384 /* Peripheral State and Error functions ***************************************/
vladvana 0:23d1f73bf130 385 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 386 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
vladvana 0:23d1f73bf130 387 /**
vladvana 0:23d1f73bf130 388 * @}
vladvana 0:23d1f73bf130 389 */
vladvana 0:23d1f73bf130 390
vladvana 0:23d1f73bf130 391 /**
vladvana 0:23d1f73bf130 392 * @}
vladvana 0:23d1f73bf130 393 */
vladvana 0:23d1f73bf130 394
vladvana 0:23d1f73bf130 395 /**
vladvana 0:23d1f73bf130 396 * @}
vladvana 0:23d1f73bf130 397 */
vladvana 0:23d1f73bf130 398
vladvana 0:23d1f73bf130 399 /**
vladvana 0:23d1f73bf130 400 * @}
vladvana 0:23d1f73bf130 401 */
vladvana 0:23d1f73bf130 402
vladvana 0:23d1f73bf130 403 #endif /* defined(STM32F100xB) || defined(STM32F100xE) */
vladvana 0:23d1f73bf130 404
vladvana 0:23d1f73bf130 405 #ifdef __cplusplus
vladvana 0:23d1f73bf130 406 }
vladvana 0:23d1f73bf130 407 #endif
vladvana 0:23d1f73bf130 408
vladvana 0:23d1f73bf130 409 #endif /* __STM32F1xx_HAL_CEC_H */
vladvana 0:23d1f73bf130 410
vladvana 0:23d1f73bf130 411 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/