Vladimir Vana / mbed

pro vyuku PSS v Jecne

TARGET_NUCLEO_F103RB/core_ca_mmu.h@0:23d1f73bf130, 2017-09-24 (annotated)

Committer:
vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
Revision:
0:23d1f73bf130
podklady pro cviceni z PSS

Who changed what in which revision?

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vladvana 0:23d1f73bf130 1 ;/**************************************************************************//**
vladvana 0:23d1f73bf130 2 ; * @file core_ca_mmu.h
vladvana 0:23d1f73bf130 3 ; * @brief MMU Startup File for A9_MP Device Series
vladvana 0:23d1f73bf130 4 ; * @version V1.01
vladvana 0:23d1f73bf130 5 ; * @date 10 Sept 2014
vladvana 0:23d1f73bf130 6 ; *
vladvana 0:23d1f73bf130 7 ; * @note
vladvana 0:23d1f73bf130 8 ; *
vladvana 0:23d1f73bf130 9 ; ******************************************************************************/
vladvana 0:23d1f73bf130 10 ;/* Copyright (c) 2012-2014 ARM LIMITED
vladvana 0:23d1f73bf130 11 ;
vladvana 0:23d1f73bf130 12 ; All rights reserved.
vladvana 0:23d1f73bf130 13 ; Redistribution and use in source and binary forms, with or without
vladvana 0:23d1f73bf130 14 ; modification, are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 ; - Redistributions of source code must retain the above copyright
vladvana 0:23d1f73bf130 16 ; notice, this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 ; - Redistributions in binary form must reproduce the above copyright
vladvana 0:23d1f73bf130 18 ; notice, this list of conditions and the following disclaimer in the
vladvana 0:23d1f73bf130 19 ; documentation and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 ; - Neither the name of ARM nor the names of its contributors may be used
vladvana 0:23d1f73bf130 21 ; to endorse or promote products derived from this software without
vladvana 0:23d1f73bf130 22 ; specific prior written permission.
vladvana 0:23d1f73bf130 23 ; *
vladvana 0:23d1f73bf130 24 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
vladvana 0:23d1f73bf130 27 ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
vladvana 0:23d1f73bf130 28 ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
vladvana 0:23d1f73bf130 29 ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
vladvana 0:23d1f73bf130 30 ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
vladvana 0:23d1f73bf130 31 ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
vladvana 0:23d1f73bf130 32 ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
vladvana 0:23d1f73bf130 33 ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
vladvana 0:23d1f73bf130 34 ; POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 35 ; ---------------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 36
vladvana 0:23d1f73bf130 37 #ifdef __cplusplus
vladvana 0:23d1f73bf130 38 extern "C" {
vladvana 0:23d1f73bf130 39 #endif
vladvana 0:23d1f73bf130 40
vladvana 0:23d1f73bf130 41 #ifndef _MMU_FUNC_H
vladvana 0:23d1f73bf130 42 #define _MMU_FUNC_H
vladvana 0:23d1f73bf130 43
vladvana 0:23d1f73bf130 44 #define SECTION_DESCRIPTOR (0x2)
vladvana 0:23d1f73bf130 45 #define SECTION_MASK (0xFFFFFFFC)
vladvana 0:23d1f73bf130 46
vladvana 0:23d1f73bf130 47 #define SECTION_TEXCB_MASK (0xFFFF8FF3)
vladvana 0:23d1f73bf130 48 #define SECTION_B_SHIFT (2)
vladvana 0:23d1f73bf130 49 #define SECTION_C_SHIFT (3)
vladvana 0:23d1f73bf130 50 #define SECTION_TEX0_SHIFT (12)
vladvana 0:23d1f73bf130 51 #define SECTION_TEX1_SHIFT (13)
vladvana 0:23d1f73bf130 52 #define SECTION_TEX2_SHIFT (14)
vladvana 0:23d1f73bf130 53
vladvana 0:23d1f73bf130 54 #define SECTION_XN_MASK (0xFFFFFFEF)
vladvana 0:23d1f73bf130 55 #define SECTION_XN_SHIFT (4)
vladvana 0:23d1f73bf130 56
vladvana 0:23d1f73bf130 57 #define SECTION_DOMAIN_MASK (0xFFFFFE1F)
vladvana 0:23d1f73bf130 58 #define SECTION_DOMAIN_SHIFT (5)
vladvana 0:23d1f73bf130 59
vladvana 0:23d1f73bf130 60 #define SECTION_P_MASK (0xFFFFFDFF)
vladvana 0:23d1f73bf130 61 #define SECTION_P_SHIFT (9)
vladvana 0:23d1f73bf130 62
vladvana 0:23d1f73bf130 63 #define SECTION_AP_MASK (0xFFFF73FF)
vladvana 0:23d1f73bf130 64 #define SECTION_AP_SHIFT (10)
vladvana 0:23d1f73bf130 65 #define SECTION_AP2_SHIFT (15)
vladvana 0:23d1f73bf130 66
vladvana 0:23d1f73bf130 67 #define SECTION_S_MASK (0xFFFEFFFF)
vladvana 0:23d1f73bf130 68 #define SECTION_S_SHIFT (16)
vladvana 0:23d1f73bf130 69
vladvana 0:23d1f73bf130 70 #define SECTION_NG_MASK (0xFFFDFFFF)
vladvana 0:23d1f73bf130 71 #define SECTION_NG_SHIFT (17)
vladvana 0:23d1f73bf130 72
vladvana 0:23d1f73bf130 73 #define SECTION_NS_MASK (0xFFF7FFFF)
vladvana 0:23d1f73bf130 74 #define SECTION_NS_SHIFT (19)
vladvana 0:23d1f73bf130 75
vladvana 0:23d1f73bf130 76
vladvana 0:23d1f73bf130 77 #define PAGE_L1_DESCRIPTOR (0x1)
vladvana 0:23d1f73bf130 78 #define PAGE_L1_MASK (0xFFFFFFFC)
vladvana 0:23d1f73bf130 79
vladvana 0:23d1f73bf130 80 #define PAGE_L2_4K_DESC (0x2)
vladvana 0:23d1f73bf130 81 #define PAGE_L2_4K_MASK (0xFFFFFFFD)
vladvana 0:23d1f73bf130 82
vladvana 0:23d1f73bf130 83 #define PAGE_L2_64K_DESC (0x1)
vladvana 0:23d1f73bf130 84 #define PAGE_L2_64K_MASK (0xFFFFFFFC)
vladvana 0:23d1f73bf130 85
vladvana 0:23d1f73bf130 86 #define PAGE_4K_TEXCB_MASK (0xFFFFFE33)
vladvana 0:23d1f73bf130 87 #define PAGE_4K_B_SHIFT (2)
vladvana 0:23d1f73bf130 88 #define PAGE_4K_C_SHIFT (3)
vladvana 0:23d1f73bf130 89 #define PAGE_4K_TEX0_SHIFT (6)
vladvana 0:23d1f73bf130 90 #define PAGE_4K_TEX1_SHIFT (7)
vladvana 0:23d1f73bf130 91 #define PAGE_4K_TEX2_SHIFT (8)
vladvana 0:23d1f73bf130 92
vladvana 0:23d1f73bf130 93 #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3)
vladvana 0:23d1f73bf130 94 #define PAGE_64K_B_SHIFT (2)
vladvana 0:23d1f73bf130 95 #define PAGE_64K_C_SHIFT (3)
vladvana 0:23d1f73bf130 96 #define PAGE_64K_TEX0_SHIFT (12)
vladvana 0:23d1f73bf130 97 #define PAGE_64K_TEX1_SHIFT (13)
vladvana 0:23d1f73bf130 98 #define PAGE_64K_TEX2_SHIFT (14)
vladvana 0:23d1f73bf130 99
vladvana 0:23d1f73bf130 100 #define PAGE_TEXCB_MASK (0xFFFF8FF3)
vladvana 0:23d1f73bf130 101 #define PAGE_B_SHIFT (2)
vladvana 0:23d1f73bf130 102 #define PAGE_C_SHIFT (3)
vladvana 0:23d1f73bf130 103 #define PAGE_TEX_SHIFT (12)
vladvana 0:23d1f73bf130 104
vladvana 0:23d1f73bf130 105 #define PAGE_XN_4K_MASK (0xFFFFFFFE)
vladvana 0:23d1f73bf130 106 #define PAGE_XN_4K_SHIFT (0)
vladvana 0:23d1f73bf130 107 #define PAGE_XN_64K_MASK (0xFFFF7FFF)
vladvana 0:23d1f73bf130 108 #define PAGE_XN_64K_SHIFT (15)
vladvana 0:23d1f73bf130 109
vladvana 0:23d1f73bf130 110
vladvana 0:23d1f73bf130 111 #define PAGE_DOMAIN_MASK (0xFFFFFE1F)
vladvana 0:23d1f73bf130 112 #define PAGE_DOMAIN_SHIFT (5)
vladvana 0:23d1f73bf130 113
vladvana 0:23d1f73bf130 114 #define PAGE_P_MASK (0xFFFFFDFF)
vladvana 0:23d1f73bf130 115 #define PAGE_P_SHIFT (9)
vladvana 0:23d1f73bf130 116
vladvana 0:23d1f73bf130 117 #define PAGE_AP_MASK (0xFFFFFDCF)
vladvana 0:23d1f73bf130 118 #define PAGE_AP_SHIFT (4)
vladvana 0:23d1f73bf130 119 #define PAGE_AP2_SHIFT (9)
vladvana 0:23d1f73bf130 120
vladvana 0:23d1f73bf130 121 #define PAGE_S_MASK (0xFFFFFBFF)
vladvana 0:23d1f73bf130 122 #define PAGE_S_SHIFT (10)
vladvana 0:23d1f73bf130 123
vladvana 0:23d1f73bf130 124 #define PAGE_NG_MASK (0xFFFFF7FF)
vladvana 0:23d1f73bf130 125 #define PAGE_NG_SHIFT (11)
vladvana 0:23d1f73bf130 126
vladvana 0:23d1f73bf130 127 #define PAGE_NS_MASK (0xFFFFFFF7)
vladvana 0:23d1f73bf130 128 #define PAGE_NS_SHIFT (3)
vladvana 0:23d1f73bf130 129
vladvana 0:23d1f73bf130 130 #define OFFSET_1M (0x00100000)
vladvana 0:23d1f73bf130 131 #define OFFSET_64K (0x00010000)
vladvana 0:23d1f73bf130 132 #define OFFSET_4K (0x00001000)
vladvana 0:23d1f73bf130 133
vladvana 0:23d1f73bf130 134 #define DESCRIPTOR_FAULT (0x00000000)
vladvana 0:23d1f73bf130 135
vladvana 0:23d1f73bf130 136 /* ########################### MMU Function Access ########################### */
vladvana 0:23d1f73bf130 137 /** \ingroup MMU_FunctionInterface
vladvana 0:23d1f73bf130 138 \defgroup MMU_Functions MMU Functions Interface
vladvana 0:23d1f73bf130 139 @{
vladvana 0:23d1f73bf130 140 */
vladvana 0:23d1f73bf130 141
vladvana 0:23d1f73bf130 142 /* Attributes enumerations */
vladvana 0:23d1f73bf130 143
vladvana 0:23d1f73bf130 144 /* Region size attributes */
vladvana 0:23d1f73bf130 145 typedef enum
vladvana 0:23d1f73bf130 146 {
vladvana 0:23d1f73bf130 147 SECTION,
vladvana 0:23d1f73bf130 148 PAGE_4k,
vladvana 0:23d1f73bf130 149 PAGE_64k,
vladvana 0:23d1f73bf130 150 } mmu_region_size_Type;
vladvana 0:23d1f73bf130 151
vladvana 0:23d1f73bf130 152 /* Region type attributes */
vladvana 0:23d1f73bf130 153 typedef enum
vladvana 0:23d1f73bf130 154 {
vladvana 0:23d1f73bf130 155 NORMAL,
vladvana 0:23d1f73bf130 156 DEVICE,
vladvana 0:23d1f73bf130 157 SHARED_DEVICE,
vladvana 0:23d1f73bf130 158 NON_SHARED_DEVICE,
vladvana 0:23d1f73bf130 159 STRONGLY_ORDERED
vladvana 0:23d1f73bf130 160 } mmu_memory_Type;
vladvana 0:23d1f73bf130 161
vladvana 0:23d1f73bf130 162 /* Region cacheability attributes */
vladvana 0:23d1f73bf130 163 typedef enum
vladvana 0:23d1f73bf130 164 {
vladvana 0:23d1f73bf130 165 NON_CACHEABLE,
vladvana 0:23d1f73bf130 166 WB_WA,
vladvana 0:23d1f73bf130 167 WT,
vladvana 0:23d1f73bf130 168 WB_NO_WA,
vladvana 0:23d1f73bf130 169 } mmu_cacheability_Type;
vladvana 0:23d1f73bf130 170
vladvana 0:23d1f73bf130 171 /* Region parity check attributes */
vladvana 0:23d1f73bf130 172 typedef enum
vladvana 0:23d1f73bf130 173 {
vladvana 0:23d1f73bf130 174 ECC_DISABLED,
vladvana 0:23d1f73bf130 175 ECC_ENABLED,
vladvana 0:23d1f73bf130 176 } mmu_ecc_check_Type;
vladvana 0:23d1f73bf130 177
vladvana 0:23d1f73bf130 178 /* Region execution attributes */
vladvana 0:23d1f73bf130 179 typedef enum
vladvana 0:23d1f73bf130 180 {
vladvana 0:23d1f73bf130 181 EXECUTE,
vladvana 0:23d1f73bf130 182 NON_EXECUTE,
vladvana 0:23d1f73bf130 183 } mmu_execute_Type;
vladvana 0:23d1f73bf130 184
vladvana 0:23d1f73bf130 185 /* Region global attributes */
vladvana 0:23d1f73bf130 186 typedef enum
vladvana 0:23d1f73bf130 187 {
vladvana 0:23d1f73bf130 188 GLOBAL,
vladvana 0:23d1f73bf130 189 NON_GLOBAL,
vladvana 0:23d1f73bf130 190 } mmu_global_Type;
vladvana 0:23d1f73bf130 191
vladvana 0:23d1f73bf130 192 /* Region shareability attributes */
vladvana 0:23d1f73bf130 193 typedef enum
vladvana 0:23d1f73bf130 194 {
vladvana 0:23d1f73bf130 195 NON_SHARED,
vladvana 0:23d1f73bf130 196 SHARED,
vladvana 0:23d1f73bf130 197 } mmu_shared_Type;
vladvana 0:23d1f73bf130 198
vladvana 0:23d1f73bf130 199 /* Region security attributes */
vladvana 0:23d1f73bf130 200 typedef enum
vladvana 0:23d1f73bf130 201 {
vladvana 0:23d1f73bf130 202 SECURE,
vladvana 0:23d1f73bf130 203 NON_SECURE,
vladvana 0:23d1f73bf130 204 } mmu_secure_Type;
vladvana 0:23d1f73bf130 205
vladvana 0:23d1f73bf130 206 /* Region access attributes */
vladvana 0:23d1f73bf130 207 typedef enum
vladvana 0:23d1f73bf130 208 {
vladvana 0:23d1f73bf130 209 NO_ACCESS,
vladvana 0:23d1f73bf130 210 RW,
vladvana 0:23d1f73bf130 211 READ,
vladvana 0:23d1f73bf130 212 } mmu_access_Type;
vladvana 0:23d1f73bf130 213
vladvana 0:23d1f73bf130 214 /* Memory Region definition */
vladvana 0:23d1f73bf130 215 typedef struct RegionStruct {
vladvana 0:23d1f73bf130 216 mmu_region_size_Type rg_t;
vladvana 0:23d1f73bf130 217 mmu_memory_Type mem_t;
vladvana 0:23d1f73bf130 218 uint8_t domain;
vladvana 0:23d1f73bf130 219 mmu_cacheability_Type inner_norm_t;
vladvana 0:23d1f73bf130 220 mmu_cacheability_Type outer_norm_t;
vladvana 0:23d1f73bf130 221 mmu_ecc_check_Type e_t;
vladvana 0:23d1f73bf130 222 mmu_execute_Type xn_t;
vladvana 0:23d1f73bf130 223 mmu_global_Type g_t;
vladvana 0:23d1f73bf130 224 mmu_secure_Type sec_t;
vladvana 0:23d1f73bf130 225 mmu_access_Type priv_t;
vladvana 0:23d1f73bf130 226 mmu_access_Type user_t;
vladvana 0:23d1f73bf130 227 mmu_shared_Type sh_t;
vladvana 0:23d1f73bf130 228
vladvana 0:23d1f73bf130 229 } mmu_region_attributes_Type;
vladvana 0:23d1f73bf130 230
vladvana 0:23d1f73bf130 231 /** \brief Set section execution-never attribute
vladvana 0:23d1f73bf130 232
vladvana 0:23d1f73bf130 233 The function sets section execution-never attribute
vladvana 0:23d1f73bf130 234
vladvana 0:23d1f73bf130 235 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 236 \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE.
vladvana 0:23d1f73bf130 237
vladvana 0:23d1f73bf130 238 \return 0
vladvana 0:23d1f73bf130 239 */
vladvana 0:23d1f73bf130 240 __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn)
vladvana 0:23d1f73bf130 241 {
vladvana 0:23d1f73bf130 242 *descriptor_l1 &= SECTION_XN_MASK;
vladvana 0:23d1f73bf130 243 *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
vladvana 0:23d1f73bf130 244 return 0;
vladvana 0:23d1f73bf130 245 }
vladvana 0:23d1f73bf130 246
vladvana 0:23d1f73bf130 247 /** \brief Set section domain
vladvana 0:23d1f73bf130 248
vladvana 0:23d1f73bf130 249 The function sets section domain
vladvana 0:23d1f73bf130 250
vladvana 0:23d1f73bf130 251 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 252 \param [in] domain Section domain
vladvana 0:23d1f73bf130 253
vladvana 0:23d1f73bf130 254 \return 0
vladvana 0:23d1f73bf130 255 */
vladvana 0:23d1f73bf130 256 __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain)
vladvana 0:23d1f73bf130 257 {
vladvana 0:23d1f73bf130 258 *descriptor_l1 &= SECTION_DOMAIN_MASK;
vladvana 0:23d1f73bf130 259 *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
vladvana 0:23d1f73bf130 260 return 0;
vladvana 0:23d1f73bf130 261 }
vladvana 0:23d1f73bf130 262
vladvana 0:23d1f73bf130 263 /** \brief Set section parity check
vladvana 0:23d1f73bf130 264
vladvana 0:23d1f73bf130 265 The function sets section parity check
vladvana 0:23d1f73bf130 266
vladvana 0:23d1f73bf130 267 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 268 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
vladvana 0:23d1f73bf130 269
vladvana 0:23d1f73bf130 270 \return 0
vladvana 0:23d1f73bf130 271 */
vladvana 0:23d1f73bf130 272 __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
vladvana 0:23d1f73bf130 273 {
vladvana 0:23d1f73bf130 274 *descriptor_l1 &= SECTION_P_MASK;
vladvana 0:23d1f73bf130 275 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
vladvana 0:23d1f73bf130 276 return 0;
vladvana 0:23d1f73bf130 277 }
vladvana 0:23d1f73bf130 278
vladvana 0:23d1f73bf130 279 /** \brief Set section access privileges
vladvana 0:23d1f73bf130 280
vladvana 0:23d1f73bf130 281 The function sets section access privileges
vladvana 0:23d1f73bf130 282
vladvana 0:23d1f73bf130 283 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 284 \param [in] user User Level Access: NO_ACCESS, RW, READ
vladvana 0:23d1f73bf130 285 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
vladvana 0:23d1f73bf130 286 \param [in] afe Access flag enable
vladvana 0:23d1f73bf130 287
vladvana 0:23d1f73bf130 288 \return 0
vladvana 0:23d1f73bf130 289 */
vladvana 0:23d1f73bf130 290 __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
vladvana 0:23d1f73bf130 291 {
vladvana 0:23d1f73bf130 292 uint32_t ap = 0;
vladvana 0:23d1f73bf130 293
vladvana 0:23d1f73bf130 294 if (afe == 0) { //full access
vladvana 0:23d1f73bf130 295 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
vladvana 0:23d1f73bf130 296 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
vladvana 0:23d1f73bf130 297 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
vladvana 0:23d1f73bf130 298 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
vladvana 0:23d1f73bf130 299 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
vladvana 0:23d1f73bf130 300 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
vladvana 0:23d1f73bf130 301 }
vladvana 0:23d1f73bf130 302
vladvana 0:23d1f73bf130 303 else { //Simplified access
vladvana 0:23d1f73bf130 304 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
vladvana 0:23d1f73bf130 305 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
vladvana 0:23d1f73bf130 306 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
vladvana 0:23d1f73bf130 307 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
vladvana 0:23d1f73bf130 308 }
vladvana 0:23d1f73bf130 309
vladvana 0:23d1f73bf130 310 *descriptor_l1 &= SECTION_AP_MASK;
vladvana 0:23d1f73bf130 311 *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
vladvana 0:23d1f73bf130 312 *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
vladvana 0:23d1f73bf130 313
vladvana 0:23d1f73bf130 314 return 0;
vladvana 0:23d1f73bf130 315 }
vladvana 0:23d1f73bf130 316
vladvana 0:23d1f73bf130 317 /** \brief Set section shareability
vladvana 0:23d1f73bf130 318
vladvana 0:23d1f73bf130 319 The function sets section shareability
vladvana 0:23d1f73bf130 320
vladvana 0:23d1f73bf130 321 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 322 \param [in] s_bit Section shareability: NON_SHARED, SHARED
vladvana 0:23d1f73bf130 323
vladvana 0:23d1f73bf130 324 \return 0
vladvana 0:23d1f73bf130 325 */
vladvana 0:23d1f73bf130 326 __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
vladvana 0:23d1f73bf130 327 {
vladvana 0:23d1f73bf130 328 *descriptor_l1 &= SECTION_S_MASK;
vladvana 0:23d1f73bf130 329 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
vladvana 0:23d1f73bf130 330 return 0;
vladvana 0:23d1f73bf130 331 }
vladvana 0:23d1f73bf130 332
vladvana 0:23d1f73bf130 333 /** \brief Set section Global attribute
vladvana 0:23d1f73bf130 334
vladvana 0:23d1f73bf130 335 The function sets section Global attribute
vladvana 0:23d1f73bf130 336
vladvana 0:23d1f73bf130 337 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 338 \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL
vladvana 0:23d1f73bf130 339
vladvana 0:23d1f73bf130 340 \return 0
vladvana 0:23d1f73bf130 341 */
vladvana 0:23d1f73bf130 342 __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit)
vladvana 0:23d1f73bf130 343 {
vladvana 0:23d1f73bf130 344 *descriptor_l1 &= SECTION_NG_MASK;
vladvana 0:23d1f73bf130 345 *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
vladvana 0:23d1f73bf130 346 return 0;
vladvana 0:23d1f73bf130 347 }
vladvana 0:23d1f73bf130 348
vladvana 0:23d1f73bf130 349 /** \brief Set section Security attribute
vladvana 0:23d1f73bf130 350
vladvana 0:23d1f73bf130 351 The function sets section Global attribute
vladvana 0:23d1f73bf130 352
vladvana 0:23d1f73bf130 353 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 354 \param [in] s_bit Section Security attribute: SECURE, NON_SECURE
vladvana 0:23d1f73bf130 355
vladvana 0:23d1f73bf130 356 \return 0
vladvana 0:23d1f73bf130 357 */
vladvana 0:23d1f73bf130 358 __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
vladvana 0:23d1f73bf130 359 {
vladvana 0:23d1f73bf130 360 *descriptor_l1 &= SECTION_NS_MASK;
vladvana 0:23d1f73bf130 361 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
vladvana 0:23d1f73bf130 362 return 0;
vladvana 0:23d1f73bf130 363 }
vladvana 0:23d1f73bf130 364
vladvana 0:23d1f73bf130 365 /* Page 4k or 64k */
vladvana 0:23d1f73bf130 366 /** \brief Set 4k/64k page execution-never attribute
vladvana 0:23d1f73bf130 367
vladvana 0:23d1f73bf130 368 The function sets 4k/64k page execution-never attribute
vladvana 0:23d1f73bf130 369
vladvana 0:23d1f73bf130 370 \param [out] descriptor_l2 L2 descriptor.
vladvana 0:23d1f73bf130 371 \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE.
vladvana 0:23d1f73bf130 372 \param [in] page Page size: PAGE_4k, PAGE_64k,
vladvana 0:23d1f73bf130 373
vladvana 0:23d1f73bf130 374 \return 0
vladvana 0:23d1f73bf130 375 */
vladvana 0:23d1f73bf130 376 __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
vladvana 0:23d1f73bf130 377 {
vladvana 0:23d1f73bf130 378 if (page == PAGE_4k)
vladvana 0:23d1f73bf130 379 {
vladvana 0:23d1f73bf130 380 *descriptor_l2 &= PAGE_XN_4K_MASK;
vladvana 0:23d1f73bf130 381 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
vladvana 0:23d1f73bf130 382 }
vladvana 0:23d1f73bf130 383 else
vladvana 0:23d1f73bf130 384 {
vladvana 0:23d1f73bf130 385 *descriptor_l2 &= PAGE_XN_64K_MASK;
vladvana 0:23d1f73bf130 386 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
vladvana 0:23d1f73bf130 387 }
vladvana 0:23d1f73bf130 388 return 0;
vladvana 0:23d1f73bf130 389 }
vladvana 0:23d1f73bf130 390
vladvana 0:23d1f73bf130 391 /** \brief Set 4k/64k page domain
vladvana 0:23d1f73bf130 392
vladvana 0:23d1f73bf130 393 The function sets 4k/64k page domain
vladvana 0:23d1f73bf130 394
vladvana 0:23d1f73bf130 395 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 396 \param [in] domain Page domain
vladvana 0:23d1f73bf130 397
vladvana 0:23d1f73bf130 398 \return 0
vladvana 0:23d1f73bf130 399 */
vladvana 0:23d1f73bf130 400 __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain)
vladvana 0:23d1f73bf130 401 {
vladvana 0:23d1f73bf130 402 *descriptor_l1 &= PAGE_DOMAIN_MASK;
vladvana 0:23d1f73bf130 403 *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
vladvana 0:23d1f73bf130 404 return 0;
vladvana 0:23d1f73bf130 405 }
vladvana 0:23d1f73bf130 406
vladvana 0:23d1f73bf130 407 /** \brief Set 4k/64k page parity check
vladvana 0:23d1f73bf130 408
vladvana 0:23d1f73bf130 409 The function sets 4k/64k page parity check
vladvana 0:23d1f73bf130 410
vladvana 0:23d1f73bf130 411 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 412 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
vladvana 0:23d1f73bf130 413
vladvana 0:23d1f73bf130 414 \return 0
vladvana 0:23d1f73bf130 415 */
vladvana 0:23d1f73bf130 416 __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
vladvana 0:23d1f73bf130 417 {
vladvana 0:23d1f73bf130 418 *descriptor_l1 &= SECTION_P_MASK;
vladvana 0:23d1f73bf130 419 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
vladvana 0:23d1f73bf130 420 return 0;
vladvana 0:23d1f73bf130 421 }
vladvana 0:23d1f73bf130 422
vladvana 0:23d1f73bf130 423 /** \brief Set 4k/64k page access privileges
vladvana 0:23d1f73bf130 424
vladvana 0:23d1f73bf130 425 The function sets 4k/64k page access privileges
vladvana 0:23d1f73bf130 426
vladvana 0:23d1f73bf130 427 \param [out] descriptor_l2 L2 descriptor.
vladvana 0:23d1f73bf130 428 \param [in] user User Level Access: NO_ACCESS, RW, READ
vladvana 0:23d1f73bf130 429 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
vladvana 0:23d1f73bf130 430 \param [in] afe Access flag enable
vladvana 0:23d1f73bf130 431
vladvana 0:23d1f73bf130 432 \return 0
vladvana 0:23d1f73bf130 433 */
vladvana 0:23d1f73bf130 434 __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
vladvana 0:23d1f73bf130 435 {
vladvana 0:23d1f73bf130 436 uint32_t ap = 0;
vladvana 0:23d1f73bf130 437
vladvana 0:23d1f73bf130 438 if (afe == 0) { //full access
vladvana 0:23d1f73bf130 439 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
vladvana 0:23d1f73bf130 440 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
vladvana 0:23d1f73bf130 441 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
vladvana 0:23d1f73bf130 442 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
vladvana 0:23d1f73bf130 443 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
vladvana 0:23d1f73bf130 444 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
vladvana 0:23d1f73bf130 445 }
vladvana 0:23d1f73bf130 446
vladvana 0:23d1f73bf130 447 else { //Simplified access
vladvana 0:23d1f73bf130 448 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
vladvana 0:23d1f73bf130 449 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
vladvana 0:23d1f73bf130 450 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
vladvana 0:23d1f73bf130 451 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
vladvana 0:23d1f73bf130 452 }
vladvana 0:23d1f73bf130 453
vladvana 0:23d1f73bf130 454 *descriptor_l2 &= PAGE_AP_MASK;
vladvana 0:23d1f73bf130 455 *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
vladvana 0:23d1f73bf130 456 *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
vladvana 0:23d1f73bf130 457
vladvana 0:23d1f73bf130 458 return 0;
vladvana 0:23d1f73bf130 459 }
vladvana 0:23d1f73bf130 460
vladvana 0:23d1f73bf130 461 /** \brief Set 4k/64k page shareability
vladvana 0:23d1f73bf130 462
vladvana 0:23d1f73bf130 463 The function sets 4k/64k page shareability
vladvana 0:23d1f73bf130 464
vladvana 0:23d1f73bf130 465 \param [out] descriptor_l2 L2 descriptor.
vladvana 0:23d1f73bf130 466 \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED
vladvana 0:23d1f73bf130 467
vladvana 0:23d1f73bf130 468 \return 0
vladvana 0:23d1f73bf130 469 */
vladvana 0:23d1f73bf130 470 __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
vladvana 0:23d1f73bf130 471 {
vladvana 0:23d1f73bf130 472 *descriptor_l2 &= PAGE_S_MASK;
vladvana 0:23d1f73bf130 473 *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
vladvana 0:23d1f73bf130 474 return 0;
vladvana 0:23d1f73bf130 475 }
vladvana 0:23d1f73bf130 476
vladvana 0:23d1f73bf130 477 /** \brief Set 4k/64k page Global attribute
vladvana 0:23d1f73bf130 478
vladvana 0:23d1f73bf130 479 The function sets 4k/64k page Global attribute
vladvana 0:23d1f73bf130 480
vladvana 0:23d1f73bf130 481 \param [out] descriptor_l2 L2 descriptor.
vladvana 0:23d1f73bf130 482 \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL
vladvana 0:23d1f73bf130 483
vladvana 0:23d1f73bf130 484 \return 0
vladvana 0:23d1f73bf130 485 */
vladvana 0:23d1f73bf130 486 __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit)
vladvana 0:23d1f73bf130 487 {
vladvana 0:23d1f73bf130 488 *descriptor_l2 &= PAGE_NG_MASK;
vladvana 0:23d1f73bf130 489 *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
vladvana 0:23d1f73bf130 490 return 0;
vladvana 0:23d1f73bf130 491 }
vladvana 0:23d1f73bf130 492
vladvana 0:23d1f73bf130 493 /** \brief Set 4k/64k page Security attribute
vladvana 0:23d1f73bf130 494
vladvana 0:23d1f73bf130 495 The function sets 4k/64k page Global attribute
vladvana 0:23d1f73bf130 496
vladvana 0:23d1f73bf130 497 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 498 \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE
vladvana 0:23d1f73bf130 499
vladvana 0:23d1f73bf130 500 \return 0
vladvana 0:23d1f73bf130 501 */
vladvana 0:23d1f73bf130 502 __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
vladvana 0:23d1f73bf130 503 {
vladvana 0:23d1f73bf130 504 *descriptor_l1 &= PAGE_NS_MASK;
vladvana 0:23d1f73bf130 505 *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
vladvana 0:23d1f73bf130 506 return 0;
vladvana 0:23d1f73bf130 507 }
vladvana 0:23d1f73bf130 508
vladvana 0:23d1f73bf130 509
vladvana 0:23d1f73bf130 510 /** \brief Set Section memory attributes
vladvana 0:23d1f73bf130 511
vladvana 0:23d1f73bf130 512 The function sets section memory attributes
vladvana 0:23d1f73bf130 513
vladvana 0:23d1f73bf130 514 \param [out] descriptor_l1 L1 descriptor.
vladvana 0:23d1f73bf130 515 \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
vladvana 0:23d1f73bf130 516 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
vladvana 0:23d1f73bf130 517 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
vladvana 0:23d1f73bf130 518
vladvana 0:23d1f73bf130 519 \return 0
vladvana 0:23d1f73bf130 520 */
vladvana 0:23d1f73bf130 521 __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
vladvana 0:23d1f73bf130 522 {
vladvana 0:23d1f73bf130 523 *descriptor_l1 &= SECTION_TEXCB_MASK;
vladvana 0:23d1f73bf130 524
vladvana 0:23d1f73bf130 525 if (STRONGLY_ORDERED == mem)
vladvana 0:23d1f73bf130 526 {
vladvana 0:23d1f73bf130 527 return 0;
vladvana 0:23d1f73bf130 528 }
vladvana 0:23d1f73bf130 529 else if (SHARED_DEVICE == mem)
vladvana 0:23d1f73bf130 530 {
vladvana 0:23d1f73bf130 531 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
vladvana 0:23d1f73bf130 532 }
vladvana 0:23d1f73bf130 533 else if (NON_SHARED_DEVICE == mem)
vladvana 0:23d1f73bf130 534 {
vladvana 0:23d1f73bf130 535 *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
vladvana 0:23d1f73bf130 536 }
vladvana 0:23d1f73bf130 537 else if (NORMAL == mem)
vladvana 0:23d1f73bf130 538 {
vladvana 0:23d1f73bf130 539 *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
vladvana 0:23d1f73bf130 540 switch(inner)
vladvana 0:23d1f73bf130 541 {
vladvana 0:23d1f73bf130 542 case NON_CACHEABLE:
vladvana 0:23d1f73bf130 543 break;
vladvana 0:23d1f73bf130 544 case WB_WA:
vladvana 0:23d1f73bf130 545 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
vladvana 0:23d1f73bf130 546 break;
vladvana 0:23d1f73bf130 547 case WT:
vladvana 0:23d1f73bf130 548 *descriptor_l1 |= 1 << SECTION_C_SHIFT;
vladvana 0:23d1f73bf130 549 break;
vladvana 0:23d1f73bf130 550 case WB_NO_WA:
vladvana 0:23d1f73bf130 551 *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
vladvana 0:23d1f73bf130 552 break;
vladvana 0:23d1f73bf130 553 }
vladvana 0:23d1f73bf130 554 switch(outer)
vladvana 0:23d1f73bf130 555 {
vladvana 0:23d1f73bf130 556 case NON_CACHEABLE:
vladvana 0:23d1f73bf130 557 break;
vladvana 0:23d1f73bf130 558 case WB_WA:
vladvana 0:23d1f73bf130 559 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
vladvana 0:23d1f73bf130 560 break;
vladvana 0:23d1f73bf130 561 case WT:
vladvana 0:23d1f73bf130 562 *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
vladvana 0:23d1f73bf130 563 break;
vladvana 0:23d1f73bf130 564 case WB_NO_WA:
vladvana 0:23d1f73bf130 565 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
vladvana 0:23d1f73bf130 566 break;
vladvana 0:23d1f73bf130 567 }
vladvana 0:23d1f73bf130 568 }
vladvana 0:23d1f73bf130 569
vladvana 0:23d1f73bf130 570 return 0;
vladvana 0:23d1f73bf130 571 }
vladvana 0:23d1f73bf130 572
vladvana 0:23d1f73bf130 573 /** \brief Set 4k/64k page memory attributes
vladvana 0:23d1f73bf130 574
vladvana 0:23d1f73bf130 575 The function sets 4k/64k page memory attributes
vladvana 0:23d1f73bf130 576
vladvana 0:23d1f73bf130 577 \param [out] descriptor_l2 L2 descriptor.
vladvana 0:23d1f73bf130 578 \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
vladvana 0:23d1f73bf130 579 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
vladvana 0:23d1f73bf130 580 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
vladvana 0:23d1f73bf130 581
vladvana 0:23d1f73bf130 582 \return 0
vladvana 0:23d1f73bf130 583 */
vladvana 0:23d1f73bf130 584 __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
vladvana 0:23d1f73bf130 585 {
vladvana 0:23d1f73bf130 586 *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
vladvana 0:23d1f73bf130 587
vladvana 0:23d1f73bf130 588 if (page == PAGE_64k)
vladvana 0:23d1f73bf130 589 {
vladvana 0:23d1f73bf130 590 //same as section
vladvana 0:23d1f73bf130 591 __memory_section(descriptor_l2, mem, outer, inner);
vladvana 0:23d1f73bf130 592 }
vladvana 0:23d1f73bf130 593 else
vladvana 0:23d1f73bf130 594 {
vladvana 0:23d1f73bf130 595 if (STRONGLY_ORDERED == mem)
vladvana 0:23d1f73bf130 596 {
vladvana 0:23d1f73bf130 597 return 0;
vladvana 0:23d1f73bf130 598 }
vladvana 0:23d1f73bf130 599 else if (SHARED_DEVICE == mem)
vladvana 0:23d1f73bf130 600 {
vladvana 0:23d1f73bf130 601 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
vladvana 0:23d1f73bf130 602 }
vladvana 0:23d1f73bf130 603 else if (NON_SHARED_DEVICE == mem)
vladvana 0:23d1f73bf130 604 {
vladvana 0:23d1f73bf130 605 *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
vladvana 0:23d1f73bf130 606 }
vladvana 0:23d1f73bf130 607 else if (NORMAL == mem)
vladvana 0:23d1f73bf130 608 {
vladvana 0:23d1f73bf130 609 *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
vladvana 0:23d1f73bf130 610 switch(inner)
vladvana 0:23d1f73bf130 611 {
vladvana 0:23d1f73bf130 612 case NON_CACHEABLE:
vladvana 0:23d1f73bf130 613 break;
vladvana 0:23d1f73bf130 614 case WB_WA:
vladvana 0:23d1f73bf130 615 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
vladvana 0:23d1f73bf130 616 break;
vladvana 0:23d1f73bf130 617 case WT:
vladvana 0:23d1f73bf130 618 *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
vladvana 0:23d1f73bf130 619 break;
vladvana 0:23d1f73bf130 620 case WB_NO_WA:
vladvana 0:23d1f73bf130 621 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
vladvana 0:23d1f73bf130 622 break;
vladvana 0:23d1f73bf130 623 }
vladvana 0:23d1f73bf130 624 switch(outer)
vladvana 0:23d1f73bf130 625 {
vladvana 0:23d1f73bf130 626 case NON_CACHEABLE:
vladvana 0:23d1f73bf130 627 break;
vladvana 0:23d1f73bf130 628 case WB_WA:
vladvana 0:23d1f73bf130 629 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
vladvana 0:23d1f73bf130 630 break;
vladvana 0:23d1f73bf130 631 case WT:
vladvana 0:23d1f73bf130 632 *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
vladvana 0:23d1f73bf130 633 break;
vladvana 0:23d1f73bf130 634 case WB_NO_WA:
vladvana 0:23d1f73bf130 635 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
vladvana 0:23d1f73bf130 636 break;
vladvana 0:23d1f73bf130 637 }
vladvana 0:23d1f73bf130 638 }
vladvana 0:23d1f73bf130 639 }
vladvana 0:23d1f73bf130 640
vladvana 0:23d1f73bf130 641 return 0;
vladvana 0:23d1f73bf130 642 }
vladvana 0:23d1f73bf130 643
vladvana 0:23d1f73bf130 644 /** \brief Create a L1 section descriptor
vladvana 0:23d1f73bf130 645
vladvana 0:23d1f73bf130 646 The function creates a section descriptor.
vladvana 0:23d1f73bf130 647
vladvana 0:23d1f73bf130 648 Assumptions:
vladvana 0:23d1f73bf130 649 - 16MB super sections not supported
vladvana 0:23d1f73bf130 650 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
vladvana 0:23d1f73bf130 651 - Functions always return 0
vladvana 0:23d1f73bf130 652
vladvana 0:23d1f73bf130 653 \param [out] descriptor L1 descriptor
vladvana 0:23d1f73bf130 654 \param [out] descriptor2 L2 descriptor
vladvana 0:23d1f73bf130 655 \param [in] reg Section attributes
vladvana 0:23d1f73bf130 656
vladvana 0:23d1f73bf130 657 \return 0
vladvana 0:23d1f73bf130 658 */
vladvana 0:23d1f73bf130 659 __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
vladvana 0:23d1f73bf130 660 {
vladvana 0:23d1f73bf130 661 *descriptor = 0;
vladvana 0:23d1f73bf130 662
vladvana 0:23d1f73bf130 663 __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
vladvana 0:23d1f73bf130 664 __xn_section(descriptor,reg.xn_t);
vladvana 0:23d1f73bf130 665 __domain_section(descriptor, reg.domain);
vladvana 0:23d1f73bf130 666 __p_section(descriptor, reg.e_t);
vladvana 0:23d1f73bf130 667 __ap_section(descriptor, reg.priv_t, reg.user_t, 1);
vladvana 0:23d1f73bf130 668 __shared_section(descriptor,reg.sh_t);
vladvana 0:23d1f73bf130 669 __global_section(descriptor,reg.g_t);
vladvana 0:23d1f73bf130 670 __secure_section(descriptor,reg.sec_t);
vladvana 0:23d1f73bf130 671 *descriptor &= SECTION_MASK;
vladvana 0:23d1f73bf130 672 *descriptor |= SECTION_DESCRIPTOR;
vladvana 0:23d1f73bf130 673
vladvana 0:23d1f73bf130 674 return 0;
vladvana 0:23d1f73bf130 675
vladvana 0:23d1f73bf130 676 }
vladvana 0:23d1f73bf130 677
vladvana 0:23d1f73bf130 678
vladvana 0:23d1f73bf130 679 /** \brief Create a L1 and L2 4k/64k page descriptor
vladvana 0:23d1f73bf130 680
vladvana 0:23d1f73bf130 681 The function creates a 4k/64k page descriptor.
vladvana 0:23d1f73bf130 682 Assumptions:
vladvana 0:23d1f73bf130 683 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
vladvana 0:23d1f73bf130 684 - Functions always return 0
vladvana 0:23d1f73bf130 685
vladvana 0:23d1f73bf130 686 \param [out] descriptor L1 descriptor
vladvana 0:23d1f73bf130 687 \param [out] descriptor2 L2 descriptor
vladvana 0:23d1f73bf130 688 \param [in] reg 4k/64k page attributes
vladvana 0:23d1f73bf130 689
vladvana 0:23d1f73bf130 690 \return 0
vladvana 0:23d1f73bf130 691 */
vladvana 0:23d1f73bf130 692 __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
vladvana 0:23d1f73bf130 693 {
vladvana 0:23d1f73bf130 694 *descriptor = 0;
vladvana 0:23d1f73bf130 695 *descriptor2 = 0;
vladvana 0:23d1f73bf130 696
vladvana 0:23d1f73bf130 697 switch (reg.rg_t)
vladvana 0:23d1f73bf130 698 {
vladvana 0:23d1f73bf130 699 case PAGE_4k:
vladvana 0:23d1f73bf130 700 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
vladvana 0:23d1f73bf130 701 __xn_page(descriptor2, reg.xn_t, PAGE_4k);
vladvana 0:23d1f73bf130 702 __domain_page(descriptor, reg.domain);
vladvana 0:23d1f73bf130 703 __p_page(descriptor, reg.e_t);
vladvana 0:23d1f73bf130 704 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
vladvana 0:23d1f73bf130 705 __shared_page(descriptor2,reg.sh_t);
vladvana 0:23d1f73bf130 706 __global_page(descriptor2,reg.g_t);
vladvana 0:23d1f73bf130 707 __secure_page(descriptor,reg.sec_t);
vladvana 0:23d1f73bf130 708 *descriptor &= PAGE_L1_MASK;
vladvana 0:23d1f73bf130 709 *descriptor |= PAGE_L1_DESCRIPTOR;
vladvana 0:23d1f73bf130 710 *descriptor2 &= PAGE_L2_4K_MASK;
vladvana 0:23d1f73bf130 711 *descriptor2 |= PAGE_L2_4K_DESC;
vladvana 0:23d1f73bf130 712 break;
vladvana 0:23d1f73bf130 713
vladvana 0:23d1f73bf130 714 case PAGE_64k:
vladvana 0:23d1f73bf130 715 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
vladvana 0:23d1f73bf130 716 __xn_page(descriptor2, reg.xn_t, PAGE_64k);
vladvana 0:23d1f73bf130 717 __domain_page(descriptor, reg.domain);
vladvana 0:23d1f73bf130 718 __p_page(descriptor, reg.e_t);
vladvana 0:23d1f73bf130 719 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
vladvana 0:23d1f73bf130 720 __shared_page(descriptor2,reg.sh_t);
vladvana 0:23d1f73bf130 721 __global_page(descriptor2,reg.g_t);
vladvana 0:23d1f73bf130 722 __secure_page(descriptor,reg.sec_t);
vladvana 0:23d1f73bf130 723 *descriptor &= PAGE_L1_MASK;
vladvana 0:23d1f73bf130 724 *descriptor |= PAGE_L1_DESCRIPTOR;
vladvana 0:23d1f73bf130 725 *descriptor2 &= PAGE_L2_64K_MASK;
vladvana 0:23d1f73bf130 726 *descriptor2 |= PAGE_L2_64K_DESC;
vladvana 0:23d1f73bf130 727 break;
vladvana 0:23d1f73bf130 728
vladvana 0:23d1f73bf130 729 case SECTION:
vladvana 0:23d1f73bf130 730 //error
vladvana 0:23d1f73bf130 731 break;
vladvana 0:23d1f73bf130 732
vladvana 0:23d1f73bf130 733 }
vladvana 0:23d1f73bf130 734
vladvana 0:23d1f73bf130 735 return 0;
vladvana 0:23d1f73bf130 736
vladvana 0:23d1f73bf130 737 }
vladvana 0:23d1f73bf130 738
vladvana 0:23d1f73bf130 739 /** \brief Create a 1MB Section
vladvana 0:23d1f73bf130 740
vladvana 0:23d1f73bf130 741 \param [in] ttb Translation table base address
vladvana 0:23d1f73bf130 742 \param [in] base_address Section base address
vladvana 0:23d1f73bf130 743 \param [in] count Number of sections to create
vladvana 0:23d1f73bf130 744 \param [in] descriptor_l1 L1 descriptor (region attributes)
vladvana 0:23d1f73bf130 745
vladvana 0:23d1f73bf130 746 */
vladvana 0:23d1f73bf130 747 __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
vladvana 0:23d1f73bf130 748 {
vladvana 0:23d1f73bf130 749 uint32_t offset;
vladvana 0:23d1f73bf130 750 uint32_t entry;
vladvana 0:23d1f73bf130 751 uint32_t i;
vladvana 0:23d1f73bf130 752
vladvana 0:23d1f73bf130 753 offset = base_address >> 20;
vladvana 0:23d1f73bf130 754 entry = (base_address & 0xFFF00000) | descriptor_l1;
vladvana 0:23d1f73bf130 755
vladvana 0:23d1f73bf130 756 //4 bytes aligned
vladvana 0:23d1f73bf130 757 ttb = ttb + offset;
vladvana 0:23d1f73bf130 758
vladvana 0:23d1f73bf130 759 for (i = 0; i < count; i++ )
vladvana 0:23d1f73bf130 760 {
vladvana 0:23d1f73bf130 761 //4 bytes aligned
vladvana 0:23d1f73bf130 762 *ttb++ = entry;
vladvana 0:23d1f73bf130 763 entry += OFFSET_1M;
vladvana 0:23d1f73bf130 764 }
vladvana 0:23d1f73bf130 765 }
vladvana 0:23d1f73bf130 766
vladvana 0:23d1f73bf130 767 /** \brief Create a 4k page entry
vladvana 0:23d1f73bf130 768
vladvana 0:23d1f73bf130 769 \param [in] ttb L1 table base address
vladvana 0:23d1f73bf130 770 \param [in] base_address 4k base address
vladvana 0:23d1f73bf130 771 \param [in] count Number of 4k pages to create
vladvana 0:23d1f73bf130 772 \param [in] descriptor_l1 L1 descriptor (region attributes)
vladvana 0:23d1f73bf130 773 \param [in] ttb_l2 L2 table base address
vladvana 0:23d1f73bf130 774 \param [in] descriptor_l2 L2 descriptor (region attributes)
vladvana 0:23d1f73bf130 775
vladvana 0:23d1f73bf130 776 */
vladvana 0:23d1f73bf130 777 __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
vladvana 0:23d1f73bf130 778 {
vladvana 0:23d1f73bf130 779
vladvana 0:23d1f73bf130 780 uint32_t offset, offset2;
vladvana 0:23d1f73bf130 781 uint32_t entry, entry2;
vladvana 0:23d1f73bf130 782 uint32_t i;
vladvana 0:23d1f73bf130 783
vladvana 0:23d1f73bf130 784
vladvana 0:23d1f73bf130 785 offset = base_address >> 20;
vladvana 0:23d1f73bf130 786 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
vladvana 0:23d1f73bf130 787
vladvana 0:23d1f73bf130 788 //4 bytes aligned
vladvana 0:23d1f73bf130 789 ttb += offset;
vladvana 0:23d1f73bf130 790 //create l1_entry
vladvana 0:23d1f73bf130 791 *ttb = entry;
vladvana 0:23d1f73bf130 792
vladvana 0:23d1f73bf130 793 offset2 = (base_address & 0xff000) >> 12;
vladvana 0:23d1f73bf130 794 ttb_l2 += offset2;
vladvana 0:23d1f73bf130 795 entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
vladvana 0:23d1f73bf130 796 for (i = 0; i < count; i++ )
vladvana 0:23d1f73bf130 797 {
vladvana 0:23d1f73bf130 798 //4 bytes aligned
vladvana 0:23d1f73bf130 799 *ttb_l2++ = entry2;
vladvana 0:23d1f73bf130 800 entry2 += OFFSET_4K;
vladvana 0:23d1f73bf130 801 }
vladvana 0:23d1f73bf130 802 }
vladvana 0:23d1f73bf130 803
vladvana 0:23d1f73bf130 804 /** \brief Create a 64k page entry
vladvana 0:23d1f73bf130 805
vladvana 0:23d1f73bf130 806 \param [in] ttb L1 table base address
vladvana 0:23d1f73bf130 807 \param [in] base_address 64k base address
vladvana 0:23d1f73bf130 808 \param [in] count Number of 64k pages to create
vladvana 0:23d1f73bf130 809 \param [in] descriptor_l1 L1 descriptor (region attributes)
vladvana 0:23d1f73bf130 810 \param [in] ttb_l2 L2 table base address
vladvana 0:23d1f73bf130 811 \param [in] descriptor_l2 L2 descriptor (region attributes)
vladvana 0:23d1f73bf130 812
vladvana 0:23d1f73bf130 813 */
vladvana 0:23d1f73bf130 814 __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
vladvana 0:23d1f73bf130 815 {
vladvana 0:23d1f73bf130 816 uint32_t offset, offset2;
vladvana 0:23d1f73bf130 817 uint32_t entry, entry2;
vladvana 0:23d1f73bf130 818 uint32_t i,j;
vladvana 0:23d1f73bf130 819
vladvana 0:23d1f73bf130 820
vladvana 0:23d1f73bf130 821 offset = base_address >> 20;
vladvana 0:23d1f73bf130 822 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
vladvana 0:23d1f73bf130 823
vladvana 0:23d1f73bf130 824 //4 bytes aligned
vladvana 0:23d1f73bf130 825 ttb += offset;
vladvana 0:23d1f73bf130 826 //create l1_entry
vladvana 0:23d1f73bf130 827 *ttb = entry;
vladvana 0:23d1f73bf130 828
vladvana 0:23d1f73bf130 829 offset2 = (base_address & 0xff000) >> 12;
vladvana 0:23d1f73bf130 830 ttb_l2 += offset2;
vladvana 0:23d1f73bf130 831 entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
vladvana 0:23d1f73bf130 832 for (i = 0; i < count; i++ )
vladvana 0:23d1f73bf130 833 {
vladvana 0:23d1f73bf130 834 //create 16 entries
vladvana 0:23d1f73bf130 835 for (j = 0; j < 16; j++)
vladvana 0:23d1f73bf130 836 //4 bytes aligned
vladvana 0:23d1f73bf130 837 *ttb_l2++ = entry2;
vladvana 0:23d1f73bf130 838 entry2 += OFFSET_64K;
vladvana 0:23d1f73bf130 839 }
vladvana 0:23d1f73bf130 840 }
vladvana 0:23d1f73bf130 841
vladvana 0:23d1f73bf130 842 /*@} end of MMU_Functions */
vladvana 0:23d1f73bf130 843 #endif
vladvana 0:23d1f73bf130 844
vladvana 0:23d1f73bf130 845 #ifdef __cplusplus
vladvana 0:23d1f73bf130 846 }
vladvana 0:23d1f73bf130 847 #endif