Vladimir Vana / mbed

pro vyuku PSS v Jecne

TARGET_NUCLEO_F103RB/core_ca9.h@0:23d1f73bf130, 2017-09-24 (annotated)

Committer:
vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
Revision:
0:23d1f73bf130
podklady pro cviceni z PSS

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vladvana 0:23d1f73bf130 1 /**************************************************************************//**
vladvana 0:23d1f73bf130 2 * @file core_ca9.h
vladvana 0:23d1f73bf130 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
vladvana 0:23d1f73bf130 4 * @version
vladvana 0:23d1f73bf130 5 * @date 25 March 2013
vladvana 0:23d1f73bf130 6 *
vladvana 0:23d1f73bf130 7 * @note
vladvana 0:23d1f73bf130 8 *
vladvana 0:23d1f73bf130 9 ******************************************************************************/
vladvana 0:23d1f73bf130 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
vladvana 0:23d1f73bf130 11
vladvana 0:23d1f73bf130 12 All rights reserved.
vladvana 0:23d1f73bf130 13 Redistribution and use in source and binary forms, with or without
vladvana 0:23d1f73bf130 14 modification, are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 - Redistributions of source code must retain the above copyright
vladvana 0:23d1f73bf130 16 notice, this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 - Redistributions in binary form must reproduce the above copyright
vladvana 0:23d1f73bf130 18 notice, this list of conditions and the following disclaimer in the
vladvana 0:23d1f73bf130 19 documentation and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 - Neither the name of ARM nor the names of its contributors may be used
vladvana 0:23d1f73bf130 21 to endorse or promote products derived from this software without
vladvana 0:23d1f73bf130 22 specific prior written permission.
vladvana 0:23d1f73bf130 23 *
vladvana 0:23d1f73bf130 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
vladvana 0:23d1f73bf130 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
vladvana 0:23d1f73bf130 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
vladvana 0:23d1f73bf130 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
vladvana 0:23d1f73bf130 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
vladvana 0:23d1f73bf130 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
vladvana 0:23d1f73bf130 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
vladvana 0:23d1f73bf130 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
vladvana 0:23d1f73bf130 34 POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 35 ---------------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 36
vladvana 0:23d1f73bf130 37
vladvana 0:23d1f73bf130 38 #if defined ( __ICCARM__ )
vladvana 0:23d1f73bf130 39 #pragma system_include /* treat file as system include file for MISRA check */
vladvana 0:23d1f73bf130 40 #endif
vladvana 0:23d1f73bf130 41
vladvana 0:23d1f73bf130 42 #ifdef __cplusplus
vladvana 0:23d1f73bf130 43 extern "C" {
vladvana 0:23d1f73bf130 44 #endif
vladvana 0:23d1f73bf130 45
vladvana 0:23d1f73bf130 46 #ifndef __CORE_CA9_H_GENERIC
vladvana 0:23d1f73bf130 47 #define __CORE_CA9_H_GENERIC
vladvana 0:23d1f73bf130 48
vladvana 0:23d1f73bf130 49
vladvana 0:23d1f73bf130 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
vladvana 0:23d1f73bf130 51 CMSIS violates the following MISRA-C:2004 rules:
vladvana 0:23d1f73bf130 52
vladvana 0:23d1f73bf130 53 \li Required Rule 8.5, object/function definition in header file.<br>
vladvana 0:23d1f73bf130 54 Function definitions in header files are used to allow 'inlining'.
vladvana 0:23d1f73bf130 55
vladvana 0:23d1f73bf130 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
vladvana 0:23d1f73bf130 57 Unions are used for effective representation of core registers.
vladvana 0:23d1f73bf130 58
vladvana 0:23d1f73bf130 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
vladvana 0:23d1f73bf130 60 Function-like macros are used to allow more efficient code.
vladvana 0:23d1f73bf130 61 */
vladvana 0:23d1f73bf130 62
vladvana 0:23d1f73bf130 63
vladvana 0:23d1f73bf130 64 /*******************************************************************************
vladvana 0:23d1f73bf130 65 * CMSIS definitions
vladvana 0:23d1f73bf130 66 ******************************************************************************/
vladvana 0:23d1f73bf130 67 /** \ingroup Cortex_A9
vladvana 0:23d1f73bf130 68 @{
vladvana 0:23d1f73bf130 69 */
vladvana 0:23d1f73bf130 70
vladvana 0:23d1f73bf130 71 /* CMSIS CA9 definitions */
vladvana 0:23d1f73bf130 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
vladvana 0:23d1f73bf130 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
vladvana 0:23d1f73bf130 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
vladvana 0:23d1f73bf130 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
vladvana 0:23d1f73bf130 76
vladvana 0:23d1f73bf130 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
vladvana 0:23d1f73bf130 78
vladvana 0:23d1f73bf130 79
vladvana 0:23d1f73bf130 80 #if defined ( __CC_ARM )
vladvana 0:23d1f73bf130 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
vladvana 0:23d1f73bf130 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
vladvana 0:23d1f73bf130 83 #define __STATIC_INLINE static __inline
vladvana 0:23d1f73bf130 84 #define __STATIC_ASM static __asm
vladvana 0:23d1f73bf130 85
vladvana 0:23d1f73bf130 86 #elif defined ( __ICCARM__ )
vladvana 0:23d1f73bf130 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
vladvana 0:23d1f73bf130 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
vladvana 0:23d1f73bf130 89 #define __STATIC_INLINE static inline
vladvana 0:23d1f73bf130 90 #define __STATIC_ASM static __asm
vladvana 0:23d1f73bf130 91
vladvana 0:23d1f73bf130 92 #elif defined ( __TMS470__ )
vladvana 0:23d1f73bf130 93 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
vladvana 0:23d1f73bf130 94 #define __STATIC_INLINE static inline
vladvana 0:23d1f73bf130 95 #define __STATIC_ASM static __asm
vladvana 0:23d1f73bf130 96
vladvana 0:23d1f73bf130 97 #elif defined ( __GNUC__ )
vladvana 0:23d1f73bf130 98 #define __ASM __asm /*!< asm keyword for GNU Compiler */
vladvana 0:23d1f73bf130 99 #define __INLINE inline /*!< inline keyword for GNU Compiler */
vladvana 0:23d1f73bf130 100 #define __STATIC_INLINE static inline
vladvana 0:23d1f73bf130 101 #define __STATIC_ASM static __asm
vladvana 0:23d1f73bf130 102
vladvana 0:23d1f73bf130 103 #elif defined ( __TASKING__ )
vladvana 0:23d1f73bf130 104 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
vladvana 0:23d1f73bf130 105 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
vladvana 0:23d1f73bf130 106 #define __STATIC_INLINE static inline
vladvana 0:23d1f73bf130 107 #define __STATIC_ASM static __asm
vladvana 0:23d1f73bf130 108
vladvana 0:23d1f73bf130 109 #endif
vladvana 0:23d1f73bf130 110
vladvana 0:23d1f73bf130 111 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
vladvana 0:23d1f73bf130 112 */
vladvana 0:23d1f73bf130 113 #if defined ( __CC_ARM )
vladvana 0:23d1f73bf130 114 #if defined __TARGET_FPU_VFP
vladvana 0:23d1f73bf130 115 #if (__FPU_PRESENT == 1)
vladvana 0:23d1f73bf130 116 #define __FPU_USED 1
vladvana 0:23d1f73bf130 117 #else
vladvana 0:23d1f73bf130 118 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
vladvana 0:23d1f73bf130 119 #define __FPU_USED 0
vladvana 0:23d1f73bf130 120 #endif
vladvana 0:23d1f73bf130 121 #else
vladvana 0:23d1f73bf130 122 #define __FPU_USED 0
vladvana 0:23d1f73bf130 123 #endif
vladvana 0:23d1f73bf130 124
vladvana 0:23d1f73bf130 125 #elif defined ( __ICCARM__ )
vladvana 0:23d1f73bf130 126 #if defined __ARMVFP__
vladvana 0:23d1f73bf130 127 #if (__FPU_PRESENT == 1)
vladvana 0:23d1f73bf130 128 #define __FPU_USED 1
vladvana 0:23d1f73bf130 129 #else
vladvana 0:23d1f73bf130 130 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
vladvana 0:23d1f73bf130 131 #define __FPU_USED 0
vladvana 0:23d1f73bf130 132 #endif
vladvana 0:23d1f73bf130 133 #else
vladvana 0:23d1f73bf130 134 #define __FPU_USED 0
vladvana 0:23d1f73bf130 135 #endif
vladvana 0:23d1f73bf130 136
vladvana 0:23d1f73bf130 137 #elif defined ( __TMS470__ )
vladvana 0:23d1f73bf130 138 #if defined __TI_VFP_SUPPORT__
vladvana 0:23d1f73bf130 139 #if (__FPU_PRESENT == 1)
vladvana 0:23d1f73bf130 140 #define __FPU_USED 1
vladvana 0:23d1f73bf130 141 #else
vladvana 0:23d1f73bf130 142 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
vladvana 0:23d1f73bf130 143 #define __FPU_USED 0
vladvana 0:23d1f73bf130 144 #endif
vladvana 0:23d1f73bf130 145 #else
vladvana 0:23d1f73bf130 146 #define __FPU_USED 0
vladvana 0:23d1f73bf130 147 #endif
vladvana 0:23d1f73bf130 148
vladvana 0:23d1f73bf130 149 #elif defined ( __GNUC__ )
vladvana 0:23d1f73bf130 150 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
vladvana 0:23d1f73bf130 151 #if (__FPU_PRESENT == 1)
vladvana 0:23d1f73bf130 152 #define __FPU_USED 1
vladvana 0:23d1f73bf130 153 #else
vladvana 0:23d1f73bf130 154 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
vladvana 0:23d1f73bf130 155 #define __FPU_USED 0
vladvana 0:23d1f73bf130 156 #endif
vladvana 0:23d1f73bf130 157 #else
vladvana 0:23d1f73bf130 158 #define __FPU_USED 0
vladvana 0:23d1f73bf130 159 #endif
vladvana 0:23d1f73bf130 160
vladvana 0:23d1f73bf130 161 #elif defined ( __TASKING__ )
vladvana 0:23d1f73bf130 162 #if defined __FPU_VFP__
vladvana 0:23d1f73bf130 163 #if (__FPU_PRESENT == 1)
vladvana 0:23d1f73bf130 164 #define __FPU_USED 1
vladvana 0:23d1f73bf130 165 #else
vladvana 0:23d1f73bf130 166 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
vladvana 0:23d1f73bf130 167 #define __FPU_USED 0
vladvana 0:23d1f73bf130 168 #endif
vladvana 0:23d1f73bf130 169 #else
vladvana 0:23d1f73bf130 170 #define __FPU_USED 0
vladvana 0:23d1f73bf130 171 #endif
vladvana 0:23d1f73bf130 172 #endif
vladvana 0:23d1f73bf130 173
vladvana 0:23d1f73bf130 174 #include <stdint.h> /*!< standard types definitions */
vladvana 0:23d1f73bf130 175 #include "core_caInstr.h" /*!< Core Instruction Access */
vladvana 0:23d1f73bf130 176 #include "core_caFunc.h" /*!< Core Function Access */
vladvana 0:23d1f73bf130 177 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
vladvana 0:23d1f73bf130 178
vladvana 0:23d1f73bf130 179 #endif /* __CORE_CA9_H_GENERIC */
vladvana 0:23d1f73bf130 180
vladvana 0:23d1f73bf130 181 #ifndef __CMSIS_GENERIC
vladvana 0:23d1f73bf130 182
vladvana 0:23d1f73bf130 183 #ifndef __CORE_CA9_H_DEPENDANT
vladvana 0:23d1f73bf130 184 #define __CORE_CA9_H_DEPENDANT
vladvana 0:23d1f73bf130 185
vladvana 0:23d1f73bf130 186 /* check device defines and use defaults */
vladvana 0:23d1f73bf130 187 #if defined __CHECK_DEVICE_DEFINES
vladvana 0:23d1f73bf130 188 #ifndef __CA9_REV
vladvana 0:23d1f73bf130 189 #define __CA9_REV 0x0000
vladvana 0:23d1f73bf130 190 #warning "__CA9_REV not defined in device header file; using default!"
vladvana 0:23d1f73bf130 191 #endif
vladvana 0:23d1f73bf130 192
vladvana 0:23d1f73bf130 193 #ifndef __FPU_PRESENT
vladvana 0:23d1f73bf130 194 #define __FPU_PRESENT 1
vladvana 0:23d1f73bf130 195 #warning "__FPU_PRESENT not defined in device header file; using default!"
vladvana 0:23d1f73bf130 196 #endif
vladvana 0:23d1f73bf130 197
vladvana 0:23d1f73bf130 198 #ifndef __Vendor_SysTickConfig
vladvana 0:23d1f73bf130 199 #define __Vendor_SysTickConfig 1
vladvana 0:23d1f73bf130 200 #endif
vladvana 0:23d1f73bf130 201
vladvana 0:23d1f73bf130 202 #if __Vendor_SysTickConfig == 0
vladvana 0:23d1f73bf130 203 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
vladvana 0:23d1f73bf130 204 #endif
vladvana 0:23d1f73bf130 205 #endif
vladvana 0:23d1f73bf130 206
vladvana 0:23d1f73bf130 207 /* IO definitions (access restrictions to peripheral registers) */
vladvana 0:23d1f73bf130 208 /**
vladvana 0:23d1f73bf130 209 \defgroup CMSIS_glob_defs CMSIS Global Defines
vladvana 0:23d1f73bf130 210
vladvana 0:23d1f73bf130 211 <strong>IO Type Qualifiers</strong> are used
vladvana 0:23d1f73bf130 212 \li to specify the access to peripheral variables.
vladvana 0:23d1f73bf130 213 \li for automatic generation of peripheral register debug information.
vladvana 0:23d1f73bf130 214 */
vladvana 0:23d1f73bf130 215 #ifdef __cplusplus
vladvana 0:23d1f73bf130 216 #define __I volatile /*!< Defines 'read only' permissions */
vladvana 0:23d1f73bf130 217 #else
vladvana 0:23d1f73bf130 218 #define __I volatile const /*!< Defines 'read only' permissions */
vladvana 0:23d1f73bf130 219 #endif
vladvana 0:23d1f73bf130 220 #define __O volatile /*!< Defines 'write only' permissions */
vladvana 0:23d1f73bf130 221 #define __IO volatile /*!< Defines 'read / write' permissions */
vladvana 0:23d1f73bf130 222
vladvana 0:23d1f73bf130 223 /*@} end of group Cortex_A9 */
vladvana 0:23d1f73bf130 224
vladvana 0:23d1f73bf130 225
vladvana 0:23d1f73bf130 226 /*******************************************************************************
vladvana 0:23d1f73bf130 227 * Register Abstraction
vladvana 0:23d1f73bf130 228 ******************************************************************************/
vladvana 0:23d1f73bf130 229 /** \defgroup CMSIS_core_register Defines and Type Definitions
vladvana 0:23d1f73bf130 230 \brief Type definitions and defines for Cortex-A processor based devices.
vladvana 0:23d1f73bf130 231 */
vladvana 0:23d1f73bf130 232
vladvana 0:23d1f73bf130 233 /** \ingroup CMSIS_core_register
vladvana 0:23d1f73bf130 234 \defgroup CMSIS_CORE Status and Control Registers
vladvana 0:23d1f73bf130 235 \brief Core Register type definitions.
vladvana 0:23d1f73bf130 236 @{
vladvana 0:23d1f73bf130 237 */
vladvana 0:23d1f73bf130 238
vladvana 0:23d1f73bf130 239 /** \brief Union type to access the Application Program Status Register (APSR).
vladvana 0:23d1f73bf130 240 */
vladvana 0:23d1f73bf130 241 typedef union
vladvana 0:23d1f73bf130 242 {
vladvana 0:23d1f73bf130 243 struct
vladvana 0:23d1f73bf130 244 {
vladvana 0:23d1f73bf130 245 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
vladvana 0:23d1f73bf130 246 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
vladvana 0:23d1f73bf130 247 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
vladvana 0:23d1f73bf130 248 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
vladvana 0:23d1f73bf130 249 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
vladvana 0:23d1f73bf130 250 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
vladvana 0:23d1f73bf130 251 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
vladvana 0:23d1f73bf130 252 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
vladvana 0:23d1f73bf130 253 } b; /*!< Structure used for bit access */
vladvana 0:23d1f73bf130 254 uint32_t w; /*!< Type used for word access */
vladvana 0:23d1f73bf130 255 } APSR_Type;
vladvana 0:23d1f73bf130 256
vladvana 0:23d1f73bf130 257
vladvana 0:23d1f73bf130 258 /*@} end of group CMSIS_CORE */
vladvana 0:23d1f73bf130 259
vladvana 0:23d1f73bf130 260 /*@} end of CMSIS_Core_FPUFunctions */
vladvana 0:23d1f73bf130 261
vladvana 0:23d1f73bf130 262
vladvana 0:23d1f73bf130 263 #endif /* __CORE_CA9_H_GENERIC */
vladvana 0:23d1f73bf130 264
vladvana 0:23d1f73bf130 265 #endif /* __CMSIS_GENERIC */
vladvana 0:23d1f73bf130 266
vladvana 0:23d1f73bf130 267 #ifdef __cplusplus
vladvana 0:23d1f73bf130 268 }
vladvana 0:23d1f73bf130 269
vladvana 0:23d1f73bf130 270
vladvana 0:23d1f73bf130 271 #endif