Vladimir Vana / mbed

pro vyuku PSS v Jecne

TARGET_NUCLEO_F103RB/stm32f1xx_hal_nor.h@0:23d1f73bf130, 2017-09-24 (annotated)

Committer:
vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
Revision:
0:23d1f73bf130
podklady pro cviceni z PSS

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vladvana 0:23d1f73bf130 1 /**
vladvana 0:23d1f73bf130 2 ******************************************************************************
vladvana 0:23d1f73bf130 3 * @file stm32f1xx_hal_nor.h
vladvana 0:23d1f73bf130 4 * @author MCD Application Team
vladvana 0:23d1f73bf130 5 * @version V1.0.0
vladvana 0:23d1f73bf130 6 * @date 15-December-2014
vladvana 0:23d1f73bf130 7 * @brief Header file of NOR HAL module.
vladvana 0:23d1f73bf130 8 ******************************************************************************
vladvana 0:23d1f73bf130 9 * @attention
vladvana 0:23d1f73bf130 10 *
vladvana 0:23d1f73bf130 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
vladvana 0:23d1f73bf130 12 *
vladvana 0:23d1f73bf130 13 * Redistribution and use in source and binary forms, with or without modification,
vladvana 0:23d1f73bf130 14 * are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 * 1. Redistributions of source code must retain the above copyright notice,
vladvana 0:23d1f73bf130 16 * this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
vladvana 0:23d1f73bf130 18 * this list of conditions and the following disclaimer in the documentation
vladvana 0:23d1f73bf130 19 * and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vladvana 0:23d1f73bf130 21 * may be used to endorse or promote products derived from this software
vladvana 0:23d1f73bf130 22 * without specific prior written permission.
vladvana 0:23d1f73bf130 23 *
vladvana 0:23d1f73bf130 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vladvana 0:23d1f73bf130 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vladvana 0:23d1f73bf130 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vladvana 0:23d1f73bf130 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vladvana 0:23d1f73bf130 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vladvana 0:23d1f73bf130 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vladvana 0:23d1f73bf130 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vladvana 0:23d1f73bf130 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 34 *
vladvana 0:23d1f73bf130 35 ******************************************************************************
vladvana 0:23d1f73bf130 36 */
vladvana 0:23d1f73bf130 37
vladvana 0:23d1f73bf130 38 /* Define to prevent recursive inclusion -------------------------------------*/
vladvana 0:23d1f73bf130 39 #ifndef __STM32F1xx_HAL_NOR_H
vladvana 0:23d1f73bf130 40 #define __STM32F1xx_HAL_NOR_H
vladvana 0:23d1f73bf130 41
vladvana 0:23d1f73bf130 42 #ifdef __cplusplus
vladvana 0:23d1f73bf130 43 extern "C" {
vladvana 0:23d1f73bf130 44 #endif
vladvana 0:23d1f73bf130 45
vladvana 0:23d1f73bf130 46 /* Includes ------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 47 #include "stm32f1xx_ll_fsmc.h"
vladvana 0:23d1f73bf130 48
vladvana 0:23d1f73bf130 49 /** @addtogroup STM32F1xx_HAL_Driver
vladvana 0:23d1f73bf130 50 * @{
vladvana 0:23d1f73bf130 51 */
vladvana 0:23d1f73bf130 52
vladvana 0:23d1f73bf130 53 #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE)
vladvana 0:23d1f73bf130 54 /** @addtogroup NOR
vladvana 0:23d1f73bf130 55 * @{
vladvana 0:23d1f73bf130 56 */
vladvana 0:23d1f73bf130 57
vladvana 0:23d1f73bf130 58 /** @addtogroup NOR_Private_Constants
vladvana 0:23d1f73bf130 59 * @{
vladvana 0:23d1f73bf130 60 */
vladvana 0:23d1f73bf130 61
vladvana 0:23d1f73bf130 62 /* NOR device IDs addresses */
vladvana 0:23d1f73bf130 63 #define MC_ADDRESS ((uint16_t)0x0000)
vladvana 0:23d1f73bf130 64 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
vladvana 0:23d1f73bf130 65 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
vladvana 0:23d1f73bf130 66 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
vladvana 0:23d1f73bf130 67
vladvana 0:23d1f73bf130 68 /* NOR CFI IDs addresses */
vladvana 0:23d1f73bf130 69 #define CFI1_ADDRESS ((uint16_t)0x10)
vladvana 0:23d1f73bf130 70 #define CFI2_ADDRESS ((uint16_t)0x11)
vladvana 0:23d1f73bf130 71 #define CFI3_ADDRESS ((uint16_t)0x12)
vladvana 0:23d1f73bf130 72 #define CFI4_ADDRESS ((uint16_t)0x13)
vladvana 0:23d1f73bf130 73
vladvana 0:23d1f73bf130 74 /* NOR operation wait timeout */
vladvana 0:23d1f73bf130 75 #define NOR_TMEOUT ((uint16_t)0xFFFF)
vladvana 0:23d1f73bf130 76
vladvana 0:23d1f73bf130 77 /* NOR memory data width */
vladvana 0:23d1f73bf130 78 #define NOR_MEMORY_8B ((uint8_t)0x0)
vladvana 0:23d1f73bf130 79 #define NOR_MEMORY_16B ((uint8_t)0x1)
vladvana 0:23d1f73bf130 80
vladvana 0:23d1f73bf130 81 /* NOR memory device read/write start address */
vladvana 0:23d1f73bf130 82 #define NOR_MEMORY_ADRESS1 FSMC_BANK1_1
vladvana 0:23d1f73bf130 83 #define NOR_MEMORY_ADRESS2 FSMC_BANK1_2
vladvana 0:23d1f73bf130 84 #define NOR_MEMORY_ADRESS3 FSMC_BANK1_3
vladvana 0:23d1f73bf130 85 #define NOR_MEMORY_ADRESS4 FSMC_BANK1_4
vladvana 0:23d1f73bf130 86
vladvana 0:23d1f73bf130 87 /**
vladvana 0:23d1f73bf130 88 * @}
vladvana 0:23d1f73bf130 89 */
vladvana 0:23d1f73bf130 90
vladvana 0:23d1f73bf130 91 /** @addtogroup NOR_Private_Macros
vladvana 0:23d1f73bf130 92 * @{
vladvana 0:23d1f73bf130 93 */
vladvana 0:23d1f73bf130 94
vladvana 0:23d1f73bf130 95 /**
vladvana 0:23d1f73bf130 96 * @brief NOR memory address shifting.
vladvana 0:23d1f73bf130 97 * @param __NOR_ADDRESS: NOR base address
vladvana 0:23d1f73bf130 98 * @param __NOR_MEMORY_WIDTH_: NOR memory width
vladvana 0:23d1f73bf130 99 * @param __ADDRESS__: NOR memory address
vladvana 0:23d1f73bf130 100 * @retval NOR shifted address value
vladvana 0:23d1f73bf130 101 */
vladvana 0:23d1f73bf130 102 #define __NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
vladvana 0:23d1f73bf130 103 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
vladvana 0:23d1f73bf130 104 ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \
vladvana 0:23d1f73bf130 105 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
vladvana 0:23d1f73bf130 106
vladvana 0:23d1f73bf130 107 /**
vladvana 0:23d1f73bf130 108 * @brief NOR memory write data to specified address.
vladvana 0:23d1f73bf130 109 * @param __ADDRESS__: NOR memory address
vladvana 0:23d1f73bf130 110 * @param __DATA__: Data to write
vladvana 0:23d1f73bf130 111 * @retval None
vladvana 0:23d1f73bf130 112 */
vladvana 0:23d1f73bf130 113 #define __NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
vladvana 0:23d1f73bf130 114
vladvana 0:23d1f73bf130 115 /**
vladvana 0:23d1f73bf130 116 * @}
vladvana 0:23d1f73bf130 117 */
vladvana 0:23d1f73bf130 118
vladvana 0:23d1f73bf130 119 /* Exported typedef ----------------------------------------------------------*/
vladvana 0:23d1f73bf130 120 /** @defgroup NOR_Exported_Types NOR Exported Types
vladvana 0:23d1f73bf130 121 * @{
vladvana 0:23d1f73bf130 122 */
vladvana 0:23d1f73bf130 123
vladvana 0:23d1f73bf130 124 /**
vladvana 0:23d1f73bf130 125 * @brief HAL SRAM State structures definition
vladvana 0:23d1f73bf130 126 */
vladvana 0:23d1f73bf130 127 typedef enum
vladvana 0:23d1f73bf130 128 {
vladvana 0:23d1f73bf130 129 HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */
vladvana 0:23d1f73bf130 130 HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */
vladvana 0:23d1f73bf130 131 HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */
vladvana 0:23d1f73bf130 132 HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */
vladvana 0:23d1f73bf130 133 HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
vladvana 0:23d1f73bf130 134 }HAL_NOR_StateTypeDef;
vladvana 0:23d1f73bf130 135
vladvana 0:23d1f73bf130 136 /**
vladvana 0:23d1f73bf130 137 * @brief FSMC NOR Status typedef
vladvana 0:23d1f73bf130 138 */
vladvana 0:23d1f73bf130 139 typedef enum
vladvana 0:23d1f73bf130 140 {
vladvana 0:23d1f73bf130 141 HAL_NOR_STATUS_SUCCESS = 0,
vladvana 0:23d1f73bf130 142 HAL_NOR_STATUS_ONGOING,
vladvana 0:23d1f73bf130 143 HAL_NOR_STATUS_ERROR,
vladvana 0:23d1f73bf130 144 HAL_NOR_STATUS_TIMEOUT
vladvana 0:23d1f73bf130 145 }HAL_NOR_StatusTypeDef;
vladvana 0:23d1f73bf130 146
vladvana 0:23d1f73bf130 147 /**
vladvana 0:23d1f73bf130 148 * @brief FSMC NOR ID typedef
vladvana 0:23d1f73bf130 149 */
vladvana 0:23d1f73bf130 150 typedef struct
vladvana 0:23d1f73bf130 151 {
vladvana 0:23d1f73bf130 152 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
vladvana 0:23d1f73bf130 153
vladvana 0:23d1f73bf130 154 uint16_t Device_Code1;
vladvana 0:23d1f73bf130 155
vladvana 0:23d1f73bf130 156 uint16_t Device_Code2;
vladvana 0:23d1f73bf130 157
vladvana 0:23d1f73bf130 158 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
vladvana 0:23d1f73bf130 159 These codes can be accessed by performing read operations with specific
vladvana 0:23d1f73bf130 160 control signals and addresses set.They can also be accessed by issuing
vladvana 0:23d1f73bf130 161 an Auto Select command */
vladvana 0:23d1f73bf130 162 }NOR_IDTypeDef;
vladvana 0:23d1f73bf130 163
vladvana 0:23d1f73bf130 164 /**
vladvana 0:23d1f73bf130 165 * @brief FSMC NOR CFI typedef
vladvana 0:23d1f73bf130 166 */
vladvana 0:23d1f73bf130 167 typedef struct
vladvana 0:23d1f73bf130 168 {
vladvana 0:23d1f73bf130 169 /*!< Defines the information stored in the memory's Common flash interface
vladvana 0:23d1f73bf130 170 which contains a description of various electrical and timing parameters,
vladvana 0:23d1f73bf130 171 density information and functions supported by the memory */
vladvana 0:23d1f73bf130 172
vladvana 0:23d1f73bf130 173 uint16_t CFI_1;
vladvana 0:23d1f73bf130 174
vladvana 0:23d1f73bf130 175 uint16_t CFI_2;
vladvana 0:23d1f73bf130 176
vladvana 0:23d1f73bf130 177 uint16_t CFI_3;
vladvana 0:23d1f73bf130 178
vladvana 0:23d1f73bf130 179 uint16_t CFI_4;
vladvana 0:23d1f73bf130 180 }NOR_CFITypeDef;
vladvana 0:23d1f73bf130 181
vladvana 0:23d1f73bf130 182 /**
vladvana 0:23d1f73bf130 183 * @brief NOR handle Structure definition
vladvana 0:23d1f73bf130 184 */
vladvana 0:23d1f73bf130 185 typedef struct
vladvana 0:23d1f73bf130 186 {
vladvana 0:23d1f73bf130 187 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
vladvana 0:23d1f73bf130 188
vladvana 0:23d1f73bf130 189 FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
vladvana 0:23d1f73bf130 190
vladvana 0:23d1f73bf130 191 FSMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
vladvana 0:23d1f73bf130 192
vladvana 0:23d1f73bf130 193 HAL_LockTypeDef Lock; /*!< NOR locking object */
vladvana 0:23d1f73bf130 194
vladvana 0:23d1f73bf130 195 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
vladvana 0:23d1f73bf130 196
vladvana 0:23d1f73bf130 197 }NOR_HandleTypeDef;
vladvana 0:23d1f73bf130 198
vladvana 0:23d1f73bf130 199 /**
vladvana 0:23d1f73bf130 200 * @}
vladvana 0:23d1f73bf130 201 */
vladvana 0:23d1f73bf130 202
vladvana 0:23d1f73bf130 203 /* Exported constants --------------------------------------------------------*/
vladvana 0:23d1f73bf130 204 /* Exported macro ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 205
vladvana 0:23d1f73bf130 206 /** @defgroup NOR_Exported_macro NOR Exported Macros
vladvana 0:23d1f73bf130 207 * @{
vladvana 0:23d1f73bf130 208 */
vladvana 0:23d1f73bf130 209
vladvana 0:23d1f73bf130 210 /** @brief Reset NOR handle state
vladvana 0:23d1f73bf130 211 * @param __HANDLE__: NOR handle
vladvana 0:23d1f73bf130 212 * @retval None
vladvana 0:23d1f73bf130 213 */
vladvana 0:23d1f73bf130 214 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
vladvana 0:23d1f73bf130 215
vladvana 0:23d1f73bf130 216 /**
vladvana 0:23d1f73bf130 217 * @}
vladvana 0:23d1f73bf130 218 */
vladvana 0:23d1f73bf130 219
vladvana 0:23d1f73bf130 220 /* Exported functions --------------------------------------------------------*/
vladvana 0:23d1f73bf130 221 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
vladvana 0:23d1f73bf130 222 * @{
vladvana 0:23d1f73bf130 223 */
vladvana 0:23d1f73bf130 224
vladvana 0:23d1f73bf130 225 /** @addtogroup NOR_Exported_Functions_Group1
vladvana 0:23d1f73bf130 226 * @{
vladvana 0:23d1f73bf130 227 */
vladvana 0:23d1f73bf130 228
vladvana 0:23d1f73bf130 229 /* Initialization/de-initialization functions **********************************/
vladvana 0:23d1f73bf130 230 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
vladvana 0:23d1f73bf130 231 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
vladvana 0:23d1f73bf130 232 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
vladvana 0:23d1f73bf130 233 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
vladvana 0:23d1f73bf130 234 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
vladvana 0:23d1f73bf130 235
vladvana 0:23d1f73bf130 236 /**
vladvana 0:23d1f73bf130 237 * @}
vladvana 0:23d1f73bf130 238 */
vladvana 0:23d1f73bf130 239
vladvana 0:23d1f73bf130 240 /** @addtogroup NOR_Exported_Functions_Group2
vladvana 0:23d1f73bf130 241 * @{
vladvana 0:23d1f73bf130 242 */
vladvana 0:23d1f73bf130 243
vladvana 0:23d1f73bf130 244 /* I/O operation functions ***************************************************/
vladvana 0:23d1f73bf130 245 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
vladvana 0:23d1f73bf130 246 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
vladvana 0:23d1f73bf130 247 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
vladvana 0:23d1f73bf130 248 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
vladvana 0:23d1f73bf130 249
vladvana 0:23d1f73bf130 250 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
vladvana 0:23d1f73bf130 251 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
vladvana 0:23d1f73bf130 252
vladvana 0:23d1f73bf130 253 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
vladvana 0:23d1f73bf130 254 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
vladvana 0:23d1f73bf130 255 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
vladvana 0:23d1f73bf130 256
vladvana 0:23d1f73bf130 257 /**
vladvana 0:23d1f73bf130 258 * @}
vladvana 0:23d1f73bf130 259 */
vladvana 0:23d1f73bf130 260
vladvana 0:23d1f73bf130 261 /** @addtogroup NOR_Exported_Functions_Group3
vladvana 0:23d1f73bf130 262 * @{
vladvana 0:23d1f73bf130 263 */
vladvana 0:23d1f73bf130 264
vladvana 0:23d1f73bf130 265 /* NOR Control functions *****************************************************/
vladvana 0:23d1f73bf130 266 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
vladvana 0:23d1f73bf130 267 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
vladvana 0:23d1f73bf130 268
vladvana 0:23d1f73bf130 269 /**
vladvana 0:23d1f73bf130 270 * @}
vladvana 0:23d1f73bf130 271 */
vladvana 0:23d1f73bf130 272
vladvana 0:23d1f73bf130 273 /** @addtogroup NOR_Exported_Functions_Group4
vladvana 0:23d1f73bf130 274 * @{
vladvana 0:23d1f73bf130 275 */
vladvana 0:23d1f73bf130 276
vladvana 0:23d1f73bf130 277 /* NOR State functions ********************************************************/
vladvana 0:23d1f73bf130 278 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
vladvana 0:23d1f73bf130 279 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
vladvana 0:23d1f73bf130 280
vladvana 0:23d1f73bf130 281 /**
vladvana 0:23d1f73bf130 282 * @}
vladvana 0:23d1f73bf130 283 */
vladvana 0:23d1f73bf130 284
vladvana 0:23d1f73bf130 285 /**
vladvana 0:23d1f73bf130 286 * @}
vladvana 0:23d1f73bf130 287 */
vladvana 0:23d1f73bf130 288
vladvana 0:23d1f73bf130 289
vladvana 0:23d1f73bf130 290 /**
vladvana 0:23d1f73bf130 291 * @}
vladvana 0:23d1f73bf130 292 */
vladvana 0:23d1f73bf130 293
vladvana 0:23d1f73bf130 294 #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */
vladvana 0:23d1f73bf130 295
vladvana 0:23d1f73bf130 296 /**
vladvana 0:23d1f73bf130 297 * @}
vladvana 0:23d1f73bf130 298 */
vladvana 0:23d1f73bf130 299
vladvana 0:23d1f73bf130 300 #ifdef __cplusplus
vladvana 0:23d1f73bf130 301 }
vladvana 0:23d1f73bf130 302 #endif
vladvana 0:23d1f73bf130 303
vladvana 0:23d1f73bf130 304 #endif /* __STM32F1xx_HAL_NOR_H */
vladvana 0:23d1f73bf130 305
vladvana 0:23d1f73bf130 306 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/