Vladimir Vana / mbed

pro vyuku PSS v Jecne

TARGET_NUCLEO_F103RB/stm32f1xx_hal_nand.h@0:23d1f73bf130, 2017-09-24 (annotated)

Committer:
vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
Revision:
0:23d1f73bf130
podklady pro cviceni z PSS

Who changed what in which revision?

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vladvana 0:23d1f73bf130 1 /**
vladvana 0:23d1f73bf130 2 ******************************************************************************
vladvana 0:23d1f73bf130 3 * @file stm32f1xx_hal_nand.h
vladvana 0:23d1f73bf130 4 * @author MCD Application Team
vladvana 0:23d1f73bf130 5 * @version V1.0.0
vladvana 0:23d1f73bf130 6 * @date 15-December-2014
vladvana 0:23d1f73bf130 7 * @brief Header file of NAND HAL module.
vladvana 0:23d1f73bf130 8 ******************************************************************************
vladvana 0:23d1f73bf130 9 * @attention
vladvana 0:23d1f73bf130 10 *
vladvana 0:23d1f73bf130 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
vladvana 0:23d1f73bf130 12 *
vladvana 0:23d1f73bf130 13 * Redistribution and use in source and binary forms, with or without modification,
vladvana 0:23d1f73bf130 14 * are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 * 1. Redistributions of source code must retain the above copyright notice,
vladvana 0:23d1f73bf130 16 * this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
vladvana 0:23d1f73bf130 18 * this list of conditions and the following disclaimer in the documentation
vladvana 0:23d1f73bf130 19 * and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vladvana 0:23d1f73bf130 21 * may be used to endorse or promote products derived from this software
vladvana 0:23d1f73bf130 22 * without specific prior written permission.
vladvana 0:23d1f73bf130 23 *
vladvana 0:23d1f73bf130 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vladvana 0:23d1f73bf130 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vladvana 0:23d1f73bf130 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vladvana 0:23d1f73bf130 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vladvana 0:23d1f73bf130 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vladvana 0:23d1f73bf130 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vladvana 0:23d1f73bf130 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vladvana 0:23d1f73bf130 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 34 *
vladvana 0:23d1f73bf130 35 ******************************************************************************
vladvana 0:23d1f73bf130 36 */
vladvana 0:23d1f73bf130 37
vladvana 0:23d1f73bf130 38 /* Define to prevent recursive inclusion -------------------------------------*/
vladvana 0:23d1f73bf130 39 #ifndef __STM32F1xx_HAL_NAND_H
vladvana 0:23d1f73bf130 40 #define __STM32F1xx_HAL_NAND_H
vladvana 0:23d1f73bf130 41
vladvana 0:23d1f73bf130 42 #ifdef __cplusplus
vladvana 0:23d1f73bf130 43 extern "C" {
vladvana 0:23d1f73bf130 44 #endif
vladvana 0:23d1f73bf130 45
vladvana 0:23d1f73bf130 46 /* Includes ------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 47 #include "stm32f1xx_ll_fsmc.h"
vladvana 0:23d1f73bf130 48
vladvana 0:23d1f73bf130 49 /** @addtogroup STM32F1xx_HAL_Driver
vladvana 0:23d1f73bf130 50 * @{
vladvana 0:23d1f73bf130 51 */
vladvana 0:23d1f73bf130 52
vladvana 0:23d1f73bf130 53 #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG)
vladvana 0:23d1f73bf130 54 /** @addtogroup NAND
vladvana 0:23d1f73bf130 55 * @{
vladvana 0:23d1f73bf130 56 */
vladvana 0:23d1f73bf130 57
vladvana 0:23d1f73bf130 58 /** @addtogroup NAND_Private_Constants
vladvana 0:23d1f73bf130 59 * @{
vladvana 0:23d1f73bf130 60 */
vladvana 0:23d1f73bf130 61
vladvana 0:23d1f73bf130 62 #define NAND_DEVICE1 FSMC_BANK2
vladvana 0:23d1f73bf130 63 #define NAND_DEVICE2 FSMC_BANK3
vladvana 0:23d1f73bf130 64 #define NAND_WRITE_TIMEOUT ((uint32_t)1000)
vladvana 0:23d1f73bf130 65
vladvana 0:23d1f73bf130 66 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
vladvana 0:23d1f73bf130 67 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
vladvana 0:23d1f73bf130 68
vladvana 0:23d1f73bf130 69 #define NAND_CMD_AREA_A ((uint8_t)0x00)
vladvana 0:23d1f73bf130 70 #define NAND_CMD_AREA_B ((uint8_t)0x01)
vladvana 0:23d1f73bf130 71 #define NAND_CMD_AREA_C ((uint8_t)0x50)
vladvana 0:23d1f73bf130 72 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
vladvana 0:23d1f73bf130 73
vladvana 0:23d1f73bf130 74 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
vladvana 0:23d1f73bf130 75 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
vladvana 0:23d1f73bf130 76 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
vladvana 0:23d1f73bf130 77 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
vladvana 0:23d1f73bf130 78 #define NAND_CMD_READID ((uint8_t)0x90)
vladvana 0:23d1f73bf130 79 #define NAND_CMD_STATUS ((uint8_t)0x70)
vladvana 0:23d1f73bf130 80 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
vladvana 0:23d1f73bf130 81 #define NAND_CMD_RESET ((uint8_t)0xFF)
vladvana 0:23d1f73bf130 82
vladvana 0:23d1f73bf130 83 /* NAND memory status */
vladvana 0:23d1f73bf130 84 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100)
vladvana 0:23d1f73bf130 85 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
vladvana 0:23d1f73bf130 86 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400)
vladvana 0:23d1f73bf130 87 #define NAND_BUSY ((uint32_t)0x00000000)
vladvana 0:23d1f73bf130 88 #define NAND_ERROR ((uint32_t)0x00000001)
vladvana 0:23d1f73bf130 89 #define NAND_READY ((uint32_t)0x00000040)
vladvana 0:23d1f73bf130 90
vladvana 0:23d1f73bf130 91 /**
vladvana 0:23d1f73bf130 92 * @}
vladvana 0:23d1f73bf130 93 */
vladvana 0:23d1f73bf130 94
vladvana 0:23d1f73bf130 95 /** @addtogroup NAND_Private_Macros
vladvana 0:23d1f73bf130 96 * @{
vladvana 0:23d1f73bf130 97 */
vladvana 0:23d1f73bf130 98
vladvana 0:23d1f73bf130 99 /**
vladvana 0:23d1f73bf130 100 * @brief NAND memory address computation.
vladvana 0:23d1f73bf130 101 * @param __ADDRESS__: NAND memory address.
vladvana 0:23d1f73bf130 102 * @param __HANDLE__ : NAND handle.
vladvana 0:23d1f73bf130 103 * @retval NAND Raw address value
vladvana 0:23d1f73bf130 104 */
vladvana 0:23d1f73bf130 105 #define __ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) (((__ADDRESS__)->Page) + \
vladvana 0:23d1f73bf130 106 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize * ((__HANDLE__)->Info.PageSize + (__HANDLE__)->Info.SpareAreaSize))))
vladvana 0:23d1f73bf130 107
vladvana 0:23d1f73bf130 108 /**
vladvana 0:23d1f73bf130 109 * @brief NAND memory address cycling.
vladvana 0:23d1f73bf130 110 * @param __ADDRESS__: NAND memory address.
vladvana 0:23d1f73bf130 111 * @retval NAND address cycling value.
vladvana 0:23d1f73bf130 112 */
vladvana 0:23d1f73bf130 113 #define __ADDR_1st_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
vladvana 0:23d1f73bf130 114 #define __ADDR_2nd_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
vladvana 0:23d1f73bf130 115 #define __ADDR_3rd_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
vladvana 0:23d1f73bf130 116 #define __ADDR_4th_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
vladvana 0:23d1f73bf130 117
vladvana 0:23d1f73bf130 118 /**
vladvana 0:23d1f73bf130 119 * @}
vladvana 0:23d1f73bf130 120 */
vladvana 0:23d1f73bf130 121
vladvana 0:23d1f73bf130 122 /* Exported typedef ----------------------------------------------------------*/
vladvana 0:23d1f73bf130 123 /* Exported types ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 124 /** @defgroup NAND_Exported_Types NAND Exported Types
vladvana 0:23d1f73bf130 125 * @{
vladvana 0:23d1f73bf130 126 */
vladvana 0:23d1f73bf130 127
vladvana 0:23d1f73bf130 128 /**
vladvana 0:23d1f73bf130 129 * @brief HAL NAND State structures definition
vladvana 0:23d1f73bf130 130 */
vladvana 0:23d1f73bf130 131 typedef enum
vladvana 0:23d1f73bf130 132 {
vladvana 0:23d1f73bf130 133 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */
vladvana 0:23d1f73bf130 134 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
vladvana 0:23d1f73bf130 135 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */
vladvana 0:23d1f73bf130 136 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
vladvana 0:23d1f73bf130 137 }HAL_NAND_StateTypeDef;
vladvana 0:23d1f73bf130 138
vladvana 0:23d1f73bf130 139 /**
vladvana 0:23d1f73bf130 140 * @brief NAND Memory electronic signature Structure definition
vladvana 0:23d1f73bf130 141 */
vladvana 0:23d1f73bf130 142 typedef struct
vladvana 0:23d1f73bf130 143 {
vladvana 0:23d1f73bf130 144 /*<! NAND memory electronic signature maker and device IDs */
vladvana 0:23d1f73bf130 145
vladvana 0:23d1f73bf130 146 uint8_t Maker_Id;
vladvana 0:23d1f73bf130 147
vladvana 0:23d1f73bf130 148 uint8_t Device_Id;
vladvana 0:23d1f73bf130 149
vladvana 0:23d1f73bf130 150 uint8_t Third_Id;
vladvana 0:23d1f73bf130 151
vladvana 0:23d1f73bf130 152 uint8_t Fourth_Id;
vladvana 0:23d1f73bf130 153 }NAND_IDTypeDef;
vladvana 0:23d1f73bf130 154
vladvana 0:23d1f73bf130 155 /**
vladvana 0:23d1f73bf130 156 * @brief NAND Memory address Structure definition
vladvana 0:23d1f73bf130 157 */
vladvana 0:23d1f73bf130 158 typedef struct
vladvana 0:23d1f73bf130 159 {
vladvana 0:23d1f73bf130 160 uint16_t Page; /*!< NAND memory Page address */
vladvana 0:23d1f73bf130 161
vladvana 0:23d1f73bf130 162 uint16_t Zone; /*!< NAND memory Zone address */
vladvana 0:23d1f73bf130 163
vladvana 0:23d1f73bf130 164 uint16_t Block; /*!< NAND memory Block address */
vladvana 0:23d1f73bf130 165
vladvana 0:23d1f73bf130 166 }NAND_AddressTypeDef;
vladvana 0:23d1f73bf130 167
vladvana 0:23d1f73bf130 168 /**
vladvana 0:23d1f73bf130 169 * @brief NAND Memory info Structure definition
vladvana 0:23d1f73bf130 170 */
vladvana 0:23d1f73bf130 171 typedef struct
vladvana 0:23d1f73bf130 172 {
vladvana 0:23d1f73bf130 173 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
vladvana 0:23d1f73bf130 174
vladvana 0:23d1f73bf130 175 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
vladvana 0:23d1f73bf130 176
vladvana 0:23d1f73bf130 177 uint32_t BlockSize; /*!< NAND memory block size number of pages */
vladvana 0:23d1f73bf130 178
vladvana 0:23d1f73bf130 179 uint32_t BlockNbr; /*!< NAND memory number of blocks */
vladvana 0:23d1f73bf130 180
vladvana 0:23d1f73bf130 181 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
vladvana 0:23d1f73bf130 182 }NAND_InfoTypeDef;
vladvana 0:23d1f73bf130 183
vladvana 0:23d1f73bf130 184 /**
vladvana 0:23d1f73bf130 185 * @brief NAND handle Structure definition
vladvana 0:23d1f73bf130 186 */
vladvana 0:23d1f73bf130 187 typedef struct
vladvana 0:23d1f73bf130 188 {
vladvana 0:23d1f73bf130 189 FSMC_NAND_TypeDef *Instance; /*!< Register base address */
vladvana 0:23d1f73bf130 190
vladvana 0:23d1f73bf130 191 FSMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
vladvana 0:23d1f73bf130 192
vladvana 0:23d1f73bf130 193 HAL_LockTypeDef Lock; /*!< NAND locking object */
vladvana 0:23d1f73bf130 194
vladvana 0:23d1f73bf130 195 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
vladvana 0:23d1f73bf130 196
vladvana 0:23d1f73bf130 197 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
vladvana 0:23d1f73bf130 198 }NAND_HandleTypeDef;
vladvana 0:23d1f73bf130 199
vladvana 0:23d1f73bf130 200 /**
vladvana 0:23d1f73bf130 201 * @}
vladvana 0:23d1f73bf130 202 */
vladvana 0:23d1f73bf130 203
vladvana 0:23d1f73bf130 204 /* Exported constants --------------------------------------------------------*/
vladvana 0:23d1f73bf130 205 /* Exported macro ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 206 /** @defgroup NAND_Exported_Macros NAND Exported Macros
vladvana 0:23d1f73bf130 207 * @{
vladvana 0:23d1f73bf130 208 */
vladvana 0:23d1f73bf130 209
vladvana 0:23d1f73bf130 210 /** @brief Reset NAND handle state
vladvana 0:23d1f73bf130 211 * @param __HANDLE__: specifies the NAND handle.
vladvana 0:23d1f73bf130 212 * @retval None
vladvana 0:23d1f73bf130 213 */
vladvana 0:23d1f73bf130 214 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
vladvana 0:23d1f73bf130 215
vladvana 0:23d1f73bf130 216 /**
vladvana 0:23d1f73bf130 217 * @}
vladvana 0:23d1f73bf130 218 */
vladvana 0:23d1f73bf130 219
vladvana 0:23d1f73bf130 220 /* Exported functions --------------------------------------------------------*/
vladvana 0:23d1f73bf130 221 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
vladvana 0:23d1f73bf130 222 * @{
vladvana 0:23d1f73bf130 223 */
vladvana 0:23d1f73bf130 224
vladvana 0:23d1f73bf130 225 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
vladvana 0:23d1f73bf130 226 * @{
vladvana 0:23d1f73bf130 227 */
vladvana 0:23d1f73bf130 228
vladvana 0:23d1f73bf130 229 /* Initialization/de-initialization functions ********************************/
vladvana 0:23d1f73bf130 230 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FSMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FSMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
vladvana 0:23d1f73bf130 231 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 232 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 233 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 234 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 235 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 236
vladvana 0:23d1f73bf130 237 /**
vladvana 0:23d1f73bf130 238 * @}
vladvana 0:23d1f73bf130 239 */
vladvana 0:23d1f73bf130 240
vladvana 0:23d1f73bf130 241 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
vladvana 0:23d1f73bf130 242 * @{
vladvana 0:23d1f73bf130 243 */
vladvana 0:23d1f73bf130 244
vladvana 0:23d1f73bf130 245 /* IO operation functions ****************************************************/
vladvana 0:23d1f73bf130 246 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
vladvana 0:23d1f73bf130 247 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 248 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
vladvana 0:23d1f73bf130 249 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
vladvana 0:23d1f73bf130 250 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
vladvana 0:23d1f73bf130 251 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
vladvana 0:23d1f73bf130 252 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
vladvana 0:23d1f73bf130 253 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 254 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
vladvana 0:23d1f73bf130 255
vladvana 0:23d1f73bf130 256 /**
vladvana 0:23d1f73bf130 257 * @}
vladvana 0:23d1f73bf130 258 */
vladvana 0:23d1f73bf130 259
vladvana 0:23d1f73bf130 260 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
vladvana 0:23d1f73bf130 261 * @{
vladvana 0:23d1f73bf130 262 */
vladvana 0:23d1f73bf130 263
vladvana 0:23d1f73bf130 264 /* NAND Control functions ****************************************************/
vladvana 0:23d1f73bf130 265 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 266 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 267 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
vladvana 0:23d1f73bf130 268
vladvana 0:23d1f73bf130 269 /**
vladvana 0:23d1f73bf130 270 * @}
vladvana 0:23d1f73bf130 271 */
vladvana 0:23d1f73bf130 272
vladvana 0:23d1f73bf130 273 /** @defgroup NAND_Exported_Functions_Group4 Peripheral State functions
vladvana 0:23d1f73bf130 274 * @{
vladvana 0:23d1f73bf130 275 */
vladvana 0:23d1f73bf130 276
vladvana 0:23d1f73bf130 277 /* NAND State functions *******************************************************/
vladvana 0:23d1f73bf130 278 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 279 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
vladvana 0:23d1f73bf130 280
vladvana 0:23d1f73bf130 281 /**
vladvana 0:23d1f73bf130 282 * @}
vladvana 0:23d1f73bf130 283 */
vladvana 0:23d1f73bf130 284
vladvana 0:23d1f73bf130 285 /**
vladvana 0:23d1f73bf130 286 * @}
vladvana 0:23d1f73bf130 287 */
vladvana 0:23d1f73bf130 288
vladvana 0:23d1f73bf130 289 /**
vladvana 0:23d1f73bf130 290 * @}
vladvana 0:23d1f73bf130 291 */
vladvana 0:23d1f73bf130 292 #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG */
vladvana 0:23d1f73bf130 293
vladvana 0:23d1f73bf130 294 /**
vladvana 0:23d1f73bf130 295 * @}
vladvana 0:23d1f73bf130 296 */
vladvana 0:23d1f73bf130 297
vladvana 0:23d1f73bf130 298 #ifdef __cplusplus
vladvana 0:23d1f73bf130 299 }
vladvana 0:23d1f73bf130 300 #endif
vladvana 0:23d1f73bf130 301
vladvana 0:23d1f73bf130 302 #endif /* __STM32F1xx_HAL_NAND_H */
vladvana 0:23d1f73bf130 303
vladvana 0:23d1f73bf130 304 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/