Vladimir Vana
pro vyuku PSS v Jecne
TARGET_NUCLEO_F103RB/stm32f1xx_hal_flash_ex.h@0:23d1f73bf130, 2017-09-24 (annotated)
- Committer:
- vladvana
- Date:
- Sun Sep 24 12:31:52 2017 +0000
- Revision:
- 0:23d1f73bf130
podklady pro cviceni z PSS
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| vladvana | 0:23d1f73bf130 | 1 | /** |
| vladvana | 0:23d1f73bf130 | 2 | ****************************************************************************** |
| vladvana | 0:23d1f73bf130 | 3 | * @file stm32f1xx_hal_flash_ex.h |
| vladvana | 0:23d1f73bf130 | 4 | * @author MCD Application Team |
| vladvana | 0:23d1f73bf130 | 5 | * @version V1.0.0 |
| vladvana | 0:23d1f73bf130 | 6 | * @date 15-December-2014 |
| vladvana | 0:23d1f73bf130 | 7 | * @brief Header file of Flash HAL Extended module. |
| vladvana | 0:23d1f73bf130 | 8 | ****************************************************************************** |
| vladvana | 0:23d1f73bf130 | 9 | * @attention |
| vladvana | 0:23d1f73bf130 | 10 | * |
| vladvana | 0:23d1f73bf130 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| vladvana | 0:23d1f73bf130 | 12 | * |
| vladvana | 0:23d1f73bf130 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| vladvana | 0:23d1f73bf130 | 14 | * are permitted provided that the following conditions are met: |
| vladvana | 0:23d1f73bf130 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| vladvana | 0:23d1f73bf130 | 16 | * this list of conditions and the following disclaimer. |
| vladvana | 0:23d1f73bf130 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| vladvana | 0:23d1f73bf130 | 18 | * this list of conditions and the following disclaimer in the documentation |
| vladvana | 0:23d1f73bf130 | 19 | * and/or other materials provided with the distribution. |
| vladvana | 0:23d1f73bf130 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| vladvana | 0:23d1f73bf130 | 21 | * may be used to endorse or promote products derived from this software |
| vladvana | 0:23d1f73bf130 | 22 | * without specific prior written permission. |
| vladvana | 0:23d1f73bf130 | 23 | * |
| vladvana | 0:23d1f73bf130 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| vladvana | 0:23d1f73bf130 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| vladvana | 0:23d1f73bf130 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| vladvana | 0:23d1f73bf130 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| vladvana | 0:23d1f73bf130 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| vladvana | 0:23d1f73bf130 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| vladvana | 0:23d1f73bf130 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| vladvana | 0:23d1f73bf130 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| vladvana | 0:23d1f73bf130 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| vladvana | 0:23d1f73bf130 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| vladvana | 0:23d1f73bf130 | 34 | * |
| vladvana | 0:23d1f73bf130 | 35 | ****************************************************************************** |
| vladvana | 0:23d1f73bf130 | 36 | */ |
| vladvana | 0:23d1f73bf130 | 37 | |
| vladvana | 0:23d1f73bf130 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| vladvana | 0:23d1f73bf130 | 39 | #ifndef __STM32F1xx_HAL_FLASH_EX_H |
| vladvana | 0:23d1f73bf130 | 40 | #define __STM32F1xx_HAL_FLASH_EX_H |
| vladvana | 0:23d1f73bf130 | 41 | |
| vladvana | 0:23d1f73bf130 | 42 | #ifdef __cplusplus |
| vladvana | 0:23d1f73bf130 | 43 | extern "C" { |
| vladvana | 0:23d1f73bf130 | 44 | #endif |
| vladvana | 0:23d1f73bf130 | 45 | |
| vladvana | 0:23d1f73bf130 | 46 | /* Includes ------------------------------------------------------------------*/ |
| vladvana | 0:23d1f73bf130 | 47 | #include "stm32f1xx_hal_def.h" |
| vladvana | 0:23d1f73bf130 | 48 | |
| vladvana | 0:23d1f73bf130 | 49 | /** @addtogroup STM32F1xx_HAL_Driver |
| vladvana | 0:23d1f73bf130 | 50 | * @{ |
| vladvana | 0:23d1f73bf130 | 51 | */ |
| vladvana | 0:23d1f73bf130 | 52 | |
| vladvana | 0:23d1f73bf130 | 53 | /** @addtogroup FLASHEx |
| vladvana | 0:23d1f73bf130 | 54 | * @{ |
| vladvana | 0:23d1f73bf130 | 55 | */ |
| vladvana | 0:23d1f73bf130 | 56 | |
| vladvana | 0:23d1f73bf130 | 57 | /** @addtogroup FLASHEx_Private_Constants |
| vladvana | 0:23d1f73bf130 | 58 | * @{ |
| vladvana | 0:23d1f73bf130 | 59 | */ |
| vladvana | 0:23d1f73bf130 | 60 | |
| vladvana | 0:23d1f73bf130 | 61 | #define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFFF7E0) |
| vladvana | 0:23d1f73bf130 | 62 | #define OBR_REG_INDEX ((uint32_t)1) |
| vladvana | 0:23d1f73bf130 | 63 | #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP)) |
| vladvana | 0:23d1f73bf130 | 64 | |
| vladvana | 0:23d1f73bf130 | 65 | /** |
| vladvana | 0:23d1f73bf130 | 66 | * @} |
| vladvana | 0:23d1f73bf130 | 67 | */ |
| vladvana | 0:23d1f73bf130 | 68 | |
| vladvana | 0:23d1f73bf130 | 69 | /** @addtogroup FLASHEx_Private_Macros |
| vladvana | 0:23d1f73bf130 | 70 | * @{ |
| vladvana | 0:23d1f73bf130 | 71 | */ |
| vladvana | 0:23d1f73bf130 | 72 | |
| vladvana | 0:23d1f73bf130 | 73 | #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
| vladvana | 0:23d1f73bf130 | 74 | |
| vladvana | 0:23d1f73bf130 | 75 | #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))) |
| vladvana | 0:23d1f73bf130 | 76 | |
| vladvana | 0:23d1f73bf130 | 77 | #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE)) |
| vladvana | 0:23d1f73bf130 | 78 | |
| vladvana | 0:23d1f73bf130 | 79 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1)) |
| vladvana | 0:23d1f73bf130 | 80 | |
| vladvana | 0:23d1f73bf130 | 81 | #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) |
| vladvana | 0:23d1f73bf130 | 82 | |
| vladvana | 0:23d1f73bf130 | 83 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
| vladvana | 0:23d1f73bf130 | 84 | |
| vladvana | 0:23d1f73bf130 | 85 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
| vladvana | 0:23d1f73bf130 | 86 | |
| vladvana | 0:23d1f73bf130 | 87 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
| vladvana | 0:23d1f73bf130 | 88 | |
| vladvana | 0:23d1f73bf130 | 89 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 90 | #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) |
| vladvana | 0:23d1f73bf130 | 91 | #endif /* STM32F101xG || STM32F103xG */ |
| vladvana | 0:23d1f73bf130 | 92 | |
| vladvana | 0:23d1f73bf130 | 93 | /* Low Density */ |
| vladvana | 0:23d1f73bf130 | 94 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) |
| vladvana | 0:23d1f73bf130 | 95 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \ |
| vladvana | 0:23d1f73bf130 | 96 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF)) |
| vladvana | 0:23d1f73bf130 | 97 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| vladvana | 0:23d1f73bf130 | 98 | |
| vladvana | 0:23d1f73bf130 | 99 | /* Medium Density */ |
| vladvana | 0:23d1f73bf130 | 100 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
| vladvana | 0:23d1f73bf130 | 101 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \ |
| vladvana | 0:23d1f73bf130 | 102 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF) : \ |
| vladvana | 0:23d1f73bf130 | 103 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \ |
| vladvana | 0:23d1f73bf130 | 104 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF)))) |
| vladvana | 0:23d1f73bf130 | 105 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
| vladvana | 0:23d1f73bf130 | 106 | |
| vladvana | 0:23d1f73bf130 | 107 | /* High Density */ |
| vladvana | 0:23d1f73bf130 | 108 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) |
| vladvana | 0:23d1f73bf130 | 109 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFF) : \ |
| vladvana | 0:23d1f73bf130 | 110 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFF) : \ |
| vladvana | 0:23d1f73bf130 | 111 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF))) |
| vladvana | 0:23d1f73bf130 | 112 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
| vladvana | 0:23d1f73bf130 | 113 | |
| vladvana | 0:23d1f73bf130 | 114 | /* XL Density */ |
| vladvana | 0:23d1f73bf130 | 115 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 116 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFF) : \ |
| vladvana | 0:23d1f73bf130 | 117 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFF)) |
| vladvana | 0:23d1f73bf130 | 118 | #endif /* STM32F101xG || STM32F103xG */ |
| vladvana | 0:23d1f73bf130 | 119 | |
| vladvana | 0:23d1f73bf130 | 120 | /* Connectivity Line */ |
| vladvana | 0:23d1f73bf130 | 121 | #if defined(STM32F105xC) || defined(STM32F107xC) |
| vladvana | 0:23d1f73bf130 | 122 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF) : \ |
| vladvana | 0:23d1f73bf130 | 123 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \ |
| vladvana | 0:23d1f73bf130 | 124 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF))) |
| vladvana | 0:23d1f73bf130 | 125 | #endif /* STM32F105xC || STM32F107xC */ |
| vladvana | 0:23d1f73bf130 | 126 | |
| vladvana | 0:23d1f73bf130 | 127 | #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000)) |
| vladvana | 0:23d1f73bf130 | 128 | |
| vladvana | 0:23d1f73bf130 | 129 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 130 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ |
| vladvana | 0:23d1f73bf130 | 131 | ((BANK) == FLASH_BANK_2) || \ |
| vladvana | 0:23d1f73bf130 | 132 | ((BANK) == FLASH_BANK_BOTH)) |
| vladvana | 0:23d1f73bf130 | 133 | #else |
| vladvana | 0:23d1f73bf130 | 134 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) |
| vladvana | 0:23d1f73bf130 | 135 | #endif /* STM32F101xG || STM32F103xG */ |
| vladvana | 0:23d1f73bf130 | 136 | |
| vladvana | 0:23d1f73bf130 | 137 | /* Low Density */ |
| vladvana | 0:23d1f73bf130 | 138 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) |
| vladvana | 0:23d1f73bf130 | 139 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \ |
| vladvana | 0:23d1f73bf130 | 140 | ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFF))) |
| vladvana | 0:23d1f73bf130 | 141 | |
| vladvana | 0:23d1f73bf130 | 142 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| vladvana | 0:23d1f73bf130 | 143 | |
| vladvana | 0:23d1f73bf130 | 144 | /* Medium Density */ |
| vladvana | 0:23d1f73bf130 | 145 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
| vladvana | 0:23d1f73bf130 | 146 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \ |
| vladvana | 0:23d1f73bf130 | 147 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? \ |
| vladvana | 0:23d1f73bf130 | 148 | ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \ |
| vladvana | 0:23d1f73bf130 | 149 | ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFF))))) |
| vladvana | 0:23d1f73bf130 | 150 | |
| vladvana | 0:23d1f73bf130 | 151 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
| vladvana | 0:23d1f73bf130 | 152 | |
| vladvana | 0:23d1f73bf130 | 153 | /* High Density */ |
| vladvana | 0:23d1f73bf130 | 154 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) |
| vladvana | 0:23d1f73bf130 | 155 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? \ |
| vladvana | 0:23d1f73bf130 | 156 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? \ |
| vladvana | 0:23d1f73bf130 | 157 | ((ADDRESS) <= 0x0805FFFF) : ((ADDRESS) <= 0x0803FFFF)))) |
| vladvana | 0:23d1f73bf130 | 158 | |
| vladvana | 0:23d1f73bf130 | 159 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
| vladvana | 0:23d1f73bf130 | 160 | |
| vladvana | 0:23d1f73bf130 | 161 | /* XL Density */ |
| vladvana | 0:23d1f73bf130 | 162 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 163 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? \ |
| vladvana | 0:23d1f73bf130 | 164 | ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFF))) |
| vladvana | 0:23d1f73bf130 | 165 | |
| vladvana | 0:23d1f73bf130 | 166 | #endif /* STM32F101xG || STM32F103xG */ |
| vladvana | 0:23d1f73bf130 | 167 | |
| vladvana | 0:23d1f73bf130 | 168 | /* Connectivity Line */ |
| vladvana | 0:23d1f73bf130 | 169 | #if defined(STM32F105xC) || defined(STM32F107xC) |
| vladvana | 0:23d1f73bf130 | 170 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? \ |
| vladvana | 0:23d1f73bf130 | 171 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \ |
| vladvana | 0:23d1f73bf130 | 172 | ((ADDRESS) <= 0x0801FFFF) : ((ADDRESS) <= 0x0800FFFF)))) |
| vladvana | 0:23d1f73bf130 | 173 | |
| vladvana | 0:23d1f73bf130 | 174 | #endif /* STM32F105xC || STM32F107xC */ |
| vladvana | 0:23d1f73bf130 | 175 | |
| vladvana | 0:23d1f73bf130 | 176 | #if defined(STM32F100xB) || defined(STM32F100xE) |
| vladvana | 0:23d1f73bf130 | 177 | #define IS_FLASH_LATENCY(__LATENCY__) ((__LATENCY__) == FLASH_LATENCY_0) |
| vladvana | 0:23d1f73bf130 | 178 | |
| vladvana | 0:23d1f73bf130 | 179 | #else |
| vladvana | 0:23d1f73bf130 | 180 | |
| vladvana | 0:23d1f73bf130 | 181 | #define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \ |
| vladvana | 0:23d1f73bf130 | 182 | ((__LATENCY__) == FLASH_LATENCY_1) || \ |
| vladvana | 0:23d1f73bf130 | 183 | ((__LATENCY__) == FLASH_LATENCY_2)) |
| vladvana | 0:23d1f73bf130 | 184 | #endif |
| vladvana | 0:23d1f73bf130 | 185 | /** |
| vladvana | 0:23d1f73bf130 | 186 | * @} |
| vladvana | 0:23d1f73bf130 | 187 | */ |
| vladvana | 0:23d1f73bf130 | 188 | |
| vladvana | 0:23d1f73bf130 | 189 | /* Exported types ------------------------------------------------------------*/ |
| vladvana | 0:23d1f73bf130 | 190 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
| vladvana | 0:23d1f73bf130 | 191 | * @{ |
| vladvana | 0:23d1f73bf130 | 192 | */ |
| vladvana | 0:23d1f73bf130 | 193 | |
| vladvana | 0:23d1f73bf130 | 194 | /** |
| vladvana | 0:23d1f73bf130 | 195 | * @brief FLASH Erase structure definition |
| vladvana | 0:23d1f73bf130 | 196 | */ |
| vladvana | 0:23d1f73bf130 | 197 | typedef struct |
| vladvana | 0:23d1f73bf130 | 198 | { |
| vladvana | 0:23d1f73bf130 | 199 | uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. |
| vladvana | 0:23d1f73bf130 | 200 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
| vladvana | 0:23d1f73bf130 | 201 | |
| vladvana | 0:23d1f73bf130 | 202 | uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. |
| vladvana | 0:23d1f73bf130 | 203 | This parameter must be a value of @ref FLASHEx_Banks */ |
| vladvana | 0:23d1f73bf130 | 204 | |
| vladvana | 0:23d1f73bf130 | 205 | uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled |
| vladvana | 0:23d1f73bf130 | 206 | This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END |
| vladvana | 0:23d1f73bf130 | 207 | (x = 1 or 2 depending on devices)*/ |
| vladvana | 0:23d1f73bf130 | 208 | |
| vladvana | 0:23d1f73bf130 | 209 | uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. |
| vladvana | 0:23d1f73bf130 | 210 | This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ |
| vladvana | 0:23d1f73bf130 | 211 | |
| vladvana | 0:23d1f73bf130 | 212 | } FLASH_EraseInitTypeDef; |
| vladvana | 0:23d1f73bf130 | 213 | |
| vladvana | 0:23d1f73bf130 | 214 | /** |
| vladvana | 0:23d1f73bf130 | 215 | * @brief FLASH Options bytes program structure definition |
| vladvana | 0:23d1f73bf130 | 216 | */ |
| vladvana | 0:23d1f73bf130 | 217 | typedef struct |
| vladvana | 0:23d1f73bf130 | 218 | { |
| vladvana | 0:23d1f73bf130 | 219 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
| vladvana | 0:23d1f73bf130 | 220 | This parameter can be a value of @ref FLASHEx_OB_Type */ |
| vladvana | 0:23d1f73bf130 | 221 | |
| vladvana | 0:23d1f73bf130 | 222 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
| vladvana | 0:23d1f73bf130 | 223 | This parameter can be a value of @ref FLASHEx_OB_WRP_State */ |
| vladvana | 0:23d1f73bf130 | 224 | |
| vladvana | 0:23d1f73bf130 | 225 | uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected |
| vladvana | 0:23d1f73bf130 | 226 | This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ |
| vladvana | 0:23d1f73bf130 | 227 | |
| vladvana | 0:23d1f73bf130 | 228 | uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. |
| vladvana | 0:23d1f73bf130 | 229 | This parameter must be a value of @ref FLASHEx_Banks */ |
| vladvana | 0:23d1f73bf130 | 230 | |
| vladvana | 0:23d1f73bf130 | 231 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. |
| vladvana | 0:23d1f73bf130 | 232 | This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ |
| vladvana | 0:23d1f73bf130 | 233 | |
| vladvana | 0:23d1f73bf130 | 234 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 235 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
| vladvana | 0:23d1f73bf130 | 236 | IWDG / STOP / STDBY / BOOT1 |
| vladvana | 0:23d1f73bf130 | 237 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
| vladvana | 0:23d1f73bf130 | 238 | @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */ |
| vladvana | 0:23d1f73bf130 | 239 | #else |
| vladvana | 0:23d1f73bf130 | 240 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
| vladvana | 0:23d1f73bf130 | 241 | IWDG / STOP / STDBY |
| vladvana | 0:23d1f73bf130 | 242 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
| vladvana | 0:23d1f73bf130 | 243 | @ref FLASHEx_OB_nRST_STDBY */ |
| vladvana | 0:23d1f73bf130 | 244 | #endif /* STM32F101xG || STM32F103xG */ |
| vladvana | 0:23d1f73bf130 | 245 | |
| vladvana | 0:23d1f73bf130 | 246 | uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be prgrammed |
| vladvana | 0:23d1f73bf130 | 247 | This parameter can be a value of @ref FLASHEx_OB_Data_Address */ |
| vladvana | 0:23d1f73bf130 | 248 | |
| vladvana | 0:23d1f73bf130 | 249 | uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA |
| vladvana | 0:23d1f73bf130 | 250 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
| vladvana | 0:23d1f73bf130 | 251 | |
| vladvana | 0:23d1f73bf130 | 252 | } FLASH_OBProgramInitTypeDef; |
| vladvana | 0:23d1f73bf130 | 253 | |
| vladvana | 0:23d1f73bf130 | 254 | /** |
| vladvana | 0:23d1f73bf130 | 255 | * @} |
| vladvana | 0:23d1f73bf130 | 256 | */ |
| vladvana | 0:23d1f73bf130 | 257 | |
| vladvana | 0:23d1f73bf130 | 258 | /* Exported constants --------------------------------------------------------*/ |
| vladvana | 0:23d1f73bf130 | 259 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
| vladvana | 0:23d1f73bf130 | 260 | * @{ |
| vladvana | 0:23d1f73bf130 | 261 | */ |
| vladvana | 0:23d1f73bf130 | 262 | |
| vladvana | 0:23d1f73bf130 | 263 | /** @defgroup FLASHEx_Constants FLASH Constants |
| vladvana | 0:23d1f73bf130 | 264 | * @{ |
| vladvana | 0:23d1f73bf130 | 265 | */ |
| vladvana | 0:23d1f73bf130 | 266 | |
| vladvana | 0:23d1f73bf130 | 267 | /** @defgroup FLASHEx_Page_Size Page Size |
| vladvana | 0:23d1f73bf130 | 268 | * @{ |
| vladvana | 0:23d1f73bf130 | 269 | */ |
| vladvana | 0:23d1f73bf130 | 270 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || \ |
| vladvana | 0:23d1f73bf130 | 271 | defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
| vladvana | 0:23d1f73bf130 | 272 | #define FLASH_PAGE_SIZE ((uint32_t)0x400) |
| vladvana | 0:23d1f73bf130 | 273 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| vladvana | 0:23d1f73bf130 | 274 | /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| vladvana | 0:23d1f73bf130 | 275 | |
| vladvana | 0:23d1f73bf130 | 276 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \ |
| vladvana | 0:23d1f73bf130 | 277 | defined(STM32F101xG) || defined(STM32F103xG) || \ |
| vladvana | 0:23d1f73bf130 | 278 | defined(STM32F105xC) || defined(STM32F107xC) |
| vladvana | 0:23d1f73bf130 | 279 | #define FLASH_PAGE_SIZE ((uint32_t)0x800) |
| vladvana | 0:23d1f73bf130 | 280 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| vladvana | 0:23d1f73bf130 | 281 | /* STM32F101xG || STM32F103xG */ |
| vladvana | 0:23d1f73bf130 | 282 | /* STM32F105xC || STM32F107xC */ |
| vladvana | 0:23d1f73bf130 | 283 | |
| vladvana | 0:23d1f73bf130 | 284 | /** |
| vladvana | 0:23d1f73bf130 | 285 | * @} |
| vladvana | 0:23d1f73bf130 | 286 | */ |
| vladvana | 0:23d1f73bf130 | 287 | |
| vladvana | 0:23d1f73bf130 | 288 | /** @defgroup FLASHEx_Type_Erase Type Erase |
| vladvana | 0:23d1f73bf130 | 289 | * @{ |
| vladvana | 0:23d1f73bf130 | 290 | */ |
| vladvana | 0:23d1f73bf130 | 291 | #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/ |
| vladvana | 0:23d1f73bf130 | 292 | #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x02) /*!<Flash mass erase activation*/ |
| vladvana | 0:23d1f73bf130 | 293 | |
| vladvana | 0:23d1f73bf130 | 294 | /** |
| vladvana | 0:23d1f73bf130 | 295 | * @} |
| vladvana | 0:23d1f73bf130 | 296 | */ |
| vladvana | 0:23d1f73bf130 | 297 | |
| vladvana | 0:23d1f73bf130 | 298 | /** @defgroup FLASH_Latency_Values Latency Values |
| vladvana | 0:23d1f73bf130 | 299 | * @{ |
| vladvana | 0:23d1f73bf130 | 300 | */ |
| vladvana | 0:23d1f73bf130 | 301 | #define FLASH_LATENCY_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */ |
| vladvana | 0:23d1f73bf130 | 302 | |
| vladvana | 0:23d1f73bf130 | 303 | #if defined(STM32F100xB) || defined(STM32F100xE) |
| vladvana | 0:23d1f73bf130 | 304 | /* Only Latency0 supported on value lines */ |
| vladvana | 0:23d1f73bf130 | 305 | #else |
| vladvana | 0:23d1f73bf130 | 306 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_0 /*!< FLASH One Latency cycle */ |
| vladvana | 0:23d1f73bf130 | 307 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_1 /*!< FLASH Two Latency cycles */ |
| vladvana | 0:23d1f73bf130 | 308 | |
| vladvana | 0:23d1f73bf130 | 309 | #endif |
| vladvana | 0:23d1f73bf130 | 310 | /** |
| vladvana | 0:23d1f73bf130 | 311 | * @} |
| vladvana | 0:23d1f73bf130 | 312 | */ |
| vladvana | 0:23d1f73bf130 | 313 | |
| vladvana | 0:23d1f73bf130 | 314 | /** @defgroup FLASHEx_Banks Banks |
| vladvana | 0:23d1f73bf130 | 315 | * @{ |
| vladvana | 0:23d1f73bf130 | 316 | */ |
| vladvana | 0:23d1f73bf130 | 317 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 318 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| vladvana | 0:23d1f73bf130 | 319 | #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */ |
| vladvana | 0:23d1f73bf130 | 320 | #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ |
| vladvana | 0:23d1f73bf130 | 321 | |
| vladvana | 0:23d1f73bf130 | 322 | #else |
| vladvana | 0:23d1f73bf130 | 323 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| vladvana | 0:23d1f73bf130 | 324 | #endif |
| vladvana | 0:23d1f73bf130 | 325 | /** |
| vladvana | 0:23d1f73bf130 | 326 | * @} |
| vladvana | 0:23d1f73bf130 | 327 | */ |
| vladvana | 0:23d1f73bf130 | 328 | |
| vladvana | 0:23d1f73bf130 | 329 | /** |
| vladvana | 0:23d1f73bf130 | 330 | * @} |
| vladvana | 0:23d1f73bf130 | 331 | */ |
| vladvana | 0:23d1f73bf130 | 332 | |
| vladvana | 0:23d1f73bf130 | 333 | /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants |
| vladvana | 0:23d1f73bf130 | 334 | * @{ |
| vladvana | 0:23d1f73bf130 | 335 | */ |
| vladvana | 0:23d1f73bf130 | 336 | |
| vladvana | 0:23d1f73bf130 | 337 | /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State |
| vladvana | 0:23d1f73bf130 | 338 | * @{ |
| vladvana | 0:23d1f73bf130 | 339 | */ |
| vladvana | 0:23d1f73bf130 | 340 | #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/ |
| vladvana | 0:23d1f73bf130 | 341 | #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/ |
| vladvana | 0:23d1f73bf130 | 342 | |
| vladvana | 0:23d1f73bf130 | 343 | /** |
| vladvana | 0:23d1f73bf130 | 344 | * @} |
| vladvana | 0:23d1f73bf130 | 345 | */ |
| vladvana | 0:23d1f73bf130 | 346 | |
| vladvana | 0:23d1f73bf130 | 347 | /** @defgroup FLASHEx_OB_Type Option Bytes Type |
| vladvana | 0:23d1f73bf130 | 348 | * @{ |
| vladvana | 0:23d1f73bf130 | 349 | */ |
| vladvana | 0:23d1f73bf130 | 350 | #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/ |
| vladvana | 0:23d1f73bf130 | 351 | #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/ |
| vladvana | 0:23d1f73bf130 | 352 | #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/ |
| vladvana | 0:23d1f73bf130 | 353 | #define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/ |
| vladvana | 0:23d1f73bf130 | 354 | |
| vladvana | 0:23d1f73bf130 | 355 | /** |
| vladvana | 0:23d1f73bf130 | 356 | * @} |
| vladvana | 0:23d1f73bf130 | 357 | */ |
| vladvana | 0:23d1f73bf130 | 358 | |
| vladvana | 0:23d1f73bf130 | 359 | |
| vladvana | 0:23d1f73bf130 | 360 | /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection |
| vladvana | 0:23d1f73bf130 | 361 | * @{ |
| vladvana | 0:23d1f73bf130 | 362 | */ |
| vladvana | 0:23d1f73bf130 | 363 | #define OB_RDP_LEVEL_0 ((uint8_t)0xA5) |
| vladvana | 0:23d1f73bf130 | 364 | #define OB_RDP_LEVEL_1 ((uint8_t)0x00) |
| vladvana | 0:23d1f73bf130 | 365 | /** |
| vladvana | 0:23d1f73bf130 | 366 | * @} |
| vladvana | 0:23d1f73bf130 | 367 | */ |
| vladvana | 0:23d1f73bf130 | 368 | |
| vladvana | 0:23d1f73bf130 | 369 | /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP |
| vladvana | 0:23d1f73bf130 | 370 | * @{ |
| vladvana | 0:23d1f73bf130 | 371 | */ |
| vladvana | 0:23d1f73bf130 | 372 | #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ |
| vladvana | 0:23d1f73bf130 | 373 | #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ |
| vladvana | 0:23d1f73bf130 | 374 | /** |
| vladvana | 0:23d1f73bf130 | 375 | * @} |
| vladvana | 0:23d1f73bf130 | 376 | */ |
| vladvana | 0:23d1f73bf130 | 377 | |
| vladvana | 0:23d1f73bf130 | 378 | /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY |
| vladvana | 0:23d1f73bf130 | 379 | * @{ |
| vladvana | 0:23d1f73bf130 | 380 | */ |
| vladvana | 0:23d1f73bf130 | 381 | #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ |
| vladvana | 0:23d1f73bf130 | 382 | #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ |
| vladvana | 0:23d1f73bf130 | 383 | /** |
| vladvana | 0:23d1f73bf130 | 384 | * @} |
| vladvana | 0:23d1f73bf130 | 385 | */ |
| vladvana | 0:23d1f73bf130 | 386 | |
| vladvana | 0:23d1f73bf130 | 387 | /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog |
| vladvana | 0:23d1f73bf130 | 388 | * @{ |
| vladvana | 0:23d1f73bf130 | 389 | */ |
| vladvana | 0:23d1f73bf130 | 390 | #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ |
| vladvana | 0:23d1f73bf130 | 391 | #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ |
| vladvana | 0:23d1f73bf130 | 392 | /** |
| vladvana | 0:23d1f73bf130 | 393 | * @} |
| vladvana | 0:23d1f73bf130 | 394 | */ |
| vladvana | 0:23d1f73bf130 | 395 | |
| vladvana | 0:23d1f73bf130 | 396 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 397 | /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 |
| vladvana | 0:23d1f73bf130 | 398 | * @{ |
| vladvana | 0:23d1f73bf130 | 399 | */ |
| vladvana | 0:23d1f73bf130 | 400 | #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */ |
| vladvana | 0:23d1f73bf130 | 401 | #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */ |
| vladvana | 0:23d1f73bf130 | 402 | /** |
| vladvana | 0:23d1f73bf130 | 403 | * @} |
| vladvana | 0:23d1f73bf130 | 404 | */ |
| vladvana | 0:23d1f73bf130 | 405 | #endif /* STM32F101xG || STM32F103xG */ |
| vladvana | 0:23d1f73bf130 | 406 | |
| vladvana | 0:23d1f73bf130 | 407 | /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address |
| vladvana | 0:23d1f73bf130 | 408 | * @{ |
| vladvana | 0:23d1f73bf130 | 409 | */ |
| vladvana | 0:23d1f73bf130 | 410 | #define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804) |
| vladvana | 0:23d1f73bf130 | 411 | #define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806) |
| vladvana | 0:23d1f73bf130 | 412 | /** |
| vladvana | 0:23d1f73bf130 | 413 | * @} |
| vladvana | 0:23d1f73bf130 | 414 | */ |
| vladvana | 0:23d1f73bf130 | 415 | |
| vladvana | 0:23d1f73bf130 | 416 | /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection |
| vladvana | 0:23d1f73bf130 | 417 | * @{ |
| vladvana | 0:23d1f73bf130 | 418 | */ |
| vladvana | 0:23d1f73bf130 | 419 | /* STM32 Low and Medium density devices */ |
| vladvana | 0:23d1f73bf130 | 420 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || \ |
| vladvana | 0:23d1f73bf130 | 421 | defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
| vladvana | 0:23d1f73bf130 | 422 | #define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /*!< Write protection of page 0 to 3 */ |
| vladvana | 0:23d1f73bf130 | 423 | #define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /*!< Write protection of page 4 to 7 */ |
| vladvana | 0:23d1f73bf130 | 424 | #define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /*!< Write protection of page 8 to 11 */ |
| vladvana | 0:23d1f73bf130 | 425 | #define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /*!< Write protection of page 12 to 15 */ |
| vladvana | 0:23d1f73bf130 | 426 | #define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /*!< Write protection of page 16 to 19 */ |
| vladvana | 0:23d1f73bf130 | 427 | #define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /*!< Write protection of page 20 to 23 */ |
| vladvana | 0:23d1f73bf130 | 428 | #define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /*!< Write protection of page 24 to 27 */ |
| vladvana | 0:23d1f73bf130 | 429 | #define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /*!< Write protection of page 28 to 31 */ |
| vladvana | 0:23d1f73bf130 | 430 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| vladvana | 0:23d1f73bf130 | 431 | /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| vladvana | 0:23d1f73bf130 | 432 | |
| vladvana | 0:23d1f73bf130 | 433 | /* STM32 Medium-density devices */ |
| vladvana | 0:23d1f73bf130 | 434 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
| vladvana | 0:23d1f73bf130 | 435 | #define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /*!< Write protection of page 32 to 35 */ |
| vladvana | 0:23d1f73bf130 | 436 | #define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /*!< Write protection of page 36 to 39 */ |
| vladvana | 0:23d1f73bf130 | 437 | #define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /*!< Write protection of page 40 to 43 */ |
| vladvana | 0:23d1f73bf130 | 438 | #define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /*!< Write protection of page 44 to 47 */ |
| vladvana | 0:23d1f73bf130 | 439 | #define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /*!< Write protection of page 48 to 51 */ |
| vladvana | 0:23d1f73bf130 | 440 | #define OB_WRP_PAGES52TO55 ((uint32_t)0x00002000) /*!< Write protection of page 52 to 55 */ |
| vladvana | 0:23d1f73bf130 | 441 | #define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /*!< Write protection of page 56 to 59 */ |
| vladvana | 0:23d1f73bf130 | 442 | #define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /*!< Write protection of page 60 to 63 */ |
| vladvana | 0:23d1f73bf130 | 443 | #define OB_WRP_PAGES64TO67 ((uint32_t)0x00010000) /*!< Write protection of page 64 to 67 */ |
| vladvana | 0:23d1f73bf130 | 444 | #define OB_WRP_PAGES68TO71 ((uint32_t)0x00020000) /*!< Write protection of page 68 to 71 */ |
| vladvana | 0:23d1f73bf130 | 445 | #define OB_WRP_PAGES72TO75 ((uint32_t)0x00040000) /*!< Write protection of page 72 to 75 */ |
| vladvana | 0:23d1f73bf130 | 446 | #define OB_WRP_PAGES76TO79 ((uint32_t)0x00080000) /*!< Write protection of page 76 to 79 */ |
| vladvana | 0:23d1f73bf130 | 447 | #define OB_WRP_PAGES80TO83 ((uint32_t)0x00100000) /*!< Write protection of page 80 to 83 */ |
| vladvana | 0:23d1f73bf130 | 448 | #define OB_WRP_PAGES84TO87 ((uint32_t)0x00200000) /*!< Write protection of page 84 to 87 */ |
| vladvana | 0:23d1f73bf130 | 449 | #define OB_WRP_PAGES88TO91 ((uint32_t)0x00400000) /*!< Write protection of page 88 to 91 */ |
| vladvana | 0:23d1f73bf130 | 450 | #define OB_WRP_PAGES92TO95 ((uint32_t)0x00800000) /*!< Write protection of page 92 to 95 */ |
| vladvana | 0:23d1f73bf130 | 451 | #define OB_WRP_PAGES96TO99 ((uint32_t)0x01000000) /*!< Write protection of page 96 to 99 */ |
| vladvana | 0:23d1f73bf130 | 452 | #define OB_WRP_PAGES100TO103 ((uint32_t)0x02000000) /*!< Write protection of page 100 to 103 */ |
| vladvana | 0:23d1f73bf130 | 453 | #define OB_WRP_PAGES104TO107 ((uint32_t)0x04000000) /*!< Write protection of page 104 to 107 */ |
| vladvana | 0:23d1f73bf130 | 454 | #define OB_WRP_PAGES108TO111 ((uint32_t)0x08000000) /*!< Write protection of page 108 to 111 */ |
| vladvana | 0:23d1f73bf130 | 455 | #define OB_WRP_PAGES112TO115 ((uint32_t)0x10000000) /*!< Write protection of page 112 to 115 */ |
| vladvana | 0:23d1f73bf130 | 456 | #define OB_WRP_PAGES116TO119 ((uint32_t)0x20000000) /*!< Write protection of page 115 to 119 */ |
| vladvana | 0:23d1f73bf130 | 457 | #define OB_WRP_PAGES120TO123 ((uint32_t)0x40000000) /*!< Write protection of page 120 to 123 */ |
| vladvana | 0:23d1f73bf130 | 458 | #define OB_WRP_PAGES124TO127 ((uint32_t)0x80000000) /*!< Write protection of page 124 to 127 */ |
| vladvana | 0:23d1f73bf130 | 459 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| vladvana | 0:23d1f73bf130 | 460 | |
| vladvana | 0:23d1f73bf130 | 461 | |
| vladvana | 0:23d1f73bf130 | 462 | /* STM32 High-density, XL-density and Connectivity line devices */ |
| vladvana | 0:23d1f73bf130 | 463 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \ |
| vladvana | 0:23d1f73bf130 | 464 | defined(STM32F101xG) || defined(STM32F103xG) || \ |
| vladvana | 0:23d1f73bf130 | 465 | defined(STM32F105xC) || defined(STM32F107xC) |
| vladvana | 0:23d1f73bf130 | 466 | #define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /*!< Write protection of page 0 TO 1 */ |
| vladvana | 0:23d1f73bf130 | 467 | #define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /*!< Write protection of page 2 TO 3 */ |
| vladvana | 0:23d1f73bf130 | 468 | #define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /*!< Write protection of page 4 TO 5 */ |
| vladvana | 0:23d1f73bf130 | 469 | #define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /*!< Write protection of page 6 TO 7 */ |
| vladvana | 0:23d1f73bf130 | 470 | #define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /*!< Write protection of page 8 TO 9 */ |
| vladvana | 0:23d1f73bf130 | 471 | #define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /*!< Write protection of page 10 TO 11 */ |
| vladvana | 0:23d1f73bf130 | 472 | #define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /*!< Write protection of page 12 TO 13 */ |
| vladvana | 0:23d1f73bf130 | 473 | #define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /*!< Write protection of page 14 TO 15 */ |
| vladvana | 0:23d1f73bf130 | 474 | #define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /*!< Write protection of page 16 TO 17 */ |
| vladvana | 0:23d1f73bf130 | 475 | #define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /*!< Write protection of page 18 TO 19 */ |
| vladvana | 0:23d1f73bf130 | 476 | #define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /*!< Write protection of page 20 TO 21 */ |
| vladvana | 0:23d1f73bf130 | 477 | #define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /*!< Write protection of page 22 TO 23 */ |
| vladvana | 0:23d1f73bf130 | 478 | #define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /*!< Write protection of page 24 TO 25 */ |
| vladvana | 0:23d1f73bf130 | 479 | #define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /*!< Write protection of page 26 TO 27 */ |
| vladvana | 0:23d1f73bf130 | 480 | #define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /*!< Write protection of page 28 TO 29 */ |
| vladvana | 0:23d1f73bf130 | 481 | #define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /*!< Write protection of page 30 TO 31 */ |
| vladvana | 0:23d1f73bf130 | 482 | #define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /*!< Write protection of page 32 TO 33 */ |
| vladvana | 0:23d1f73bf130 | 483 | #define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /*!< Write protection of page 34 TO 35 */ |
| vladvana | 0:23d1f73bf130 | 484 | #define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /*!< Write protection of page 36 TO 37 */ |
| vladvana | 0:23d1f73bf130 | 485 | #define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /*!< Write protection of page 38 TO 39 */ |
| vladvana | 0:23d1f73bf130 | 486 | #define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /*!< Write protection of page 40 TO 41 */ |
| vladvana | 0:23d1f73bf130 | 487 | #define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /*!< Write protection of page 42 TO 43 */ |
| vladvana | 0:23d1f73bf130 | 488 | #define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /*!< Write protection of page 44 TO 45 */ |
| vladvana | 0:23d1f73bf130 | 489 | #define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /*!< Write protection of page 46 TO 47 */ |
| vladvana | 0:23d1f73bf130 | 490 | #define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /*!< Write protection of page 48 TO 49 */ |
| vladvana | 0:23d1f73bf130 | 491 | #define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /*!< Write protection of page 50 TO 51 */ |
| vladvana | 0:23d1f73bf130 | 492 | #define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /*!< Write protection of page 52 TO 53 */ |
| vladvana | 0:23d1f73bf130 | 493 | #define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /*!< Write protection of page 54 TO 55 */ |
| vladvana | 0:23d1f73bf130 | 494 | #define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /*!< Write protection of page 56 TO 57 */ |
| vladvana | 0:23d1f73bf130 | 495 | #define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /*!< Write protection of page 58 TO 59 */ |
| vladvana | 0:23d1f73bf130 | 496 | #define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /*!< Write protection of page 60 TO 61 */ |
| vladvana | 0:23d1f73bf130 | 497 | #define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 127 */ |
| vladvana | 0:23d1f73bf130 | 498 | #define OB_WRP_PAGES62TO255 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 255 */ |
| vladvana | 0:23d1f73bf130 | 499 | #define OB_WRP_PAGES62TO511 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 511 */ |
| vladvana | 0:23d1f73bf130 | 500 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| vladvana | 0:23d1f73bf130 | 501 | /* STM32F101xG || STM32F103xG */ |
| vladvana | 0:23d1f73bf130 | 502 | /* STM32F105xC || STM32F107xC */ |
| vladvana | 0:23d1f73bf130 | 503 | |
| vladvana | 0:23d1f73bf130 | 504 | #define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */ |
| vladvana | 0:23d1f73bf130 | 505 | |
| vladvana | 0:23d1f73bf130 | 506 | /* Low Density */ |
| vladvana | 0:23d1f73bf130 | 507 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) |
| vladvana | 0:23d1f73bf130 | 508 | #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF) |
| vladvana | 0:23d1f73bf130 | 509 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| vladvana | 0:23d1f73bf130 | 510 | |
| vladvana | 0:23d1f73bf130 | 511 | /* Medium Density */ |
| vladvana | 0:23d1f73bf130 | 512 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
| vladvana | 0:23d1f73bf130 | 513 | #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF) |
| vladvana | 0:23d1f73bf130 | 514 | #define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00) |
| vladvana | 0:23d1f73bf130 | 515 | #define OB_WRP_PAGES64TO95MASK ((uint32_t)0x00FF0000) |
| vladvana | 0:23d1f73bf130 | 516 | #define OB_WRP_PAGES96TO127MASK ((uint32_t)0xFF000000) |
| vladvana | 0:23d1f73bf130 | 517 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
| vladvana | 0:23d1f73bf130 | 518 | |
| vladvana | 0:23d1f73bf130 | 519 | /* High Density */ |
| vladvana | 0:23d1f73bf130 | 520 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) |
| vladvana | 0:23d1f73bf130 | 521 | #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) |
| vladvana | 0:23d1f73bf130 | 522 | #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) |
| vladvana | 0:23d1f73bf130 | 523 | #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) |
| vladvana | 0:23d1f73bf130 | 524 | #define OB_WRP_PAGES48TO255MASK ((uint32_t)0xFF000000) |
| vladvana | 0:23d1f73bf130 | 525 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
| vladvana | 0:23d1f73bf130 | 526 | |
| vladvana | 0:23d1f73bf130 | 527 | /* XL Density */ |
| vladvana | 0:23d1f73bf130 | 528 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 529 | #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) |
| vladvana | 0:23d1f73bf130 | 530 | #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) |
| vladvana | 0:23d1f73bf130 | 531 | #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) |
| vladvana | 0:23d1f73bf130 | 532 | #define OB_WRP_PAGES48TO511MASK ((uint32_t)0xFF000000) |
| vladvana | 0:23d1f73bf130 | 533 | #endif /* STM32F101xG || STM32F103xG */ |
| vladvana | 0:23d1f73bf130 | 534 | |
| vladvana | 0:23d1f73bf130 | 535 | /* Connectivity line devices */ |
| vladvana | 0:23d1f73bf130 | 536 | #if defined(STM32F105xC) || defined(STM32F107xC) |
| vladvana | 0:23d1f73bf130 | 537 | #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) |
| vladvana | 0:23d1f73bf130 | 538 | #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) |
| vladvana | 0:23d1f73bf130 | 539 | #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) |
| vladvana | 0:23d1f73bf130 | 540 | #define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000) |
| vladvana | 0:23d1f73bf130 | 541 | #endif /* STM32F105xC || STM32F107xC */ |
| vladvana | 0:23d1f73bf130 | 542 | |
| vladvana | 0:23d1f73bf130 | 543 | /** |
| vladvana | 0:23d1f73bf130 | 544 | * @} |
| vladvana | 0:23d1f73bf130 | 545 | */ |
| vladvana | 0:23d1f73bf130 | 546 | |
| vladvana | 0:23d1f73bf130 | 547 | /** |
| vladvana | 0:23d1f73bf130 | 548 | * @} |
| vladvana | 0:23d1f73bf130 | 549 | */ |
| vladvana | 0:23d1f73bf130 | 550 | |
| vladvana | 0:23d1f73bf130 | 551 | /** @addtogroup FLASHEx_Constants |
| vladvana | 0:23d1f73bf130 | 552 | * @{ |
| vladvana | 0:23d1f73bf130 | 553 | */ |
| vladvana | 0:23d1f73bf130 | 554 | |
| vladvana | 0:23d1f73bf130 | 555 | /** @defgroup FLASH_Flag_definition Flag definition |
| vladvana | 0:23d1f73bf130 | 556 | * @brief Flag definition |
| vladvana | 0:23d1f73bf130 | 557 | * @{ |
| vladvana | 0:23d1f73bf130 | 558 | */ |
| vladvana | 0:23d1f73bf130 | 559 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 560 | #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */ |
| vladvana | 0:23d1f73bf130 | 561 | #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */ |
| vladvana | 0:23d1f73bf130 | 562 | #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */ |
| vladvana | 0:23d1f73bf130 | 563 | #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */ |
| vladvana | 0:23d1f73bf130 | 564 | |
| vladvana | 0:23d1f73bf130 | 565 | #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */ |
| vladvana | 0:23d1f73bf130 | 566 | #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */ |
| vladvana | 0:23d1f73bf130 | 567 | #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */ |
| vladvana | 0:23d1f73bf130 | 568 | #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */ |
| vladvana | 0:23d1f73bf130 | 569 | |
| vladvana | 0:23d1f73bf130 | 570 | #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16) /*!< FLASH Bank2 Busy flag */ |
| vladvana | 0:23d1f73bf130 | 571 | #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16) /*!< FLASH Bank2 Programming error flag */ |
| vladvana | 0:23d1f73bf130 | 572 | #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16) /*!< FLASH Bank2 Write protected error flag */ |
| vladvana | 0:23d1f73bf130 | 573 | #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16) /*!< FLASH Bank2 End of Operation flag */ |
| vladvana | 0:23d1f73bf130 | 574 | |
| vladvana | 0:23d1f73bf130 | 575 | #else |
| vladvana | 0:23d1f73bf130 | 576 | |
| vladvana | 0:23d1f73bf130 | 577 | #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ |
| vladvana | 0:23d1f73bf130 | 578 | #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */ |
| vladvana | 0:23d1f73bf130 | 579 | #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */ |
| vladvana | 0:23d1f73bf130 | 580 | #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */ |
| vladvana | 0:23d1f73bf130 | 581 | |
| vladvana | 0:23d1f73bf130 | 582 | #endif |
| vladvana | 0:23d1f73bf130 | 583 | #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8 | FLASH_OBR_OPTERR)) /*!< Option Byte Error */ |
| vladvana | 0:23d1f73bf130 | 584 | /** |
| vladvana | 0:23d1f73bf130 | 585 | * @} |
| vladvana | 0:23d1f73bf130 | 586 | */ |
| vladvana | 0:23d1f73bf130 | 587 | |
| vladvana | 0:23d1f73bf130 | 588 | /** @defgroup FLASH_Interrupt_definition Interrupt definition |
| vladvana | 0:23d1f73bf130 | 589 | * @brief FLASH Interrupt definition |
| vladvana | 0:23d1f73bf130 | 590 | * @{ |
| vladvana | 0:23d1f73bf130 | 591 | */ |
| vladvana | 0:23d1f73bf130 | 592 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 593 | #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */ |
| vladvana | 0:23d1f73bf130 | 594 | #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */ |
| vladvana | 0:23d1f73bf130 | 595 | |
| vladvana | 0:23d1f73bf130 | 596 | #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */ |
| vladvana | 0:23d1f73bf130 | 597 | #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */ |
| vladvana | 0:23d1f73bf130 | 598 | |
| vladvana | 0:23d1f73bf130 | 599 | #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16) /*!< End of FLASH Operation Interrupt source Bank2 */ |
| vladvana | 0:23d1f73bf130 | 600 | #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16) /*!< Error Interrupt source Bank2 */ |
| vladvana | 0:23d1f73bf130 | 601 | |
| vladvana | 0:23d1f73bf130 | 602 | #else |
| vladvana | 0:23d1f73bf130 | 603 | |
| vladvana | 0:23d1f73bf130 | 604 | #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ |
| vladvana | 0:23d1f73bf130 | 605 | #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */ |
| vladvana | 0:23d1f73bf130 | 606 | |
| vladvana | 0:23d1f73bf130 | 607 | #endif |
| vladvana | 0:23d1f73bf130 | 608 | /** |
| vladvana | 0:23d1f73bf130 | 609 | * @} |
| vladvana | 0:23d1f73bf130 | 610 | */ |
| vladvana | 0:23d1f73bf130 | 611 | |
| vladvana | 0:23d1f73bf130 | 612 | /** |
| vladvana | 0:23d1f73bf130 | 613 | * @} |
| vladvana | 0:23d1f73bf130 | 614 | */ |
| vladvana | 0:23d1f73bf130 | 615 | |
| vladvana | 0:23d1f73bf130 | 616 | |
| vladvana | 0:23d1f73bf130 | 617 | /** |
| vladvana | 0:23d1f73bf130 | 618 | * @} |
| vladvana | 0:23d1f73bf130 | 619 | */ |
| vladvana | 0:23d1f73bf130 | 620 | |
| vladvana | 0:23d1f73bf130 | 621 | |
| vladvana | 0:23d1f73bf130 | 622 | /* Exported macro ------------------------------------------------------------*/ |
| vladvana | 0:23d1f73bf130 | 623 | /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros |
| vladvana | 0:23d1f73bf130 | 624 | * @{ |
| vladvana | 0:23d1f73bf130 | 625 | */ |
| vladvana | 0:23d1f73bf130 | 626 | |
| vladvana | 0:23d1f73bf130 | 627 | #if defined(STM32F100xB) || defined(STM32F100xE) |
| vladvana | 0:23d1f73bf130 | 628 | /* Macros not available */ |
| vladvana | 0:23d1f73bf130 | 629 | #else |
| vladvana | 0:23d1f73bf130 | 630 | /** @defgroup FLASH_Latency Latency configuration |
| vladvana | 0:23d1f73bf130 | 631 | * @brief macros to set the FLASH latency |
| vladvana | 0:23d1f73bf130 | 632 | * @{ |
| vladvana | 0:23d1f73bf130 | 633 | */ |
| vladvana | 0:23d1f73bf130 | 634 | |
| vladvana | 0:23d1f73bf130 | 635 | /** |
| vladvana | 0:23d1f73bf130 | 636 | * @brief Set the FLASH Latency. |
| vladvana | 0:23d1f73bf130 | 637 | * @param __LATENCY__: FLASH Latency |
| vladvana | 0:23d1f73bf130 | 638 | * This parameter can be one of the following values: |
| vladvana | 0:23d1f73bf130 | 639 | * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle |
| vladvana | 0:23d1f73bf130 | 640 | * @arg FLASH_LATENCY_1: FLASH One Latency cycle |
| vladvana | 0:23d1f73bf130 | 641 | * @arg FLASH_LATENCY_2: FLASH Two Latency cycle |
| vladvana | 0:23d1f73bf130 | 642 | * @retval None |
| vladvana | 0:23d1f73bf130 | 643 | */ |
| vladvana | 0:23d1f73bf130 | 644 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (FLASH->ACR = (FLASH->ACR&(~FLASH_ACR_LATENCY)) | (__LATENCY__)) |
| vladvana | 0:23d1f73bf130 | 645 | |
| vladvana | 0:23d1f73bf130 | 646 | /** @brief Get the FLASH Latency. |
| vladvana | 0:23d1f73bf130 | 647 | * @retval FLASH Latency |
| vladvana | 0:23d1f73bf130 | 648 | * This parameter can be one of the following values: |
| vladvana | 0:23d1f73bf130 | 649 | * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle |
| vladvana | 0:23d1f73bf130 | 650 | * @arg FLASH_LATENCY_1: FLASH One Latency cycle |
| vladvana | 0:23d1f73bf130 | 651 | * @arg FLASH_LATENCY_2: FLASH Two Latency cycle |
| vladvana | 0:23d1f73bf130 | 652 | */ |
| vladvana | 0:23d1f73bf130 | 653 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) |
| vladvana | 0:23d1f73bf130 | 654 | |
| vladvana | 0:23d1f73bf130 | 655 | /** |
| vladvana | 0:23d1f73bf130 | 656 | * @} |
| vladvana | 0:23d1f73bf130 | 657 | */ |
| vladvana | 0:23d1f73bf130 | 658 | |
| vladvana | 0:23d1f73bf130 | 659 | /** @defgroup FLASH_Prefetch Prefetch activation or deactivation |
| vladvana | 0:23d1f73bf130 | 660 | * @brief macros to set the FLASH Prefetch |
| vladvana | 0:23d1f73bf130 | 661 | * @{ |
| vladvana | 0:23d1f73bf130 | 662 | */ |
| vladvana | 0:23d1f73bf130 | 663 | |
| vladvana | 0:23d1f73bf130 | 664 | /** |
| vladvana | 0:23d1f73bf130 | 665 | * @brief Enable the FLASH prefetch buffer. |
| vladvana | 0:23d1f73bf130 | 666 | * @retval None |
| vladvana | 0:23d1f73bf130 | 667 | */ |
| vladvana | 0:23d1f73bf130 | 668 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTBE) |
| vladvana | 0:23d1f73bf130 | 669 | |
| vladvana | 0:23d1f73bf130 | 670 | /** |
| vladvana | 0:23d1f73bf130 | 671 | * @brief Disable the FLASH prefetch buffer. |
| vladvana | 0:23d1f73bf130 | 672 | * @retval None |
| vladvana | 0:23d1f73bf130 | 673 | */ |
| vladvana | 0:23d1f73bf130 | 674 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTBE)) |
| vladvana | 0:23d1f73bf130 | 675 | |
| vladvana | 0:23d1f73bf130 | 676 | /** |
| vladvana | 0:23d1f73bf130 | 677 | * @} |
| vladvana | 0:23d1f73bf130 | 678 | */ |
| vladvana | 0:23d1f73bf130 | 679 | |
| vladvana | 0:23d1f73bf130 | 680 | #endif |
| vladvana | 0:23d1f73bf130 | 681 | |
| vladvana | 0:23d1f73bf130 | 682 | /** @defgroup FLASH_Interrupt Interrupt |
| vladvana | 0:23d1f73bf130 | 683 | * @brief macros to handle FLASH interrupts |
| vladvana | 0:23d1f73bf130 | 684 | * @{ |
| vladvana | 0:23d1f73bf130 | 685 | */ |
| vladvana | 0:23d1f73bf130 | 686 | |
| vladvana | 0:23d1f73bf130 | 687 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| vladvana | 0:23d1f73bf130 | 688 | /** |
| vladvana | 0:23d1f73bf130 | 689 | * @brief Enable the specified FLASH interrupt. |
| vladvana | 0:23d1f73bf130 | 690 | * @param __INTERRUPT__ : FLASH interrupt |
| vladvana | 0:23d1f73bf130 | 691 | * This parameter can be any combination of the following values: |
| vladvana | 0:23d1f73bf130 | 692 | * @arg FLASH_IT_EOP_BANK1: End of FLASH Operation Interrupt on bank1 |
| vladvana | 0:23d1f73bf130 | 693 | * @arg FLASH_IT_ERR_BANK1: Error Interrupt on bank1 |
| vladvana | 0:23d1f73bf130 | 694 | * @arg FLASH_IT_EOP_BANK2: End of FLASH Operation Interrupt on bank2 |
| vladvana | 0:23d1f73bf130 | 695 | * @arg FLASH_IT_ERR_BANK2: Error Interrupt on bank2 |
| vladvana | 0:23d1f73bf130 | 696 | * @retval none |
| vladvana | 0:23d1f73bf130 | 697 | */ |
| vladvana | 0:23d1f73bf130 | 698 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \ |
| vladvana | 0:23d1f73bf130 | 699 | /* Enable Bank1 IT */ \ |
| vladvana | 0:23d1f73bf130 | 700 | SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \ |
| vladvana | 0:23d1f73bf130 | 701 | /* Enable Bank2 IT */ \ |
| vladvana | 0:23d1f73bf130 | 702 | SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \ |
| vladvana | 0:23d1f73bf130 | 703 | } while(0) |
| vladvana | 0:23d1f73bf130 | 704 | |
| vladvana | 0:23d1f73bf130 | 705 | /** |
| vladvana | 0:23d1f73bf130 | 706 | * @brief Disable the specified FLASH interrupt. |
| vladvana | 0:23d1f73bf130 | 707 | * @param __INTERRUPT__ : FLASH interrupt |
| vladvana | 0:23d1f73bf130 | 708 | * This parameter can be any combination of the following values: |
| vladvana | 0:23d1f73bf130 | 709 | * @arg FLASH_IT_EOP_BANK1: End of FLASH Operation Interrupt on bank1 |
| vladvana | 0:23d1f73bf130 | 710 | * @arg FLASH_IT_ERR_BANK1: Error Interrupt on bank1 |
| vladvana | 0:23d1f73bf130 | 711 | * @arg FLASH_IT_EOP_BANK2: End of FLASH Operation Interrupt on bank2 |
| vladvana | 0:23d1f73bf130 | 712 | * @arg FLASH_IT_ERR_BANK2: Error Interrupt on bank2 |
| vladvana | 0:23d1f73bf130 | 713 | * @retval none |
| vladvana | 0:23d1f73bf130 | 714 | */ |
| vladvana | 0:23d1f73bf130 | 715 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \ |
| vladvana | 0:23d1f73bf130 | 716 | /* Disable Bank1 IT */ \ |
| vladvana | 0:23d1f73bf130 | 717 | CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \ |
| vladvana | 0:23d1f73bf130 | 718 | /* Disable Bank2 IT */ \ |
| vladvana | 0:23d1f73bf130 | 719 | CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \ |
| vladvana | 0:23d1f73bf130 | 720 | } while(0) |
| vladvana | 0:23d1f73bf130 | 721 | |
| vladvana | 0:23d1f73bf130 | 722 | /** |
| vladvana | 0:23d1f73bf130 | 723 | * @brief Get the specified FLASH flag status. |
| vladvana | 0:23d1f73bf130 | 724 | * @param __FLAG__: specifies the FLASH flag to check. |
| vladvana | 0:23d1f73bf130 | 725 | * This parameter can be one of the following values: |
| vladvana | 0:23d1f73bf130 | 726 | * @arg FLASH_FLAG_EOP_BANK1 : FLASH End of Operation flag on bank1 |
| vladvana | 0:23d1f73bf130 | 727 | * @arg FLASH_FLAG_WRPERR_BANK1: FLASH Write protected error flag on bank1 |
| vladvana | 0:23d1f73bf130 | 728 | * @arg FLASH_FLAG_PGERR_BANK1 : FLASH Programming error flag on bank1 |
| vladvana | 0:23d1f73bf130 | 729 | * @arg FLASH_FLAG_BSY_BANK1 : FLASH Busy flag on bank1 |
| vladvana | 0:23d1f73bf130 | 730 | * @arg FLASH_FLAG_EOP_BANK2 : FLASH End of Operation flag on bank2 |
| vladvana | 0:23d1f73bf130 | 731 | * @arg FLASH_FLAG_WRPERR_BANK2: FLASH Write protected error flag on bank2 |
| vladvana | 0:23d1f73bf130 | 732 | * @arg FLASH_FLAG_PGERR_BANK2 : FLASH Programming error flag on bank2 |
| vladvana | 0:23d1f73bf130 | 733 | * @arg FLASH_FLAG_BSY_BANK2 : FLASH Busy flag on bank2 |
| vladvana | 0:23d1f73bf130 | 734 | * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match |
| vladvana | 0:23d1f73bf130 | 735 | * @retval The new state of __FLAG__ (SET or RESET). |
| vladvana | 0:23d1f73bf130 | 736 | */ |
| vladvana | 0:23d1f73bf130 | 737 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ |
| vladvana | 0:23d1f73bf130 | 738 | (FLASH->OBR & FLASH_OBR_OPTERR) : \ |
| vladvana | 0:23d1f73bf130 | 739 | ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \ |
| vladvana | 0:23d1f73bf130 | 740 | (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \ |
| vladvana | 0:23d1f73bf130 | 741 | (FLASH->SR2 & ((__FLAG__) >> 16)))) |
| vladvana | 0:23d1f73bf130 | 742 | |
| vladvana | 0:23d1f73bf130 | 743 | /** |
| vladvana | 0:23d1f73bf130 | 744 | * @brief Clear the specified FLASH flag. |
| vladvana | 0:23d1f73bf130 | 745 | * @param __FLAG__: specifies the FLASH flags to clear. |
| vladvana | 0:23d1f73bf130 | 746 | * This parameter can be any combination of the following values: |
| vladvana | 0:23d1f73bf130 | 747 | * @arg FLASH_FLAG_EOP_BANK1 : FLASH End of Operation flag on bank1 |
| vladvana | 0:23d1f73bf130 | 748 | * @arg FLASH_FLAG_WRPERR_BANK1: FLASH Write protected error flag on bank1 |
| vladvana | 0:23d1f73bf130 | 749 | * @arg FLASH_FLAG_PGERR_BANK1 : FLASH Programming error flag on bank1 |
| vladvana | 0:23d1f73bf130 | 750 | * @arg FLASH_FLAG_BSY_BANK1 : FLASH Busy flag on bank1 |
| vladvana | 0:23d1f73bf130 | 751 | * @arg FLASH_FLAG_EOP_BANK2 : FLASH End of Operation flag on bank2 |
| vladvana | 0:23d1f73bf130 | 752 | * @arg FLASH_FLAG_WRPERR_BANK2: FLASH Write protected error flag on bank2 |
| vladvana | 0:23d1f73bf130 | 753 | * @arg FLASH_FLAG_PGERR_BANK2 : FLASH Programming error flag on bank2 |
| vladvana | 0:23d1f73bf130 | 754 | * @arg FLASH_FLAG_BSY_BANK2 : FLASH Busy flag on bank2 |
| vladvana | 0:23d1f73bf130 | 755 | * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match |
| vladvana | 0:23d1f73bf130 | 756 | * @retval none |
| vladvana | 0:23d1f73bf130 | 757 | */ |
| vladvana | 0:23d1f73bf130 | 758 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ |
| vladvana | 0:23d1f73bf130 | 759 | /* Clear FLASH_FLAG_OPTVERR flag */ \ |
| vladvana | 0:23d1f73bf130 | 760 | if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ |
| vladvana | 0:23d1f73bf130 | 761 | { \ |
| vladvana | 0:23d1f73bf130 | 762 | CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ |
| vladvana | 0:23d1f73bf130 | 763 | } \ |
| vladvana | 0:23d1f73bf130 | 764 | else { \ |
| vladvana | 0:23d1f73bf130 | 765 | /* Clear Flag in Bank1 */ \ |
| vladvana | 0:23d1f73bf130 | 766 | if (((__FLAG__) & SR_FLAG_MASK) != RESET) \ |
| vladvana | 0:23d1f73bf130 | 767 | { \ |
| vladvana | 0:23d1f73bf130 | 768 | FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \ |
| vladvana | 0:23d1f73bf130 | 769 | } \ |
| vladvana | 0:23d1f73bf130 | 770 | /* Clear Flag in Bank2 */ \ |
| vladvana | 0:23d1f73bf130 | 771 | if (((__FLAG__) >> 16) != RESET) \ |
| vladvana | 0:23d1f73bf130 | 772 | { \ |
| vladvana | 0:23d1f73bf130 | 773 | FLASH->SR2 = ((__FLAG__) >> 16); \ |
| vladvana | 0:23d1f73bf130 | 774 | } \ |
| vladvana | 0:23d1f73bf130 | 775 | } \ |
| vladvana | 0:23d1f73bf130 | 776 | } while(0) |
| vladvana | 0:23d1f73bf130 | 777 | #else |
| vladvana | 0:23d1f73bf130 | 778 | /** |
| vladvana | 0:23d1f73bf130 | 779 | * @brief Enable the specified FLASH interrupt. |
| vladvana | 0:23d1f73bf130 | 780 | * @param __INTERRUPT__ : FLASH interrupt |
| vladvana | 0:23d1f73bf130 | 781 | * This parameter can be any combination of the following values: |
| vladvana | 0:23d1f73bf130 | 782 | * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt |
| vladvana | 0:23d1f73bf130 | 783 | * @arg FLASH_IT_ERR: Error Interrupt |
| vladvana | 0:23d1f73bf130 | 784 | * @retval none |
| vladvana | 0:23d1f73bf130 | 785 | */ |
| vladvana | 0:23d1f73bf130 | 786 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) |
| vladvana | 0:23d1f73bf130 | 787 | |
| vladvana | 0:23d1f73bf130 | 788 | /** |
| vladvana | 0:23d1f73bf130 | 789 | * @brief Disable the specified FLASH interrupt. |
| vladvana | 0:23d1f73bf130 | 790 | * @param __INTERRUPT__ : FLASH interrupt |
| vladvana | 0:23d1f73bf130 | 791 | * This parameter can be any combination of the following values: |
| vladvana | 0:23d1f73bf130 | 792 | * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt |
| vladvana | 0:23d1f73bf130 | 793 | * @arg FLASH_IT_ERR: Error Interrupt |
| vladvana | 0:23d1f73bf130 | 794 | * @retval none |
| vladvana | 0:23d1f73bf130 | 795 | */ |
| vladvana | 0:23d1f73bf130 | 796 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__)) |
| vladvana | 0:23d1f73bf130 | 797 | |
| vladvana | 0:23d1f73bf130 | 798 | /** |
| vladvana | 0:23d1f73bf130 | 799 | * @brief Get the specified FLASH flag status. |
| vladvana | 0:23d1f73bf130 | 800 | * @param __FLAG__: specifies the FLASH flag to check. |
| vladvana | 0:23d1f73bf130 | 801 | * This parameter can be one of the following values: |
| vladvana | 0:23d1f73bf130 | 802 | * @arg FLASH_FLAG_EOP : FLASH End of Operation flag |
| vladvana | 0:23d1f73bf130 | 803 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag |
| vladvana | 0:23d1f73bf130 | 804 | * @arg FLASH_FLAG_PGERR : FLASH Programming error flag |
| vladvana | 0:23d1f73bf130 | 805 | * @arg FLASH_FLAG_BSY : FLASH Busy flag |
| vladvana | 0:23d1f73bf130 | 806 | * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match |
| vladvana | 0:23d1f73bf130 | 807 | * @retval The new state of __FLAG__ (SET or RESET). |
| vladvana | 0:23d1f73bf130 | 808 | */ |
| vladvana | 0:23d1f73bf130 | 809 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ |
| vladvana | 0:23d1f73bf130 | 810 | (FLASH->OBR & FLASH_OBR_OPTERR) : \ |
| vladvana | 0:23d1f73bf130 | 811 | (FLASH->SR & (__FLAG__))) |
| vladvana | 0:23d1f73bf130 | 812 | /** |
| vladvana | 0:23d1f73bf130 | 813 | * @brief Clear the specified FLASH flag. |
| vladvana | 0:23d1f73bf130 | 814 | * @param __FLAG__: specifies the FLASH flags to clear. |
| vladvana | 0:23d1f73bf130 | 815 | * This parameter can be any combination of the following values: |
| vladvana | 0:23d1f73bf130 | 816 | * @arg FLASH_FLAG_EOP : FLASH End of Operation flag |
| vladvana | 0:23d1f73bf130 | 817 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag |
| vladvana | 0:23d1f73bf130 | 818 | * @arg FLASH_FLAG_PGERR : FLASH Programming error flag |
| vladvana | 0:23d1f73bf130 | 819 | * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match |
| vladvana | 0:23d1f73bf130 | 820 | * @retval none |
| vladvana | 0:23d1f73bf130 | 821 | */ |
| vladvana | 0:23d1f73bf130 | 822 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ |
| vladvana | 0:23d1f73bf130 | 823 | /* Clear FLASH_FLAG_OPTVERR flag */ \ |
| vladvana | 0:23d1f73bf130 | 824 | if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ |
| vladvana | 0:23d1f73bf130 | 825 | { \ |
| vladvana | 0:23d1f73bf130 | 826 | CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ |
| vladvana | 0:23d1f73bf130 | 827 | } \ |
| vladvana | 0:23d1f73bf130 | 828 | else { \ |
| vladvana | 0:23d1f73bf130 | 829 | /* Clear Flag in Bank1 */ \ |
| vladvana | 0:23d1f73bf130 | 830 | FLASH->SR = (__FLAG__); \ |
| vladvana | 0:23d1f73bf130 | 831 | } \ |
| vladvana | 0:23d1f73bf130 | 832 | } while(0) |
| vladvana | 0:23d1f73bf130 | 833 | |
| vladvana | 0:23d1f73bf130 | 834 | #endif |
| vladvana | 0:23d1f73bf130 | 835 | |
| vladvana | 0:23d1f73bf130 | 836 | /** |
| vladvana | 0:23d1f73bf130 | 837 | * @} |
| vladvana | 0:23d1f73bf130 | 838 | */ |
| vladvana | 0:23d1f73bf130 | 839 | |
| vladvana | 0:23d1f73bf130 | 840 | /** |
| vladvana | 0:23d1f73bf130 | 841 | * @} |
| vladvana | 0:23d1f73bf130 | 842 | */ |
| vladvana | 0:23d1f73bf130 | 843 | |
| vladvana | 0:23d1f73bf130 | 844 | /* Exported functions --------------------------------------------------------*/ |
| vladvana | 0:23d1f73bf130 | 845 | /** @addtogroup FLASHEx_Exported_Functions |
| vladvana | 0:23d1f73bf130 | 846 | * @{ |
| vladvana | 0:23d1f73bf130 | 847 | */ |
| vladvana | 0:23d1f73bf130 | 848 | |
| vladvana | 0:23d1f73bf130 | 849 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
| vladvana | 0:23d1f73bf130 | 850 | * @{ |
| vladvana | 0:23d1f73bf130 | 851 | */ |
| vladvana | 0:23d1f73bf130 | 852 | /* IO operation functions *****************************************************/ |
| vladvana | 0:23d1f73bf130 | 853 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
| vladvana | 0:23d1f73bf130 | 854 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
| vladvana | 0:23d1f73bf130 | 855 | |
| vladvana | 0:23d1f73bf130 | 856 | /** |
| vladvana | 0:23d1f73bf130 | 857 | * @} |
| vladvana | 0:23d1f73bf130 | 858 | */ |
| vladvana | 0:23d1f73bf130 | 859 | |
| vladvana | 0:23d1f73bf130 | 860 | /** @addtogroup FLASHEx_Exported_Functions_Group2 |
| vladvana | 0:23d1f73bf130 | 861 | * @{ |
| vladvana | 0:23d1f73bf130 | 862 | */ |
| vladvana | 0:23d1f73bf130 | 863 | /* Peripheral Control functions ***********************************************/ |
| vladvana | 0:23d1f73bf130 | 864 | HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); |
| vladvana | 0:23d1f73bf130 | 865 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
| vladvana | 0:23d1f73bf130 | 866 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
| vladvana | 0:23d1f73bf130 | 867 | |
| vladvana | 0:23d1f73bf130 | 868 | /** |
| vladvana | 0:23d1f73bf130 | 869 | * @} |
| vladvana | 0:23d1f73bf130 | 870 | */ |
| vladvana | 0:23d1f73bf130 | 871 | |
| vladvana | 0:23d1f73bf130 | 872 | /** |
| vladvana | 0:23d1f73bf130 | 873 | * @} |
| vladvana | 0:23d1f73bf130 | 874 | */ |
| vladvana | 0:23d1f73bf130 | 875 | |
| vladvana | 0:23d1f73bf130 | 876 | /** |
| vladvana | 0:23d1f73bf130 | 877 | * @} |
| vladvana | 0:23d1f73bf130 | 878 | */ |
| vladvana | 0:23d1f73bf130 | 879 | |
| vladvana | 0:23d1f73bf130 | 880 | /** |
| vladvana | 0:23d1f73bf130 | 881 | * @} |
| vladvana | 0:23d1f73bf130 | 882 | */ |
| vladvana | 0:23d1f73bf130 | 883 | #ifdef __cplusplus |
| vladvana | 0:23d1f73bf130 | 884 | } |
| vladvana | 0:23d1f73bf130 | 885 | #endif |
| vladvana | 0:23d1f73bf130 | 886 | |
| vladvana | 0:23d1f73bf130 | 887 | #endif /* __STM32F1xx_HAL_FLASH_EX_H */ |
| vladvana | 0:23d1f73bf130 | 888 | |
| vladvana | 0:23d1f73bf130 | 889 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |