Vladimir Vana / mbed

pro vyuku PSS v Jecne

TARGET_NUCLEO_F103RB/stm32f1xx_hal_dma_ex.h@0:23d1f73bf130, 2017-09-24 (annotated)

Committer:
vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
Revision:
0:23d1f73bf130
podklady pro cviceni z PSS

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vladvana 0:23d1f73bf130 1 /**
vladvana 0:23d1f73bf130 2 ******************************************************************************
vladvana 0:23d1f73bf130 3 * @file stm32f1xx_hal_dma_ex.h
vladvana 0:23d1f73bf130 4 * @author MCD Application Team
vladvana 0:23d1f73bf130 5 * @version V1.0.0
vladvana 0:23d1f73bf130 6 * @date 15-December-2014
vladvana 0:23d1f73bf130 7 * @brief Header file of DMA HAL Extension module.
vladvana 0:23d1f73bf130 8 ******************************************************************************
vladvana 0:23d1f73bf130 9 * @attention
vladvana 0:23d1f73bf130 10 *
vladvana 0:23d1f73bf130 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
vladvana 0:23d1f73bf130 12 *
vladvana 0:23d1f73bf130 13 * Redistribution and use in source and binary forms, with or without modification,
vladvana 0:23d1f73bf130 14 * are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 * 1. Redistributions of source code must retain the above copyright notice,
vladvana 0:23d1f73bf130 16 * this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
vladvana 0:23d1f73bf130 18 * this list of conditions and the following disclaimer in the documentation
vladvana 0:23d1f73bf130 19 * and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vladvana 0:23d1f73bf130 21 * may be used to endorse or promote products derived from this software
vladvana 0:23d1f73bf130 22 * without specific prior written permission.
vladvana 0:23d1f73bf130 23 *
vladvana 0:23d1f73bf130 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vladvana 0:23d1f73bf130 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vladvana 0:23d1f73bf130 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vladvana 0:23d1f73bf130 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vladvana 0:23d1f73bf130 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vladvana 0:23d1f73bf130 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vladvana 0:23d1f73bf130 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vladvana 0:23d1f73bf130 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 34 *
vladvana 0:23d1f73bf130 35 ******************************************************************************
vladvana 0:23d1f73bf130 36 */
vladvana 0:23d1f73bf130 37
vladvana 0:23d1f73bf130 38 /* Define to prevent recursive inclusion -------------------------------------*/
vladvana 0:23d1f73bf130 39 #ifndef __STM32F1xx_HAL_DMA_EX_H
vladvana 0:23d1f73bf130 40 #define __STM32F1xx_HAL_DMA_EX_H
vladvana 0:23d1f73bf130 41
vladvana 0:23d1f73bf130 42 #ifdef __cplusplus
vladvana 0:23d1f73bf130 43 extern "C" {
vladvana 0:23d1f73bf130 44 #endif
vladvana 0:23d1f73bf130 45
vladvana 0:23d1f73bf130 46 /* Includes ------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 47 #include "stm32f1xx_hal_def.h"
vladvana 0:23d1f73bf130 48
vladvana 0:23d1f73bf130 49 /** @addtogroup STM32F1xx_HAL_Driver
vladvana 0:23d1f73bf130 50 * @{
vladvana 0:23d1f73bf130 51 */
vladvana 0:23d1f73bf130 52
vladvana 0:23d1f73bf130 53 /** @defgroup DMAEx DMAEx
vladvana 0:23d1f73bf130 54 * @{
vladvana 0:23d1f73bf130 55 */
vladvana 0:23d1f73bf130 56
vladvana 0:23d1f73bf130 57 /* Exported types ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 58 /* Exported constants --------------------------------------------------------*/
vladvana 0:23d1f73bf130 59 /* Exported macro ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 60 /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
vladvana 0:23d1f73bf130 61 * @{
vladvana 0:23d1f73bf130 62 */
vladvana 0:23d1f73bf130 63 /* Interrupt & Flag management */
vladvana 0:23d1f73bf130 64
vladvana 0:23d1f73bf130 65 /**
vladvana 0:23d1f73bf130 66 * @brief Returns the current DMA Channel transfer complete flag.
vladvana 0:23d1f73bf130 67 * @param __HANDLE__: DMA handle
vladvana 0:23d1f73bf130 68 * @retval The specified transfer complete flag index.
vladvana 0:23d1f73bf130 69 */
vladvana 0:23d1f73bf130 70
vladvana 0:23d1f73bf130 71 #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
vladvana 0:23d1f73bf130 72 defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
vladvana 0:23d1f73bf130 73 /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
vladvana 0:23d1f73bf130 74 * @{
vladvana 0:23d1f73bf130 75 */
vladvana 0:23d1f73bf130 76 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
vladvana 0:23d1f73bf130 77 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
vladvana 0:23d1f73bf130 78 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
vladvana 0:23d1f73bf130 79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
vladvana 0:23d1f73bf130 80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
vladvana 0:23d1f73bf130 81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
vladvana 0:23d1f73bf130 82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
vladvana 0:23d1f73bf130 83 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
vladvana 0:23d1f73bf130 84 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
vladvana 0:23d1f73bf130 85 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
vladvana 0:23d1f73bf130 86 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
vladvana 0:23d1f73bf130 87 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
vladvana 0:23d1f73bf130 88 DMA_FLAG_TC5)
vladvana 0:23d1f73bf130 89
vladvana 0:23d1f73bf130 90 /**
vladvana 0:23d1f73bf130 91 * @brief Returns the current DMA Channel half transfer complete flag.
vladvana 0:23d1f73bf130 92 * @param __HANDLE__: DMA handle
vladvana 0:23d1f73bf130 93 * @retval The specified half transfer complete flag index.
vladvana 0:23d1f73bf130 94 */
vladvana 0:23d1f73bf130 95 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
vladvana 0:23d1f73bf130 96 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
vladvana 0:23d1f73bf130 97 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
vladvana 0:23d1f73bf130 98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
vladvana 0:23d1f73bf130 99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
vladvana 0:23d1f73bf130 100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
vladvana 0:23d1f73bf130 101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
vladvana 0:23d1f73bf130 102 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
vladvana 0:23d1f73bf130 103 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
vladvana 0:23d1f73bf130 104 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
vladvana 0:23d1f73bf130 105 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
vladvana 0:23d1f73bf130 106 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
vladvana 0:23d1f73bf130 107 DMA_FLAG_HT5)
vladvana 0:23d1f73bf130 108
vladvana 0:23d1f73bf130 109 /**
vladvana 0:23d1f73bf130 110 * @brief Returns the current DMA Channel transfer error flag.
vladvana 0:23d1f73bf130 111 * @param __HANDLE__: DMA handle
vladvana 0:23d1f73bf130 112 * @retval The specified transfer error flag index.
vladvana 0:23d1f73bf130 113 */
vladvana 0:23d1f73bf130 114 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
vladvana 0:23d1f73bf130 115 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
vladvana 0:23d1f73bf130 116 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
vladvana 0:23d1f73bf130 117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
vladvana 0:23d1f73bf130 118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
vladvana 0:23d1f73bf130 119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
vladvana 0:23d1f73bf130 120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
vladvana 0:23d1f73bf130 121 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
vladvana 0:23d1f73bf130 122 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
vladvana 0:23d1f73bf130 123 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
vladvana 0:23d1f73bf130 124 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
vladvana 0:23d1f73bf130 125 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
vladvana 0:23d1f73bf130 126 DMA_FLAG_TE5)
vladvana 0:23d1f73bf130 127
vladvana 0:23d1f73bf130 128 /**
vladvana 0:23d1f73bf130 129 * @brief Get the DMA Channel pending flags.
vladvana 0:23d1f73bf130 130 * @param __HANDLE__: DMA handle
vladvana 0:23d1f73bf130 131 * @param __FLAG__: Get the specified flag.
vladvana 0:23d1f73bf130 132 * This parameter can be any combination of the following values:
vladvana 0:23d1f73bf130 133 * @arg DMA_FLAG_TCx: Transfer complete flag
vladvana 0:23d1f73bf130 134 * @arg DMA_FLAG_HTx: Half transfer complete flag
vladvana 0:23d1f73bf130 135 * @arg DMA_FLAG_TEx: Transfer error flag
vladvana 0:23d1f73bf130 136 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
vladvana 0:23d1f73bf130 137 * @retval The state of FLAG (SET or RESET).
vladvana 0:23d1f73bf130 138 */
vladvana 0:23d1f73bf130 139
vladvana 0:23d1f73bf130 140 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
vladvana 0:23d1f73bf130 141 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
vladvana 0:23d1f73bf130 142 (DMA1->ISR & (__FLAG__)))
vladvana 0:23d1f73bf130 143
vladvana 0:23d1f73bf130 144 /**
vladvana 0:23d1f73bf130 145 * @brief Clears the DMA Channel pending flags.
vladvana 0:23d1f73bf130 146 * @param __HANDLE__: DMA handle
vladvana 0:23d1f73bf130 147 * @param __FLAG__: specifies the flag to clear.
vladvana 0:23d1f73bf130 148 * This parameter can be any combination of the following values:
vladvana 0:23d1f73bf130 149 * @arg DMA_FLAG_TCx: Transfer complete flag
vladvana 0:23d1f73bf130 150 * @arg DMA_FLAG_HTx: Half transfer complete flag
vladvana 0:23d1f73bf130 151 * @arg DMA_FLAG_TEx: Transfer error flag
vladvana 0:23d1f73bf130 152 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
vladvana 0:23d1f73bf130 153 * @retval None
vladvana 0:23d1f73bf130 154 */
vladvana 0:23d1f73bf130 155 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
vladvana 0:23d1f73bf130 156 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
vladvana 0:23d1f73bf130 157 (DMA1->IFCR = (__FLAG__)))
vladvana 0:23d1f73bf130 158
vladvana 0:23d1f73bf130 159 /**
vladvana 0:23d1f73bf130 160 * @}
vladvana 0:23d1f73bf130 161 */
vladvana 0:23d1f73bf130 162
vladvana 0:23d1f73bf130 163 #else
vladvana 0:23d1f73bf130 164
vladvana 0:23d1f73bf130 165 /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
vladvana 0:23d1f73bf130 166 * @{
vladvana 0:23d1f73bf130 167 */
vladvana 0:23d1f73bf130 168 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
vladvana 0:23d1f73bf130 169 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
vladvana 0:23d1f73bf130 170 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
vladvana 0:23d1f73bf130 171 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
vladvana 0:23d1f73bf130 172 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
vladvana 0:23d1f73bf130 173 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
vladvana 0:23d1f73bf130 174 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
vladvana 0:23d1f73bf130 175 DMA_FLAG_TC7)
vladvana 0:23d1f73bf130 176
vladvana 0:23d1f73bf130 177 /**
vladvana 0:23d1f73bf130 178 * @brief Returns the current DMA Channel half transfer complete flag.
vladvana 0:23d1f73bf130 179 * @param __HANDLE__: DMA handle
vladvana 0:23d1f73bf130 180 * @retval The specified half transfer complete flag index.
vladvana 0:23d1f73bf130 181 */
vladvana 0:23d1f73bf130 182 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
vladvana 0:23d1f73bf130 183 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
vladvana 0:23d1f73bf130 184 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
vladvana 0:23d1f73bf130 185 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
vladvana 0:23d1f73bf130 186 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
vladvana 0:23d1f73bf130 187 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
vladvana 0:23d1f73bf130 188 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
vladvana 0:23d1f73bf130 189 DMA_FLAG_HT7)
vladvana 0:23d1f73bf130 190
vladvana 0:23d1f73bf130 191 /**
vladvana 0:23d1f73bf130 192 * @brief Returns the current DMA Channel transfer error flag.
vladvana 0:23d1f73bf130 193 * @param __HANDLE__: DMA handle
vladvana 0:23d1f73bf130 194 * @retval The specified transfer error flag index.
vladvana 0:23d1f73bf130 195 */
vladvana 0:23d1f73bf130 196 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
vladvana 0:23d1f73bf130 197 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
vladvana 0:23d1f73bf130 198 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
vladvana 0:23d1f73bf130 199 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
vladvana 0:23d1f73bf130 200 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
vladvana 0:23d1f73bf130 201 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
vladvana 0:23d1f73bf130 202 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
vladvana 0:23d1f73bf130 203 DMA_FLAG_TE7)
vladvana 0:23d1f73bf130 204
vladvana 0:23d1f73bf130 205 /**
vladvana 0:23d1f73bf130 206 * @brief Get the DMA Channel pending flags.
vladvana 0:23d1f73bf130 207 * @param __HANDLE__: DMA handle
vladvana 0:23d1f73bf130 208 * @param __FLAG__: Get the specified flag.
vladvana 0:23d1f73bf130 209 * This parameter can be any combination of the following values:
vladvana 0:23d1f73bf130 210 * @arg DMA_FLAG_TCx: Transfer complete flag
vladvana 0:23d1f73bf130 211 * @arg DMA_FLAG_HTx: Half transfer complete flag
vladvana 0:23d1f73bf130 212 * @arg DMA_FLAG_TEx: Transfer error flag
vladvana 0:23d1f73bf130 213 * Where x can be 1_7 to select the DMA Channel flag.
vladvana 0:23d1f73bf130 214 * @retval The state of FLAG (SET or RESET).
vladvana 0:23d1f73bf130 215 */
vladvana 0:23d1f73bf130 216
vladvana 0:23d1f73bf130 217 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
vladvana 0:23d1f73bf130 218
vladvana 0:23d1f73bf130 219 /**
vladvana 0:23d1f73bf130 220 * @brief Clears the DMA Channel pending flags.
vladvana 0:23d1f73bf130 221 * @param __HANDLE__: DMA handle
vladvana 0:23d1f73bf130 222 * @param __FLAG__: specifies the flag to clear.
vladvana 0:23d1f73bf130 223 * This parameter can be any combination of the following values:
vladvana 0:23d1f73bf130 224 * @arg DMA_FLAG_TCx: Transfer complete flag
vladvana 0:23d1f73bf130 225 * @arg DMA_FLAG_HTx: Half transfer complete flag
vladvana 0:23d1f73bf130 226 * @arg DMA_FLAG_TEx: Transfer error flag
vladvana 0:23d1f73bf130 227 * Where x can be 1_7 to select the DMA Channel flag.
vladvana 0:23d1f73bf130 228 * @retval None
vladvana 0:23d1f73bf130 229 */
vladvana 0:23d1f73bf130 230 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
vladvana 0:23d1f73bf130 231
vladvana 0:23d1f73bf130 232 /**
vladvana 0:23d1f73bf130 233 * @}
vladvana 0:23d1f73bf130 234 */
vladvana 0:23d1f73bf130 235
vladvana 0:23d1f73bf130 236 #endif
vladvana 0:23d1f73bf130 237
vladvana 0:23d1f73bf130 238 /**
vladvana 0:23d1f73bf130 239 * @}
vladvana 0:23d1f73bf130 240 */
vladvana 0:23d1f73bf130 241
vladvana 0:23d1f73bf130 242 /**
vladvana 0:23d1f73bf130 243 * @}
vladvana 0:23d1f73bf130 244 */
vladvana 0:23d1f73bf130 245
vladvana 0:23d1f73bf130 246 /**
vladvana 0:23d1f73bf130 247 * @}
vladvana 0:23d1f73bf130 248 */
vladvana 0:23d1f73bf130 249
vladvana 0:23d1f73bf130 250 #ifdef __cplusplus
vladvana 0:23d1f73bf130 251 }
vladvana 0:23d1f73bf130 252 #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
vladvana 0:23d1f73bf130 253 /* STM32F103xG || STM32F105xC || STM32F107xC */
vladvana 0:23d1f73bf130 254
vladvana 0:23d1f73bf130 255 #endif /* __STM32F1xx_HAL_DMA_H */
vladvana 0:23d1f73bf130 256
vladvana 0:23d1f73bf130 257 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/