Vladimir Vana / mbed

pro vyuku PSS v Jecne

TARGET_NUCLEO_F103RB/stm32f1xx_hal_dac.h@0:23d1f73bf130, 2017-09-24 (annotated)

Committer:
vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
Revision:
0:23d1f73bf130
podklady pro cviceni z PSS

Who changed what in which revision?

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vladvana 0:23d1f73bf130 1 /**
vladvana 0:23d1f73bf130 2 ******************************************************************************
vladvana 0:23d1f73bf130 3 * @file stm32f1xx_hal_dac.h
vladvana 0:23d1f73bf130 4 * @author MCD Application Team
vladvana 0:23d1f73bf130 5 * @version V1.0.0
vladvana 0:23d1f73bf130 6 * @date 15-December-2014
vladvana 0:23d1f73bf130 7 * @brief Header file of DAC HAL module.
vladvana 0:23d1f73bf130 8 ******************************************************************************
vladvana 0:23d1f73bf130 9 * @attention
vladvana 0:23d1f73bf130 10 *
vladvana 0:23d1f73bf130 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
vladvana 0:23d1f73bf130 12 *
vladvana 0:23d1f73bf130 13 * Redistribution and use in source and binary forms, with or without modification,
vladvana 0:23d1f73bf130 14 * are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 * 1. Redistributions of source code must retain the above copyright notice,
vladvana 0:23d1f73bf130 16 * this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
vladvana 0:23d1f73bf130 18 * this list of conditions and the following disclaimer in the documentation
vladvana 0:23d1f73bf130 19 * and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vladvana 0:23d1f73bf130 21 * may be used to endorse or promote products derived from this software
vladvana 0:23d1f73bf130 22 * without specific prior written permission.
vladvana 0:23d1f73bf130 23 *
vladvana 0:23d1f73bf130 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vladvana 0:23d1f73bf130 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vladvana 0:23d1f73bf130 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vladvana 0:23d1f73bf130 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vladvana 0:23d1f73bf130 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vladvana 0:23d1f73bf130 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vladvana 0:23d1f73bf130 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vladvana 0:23d1f73bf130 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 34 *
vladvana 0:23d1f73bf130 35 ******************************************************************************
vladvana 0:23d1f73bf130 36 */
vladvana 0:23d1f73bf130 37
vladvana 0:23d1f73bf130 38 /* Define to prevent recursive inclusion -------------------------------------*/
vladvana 0:23d1f73bf130 39 #ifndef __STM32F1xx_HAL_DAC_H
vladvana 0:23d1f73bf130 40 #define __STM32F1xx_HAL_DAC_H
vladvana 0:23d1f73bf130 41
vladvana 0:23d1f73bf130 42 #ifdef __cplusplus
vladvana 0:23d1f73bf130 43 extern "C" {
vladvana 0:23d1f73bf130 44 #endif
vladvana 0:23d1f73bf130 45
vladvana 0:23d1f73bf130 46 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
vladvana 0:23d1f73bf130 47
vladvana 0:23d1f73bf130 48 /* Includes ------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 49 #include "stm32f1xx_hal_def.h"
vladvana 0:23d1f73bf130 50
vladvana 0:23d1f73bf130 51 /** @addtogroup STM32F1xx_HAL_Driver
vladvana 0:23d1f73bf130 52 * @{
vladvana 0:23d1f73bf130 53 */
vladvana 0:23d1f73bf130 54
vladvana 0:23d1f73bf130 55 /** @addtogroup DAC
vladvana 0:23d1f73bf130 56 * @{
vladvana 0:23d1f73bf130 57 */
vladvana 0:23d1f73bf130 58
vladvana 0:23d1f73bf130 59 /* Exported types ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 60
vladvana 0:23d1f73bf130 61 /** @defgroup DAC_Exported_Types DAC Exported Types
vladvana 0:23d1f73bf130 62 * @{
vladvana 0:23d1f73bf130 63 */
vladvana 0:23d1f73bf130 64
vladvana 0:23d1f73bf130 65 /**
vladvana 0:23d1f73bf130 66 * @brief HAL State structures definition
vladvana 0:23d1f73bf130 67 */
vladvana 0:23d1f73bf130 68 typedef enum
vladvana 0:23d1f73bf130 69 {
vladvana 0:23d1f73bf130 70 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
vladvana 0:23d1f73bf130 71 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
vladvana 0:23d1f73bf130 72 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
vladvana 0:23d1f73bf130 73 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
vladvana 0:23d1f73bf130 74 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
vladvana 0:23d1f73bf130 75
vladvana 0:23d1f73bf130 76 }HAL_DAC_StateTypeDef;
vladvana 0:23d1f73bf130 77
vladvana 0:23d1f73bf130 78 /**
vladvana 0:23d1f73bf130 79 * @brief DAC handle Structure definition
vladvana 0:23d1f73bf130 80 */
vladvana 0:23d1f73bf130 81 typedef struct
vladvana 0:23d1f73bf130 82 {
vladvana 0:23d1f73bf130 83 DAC_TypeDef *Instance; /*!< Register base address */
vladvana 0:23d1f73bf130 84
vladvana 0:23d1f73bf130 85 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
vladvana 0:23d1f73bf130 86
vladvana 0:23d1f73bf130 87 HAL_LockTypeDef Lock; /*!< DAC locking object */
vladvana 0:23d1f73bf130 88
vladvana 0:23d1f73bf130 89 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
vladvana 0:23d1f73bf130 90
vladvana 0:23d1f73bf130 91 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
vladvana 0:23d1f73bf130 92
vladvana 0:23d1f73bf130 93 __IO uint32_t ErrorCode; /*!< DAC Error code */
vladvana 0:23d1f73bf130 94
vladvana 0:23d1f73bf130 95 }DAC_HandleTypeDef;
vladvana 0:23d1f73bf130 96
vladvana 0:23d1f73bf130 97 /**
vladvana 0:23d1f73bf130 98 * @brief DAC Configuration regular Channel structure definition
vladvana 0:23d1f73bf130 99 */
vladvana 0:23d1f73bf130 100 typedef struct
vladvana 0:23d1f73bf130 101 {
vladvana 0:23d1f73bf130 102 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
vladvana 0:23d1f73bf130 103 This parameter can be a value of @ref DACEx_trigger_selection
vladvana 0:23d1f73bf130 104 Note: For STM32F100x high-density value line devices, additional trigger sources are available. */
vladvana 0:23d1f73bf130 105
vladvana 0:23d1f73bf130 106 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
vladvana 0:23d1f73bf130 107 This parameter can be a value of @ref DAC_output_buffer */
vladvana 0:23d1f73bf130 108
vladvana 0:23d1f73bf130 109 }DAC_ChannelConfTypeDef;
vladvana 0:23d1f73bf130 110
vladvana 0:23d1f73bf130 111 /**
vladvana 0:23d1f73bf130 112 * @}
vladvana 0:23d1f73bf130 113 */
vladvana 0:23d1f73bf130 114
vladvana 0:23d1f73bf130 115 /* Exported constants --------------------------------------------------------*/
vladvana 0:23d1f73bf130 116
vladvana 0:23d1f73bf130 117 /** @defgroup DAC_Exported_Constants DAC Exported Constants
vladvana 0:23d1f73bf130 118 * @{
vladvana 0:23d1f73bf130 119 */
vladvana 0:23d1f73bf130 120
vladvana 0:23d1f73bf130 121 /** @defgroup DAC_Error_Code DAC Error Code
vladvana 0:23d1f73bf130 122 * @{
vladvana 0:23d1f73bf130 123 */
vladvana 0:23d1f73bf130 124 #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
vladvana 0:23d1f73bf130 125 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DMA underrun error */
vladvana 0:23d1f73bf130 126 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DMA underrun error */
vladvana 0:23d1f73bf130 127 #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
vladvana 0:23d1f73bf130 128 /**
vladvana 0:23d1f73bf130 129 * @}
vladvana 0:23d1f73bf130 130 */
vladvana 0:23d1f73bf130 131
vladvana 0:23d1f73bf130 132 /** @defgroup DAC_output_buffer DAC output buffer
vladvana 0:23d1f73bf130 133 * @{
vladvana 0:23d1f73bf130 134 */
vladvana 0:23d1f73bf130 135 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
vladvana 0:23d1f73bf130 136 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
vladvana 0:23d1f73bf130 137
vladvana 0:23d1f73bf130 138 /**
vladvana 0:23d1f73bf130 139 * @}
vladvana 0:23d1f73bf130 140 */
vladvana 0:23d1f73bf130 141
vladvana 0:23d1f73bf130 142 /** @defgroup DAC_Channel_selection DAC Channel selection
vladvana 0:23d1f73bf130 143 * @{
vladvana 0:23d1f73bf130 144 */
vladvana 0:23d1f73bf130 145 #define DAC_CHANNEL_1 ((uint32_t)0x00000000)
vladvana 0:23d1f73bf130 146 #define DAC_CHANNEL_2 ((uint32_t)0x00000010)
vladvana 0:23d1f73bf130 147
vladvana 0:23d1f73bf130 148 /**
vladvana 0:23d1f73bf130 149 * @}
vladvana 0:23d1f73bf130 150 */
vladvana 0:23d1f73bf130 151
vladvana 0:23d1f73bf130 152 /** @defgroup DAC_data_alignement DAC data alignement
vladvana 0:23d1f73bf130 153 * @{
vladvana 0:23d1f73bf130 154 */
vladvana 0:23d1f73bf130 155 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
vladvana 0:23d1f73bf130 156 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
vladvana 0:23d1f73bf130 157 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
vladvana 0:23d1f73bf130 158
vladvana 0:23d1f73bf130 159 /**
vladvana 0:23d1f73bf130 160 * @}
vladvana 0:23d1f73bf130 161 */
vladvana 0:23d1f73bf130 162
vladvana 0:23d1f73bf130 163 /**
vladvana 0:23d1f73bf130 164 * @}
vladvana 0:23d1f73bf130 165 */
vladvana 0:23d1f73bf130 166
vladvana 0:23d1f73bf130 167 /* Exported macro ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 168
vladvana 0:23d1f73bf130 169 /** @defgroup DAC_Exported_Macros DAC Exported Macros
vladvana 0:23d1f73bf130 170 * @{
vladvana 0:23d1f73bf130 171 */
vladvana 0:23d1f73bf130 172
vladvana 0:23d1f73bf130 173 /** @brief Reset DAC handle state
vladvana 0:23d1f73bf130 174 * @param __HANDLE__: specifies the DAC handle.
vladvana 0:23d1f73bf130 175 * @retval None
vladvana 0:23d1f73bf130 176 */
vladvana 0:23d1f73bf130 177 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
vladvana 0:23d1f73bf130 178
vladvana 0:23d1f73bf130 179 /** @brief Enable the DAC channel
vladvana 0:23d1f73bf130 180 * @param __HANDLE__: specifies the DAC handle.
vladvana 0:23d1f73bf130 181 * @param __DAC_Channel__: specifies the DAC channel
vladvana 0:23d1f73bf130 182 * @retval None
vladvana 0:23d1f73bf130 183 */
vladvana 0:23d1f73bf130 184 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
vladvana 0:23d1f73bf130 185 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
vladvana 0:23d1f73bf130 186
vladvana 0:23d1f73bf130 187 /** @brief Disable the DAC channel
vladvana 0:23d1f73bf130 188 * @param __HANDLE__: specifies the DAC handle
vladvana 0:23d1f73bf130 189 * @param __DAC_Channel__: specifies the DAC channel.
vladvana 0:23d1f73bf130 190 * @retval None
vladvana 0:23d1f73bf130 191 */
vladvana 0:23d1f73bf130 192 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
vladvana 0:23d1f73bf130 193 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
vladvana 0:23d1f73bf130 194
vladvana 0:23d1f73bf130 195
vladvana 0:23d1f73bf130 196 /**
vladvana 0:23d1f73bf130 197 * @}
vladvana 0:23d1f73bf130 198 */
vladvana 0:23d1f73bf130 199
vladvana 0:23d1f73bf130 200 /* Private macro -------------------------------------------------------------*/
vladvana 0:23d1f73bf130 201
vladvana 0:23d1f73bf130 202 /** @defgroup DAC_Private_Macros DAC Private Macros
vladvana 0:23d1f73bf130 203 * @{
vladvana 0:23d1f73bf130 204 */
vladvana 0:23d1f73bf130 205 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
vladvana 0:23d1f73bf130 206 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
vladvana 0:23d1f73bf130 207
vladvana 0:23d1f73bf130 208 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
vladvana 0:23d1f73bf130 209 ((CHANNEL) == DAC_CHANNEL_2))
vladvana 0:23d1f73bf130 210
vladvana 0:23d1f73bf130 211 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
vladvana 0:23d1f73bf130 212 ((ALIGN) == DAC_ALIGN_12B_L) || \
vladvana 0:23d1f73bf130 213 ((ALIGN) == DAC_ALIGN_8B_R))
vladvana 0:23d1f73bf130 214
vladvana 0:23d1f73bf130 215 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
vladvana 0:23d1f73bf130 216
vladvana 0:23d1f73bf130 217 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__))
vladvana 0:23d1f73bf130 218
vladvana 0:23d1f73bf130 219 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__))
vladvana 0:23d1f73bf130 220
vladvana 0:23d1f73bf130 221 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__))
vladvana 0:23d1f73bf130 222
vladvana 0:23d1f73bf130 223 /**
vladvana 0:23d1f73bf130 224 * @}
vladvana 0:23d1f73bf130 225 */
vladvana 0:23d1f73bf130 226
vladvana 0:23d1f73bf130 227
vladvana 0:23d1f73bf130 228 /* Include DAC HAL Extension module */
vladvana 0:23d1f73bf130 229 #include "stm32f1xx_hal_dac_ex.h"
vladvana 0:23d1f73bf130 230
vladvana 0:23d1f73bf130 231 /* Exported functions --------------------------------------------------------*/
vladvana 0:23d1f73bf130 232
vladvana 0:23d1f73bf130 233 /** @addtogroup DAC_Exported_Functions
vladvana 0:23d1f73bf130 234 * @{
vladvana 0:23d1f73bf130 235 */
vladvana 0:23d1f73bf130 236
vladvana 0:23d1f73bf130 237 /** @addtogroup DAC_Exported_Functions_Group1
vladvana 0:23d1f73bf130 238 * @{
vladvana 0:23d1f73bf130 239 */
vladvana 0:23d1f73bf130 240 /* Initialization and de-initialization functions *****************************/
vladvana 0:23d1f73bf130 241 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
vladvana 0:23d1f73bf130 242 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
vladvana 0:23d1f73bf130 243 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
vladvana 0:23d1f73bf130 244 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
vladvana 0:23d1f73bf130 245
vladvana 0:23d1f73bf130 246 /**
vladvana 0:23d1f73bf130 247 * @}
vladvana 0:23d1f73bf130 248 */
vladvana 0:23d1f73bf130 249
vladvana 0:23d1f73bf130 250 /** @addtogroup DAC_Exported_Functions_Group2
vladvana 0:23d1f73bf130 251 * @{
vladvana 0:23d1f73bf130 252 */
vladvana 0:23d1f73bf130 253 /* IO operation functions *****************************************************/
vladvana 0:23d1f73bf130 254 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
vladvana 0:23d1f73bf130 255 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
vladvana 0:23d1f73bf130 256 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
vladvana 0:23d1f73bf130 257 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
vladvana 0:23d1f73bf130 258 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
vladvana 0:23d1f73bf130 259 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
vladvana 0:23d1f73bf130 260
vladvana 0:23d1f73bf130 261 /**
vladvana 0:23d1f73bf130 262 * @}
vladvana 0:23d1f73bf130 263 */
vladvana 0:23d1f73bf130 264
vladvana 0:23d1f73bf130 265 /** @addtogroup DAC_Exported_Functions_Group3
vladvana 0:23d1f73bf130 266 * @{
vladvana 0:23d1f73bf130 267 */
vladvana 0:23d1f73bf130 268 /* Peripheral Control functions ***********************************************/
vladvana 0:23d1f73bf130 269 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
vladvana 0:23d1f73bf130 270
vladvana 0:23d1f73bf130 271 /**
vladvana 0:23d1f73bf130 272 * @}
vladvana 0:23d1f73bf130 273 */
vladvana 0:23d1f73bf130 274
vladvana 0:23d1f73bf130 275 /** @addtogroup DAC_Exported_Functions_Group4
vladvana 0:23d1f73bf130 276 * @{
vladvana 0:23d1f73bf130 277 */
vladvana 0:23d1f73bf130 278 /* Peripheral State functions *************************************************/
vladvana 0:23d1f73bf130 279 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
vladvana 0:23d1f73bf130 280 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
vladvana 0:23d1f73bf130 281
vladvana 0:23d1f73bf130 282 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
vladvana 0:23d1f73bf130 283 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
vladvana 0:23d1f73bf130 284 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
vladvana 0:23d1f73bf130 285
vladvana 0:23d1f73bf130 286
vladvana 0:23d1f73bf130 287 /**
vladvana 0:23d1f73bf130 288 * @}
vladvana 0:23d1f73bf130 289 */
vladvana 0:23d1f73bf130 290
vladvana 0:23d1f73bf130 291 /**
vladvana 0:23d1f73bf130 292 * @}
vladvana 0:23d1f73bf130 293 */
vladvana 0:23d1f73bf130 294
vladvana 0:23d1f73bf130 295 /** @addtogroup DAC_Private_Functions DAC Private Functions
vladvana 0:23d1f73bf130 296 * @{
vladvana 0:23d1f73bf130 297 */
vladvana 0:23d1f73bf130 298 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
vladvana 0:23d1f73bf130 299 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
vladvana 0:23d1f73bf130 300 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
vladvana 0:23d1f73bf130 301
vladvana 0:23d1f73bf130 302 /**
vladvana 0:23d1f73bf130 303 * @}
vladvana 0:23d1f73bf130 304 */
vladvana 0:23d1f73bf130 305
vladvana 0:23d1f73bf130 306 /**
vladvana 0:23d1f73bf130 307 * @}
vladvana 0:23d1f73bf130 308 */
vladvana 0:23d1f73bf130 309
vladvana 0:23d1f73bf130 310 /**
vladvana 0:23d1f73bf130 311 * @}
vladvana 0:23d1f73bf130 312 */
vladvana 0:23d1f73bf130 313
vladvana 0:23d1f73bf130 314 #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
vladvana 0:23d1f73bf130 315
vladvana 0:23d1f73bf130 316 #ifdef __cplusplus
vladvana 0:23d1f73bf130 317 }
vladvana 0:23d1f73bf130 318 #endif
vladvana 0:23d1f73bf130 319
vladvana 0:23d1f73bf130 320
vladvana 0:23d1f73bf130 321 #endif /*__STM32F1xx_HAL_DAC_H */
vladvana 0:23d1f73bf130 322
vladvana 0:23d1f73bf130 323 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
vladvana 0:23d1f73bf130 324