Vladimir Vana / mbed

pro vyuku PSS v Jecne

TARGET_NUCLEO_F103RB/stm32f1xx_hal_cortex.h@0:23d1f73bf130, 2017-09-24 (annotated)

Committer:
vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
Revision:
0:23d1f73bf130
podklady pro cviceni z PSS

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vladvana 0:23d1f73bf130 1 /**
vladvana 0:23d1f73bf130 2 ******************************************************************************
vladvana 0:23d1f73bf130 3 * @file stm32f1xx_hal_cortex.h
vladvana 0:23d1f73bf130 4 * @author MCD Application Team
vladvana 0:23d1f73bf130 5 * @version V1.0.0
vladvana 0:23d1f73bf130 6 * @date 15-December-2014
vladvana 0:23d1f73bf130 7 * @brief Header file of CORTEX HAL module.
vladvana 0:23d1f73bf130 8 ******************************************************************************
vladvana 0:23d1f73bf130 9 * @attention
vladvana 0:23d1f73bf130 10 *
vladvana 0:23d1f73bf130 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
vladvana 0:23d1f73bf130 12 *
vladvana 0:23d1f73bf130 13 * Redistribution and use in source and binary forms, with or without modification,
vladvana 0:23d1f73bf130 14 * are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 * 1. Redistributions of source code must retain the above copyright notice,
vladvana 0:23d1f73bf130 16 * this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
vladvana 0:23d1f73bf130 18 * this list of conditions and the following disclaimer in the documentation
vladvana 0:23d1f73bf130 19 * and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vladvana 0:23d1f73bf130 21 * may be used to endorse or promote products derived from this software
vladvana 0:23d1f73bf130 22 * without specific prior written permission.
vladvana 0:23d1f73bf130 23 *
vladvana 0:23d1f73bf130 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vladvana 0:23d1f73bf130 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vladvana 0:23d1f73bf130 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vladvana 0:23d1f73bf130 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vladvana 0:23d1f73bf130 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vladvana 0:23d1f73bf130 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vladvana 0:23d1f73bf130 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vladvana 0:23d1f73bf130 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 34 *
vladvana 0:23d1f73bf130 35 ******************************************************************************
vladvana 0:23d1f73bf130 36 */
vladvana 0:23d1f73bf130 37
vladvana 0:23d1f73bf130 38 /* Define to prevent recursive inclusion -------------------------------------*/
vladvana 0:23d1f73bf130 39 #ifndef __STM32F1xx_HAL_CORTEX_H
vladvana 0:23d1f73bf130 40 #define __STM32F1xx_HAL_CORTEX_H
vladvana 0:23d1f73bf130 41
vladvana 0:23d1f73bf130 42 #ifdef __cplusplus
vladvana 0:23d1f73bf130 43 extern "C" {
vladvana 0:23d1f73bf130 44 #endif
vladvana 0:23d1f73bf130 45
vladvana 0:23d1f73bf130 46 /* Includes ------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 47 #include "stm32f1xx_hal_def.h"
vladvana 0:23d1f73bf130 48
vladvana 0:23d1f73bf130 49 /** @addtogroup STM32F1xx_HAL_Driver
vladvana 0:23d1f73bf130 50 * @{
vladvana 0:23d1f73bf130 51 */
vladvana 0:23d1f73bf130 52
vladvana 0:23d1f73bf130 53 /** @addtogroup CORTEX
vladvana 0:23d1f73bf130 54 * @{
vladvana 0:23d1f73bf130 55 */
vladvana 0:23d1f73bf130 56 /* Exported types ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 57 /* Exported constants --------------------------------------------------------*/
vladvana 0:23d1f73bf130 58
vladvana 0:23d1f73bf130 59 /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
vladvana 0:23d1f73bf130 60 * @{
vladvana 0:23d1f73bf130 61 */
vladvana 0:23d1f73bf130 62
vladvana 0:23d1f73bf130 63
vladvana 0:23d1f73bf130 64 /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
vladvana 0:23d1f73bf130 65 * @{
vladvana 0:23d1f73bf130 66 */
vladvana 0:23d1f73bf130 67
vladvana 0:23d1f73bf130 68 #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bits for pre-emption priority
vladvana 0:23d1f73bf130 69 4 bits for subpriority */
vladvana 0:23d1f73bf130 70 #define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bits for pre-emption priority
vladvana 0:23d1f73bf130 71 3 bits for subpriority */
vladvana 0:23d1f73bf130 72 #define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority
vladvana 0:23d1f73bf130 73 2 bits for subpriority */
vladvana 0:23d1f73bf130 74 #define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority
vladvana 0:23d1f73bf130 75 1 bits for subpriority */
vladvana 0:23d1f73bf130 76 #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority
vladvana 0:23d1f73bf130 77 0 bits for subpriority */
vladvana 0:23d1f73bf130 78 /**
vladvana 0:23d1f73bf130 79 * @}
vladvana 0:23d1f73bf130 80 */
vladvana 0:23d1f73bf130 81
vladvana 0:23d1f73bf130 82 /** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source
vladvana 0:23d1f73bf130 83 * @{
vladvana 0:23d1f73bf130 84 */
vladvana 0:23d1f73bf130 85 #define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000)
vladvana 0:23d1f73bf130 86 #define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004)
vladvana 0:23d1f73bf130 87
vladvana 0:23d1f73bf130 88 /**
vladvana 0:23d1f73bf130 89 * @}
vladvana 0:23d1f73bf130 90 */
vladvana 0:23d1f73bf130 91
vladvana 0:23d1f73bf130 92 /**
vladvana 0:23d1f73bf130 93 * @}
vladvana 0:23d1f73bf130 94 */
vladvana 0:23d1f73bf130 95
vladvana 0:23d1f73bf130 96 /* Exported Macros -----------------------------------------------------------*/
vladvana 0:23d1f73bf130 97 /** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros
vladvana 0:23d1f73bf130 98 * @{
vladvana 0:23d1f73bf130 99 */
vladvana 0:23d1f73bf130 100
vladvana 0:23d1f73bf130 101 /** @defgroup CORTEX_SysTick_clock_source_Macro_Exported CORTEX SysTick clock source
vladvana 0:23d1f73bf130 102 * @{
vladvana 0:23d1f73bf130 103 */
vladvana 0:23d1f73bf130 104
vladvana 0:23d1f73bf130 105 /** @brief Configures the SysTick clock source.
vladvana 0:23d1f73bf130 106 * @param __CLKSRC__: specifies the SysTick clock source.
vladvana 0:23d1f73bf130 107 * This parameter can be one of the following values:
vladvana 0:23d1f73bf130 108 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
vladvana 0:23d1f73bf130 109 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
vladvana 0:23d1f73bf130 110 * @retval None
vladvana 0:23d1f73bf130 111 */
vladvana 0:23d1f73bf130 112 #define __HAL_CORTEX_SYSTICKCLK_CONFIG(__CLKSRC__) \
vladvana 0:23d1f73bf130 113 do { \
vladvana 0:23d1f73bf130 114 if ((__CLKSRC__) == SYSTICK_CLKSOURCE_HCLK) \
vladvana 0:23d1f73bf130 115 { \
vladvana 0:23d1f73bf130 116 SET_BIT(SysTick->CTRL, SYSTICK_CLKSOURCE_HCLK); \
vladvana 0:23d1f73bf130 117 } \
vladvana 0:23d1f73bf130 118 else \
vladvana 0:23d1f73bf130 119 CLEAR_BIT(SysTick->CTRL, SYSTICK_CLKSOURCE_HCLK); \
vladvana 0:23d1f73bf130 120 } while(0)
vladvana 0:23d1f73bf130 121 /**
vladvana 0:23d1f73bf130 122 * @}
vladvana 0:23d1f73bf130 123 */
vladvana 0:23d1f73bf130 124
vladvana 0:23d1f73bf130 125 /**
vladvana 0:23d1f73bf130 126 * @}
vladvana 0:23d1f73bf130 127 */
vladvana 0:23d1f73bf130 128
vladvana 0:23d1f73bf130 129 /* Private macro -------------------------------------------------------------*/
vladvana 0:23d1f73bf130 130 /** @defgroup CORTEX_Private_Macros CORTEX Private Macros
vladvana 0:23d1f73bf130 131 * @{
vladvana 0:23d1f73bf130 132 */
vladvana 0:23d1f73bf130 133
vladvana 0:23d1f73bf130 134 /** @defgroup CORTEX_Preemption_Priority_Group_Macro CORTEX Preemption Priority Group
vladvana 0:23d1f73bf130 135 * @{
vladvana 0:23d1f73bf130 136 */
vladvana 0:23d1f73bf130 137 #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
vladvana 0:23d1f73bf130 138 ((GROUP) == NVIC_PRIORITYGROUP_1) || \
vladvana 0:23d1f73bf130 139 ((GROUP) == NVIC_PRIORITYGROUP_2) || \
vladvana 0:23d1f73bf130 140 ((GROUP) == NVIC_PRIORITYGROUP_3) || \
vladvana 0:23d1f73bf130 141 ((GROUP) == NVIC_PRIORITYGROUP_4))
vladvana 0:23d1f73bf130 142
vladvana 0:23d1f73bf130 143 #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
vladvana 0:23d1f73bf130 144
vladvana 0:23d1f73bf130 145 #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
vladvana 0:23d1f73bf130 146
vladvana 0:23d1f73bf130 147 #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00)
vladvana 0:23d1f73bf130 148
vladvana 0:23d1f73bf130 149 /**
vladvana 0:23d1f73bf130 150 * @}
vladvana 0:23d1f73bf130 151 */
vladvana 0:23d1f73bf130 152
vladvana 0:23d1f73bf130 153 /** @defgroup CORTEX_SysTick_clock_source_Macro_Private CORTEX SysTick clock source
vladvana 0:23d1f73bf130 154 * @{
vladvana 0:23d1f73bf130 155 */
vladvana 0:23d1f73bf130 156 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
vladvana 0:23d1f73bf130 157 ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
vladvana 0:23d1f73bf130 158 /**
vladvana 0:23d1f73bf130 159 * @}
vladvana 0:23d1f73bf130 160 */
vladvana 0:23d1f73bf130 161
vladvana 0:23d1f73bf130 162 /**
vladvana 0:23d1f73bf130 163 * @}
vladvana 0:23d1f73bf130 164 */
vladvana 0:23d1f73bf130 165
vladvana 0:23d1f73bf130 166 /* Exported functions --------------------------------------------------------*/
vladvana 0:23d1f73bf130 167
vladvana 0:23d1f73bf130 168 /** @addtogroup CORTEX_Exported_Functions
vladvana 0:23d1f73bf130 169 * @{
vladvana 0:23d1f73bf130 170 */
vladvana 0:23d1f73bf130 171
vladvana 0:23d1f73bf130 172 /** @addtogroup CORTEX_Exported_Functions_Group1
vladvana 0:23d1f73bf130 173 * @{
vladvana 0:23d1f73bf130 174 */
vladvana 0:23d1f73bf130 175 /* Initialization and de-initialization functions *****************************/
vladvana 0:23d1f73bf130 176 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
vladvana 0:23d1f73bf130 177 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
vladvana 0:23d1f73bf130 178 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
vladvana 0:23d1f73bf130 179 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
vladvana 0:23d1f73bf130 180 void HAL_NVIC_SystemReset(void);
vladvana 0:23d1f73bf130 181 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
vladvana 0:23d1f73bf130 182 /**
vladvana 0:23d1f73bf130 183 * @}
vladvana 0:23d1f73bf130 184 */
vladvana 0:23d1f73bf130 185
vladvana 0:23d1f73bf130 186 /** @addtogroup CORTEX_Exported_Functions_Group2
vladvana 0:23d1f73bf130 187 * @{
vladvana 0:23d1f73bf130 188 */
vladvana 0:23d1f73bf130 189 /* Peripheral Control functions ***********************************************/
vladvana 0:23d1f73bf130 190 uint32_t HAL_NVIC_GetPriorityGrouping(void);
vladvana 0:23d1f73bf130 191 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
vladvana 0:23d1f73bf130 192 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
vladvana 0:23d1f73bf130 193 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
vladvana 0:23d1f73bf130 194 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
vladvana 0:23d1f73bf130 195 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
vladvana 0:23d1f73bf130 196 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
vladvana 0:23d1f73bf130 197 void HAL_SYSTICK_IRQHandler(void);
vladvana 0:23d1f73bf130 198 void HAL_SYSTICK_Callback(void);
vladvana 0:23d1f73bf130 199 /**
vladvana 0:23d1f73bf130 200 * @}
vladvana 0:23d1f73bf130 201 */
vladvana 0:23d1f73bf130 202
vladvana 0:23d1f73bf130 203 /**
vladvana 0:23d1f73bf130 204 * @}
vladvana 0:23d1f73bf130 205 */
vladvana 0:23d1f73bf130 206
vladvana 0:23d1f73bf130 207 /**
vladvana 0:23d1f73bf130 208 * @}
vladvana 0:23d1f73bf130 209 */
vladvana 0:23d1f73bf130 210
vladvana 0:23d1f73bf130 211 /**
vladvana 0:23d1f73bf130 212 * @}
vladvana 0:23d1f73bf130 213 */
vladvana 0:23d1f73bf130 214
vladvana 0:23d1f73bf130 215 #ifdef __cplusplus
vladvana 0:23d1f73bf130 216 }
vladvana 0:23d1f73bf130 217 #endif
vladvana 0:23d1f73bf130 218
vladvana 0:23d1f73bf130 219 #endif /* __STM32F1xx_HAL_CORTEX_H */
vladvana 0:23d1f73bf130 220
vladvana 0:23d1f73bf130 221
vladvana 0:23d1f73bf130 222 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/