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vladvana
Date:
Sun Sep 24 12:31:52 2017 +0000
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vladvana 0:23d1f73bf130 1 /**
vladvana 0:23d1f73bf130 2 ******************************************************************************
vladvana 0:23d1f73bf130 3 * @file stm32f1xx_hal_adc_ex.h
vladvana 0:23d1f73bf130 4 * @author MCD Application Team
vladvana 0:23d1f73bf130 5 * @version V1.0.0
vladvana 0:23d1f73bf130 6 * @date 15-December-2014
vladvana 0:23d1f73bf130 7 * @brief Header file of ADC HAL extension module.
vladvana 0:23d1f73bf130 8 ******************************************************************************
vladvana 0:23d1f73bf130 9 * @attention
vladvana 0:23d1f73bf130 10 *
vladvana 0:23d1f73bf130 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
vladvana 0:23d1f73bf130 12 *
vladvana 0:23d1f73bf130 13 * Redistribution and use in source and binary forms, with or without modification,
vladvana 0:23d1f73bf130 14 * are permitted provided that the following conditions are met:
vladvana 0:23d1f73bf130 15 * 1. Redistributions of source code must retain the above copyright notice,
vladvana 0:23d1f73bf130 16 * this list of conditions and the following disclaimer.
vladvana 0:23d1f73bf130 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
vladvana 0:23d1f73bf130 18 * this list of conditions and the following disclaimer in the documentation
vladvana 0:23d1f73bf130 19 * and/or other materials provided with the distribution.
vladvana 0:23d1f73bf130 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vladvana 0:23d1f73bf130 21 * may be used to endorse or promote products derived from this software
vladvana 0:23d1f73bf130 22 * without specific prior written permission.
vladvana 0:23d1f73bf130 23 *
vladvana 0:23d1f73bf130 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vladvana 0:23d1f73bf130 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vladvana 0:23d1f73bf130 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vladvana 0:23d1f73bf130 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vladvana 0:23d1f73bf130 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vladvana 0:23d1f73bf130 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vladvana 0:23d1f73bf130 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vladvana 0:23d1f73bf130 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vladvana 0:23d1f73bf130 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vladvana 0:23d1f73bf130 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vladvana 0:23d1f73bf130 34 *
vladvana 0:23d1f73bf130 35 ******************************************************************************
vladvana 0:23d1f73bf130 36 */
vladvana 0:23d1f73bf130 37
vladvana 0:23d1f73bf130 38 /* Define to prevent recursive inclusion -------------------------------------*/
vladvana 0:23d1f73bf130 39 #ifndef __STM32F1xx_HAL_ADC_EX_H
vladvana 0:23d1f73bf130 40 #define __STM32F1xx_HAL_ADC_EX_H
vladvana 0:23d1f73bf130 41
vladvana 0:23d1f73bf130 42 #ifdef __cplusplus
vladvana 0:23d1f73bf130 43 extern "C" {
vladvana 0:23d1f73bf130 44 #endif
vladvana 0:23d1f73bf130 45
vladvana 0:23d1f73bf130 46 /* Includes ------------------------------------------------------------------*/
vladvana 0:23d1f73bf130 47 #include "stm32f1xx_hal_def.h"
vladvana 0:23d1f73bf130 48
vladvana 0:23d1f73bf130 49 /** @addtogroup STM32F1xx_HAL_Driver
vladvana 0:23d1f73bf130 50 * @{
vladvana 0:23d1f73bf130 51 */
vladvana 0:23d1f73bf130 52
vladvana 0:23d1f73bf130 53 /** @addtogroup ADCEx
vladvana 0:23d1f73bf130 54 * @{
vladvana 0:23d1f73bf130 55 */
vladvana 0:23d1f73bf130 56
vladvana 0:23d1f73bf130 57 /* Exported types ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 58 /** @defgroup ADCEx_Exported_Types ADCEx Exported Types
vladvana 0:23d1f73bf130 59 * @{
vladvana 0:23d1f73bf130 60 */
vladvana 0:23d1f73bf130 61
vladvana 0:23d1f73bf130 62 /**
vladvana 0:23d1f73bf130 63 * @brief ADC Configuration injected Channel structure definition
vladvana 0:23d1f73bf130 64 * @note Parameters of this structure are shared within 2 scopes:
vladvana 0:23d1f73bf130 65 * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
vladvana 0:23d1f73bf130 66 * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
vladvana 0:23d1f73bf130 67 * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
vladvana 0:23d1f73bf130 68 * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
vladvana 0:23d1f73bf130 69 * ADC state can be either:
vladvana 0:23d1f73bf130 70 * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
vladvana 0:23d1f73bf130 71 * - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
vladvana 0:23d1f73bf130 72 */
vladvana 0:23d1f73bf130 73 typedef struct
vladvana 0:23d1f73bf130 74 {
vladvana 0:23d1f73bf130 75 uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
vladvana 0:23d1f73bf130 76 This parameter can be a value of @ref ADC_channels
vladvana 0:23d1f73bf130 77 Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
vladvana 0:23d1f73bf130 78 Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
vladvana 0:23d1f73bf130 79 Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
vladvana 0:23d1f73bf130 80 It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
vladvana 0:23d1f73bf130 81 Refer to errata sheet of these devices for more details. */
vladvana 0:23d1f73bf130 82 uint32_t InjectedRank; /*!< Rank in the injected group sequencer
vladvana 0:23d1f73bf130 83 This parameter must be a value of @ref ADCEx_injected_rank
vladvana 0:23d1f73bf130 84 Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
vladvana 0:23d1f73bf130 85 uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
vladvana 0:23d1f73bf130 86 Unit: ADC clock cycles
vladvana 0:23d1f73bf130 87 Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
vladvana 0:23d1f73bf130 88 This parameter can be a value of @ref ADC_sampling_times
vladvana 0:23d1f73bf130 89 Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
vladvana 0:23d1f73bf130 90 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
vladvana 0:23d1f73bf130 91 Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
vladvana 0:23d1f73bf130 92 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
vladvana 0:23d1f73bf130 93 Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
vladvana 0:23d1f73bf130 94 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
vladvana 0:23d1f73bf130 95 Offset value must be a positive number.
vladvana 0:23d1f73bf130 96 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
vladvana 0:23d1f73bf130 97 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
vladvana 0:23d1f73bf130 98 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
vladvana 0:23d1f73bf130 99 To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
vladvana 0:23d1f73bf130 100 This parameter must be a number between Min_Data = 1 and Max_Data = 4.
vladvana 0:23d1f73bf130 101 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
vladvana 0:23d1f73bf130 102 configure a channel on injected group can impact the configuration of other channels previously set. */
vladvana 0:23d1f73bf130 103 uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
vladvana 0:23d1f73bf130 104 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
vladvana 0:23d1f73bf130 105 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
vladvana 0:23d1f73bf130 106 This parameter can be set to ENABLE or DISABLE.
vladvana 0:23d1f73bf130 107 Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
vladvana 0:23d1f73bf130 108 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
vladvana 0:23d1f73bf130 109 configure a channel on injected group can impact the configuration of other channels previously set. */
vladvana 0:23d1f73bf130 110 uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
vladvana 0:23d1f73bf130 111 This parameter can be set to ENABLE or DISABLE.
vladvana 0:23d1f73bf130 112 Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
vladvana 0:23d1f73bf130 113 Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
vladvana 0:23d1f73bf130 114 Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
vladvana 0:23d1f73bf130 115 To maintain JAUTO always enabled, DMA must be configured in circular mode.
vladvana 0:23d1f73bf130 116 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
vladvana 0:23d1f73bf130 117 configure a channel on injected group can impact the configuration of other channels previously set. */
vladvana 0:23d1f73bf130 118 uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
vladvana 0:23d1f73bf130 119 If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
vladvana 0:23d1f73bf130 120 If set to external trigger source, triggering is on event rising edge.
vladvana 0:23d1f73bf130 121 This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
vladvana 0:23d1f73bf130 122 Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
vladvana 0:23d1f73bf130 123 If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
vladvana 0:23d1f73bf130 124 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
vladvana 0:23d1f73bf130 125 configure a channel on injected group can impact the configuration of other channels previously set. */
vladvana 0:23d1f73bf130 126 }ADC_InjectionConfTypeDef;
vladvana 0:23d1f73bf130 127
vladvana 0:23d1f73bf130 128 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 129 /**
vladvana 0:23d1f73bf130 130 * @brief Structure definition of ADC multimode
vladvana 0:23d1f73bf130 131 * @note The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
vladvana 0:23d1f73bf130 132 * State of ADCs of the common group must be: disabled.
vladvana 0:23d1f73bf130 133 */
vladvana 0:23d1f73bf130 134 typedef struct
vladvana 0:23d1f73bf130 135 {
vladvana 0:23d1f73bf130 136 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
vladvana 0:23d1f73bf130 137 This parameter can be a value of @ref ADCEx_Common_mode
vladvana 0:23d1f73bf130 138 Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
vladvana 0:23d1f73bf130 139 Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
vladvana 0:23d1f73bf130 140 Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
vladvana 0:23d1f73bf130 141 Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
vladvana 0:23d1f73bf130 142 The equivalences are:
vladvana 0:23d1f73bf130 143 - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
vladvana 0:23d1f73bf130 144 - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
vladvana 0:23d1f73bf130 145
vladvana 0:23d1f73bf130 146
vladvana 0:23d1f73bf130 147 }ADC_MultiModeTypeDef;
vladvana 0:23d1f73bf130 148 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 149
vladvana 0:23d1f73bf130 150 /**
vladvana 0:23d1f73bf130 151 * @}
vladvana 0:23d1f73bf130 152 */
vladvana 0:23d1f73bf130 153
vladvana 0:23d1f73bf130 154
vladvana 0:23d1f73bf130 155 /* Exported constants --------------------------------------------------------*/
vladvana 0:23d1f73bf130 156
vladvana 0:23d1f73bf130 157 /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
vladvana 0:23d1f73bf130 158 * @{
vladvana 0:23d1f73bf130 159 */
vladvana 0:23d1f73bf130 160
vladvana 0:23d1f73bf130 161 /** @defgroup ADCEx_injected_rank ADCEx rank into injected group
vladvana 0:23d1f73bf130 162 * @{
vladvana 0:23d1f73bf130 163 */
vladvana 0:23d1f73bf130 164 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
vladvana 0:23d1f73bf130 165 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
vladvana 0:23d1f73bf130 166 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
vladvana 0:23d1f73bf130 167 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
vladvana 0:23d1f73bf130 168 /**
vladvana 0:23d1f73bf130 169 * @}
vladvana 0:23d1f73bf130 170 */
vladvana 0:23d1f73bf130 171
vladvana 0:23d1f73bf130 172 /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
vladvana 0:23d1f73bf130 173 * @{
vladvana 0:23d1f73bf130 174 */
vladvana 0:23d1f73bf130 175 #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE ((uint32_t)0x00000000)
vladvana 0:23d1f73bf130 176 #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTTRIG)
vladvana 0:23d1f73bf130 177 /**
vladvana 0:23d1f73bf130 178 * @}
vladvana 0:23d1f73bf130 179 */
vladvana 0:23d1f73bf130 180
vladvana 0:23d1f73bf130 181 /** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
vladvana 0:23d1f73bf130 182 * @{
vladvana 0:23d1f73bf130 183 */
vladvana 0:23d1f73bf130 184 /*!< List of external triggers with generic trigger name, independently of */
vladvana 0:23d1f73bf130 185 /* ADC target, sorted by trigger name: */
vladvana 0:23d1f73bf130 186
vladvana 0:23d1f73bf130 187 /*!< External triggers of regular group for ADC1&ADC2 only */
vladvana 0:23d1f73bf130 188 #define ADC_EXTERNALTRIGCONV_T1_CC1 ADC1_2_EXTERNALTRIG_T1_CC1
vladvana 0:23d1f73bf130 189 #define ADC_EXTERNALTRIGCONV_T1_CC2 ADC1_2_EXTERNALTRIG_T1_CC2
vladvana 0:23d1f73bf130 190 #define ADC_EXTERNALTRIGCONV_T2_CC2 ADC1_2_EXTERNALTRIG_T2_CC2
vladvana 0:23d1f73bf130 191 #define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
vladvana 0:23d1f73bf130 192 #define ADC_EXTERNALTRIGCONV_T4_CC4 ADC1_2_EXTERNALTRIG_T4_CC4
vladvana 0:23d1f73bf130 193 #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC1_2_EXTERNALTRIG_EXT_IT11
vladvana 0:23d1f73bf130 194
vladvana 0:23d1f73bf130 195 #if defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 196 /*!< External triggers of regular group for ADC3 only */
vladvana 0:23d1f73bf130 197 #define ADC_EXTERNALTRIGCONV_T2_CC3 ADC3_EXTERNALTRIG_T2_CC3
vladvana 0:23d1f73bf130 198 #define ADC_EXTERNALTRIGCONV_T3_CC1 ADC3_EXTERNALTRIG_T3_CC1
vladvana 0:23d1f73bf130 199 #define ADC_EXTERNALTRIGCONV_T5_CC1 ADC3_EXTERNALTRIG_T5_CC1
vladvana 0:23d1f73bf130 200 #define ADC_EXTERNALTRIGCONV_T5_CC3 ADC3_EXTERNALTRIG_T5_CC3
vladvana 0:23d1f73bf130 201 #define ADC_EXTERNALTRIGCONV_T8_CC1 ADC3_EXTERNALTRIG_T8_CC1
vladvana 0:23d1f73bf130 202 #endif /* STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 203
vladvana 0:23d1f73bf130 204 /*!< External triggers of regular group for all ADC instances */
vladvana 0:23d1f73bf130 205 #define ADC_EXTERNALTRIGCONV_T1_CC3 ADC1_2_3_EXTERNALTRIG_T1_CC3
vladvana 0:23d1f73bf130 206
vladvana 0:23d1f73bf130 207 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
vladvana 0:23d1f73bf130 208 /*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */
vladvana 0:23d1f73bf130 209 /* XL-density devices. */
vladvana 0:23d1f73bf130 210 /* To use it on ADC or ADC2, a rempap of trigger must be done from */
vladvana 0:23d1f73bf130 211 /* EXTI line 11 to TIM8_TRGO with macro: */
vladvana 0:23d1f73bf130 212 /* __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE() */
vladvana 0:23d1f73bf130 213 /* __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE() */
vladvana 0:23d1f73bf130 214
vladvana 0:23d1f73bf130 215 /* Note for internal constant value management: If TIM8_TRGO is available, */
vladvana 0:23d1f73bf130 216 /* its definition is set to value for ADC1&ADC2 by default and changed to */
vladvana 0:23d1f73bf130 217 /* value for ADC3 by HAL ADC driver if ADC3 is selected. */
vladvana 0:23d1f73bf130 218 #define ADC_EXTERNALTRIGCONV_T8_TRGO ADC1_2_EXTERNALTRIG_T8_TRGO
vladvana 0:23d1f73bf130 219 #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
vladvana 0:23d1f73bf130 220
vladvana 0:23d1f73bf130 221 #define ADC_SOFTWARE_START ADC1_2_3_SWSTART
vladvana 0:23d1f73bf130 222 /**
vladvana 0:23d1f73bf130 223 * @}
vladvana 0:23d1f73bf130 224 */
vladvana 0:23d1f73bf130 225
vladvana 0:23d1f73bf130 226 /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
vladvana 0:23d1f73bf130 227 * @{
vladvana 0:23d1f73bf130 228 */
vladvana 0:23d1f73bf130 229 /*!< List of external triggers with generic trigger name, independently of */
vladvana 0:23d1f73bf130 230 /* ADC target, sorted by trigger name: */
vladvana 0:23d1f73bf130 231
vladvana 0:23d1f73bf130 232 /*!< External triggers of injected group for ADC1&ADC2 only */
vladvana 0:23d1f73bf130 233 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
vladvana 0:23d1f73bf130 234 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC1_2_EXTERNALTRIGINJEC_T2_CC1
vladvana 0:23d1f73bf130 235 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4
vladvana 0:23d1f73bf130 236 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
vladvana 0:23d1f73bf130 237 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
vladvana 0:23d1f73bf130 238
vladvana 0:23d1f73bf130 239 #if defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 240 /*!< External triggers of injected group for ADC3 only */
vladvana 0:23d1f73bf130 241 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC3_EXTERNALTRIGINJEC_T4_CC3
vladvana 0:23d1f73bf130 242 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ADC3_EXTERNALTRIGINJEC_T8_CC2
vladvana 0:23d1f73bf130 243 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ADC3_EXTERNALTRIGINJEC_T5_TRGO
vladvana 0:23d1f73bf130 244 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ADC3_EXTERNALTRIGINJEC_T5_CC4
vladvana 0:23d1f73bf130 245 #endif /* STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 246
vladvana 0:23d1f73bf130 247 /*!< External triggers of injected group for all ADC instances */
vladvana 0:23d1f73bf130 248 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
vladvana 0:23d1f73bf130 249 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
vladvana 0:23d1f73bf130 250
vladvana 0:23d1f73bf130 251 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
vladvana 0:23d1f73bf130 252 /*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */
vladvana 0:23d1f73bf130 253 /* XL-density devices. */
vladvana 0:23d1f73bf130 254 /* To use it on ADC or ADC2, a rempap of trigger must be done from */
vladvana 0:23d1f73bf130 255 /* EXTI line 11 to TIM8_TRGO with macro: */
vladvana 0:23d1f73bf130 256 /* __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE() */
vladvana 0:23d1f73bf130 257 /* __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE() */
vladvana 0:23d1f73bf130 258
vladvana 0:23d1f73bf130 259 /* Note for internal constant value management: If TIM8_CC4 is available, */
vladvana 0:23d1f73bf130 260 /* its definition is set to value for ADC1&ADC2 by default and changed to */
vladvana 0:23d1f73bf130 261 /* value for ADC3 by HAL ADC driver if ADC3 is selected. */
vladvana 0:23d1f73bf130 262 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T8_CC4
vladvana 0:23d1f73bf130 263 #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
vladvana 0:23d1f73bf130 264
vladvana 0:23d1f73bf130 265 #define ADC_INJECTED_SOFTWARE_START ADC1_2_3_JSWSTART
vladvana 0:23d1f73bf130 266 /**
vladvana 0:23d1f73bf130 267 * @}
vladvana 0:23d1f73bf130 268 */
vladvana 0:23d1f73bf130 269
vladvana 0:23d1f73bf130 270 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 271 /** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
vladvana 0:23d1f73bf130 272 * @{
vladvana 0:23d1f73bf130 273 */
vladvana 0:23d1f73bf130 274 #define ADC_MODE_INDEPENDENT ((uint32_t)(0x00000000)) /*!< ADC dual mode disabled (ADC independent mode) */
vladvana 0:23d1f73bf130 275 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode */
vladvana 0:23d1f73bf130 276 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)( ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode */
vladvana 0:23d1f73bf130 277 #define ADC_DUALMODE_INJECSIMULT_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
vladvana 0:23d1f73bf130 278 #define ADC_DUALMODE_INJECSIMULT_INTERLSLOW ((uint32_t)( ADC_CR1_DUALMOD_2 )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
vladvana 0:23d1f73bf130 279 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode only */
vladvana 0:23d1f73bf130 280 #define ADC_DUALMODE_REGSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Regular simultaneous mode only */
vladvana 0:23d1f73bf130 281 #define ADC_DUALMODE_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode only (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
vladvana 0:23d1f73bf130 282 #define ADC_DUALMODE_INTERLSLOW ((uint32_t)(ADC_CR1_DUALMOD_3 )) /*!< ADC dual mode enabled: Slow interleaved mode only (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
vladvana 0:23d1f73bf130 283 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CR1_DUALMOD_3 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode only */
vladvana 0:23d1f73bf130 284 /**
vladvana 0:23d1f73bf130 285 * @}
vladvana 0:23d1f73bf130 286 */
vladvana 0:23d1f73bf130 287 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 288
vladvana 0:23d1f73bf130 289 /**
vladvana 0:23d1f73bf130 290 * @}
vladvana 0:23d1f73bf130 291 */
vladvana 0:23d1f73bf130 292
vladvana 0:23d1f73bf130 293
vladvana 0:23d1f73bf130 294 /* Private constants ---------------------------------------------------------*/
vladvana 0:23d1f73bf130 295
vladvana 0:23d1f73bf130 296 /** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
vladvana 0:23d1f73bf130 297 * @{
vladvana 0:23d1f73bf130 298 */
vladvana 0:23d1f73bf130 299
vladvana 0:23d1f73bf130 300 /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
vladvana 0:23d1f73bf130 301 * @{
vladvana 0:23d1f73bf130 302 */
vladvana 0:23d1f73bf130 303 /* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC */
vladvana 0:23d1f73bf130 304 /* instance is availble on the selected device). */
vladvana 0:23d1f73bf130 305 /* (used internally by HAL driver. To not use into HAL structure parameters) */
vladvana 0:23d1f73bf130 306
vladvana 0:23d1f73bf130 307 /* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
vladvana 0:23d1f73bf130 308 #define ADC1_2_EXTERNALTRIG_T1_CC1 ((uint32_t) 0x00000000)
vladvana 0:23d1f73bf130 309 #define ADC1_2_EXTERNALTRIG_T1_CC2 ((uint32_t)( ADC_CR2_EXTSEL_0))
vladvana 0:23d1f73bf130 310 #define ADC1_2_EXTERNALTRIG_T2_CC2 ((uint32_t)( ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
vladvana 0:23d1f73bf130 311 #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 ))
vladvana 0:23d1f73bf130 312 #define ADC1_2_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
vladvana 0:23d1f73bf130 313 #define ADC1_2_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 ))
vladvana 0:23d1f73bf130 314 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 315 /* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */
vladvana 0:23d1f73bf130 316 /* XL-density devices. */
vladvana 0:23d1f73bf130 317 #define ADC1_2_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_EXT_IT11
vladvana 0:23d1f73bf130 318 #endif
vladvana 0:23d1f73bf130 319
vladvana 0:23d1f73bf130 320 #if defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 321 /* External triggers of regular group for ADC3 */
vladvana 0:23d1f73bf130 322 #define ADC3_EXTERNALTRIG_T3_CC1 ADC1_2_EXTERNALTRIG_T1_CC1
vladvana 0:23d1f73bf130 323 #define ADC3_EXTERNALTRIG_T2_CC3 ADC1_2_EXTERNALTRIG_T1_CC2
vladvana 0:23d1f73bf130 324 #define ADC3_EXTERNALTRIG_T8_CC1 ADC1_2_EXTERNALTRIG_T2_CC2
vladvana 0:23d1f73bf130 325 #define ADC3_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
vladvana 0:23d1f73bf130 326 #define ADC3_EXTERNALTRIG_T5_CC1 ADC1_2_EXTERNALTRIG_T4_CC4
vladvana 0:23d1f73bf130 327 #define ADC3_EXTERNALTRIG_T5_CC3 ADC1_2_EXTERNALTRIG_EXT_IT11
vladvana 0:23d1f73bf130 328 #endif
vladvana 0:23d1f73bf130 329
vladvana 0:23d1f73bf130 330 /* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
vladvana 0:23d1f73bf130 331 #define ADC1_2_3_EXTERNALTRIG_T1_CC3 ((uint32_t)( ADC_CR2_EXTSEL_1 ))
vladvana 0:23d1f73bf130 332 #define ADC1_2_3_SWSTART ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
vladvana 0:23d1f73bf130 333 /**
vladvana 0:23d1f73bf130 334 * @}
vladvana 0:23d1f73bf130 335 */
vladvana 0:23d1f73bf130 336
vladvana 0:23d1f73bf130 337 /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
vladvana 0:23d1f73bf130 338 * @{
vladvana 0:23d1f73bf130 339 */
vladvana 0:23d1f73bf130 340 /* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC */
vladvana 0:23d1f73bf130 341 /* instance is availble on the selected device). */
vladvana 0:23d1f73bf130 342 /* (used internally by HAL driver. To not use into HAL structure parameters) */
vladvana 0:23d1f73bf130 343
vladvana 0:23d1f73bf130 344 /* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
vladvana 0:23d1f73bf130 345 #define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 ))
vladvana 0:23d1f73bf130 346 #define ADC1_2_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
vladvana 0:23d1f73bf130 347 #define ADC1_2_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 ))
vladvana 0:23d1f73bf130 348 #define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
vladvana 0:23d1f73bf130 349 #define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 ))
vladvana 0:23d1f73bf130 350 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 351 /* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */
vladvana 0:23d1f73bf130 352 /* XL-density devices. */
vladvana 0:23d1f73bf130 353 #define ADC1_2_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
vladvana 0:23d1f73bf130 354 #endif
vladvana 0:23d1f73bf130 355
vladvana 0:23d1f73bf130 356 #if defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 357 /* External triggers of injected group for ADC3 */
vladvana 0:23d1f73bf130 358 #define ADC3_EXTERNALTRIGINJEC_T4_CC3 ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
vladvana 0:23d1f73bf130 359 #define ADC3_EXTERNALTRIGINJEC_T8_CC2 ADC1_2_EXTERNALTRIGINJEC_T2_CC1
vladvana 0:23d1f73bf130 360 #define ADC3_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4
vladvana 0:23d1f73bf130 361 #define ADC3_EXTERNALTRIGINJEC_T5_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
vladvana 0:23d1f73bf130 362 #define ADC3_EXTERNALTRIGINJEC_T5_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
vladvana 0:23d1f73bf130 363 #endif /* STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 364
vladvana 0:23d1f73bf130 365 /* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
vladvana 0:23d1f73bf130 366 #define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO ((uint32_t) 0x00000000)
vladvana 0:23d1f73bf130 367 #define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_0))
vladvana 0:23d1f73bf130 368 #define ADC1_2_3_JSWSTART ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
vladvana 0:23d1f73bf130 369 /**
vladvana 0:23d1f73bf130 370 * @}
vladvana 0:23d1f73bf130 371 */
vladvana 0:23d1f73bf130 372
vladvana 0:23d1f73bf130 373 /**
vladvana 0:23d1f73bf130 374 * @}
vladvana 0:23d1f73bf130 375 */
vladvana 0:23d1f73bf130 376
vladvana 0:23d1f73bf130 377
vladvana 0:23d1f73bf130 378 /* Exported macro ------------------------------------------------------------*/
vladvana 0:23d1f73bf130 379
vladvana 0:23d1f73bf130 380 /* Private macro -------------------------------------------------------------*/
vladvana 0:23d1f73bf130 381
vladvana 0:23d1f73bf130 382 /** @defgroup ADCEx_Private_Macro ADCEx Private Macro
vladvana 0:23d1f73bf130 383 * @{
vladvana 0:23d1f73bf130 384 */
vladvana 0:23d1f73bf130 385 /* Macro reserved for internal HAL driver usage, not intended to be used in */
vladvana 0:23d1f73bf130 386 /* code of final user. */
vladvana 0:23d1f73bf130 387
vladvana 0:23d1f73bf130 388
vladvana 0:23d1f73bf130 389 /**
vladvana 0:23d1f73bf130 390 * @brief For devices with 3 ADCs: Defines the external trigger source
vladvana 0:23d1f73bf130 391 * for regular group according to ADC into common group ADC1&ADC2 or
vladvana 0:23d1f73bf130 392 * ADC3 (some triggers with same source have different value to
vladvana 0:23d1f73bf130 393 * be programmed into ADC EXTSEL bits of CR2 register).
vladvana 0:23d1f73bf130 394 * For devices with 2 ADCs or less: this macro makes no change.
vladvana 0:23d1f73bf130 395 * @param __HANDLE__: ADC handle
vladvana 0:23d1f73bf130 396 * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
vladvana 0:23d1f73bf130 397 * @retval External trigger to be programmed into EXTSEL bits of CR2 register
vladvana 0:23d1f73bf130 398 */
vladvana 0:23d1f73bf130 399 #if defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 400 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \
vladvana 0:23d1f73bf130 401 (( (((__HANDLE__)->Instance) == ADC3) \
vladvana 0:23d1f73bf130 402 )? \
vladvana 0:23d1f73bf130 403 ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO \
vladvana 0:23d1f73bf130 404 )? \
vladvana 0:23d1f73bf130 405 (ADC3_EXTERNALTRIG_T8_TRGO) \
vladvana 0:23d1f73bf130 406 : \
vladvana 0:23d1f73bf130 407 (__EXT_TRIG_CONV__) \
vladvana 0:23d1f73bf130 408 ) \
vladvana 0:23d1f73bf130 409 : \
vladvana 0:23d1f73bf130 410 (__EXT_TRIG_CONV__) \
vladvana 0:23d1f73bf130 411 )
vladvana 0:23d1f73bf130 412 #else
vladvana 0:23d1f73bf130 413 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \
vladvana 0:23d1f73bf130 414 (__EXT_TRIG_CONV__)
vladvana 0:23d1f73bf130 415 #endif /* STM32F103xE || STM32F103xG */
vladvana 0:23d1f73bf130 416
vladvana 0:23d1f73bf130 417 /**
vladvana 0:23d1f73bf130 418 * @brief For devices with 3 ADCs: Defines the external trigger source
vladvana 0:23d1f73bf130 419 * for injected group according to ADC into common group ADC1&ADC2 or
vladvana 0:23d1f73bf130 420 * ADC3 (some triggers with same source have different value to
vladvana 0:23d1f73bf130 421 * be programmed into ADC JEXTSEL bits of CR2 register).
vladvana 0:23d1f73bf130 422 * For devices with 2 ADCs or less: this macro makes no change.
vladvana 0:23d1f73bf130 423 * @param __HANDLE__: ADC handle
vladvana 0:23d1f73bf130 424 * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
vladvana 0:23d1f73bf130 425 * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
vladvana 0:23d1f73bf130 426 */
vladvana 0:23d1f73bf130 427 #if defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 428 #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \
vladvana 0:23d1f73bf130 429 (( (((__HANDLE__)->Instance) == ADC3) \
vladvana 0:23d1f73bf130 430 )? \
vladvana 0:23d1f73bf130 431 ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4 \
vladvana 0:23d1f73bf130 432 )? \
vladvana 0:23d1f73bf130 433 (ADC3_EXTERNALTRIGINJEC_T8_CC4) \
vladvana 0:23d1f73bf130 434 : \
vladvana 0:23d1f73bf130 435 (__EXT_TRIG_INJECTCONV__) \
vladvana 0:23d1f73bf130 436 ) \
vladvana 0:23d1f73bf130 437 : \
vladvana 0:23d1f73bf130 438 (__EXT_TRIG_INJECTCONV__) \
vladvana 0:23d1f73bf130 439 )
vladvana 0:23d1f73bf130 440 #else
vladvana 0:23d1f73bf130 441 #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \
vladvana 0:23d1f73bf130 442 (__EXT_TRIG_INJECTCONV__)
vladvana 0:23d1f73bf130 443 #endif /* STM32F103xE || STM32F103xG */
vladvana 0:23d1f73bf130 444
vladvana 0:23d1f73bf130 445
vladvana 0:23d1f73bf130 446 /**
vladvana 0:23d1f73bf130 447 * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
vladvana 0:23d1f73bf130 448 * @param __HANDLE__: ADC handle
vladvana 0:23d1f73bf130 449 * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
vladvana 0:23d1f73bf130 450 */
vladvana 0:23d1f73bf130 451 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 452 #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \
vladvana 0:23d1f73bf130 453 (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \
vladvana 0:23d1f73bf130 454 )? \
vladvana 0:23d1f73bf130 455 (ADC1->CR1 & ADC_CR1_DUALMOD) \
vladvana 0:23d1f73bf130 456 : \
vladvana 0:23d1f73bf130 457 (RESET) \
vladvana 0:23d1f73bf130 458 )
vladvana 0:23d1f73bf130 459 #else
vladvana 0:23d1f73bf130 460 #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \
vladvana 0:23d1f73bf130 461 (RESET)
vladvana 0:23d1f73bf130 462 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 463
vladvana 0:23d1f73bf130 464 /**
vladvana 0:23d1f73bf130 465 * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
vladvana 0:23d1f73bf130 466 * @param __HANDLE__: ADC handle
vladvana 0:23d1f73bf130 467 * @retval None
vladvana 0:23d1f73bf130 468 */
vladvana 0:23d1f73bf130 469 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 470 #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \
vladvana 0:23d1f73bf130 471 (( (((__HANDLE__)->Instance) == ADC2) \
vladvana 0:23d1f73bf130 472 )? \
vladvana 0:23d1f73bf130 473 ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET) \
vladvana 0:23d1f73bf130 474 : \
vladvana 0:23d1f73bf130 475 (!RESET) \
vladvana 0:23d1f73bf130 476 )
vladvana 0:23d1f73bf130 477 #else
vladvana 0:23d1f73bf130 478 #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \
vladvana 0:23d1f73bf130 479 (!RESET)
vladvana 0:23d1f73bf130 480 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 481
vladvana 0:23d1f73bf130 482 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 483 /**
vladvana 0:23d1f73bf130 484 * @brief Set handle of the other ADC sharing the common multimode settings
vladvana 0:23d1f73bf130 485 * @param __HANDLE__: ADC handle
vladvana 0:23d1f73bf130 486 * @param __HANDLE_OTHER_ADC__: other ADC handle
vladvana 0:23d1f73bf130 487 * @retval None
vladvana 0:23d1f73bf130 488 */
vladvana 0:23d1f73bf130 489 #define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \
vladvana 0:23d1f73bf130 490 ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
vladvana 0:23d1f73bf130 491
vladvana 0:23d1f73bf130 492 /**
vladvana 0:23d1f73bf130 493 * @brief Set handle of the ADC slave associated to the ADC master
vladvana 0:23d1f73bf130 494 * On STM32F1 devices, ADC slave is always ADC2 (this can be different
vladvana 0:23d1f73bf130 495 * on other STM32 devices)
vladvana 0:23d1f73bf130 496 * @param __HANDLE_MASTER__: ADC master handle
vladvana 0:23d1f73bf130 497 * @param __HANDLE_SLAVE__: ADC slave handle
vladvana 0:23d1f73bf130 498 * @retval None
vladvana 0:23d1f73bf130 499 */
vladvana 0:23d1f73bf130 500 #define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \
vladvana 0:23d1f73bf130 501 ((__HANDLE_SLAVE__)->Instance = ADC2)
vladvana 0:23d1f73bf130 502
vladvana 0:23d1f73bf130 503 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 504
vladvana 0:23d1f73bf130 505 #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
vladvana 0:23d1f73bf130 506 ((CHANNEL) == ADC_INJECTED_RANK_2) || \
vladvana 0:23d1f73bf130 507 ((CHANNEL) == ADC_INJECTED_RANK_3) || \
vladvana 0:23d1f73bf130 508 ((CHANNEL) == ADC_INJECTED_RANK_4) )
vladvana 0:23d1f73bf130 509
vladvana 0:23d1f73bf130 510 #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \
vladvana 0:23d1f73bf130 511 ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) )
vladvana 0:23d1f73bf130 512
vladvana 0:23d1f73bf130 513 /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
vladvana 0:23d1f73bf130 514 * @{
vladvana 0:23d1f73bf130 515 */
vladvana 0:23d1f73bf130 516 #define IS_ADC_INJECTED_NB_CONV(LENGTH) \
vladvana 0:23d1f73bf130 517 (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
vladvana 0:23d1f73bf130 518 /**
vladvana 0:23d1f73bf130 519 * @}
vladvana 0:23d1f73bf130 520 */
vladvana 0:23d1f73bf130 521
vladvana 0:23d1f73bf130 522 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
vladvana 0:23d1f73bf130 523 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
vladvana 0:23d1f73bf130 524 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
vladvana 0:23d1f73bf130 525 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
vladvana 0:23d1f73bf130 526 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
vladvana 0:23d1f73bf130 527 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
vladvana 0:23d1f73bf130 528 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
vladvana 0:23d1f73bf130 529 \
vladvana 0:23d1f73bf130 530 ((REGTRIG) == ADC_SOFTWARE_START) )
vladvana 0:23d1f73bf130 531 #endif
vladvana 0:23d1f73bf130 532 #if defined (STM32F101xE) || defined (STM32F101xG)
vladvana 0:23d1f73bf130 533 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
vladvana 0:23d1f73bf130 534 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
vladvana 0:23d1f73bf130 535 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
vladvana 0:23d1f73bf130 536 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
vladvana 0:23d1f73bf130 537 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
vladvana 0:23d1f73bf130 538 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
vladvana 0:23d1f73bf130 539 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
vladvana 0:23d1f73bf130 540 \
vladvana 0:23d1f73bf130 541 ((REGTRIG) == ADC_SOFTWARE_START) )
vladvana 0:23d1f73bf130 542 #endif
vladvana 0:23d1f73bf130 543 #if defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 544 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
vladvana 0:23d1f73bf130 545 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
vladvana 0:23d1f73bf130 546 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
vladvana 0:23d1f73bf130 547 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
vladvana 0:23d1f73bf130 548 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
vladvana 0:23d1f73bf130 549 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
vladvana 0:23d1f73bf130 550 \
vladvana 0:23d1f73bf130 551 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \
vladvana 0:23d1f73bf130 552 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \
vladvana 0:23d1f73bf130 553 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \
vladvana 0:23d1f73bf130 554 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \
vladvana 0:23d1f73bf130 555 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \
vladvana 0:23d1f73bf130 556 \
vladvana 0:23d1f73bf130 557 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \
vladvana 0:23d1f73bf130 558 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
vladvana 0:23d1f73bf130 559 ((REGTRIG) == ADC_SOFTWARE_START) )
vladvana 0:23d1f73bf130 560 #endif
vladvana 0:23d1f73bf130 561
vladvana 0:23d1f73bf130 562 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
vladvana 0:23d1f73bf130 563 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
vladvana 0:23d1f73bf130 564 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
vladvana 0:23d1f73bf130 565 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
vladvana 0:23d1f73bf130 566 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
vladvana 0:23d1f73bf130 567 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
vladvana 0:23d1f73bf130 568 \
vladvana 0:23d1f73bf130 569 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
vladvana 0:23d1f73bf130 570 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
vladvana 0:23d1f73bf130 571 \
vladvana 0:23d1f73bf130 572 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) )
vladvana 0:23d1f73bf130 573 #endif
vladvana 0:23d1f73bf130 574 #if defined (STM32F101xE) || defined (STM32F101xG)
vladvana 0:23d1f73bf130 575 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
vladvana 0:23d1f73bf130 576 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
vladvana 0:23d1f73bf130 577 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
vladvana 0:23d1f73bf130 578 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
vladvana 0:23d1f73bf130 579 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
vladvana 0:23d1f73bf130 580 \
vladvana 0:23d1f73bf130 581 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
vladvana 0:23d1f73bf130 582 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
vladvana 0:23d1f73bf130 583 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
vladvana 0:23d1f73bf130 584 \
vladvana 0:23d1f73bf130 585 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) )
vladvana 0:23d1f73bf130 586 #endif
vladvana 0:23d1f73bf130 587 #if defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 588 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
vladvana 0:23d1f73bf130 589 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
vladvana 0:23d1f73bf130 590 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
vladvana 0:23d1f73bf130 591 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
vladvana 0:23d1f73bf130 592 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
vladvana 0:23d1f73bf130 593 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
vladvana 0:23d1f73bf130 594 \
vladvana 0:23d1f73bf130 595 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
vladvana 0:23d1f73bf130 596 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
vladvana 0:23d1f73bf130 597 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
vladvana 0:23d1f73bf130 598 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
vladvana 0:23d1f73bf130 599 \
vladvana 0:23d1f73bf130 600 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
vladvana 0:23d1f73bf130 601 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
vladvana 0:23d1f73bf130 602 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
vladvana 0:23d1f73bf130 603 \
vladvana 0:23d1f73bf130 604 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) )
vladvana 0:23d1f73bf130 605 #endif
vladvana 0:23d1f73bf130 606
vladvana 0:23d1f73bf130 607 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 608 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
vladvana 0:23d1f73bf130 609 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
vladvana 0:23d1f73bf130 610 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
vladvana 0:23d1f73bf130 611 ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
vladvana 0:23d1f73bf130 612 ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
vladvana 0:23d1f73bf130 613 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
vladvana 0:23d1f73bf130 614 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
vladvana 0:23d1f73bf130 615 ((MODE) == ADC_DUALMODE_INTERLFAST) || \
vladvana 0:23d1f73bf130 616 ((MODE) == ADC_DUALMODE_INTERLSLOW) || \
vladvana 0:23d1f73bf130 617 ((MODE) == ADC_DUALMODE_ALTERTRIG) )
vladvana 0:23d1f73bf130 618 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 619
vladvana 0:23d1f73bf130 620 /**
vladvana 0:23d1f73bf130 621 * @}
vladvana 0:23d1f73bf130 622 */
vladvana 0:23d1f73bf130 623
vladvana 0:23d1f73bf130 624
vladvana 0:23d1f73bf130 625
vladvana 0:23d1f73bf130 626
vladvana 0:23d1f73bf130 627
vladvana 0:23d1f73bf130 628
vladvana 0:23d1f73bf130 629 /* Exported functions --------------------------------------------------------*/
vladvana 0:23d1f73bf130 630 /** @addtogroup ADCEx_Exported_Functions
vladvana 0:23d1f73bf130 631 * @{
vladvana 0:23d1f73bf130 632 */
vladvana 0:23d1f73bf130 633
vladvana 0:23d1f73bf130 634 /* IO operation functions *****************************************************/
vladvana 0:23d1f73bf130 635 /** @addtogroup ADCEx_Exported_Functions_Group1
vladvana 0:23d1f73bf130 636 * @{
vladvana 0:23d1f73bf130 637 */
vladvana 0:23d1f73bf130 638
vladvana 0:23d1f73bf130 639 /* ADC calibration */
vladvana 0:23d1f73bf130 640 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
vladvana 0:23d1f73bf130 641
vladvana 0:23d1f73bf130 642 /* Blocking mode: Polling */
vladvana 0:23d1f73bf130 643 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
vladvana 0:23d1f73bf130 644 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
vladvana 0:23d1f73bf130 645 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
vladvana 0:23d1f73bf130 646
vladvana 0:23d1f73bf130 647 /* Non-blocking mode: Interruption */
vladvana 0:23d1f73bf130 648 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
vladvana 0:23d1f73bf130 649 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
vladvana 0:23d1f73bf130 650
vladvana 0:23d1f73bf130 651 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 652 /* ADC multimode */
vladvana 0:23d1f73bf130 653 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
vladvana 0:23d1f73bf130 654 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
vladvana 0:23d1f73bf130 655 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 656
vladvana 0:23d1f73bf130 657 /* ADC retrieve conversion value intended to be used with polling or interruption */
vladvana 0:23d1f73bf130 658 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
vladvana 0:23d1f73bf130 659 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 660 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
vladvana 0:23d1f73bf130 661 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 662
vladvana 0:23d1f73bf130 663 /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
vladvana 0:23d1f73bf130 664 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
vladvana 0:23d1f73bf130 665 /**
vladvana 0:23d1f73bf130 666 * @}
vladvana 0:23d1f73bf130 667 */
vladvana 0:23d1f73bf130 668
vladvana 0:23d1f73bf130 669
vladvana 0:23d1f73bf130 670 /* Peripheral Control functions ***********************************************/
vladvana 0:23d1f73bf130 671 /** @addtogroup ADCEx_Exported_Functions_Group2
vladvana 0:23d1f73bf130 672 * @{
vladvana 0:23d1f73bf130 673 */
vladvana 0:23d1f73bf130 674 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
vladvana 0:23d1f73bf130 675 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
vladvana 0:23d1f73bf130 676 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
vladvana 0:23d1f73bf130 677 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
vladvana 0:23d1f73bf130 678 /**
vladvana 0:23d1f73bf130 679 * @}
vladvana 0:23d1f73bf130 680 */
vladvana 0:23d1f73bf130 681
vladvana 0:23d1f73bf130 682
vladvana 0:23d1f73bf130 683 /**
vladvana 0:23d1f73bf130 684 * @}
vladvana 0:23d1f73bf130 685 */
vladvana 0:23d1f73bf130 686
vladvana 0:23d1f73bf130 687
vladvana 0:23d1f73bf130 688 /**
vladvana 0:23d1f73bf130 689 * @}
vladvana 0:23d1f73bf130 690 */
vladvana 0:23d1f73bf130 691
vladvana 0:23d1f73bf130 692 /**
vladvana 0:23d1f73bf130 693 * @}
vladvana 0:23d1f73bf130 694 */
vladvana 0:23d1f73bf130 695
vladvana 0:23d1f73bf130 696 #ifdef __cplusplus
vladvana 0:23d1f73bf130 697 }
vladvana 0:23d1f73bf130 698 #endif
vladvana 0:23d1f73bf130 699
vladvana 0:23d1f73bf130 700 #endif /* __STM32F1xx_HAL_ADC_EX_H */
vladvana 0:23d1f73bf130 701
vladvana 0:23d1f73bf130 702
vladvana 0:23d1f73bf130 703 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/