Vipin Ranka / MGAS_GR_Peach

This is the final version of Mini Gateway for Automation and Security desgined for Renesas GR Peach Design Contest

Dependencies:   GR-PEACH_video GraphicsFramework HTTPServer R_BSP mbed-rpc mbed-rtos Socket lwip-eth lwip-sys lwip FATFileSystem

Fork of mbed-os-example-mbed5-blinky by mbed-os-examples

mbed-dev/hal/gpio_irq_api.h@12:9a20164dcc47, 2017-01-11 (annotated)

Committer:
vipinranka
Date:
Wed Jan 11 11:41:30 2017 +0000
Revision:
12:9a20164dcc47
This is the final version MGAS Project for Renesas GR Peach Design Contest

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vipinranka 12:9a20164dcc47 1
vipinranka 12:9a20164dcc47 2 /** \addtogroup hal */
vipinranka 12:9a20164dcc47 3 /** @{*/
vipinranka 12:9a20164dcc47 4 /* mbed Microcontroller Library
vipinranka 12:9a20164dcc47 5 * Copyright (c) 2006-2013 ARM Limited
vipinranka 12:9a20164dcc47 6 *
vipinranka 12:9a20164dcc47 7 * Licensed under the Apache License, Version 2.0 (the "License");
vipinranka 12:9a20164dcc47 8 * you may not use this file except in compliance with the License.
vipinranka 12:9a20164dcc47 9 * You may obtain a copy of the License at
vipinranka 12:9a20164dcc47 10 *
vipinranka 12:9a20164dcc47 11 * http://www.apache.org/licenses/LICENSE-2.0
vipinranka 12:9a20164dcc47 12 *
vipinranka 12:9a20164dcc47 13 * Unless required by applicable law or agreed to in writing, software
vipinranka 12:9a20164dcc47 14 * distributed under the License is distributed on an "AS IS" BASIS,
vipinranka 12:9a20164dcc47 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
vipinranka 12:9a20164dcc47 16 * See the License for the specific language governing permissions and
vipinranka 12:9a20164dcc47 17 * limitations under the License.
vipinranka 12:9a20164dcc47 18 */
vipinranka 12:9a20164dcc47 19 #ifndef MBED_GPIO_IRQ_API_H
vipinranka 12:9a20164dcc47 20 #define MBED_GPIO_IRQ_API_H
vipinranka 12:9a20164dcc47 21
vipinranka 12:9a20164dcc47 22 #include "device.h"
vipinranka 12:9a20164dcc47 23
vipinranka 12:9a20164dcc47 24 #if DEVICE_INTERRUPTIN
vipinranka 12:9a20164dcc47 25
vipinranka 12:9a20164dcc47 26 #ifdef __cplusplus
vipinranka 12:9a20164dcc47 27 extern "C" {
vipinranka 12:9a20164dcc47 28 #endif
vipinranka 12:9a20164dcc47 29
vipinranka 12:9a20164dcc47 30 /** GPIO IRQ events
vipinranka 12:9a20164dcc47 31 */
vipinranka 12:9a20164dcc47 32 typedef enum {
vipinranka 12:9a20164dcc47 33 IRQ_NONE,
vipinranka 12:9a20164dcc47 34 IRQ_RISE,
vipinranka 12:9a20164dcc47 35 IRQ_FALL
vipinranka 12:9a20164dcc47 36 } gpio_irq_event;
vipinranka 12:9a20164dcc47 37
vipinranka 12:9a20164dcc47 38 /** GPIO IRQ HAL structure. gpio_irq_s is declared in the target's HAL
vipinranka 12:9a20164dcc47 39 */
vipinranka 12:9a20164dcc47 40 typedef struct gpio_irq_s gpio_irq_t;
vipinranka 12:9a20164dcc47 41
vipinranka 12:9a20164dcc47 42 typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event);
vipinranka 12:9a20164dcc47 43
vipinranka 12:9a20164dcc47 44 /**
vipinranka 12:9a20164dcc47 45 * \defgroup hal_gpioirq GPIO IRQ HAL functions
vipinranka 12:9a20164dcc47 46 * @{
vipinranka 12:9a20164dcc47 47 */
vipinranka 12:9a20164dcc47 48
vipinranka 12:9a20164dcc47 49 /** Initialize the GPIO IRQ pin
vipinranka 12:9a20164dcc47 50 *
vipinranka 12:9a20164dcc47 51 * @param obj The GPIO object to initialize
vipinranka 12:9a20164dcc47 52 * @param pin The GPIO pin name
vipinranka 12:9a20164dcc47 53 * @param handler The handler to be attached to GPIO IRQ
vipinranka 12:9a20164dcc47 54 * @param id The object ID (id != 0, 0 is reserved)
vipinranka 12:9a20164dcc47 55 * @return -1 if pin is NC, 0 otherwise
vipinranka 12:9a20164dcc47 56 */
vipinranka 12:9a20164dcc47 57 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id);
vipinranka 12:9a20164dcc47 58
vipinranka 12:9a20164dcc47 59 /** Release the GPIO IRQ PIN
vipinranka 12:9a20164dcc47 60 *
vipinranka 12:9a20164dcc47 61 * @param obj The gpio object
vipinranka 12:9a20164dcc47 62 */
vipinranka 12:9a20164dcc47 63 void gpio_irq_free(gpio_irq_t *obj);
vipinranka 12:9a20164dcc47 64
vipinranka 12:9a20164dcc47 65 /** Enable/disable pin IRQ event
vipinranka 12:9a20164dcc47 66 *
vipinranka 12:9a20164dcc47 67 * @param obj The GPIO object
vipinranka 12:9a20164dcc47 68 * @param event The GPIO IRQ event
vipinranka 12:9a20164dcc47 69 * @param enable The enable flag
vipinranka 12:9a20164dcc47 70 */
vipinranka 12:9a20164dcc47 71 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable);
vipinranka 12:9a20164dcc47 72
vipinranka 12:9a20164dcc47 73 /** Enable GPIO IRQ
vipinranka 12:9a20164dcc47 74 *
vipinranka 12:9a20164dcc47 75 * This is target dependent, as it might enable the entire port or just a pin
vipinranka 12:9a20164dcc47 76 * @param obj The GPIO object
vipinranka 12:9a20164dcc47 77 */
vipinranka 12:9a20164dcc47 78 void gpio_irq_enable(gpio_irq_t *obj);
vipinranka 12:9a20164dcc47 79
vipinranka 12:9a20164dcc47 80 /** Disable GPIO IRQ
vipinranka 12:9a20164dcc47 81 *
vipinranka 12:9a20164dcc47 82 * This is target dependent, as it might disable the entire port or just a pin
vipinranka 12:9a20164dcc47 83 * @param obj The GPIO object
vipinranka 12:9a20164dcc47 84 */
vipinranka 12:9a20164dcc47 85 void gpio_irq_disable(gpio_irq_t *obj);
vipinranka 12:9a20164dcc47 86
vipinranka 12:9a20164dcc47 87 /**@}*/
vipinranka 12:9a20164dcc47 88
vipinranka 12:9a20164dcc47 89 #ifdef __cplusplus
vipinranka 12:9a20164dcc47 90 }
vipinranka 12:9a20164dcc47 91 #endif
vipinranka 12:9a20164dcc47 92
vipinranka 12:9a20164dcc47 93 #endif
vipinranka 12:9a20164dcc47 94
vipinranka 12:9a20164dcc47 95 #endif
vipinranka 12:9a20164dcc47 96
vipinranka 12:9a20164dcc47 97 /** @}*/