Vipin Ranka / MGAS_GR_Peach

This is the final version of Mini Gateway for Automation and Security desgined for Renesas GR Peach Design Contest

Dependencies:   GR-PEACH_video GraphicsFramework HTTPServer R_BSP mbed-rpc mbed-rtos Socket lwip-eth lwip-sys lwip FATFileSystem

Fork of mbed-os-example-mbed5-blinky by mbed-os-examples

mbed-dev/cmsis/core_cmFunc.h@12:9a20164dcc47, 2017-01-11 (annotated)

Committer:
vipinranka
Date:
Wed Jan 11 11:41:30 2017 +0000
Revision:
12:9a20164dcc47
This is the final version MGAS Project for Renesas GR Peach Design Contest

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vipinranka 12:9a20164dcc47 1 /**************************************************************************//**
vipinranka 12:9a20164dcc47 2 * @file core_cmFunc.h
vipinranka 12:9a20164dcc47 3 * @brief CMSIS Cortex-M Core Function Access Header File
vipinranka 12:9a20164dcc47 4 * @version V4.10
vipinranka 12:9a20164dcc47 5 * @date 18. March 2015
vipinranka 12:9a20164dcc47 6 *
vipinranka 12:9a20164dcc47 7 * @note
vipinranka 12:9a20164dcc47 8 *
vipinranka 12:9a20164dcc47 9 ******************************************************************************/
vipinranka 12:9a20164dcc47 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
vipinranka 12:9a20164dcc47 11
vipinranka 12:9a20164dcc47 12 All rights reserved.
vipinranka 12:9a20164dcc47 13 Redistribution and use in source and binary forms, with or without
vipinranka 12:9a20164dcc47 14 modification, are permitted provided that the following conditions are met:
vipinranka 12:9a20164dcc47 15 - Redistributions of source code must retain the above copyright
vipinranka 12:9a20164dcc47 16 notice, this list of conditions and the following disclaimer.
vipinranka 12:9a20164dcc47 17 - Redistributions in binary form must reproduce the above copyright
vipinranka 12:9a20164dcc47 18 notice, this list of conditions and the following disclaimer in the
vipinranka 12:9a20164dcc47 19 documentation and/or other materials provided with the distribution.
vipinranka 12:9a20164dcc47 20 - Neither the name of ARM nor the names of its contributors may be used
vipinranka 12:9a20164dcc47 21 to endorse or promote products derived from this software without
vipinranka 12:9a20164dcc47 22 specific prior written permission.
vipinranka 12:9a20164dcc47 23 *
vipinranka 12:9a20164dcc47 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vipinranka 12:9a20164dcc47 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vipinranka 12:9a20164dcc47 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
vipinranka 12:9a20164dcc47 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
vipinranka 12:9a20164dcc47 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
vipinranka 12:9a20164dcc47 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
vipinranka 12:9a20164dcc47 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
vipinranka 12:9a20164dcc47 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
vipinranka 12:9a20164dcc47 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
vipinranka 12:9a20164dcc47 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
vipinranka 12:9a20164dcc47 34 POSSIBILITY OF SUCH DAMAGE.
vipinranka 12:9a20164dcc47 35 ---------------------------------------------------------------------------*/
vipinranka 12:9a20164dcc47 36
vipinranka 12:9a20164dcc47 37
vipinranka 12:9a20164dcc47 38 #ifndef __CORE_CMFUNC_H
vipinranka 12:9a20164dcc47 39 #define __CORE_CMFUNC_H
vipinranka 12:9a20164dcc47 40
vipinranka 12:9a20164dcc47 41
vipinranka 12:9a20164dcc47 42 /* ########################### Core Function Access ########################### */
vipinranka 12:9a20164dcc47 43 /** \ingroup CMSIS_Core_FunctionInterface
vipinranka 12:9a20164dcc47 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
vipinranka 12:9a20164dcc47 45 @{
vipinranka 12:9a20164dcc47 46 */
vipinranka 12:9a20164dcc47 47
vipinranka 12:9a20164dcc47 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
vipinranka 12:9a20164dcc47 49 /* ARM armcc specific functions */
vipinranka 12:9a20164dcc47 50
vipinranka 12:9a20164dcc47 51 #if (__ARMCC_VERSION < 400677)
vipinranka 12:9a20164dcc47 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
vipinranka 12:9a20164dcc47 53 #endif
vipinranka 12:9a20164dcc47 54
vipinranka 12:9a20164dcc47 55 /* intrinsic void __enable_irq(); */
vipinranka 12:9a20164dcc47 56 /* intrinsic void __disable_irq(); */
vipinranka 12:9a20164dcc47 57
vipinranka 12:9a20164dcc47 58 /** \brief Get Control Register
vipinranka 12:9a20164dcc47 59
vipinranka 12:9a20164dcc47 60 This function returns the content of the Control Register.
vipinranka 12:9a20164dcc47 61
vipinranka 12:9a20164dcc47 62 \return Control Register value
vipinranka 12:9a20164dcc47 63 */
vipinranka 12:9a20164dcc47 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
vipinranka 12:9a20164dcc47 65 {
vipinranka 12:9a20164dcc47 66 register uint32_t __regControl __ASM("control");
vipinranka 12:9a20164dcc47 67 return(__regControl);
vipinranka 12:9a20164dcc47 68 }
vipinranka 12:9a20164dcc47 69
vipinranka 12:9a20164dcc47 70
vipinranka 12:9a20164dcc47 71 /** \brief Set Control Register
vipinranka 12:9a20164dcc47 72
vipinranka 12:9a20164dcc47 73 This function writes the given value to the Control Register.
vipinranka 12:9a20164dcc47 74
vipinranka 12:9a20164dcc47 75 \param [in] control Control Register value to set
vipinranka 12:9a20164dcc47 76 */
vipinranka 12:9a20164dcc47 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
vipinranka 12:9a20164dcc47 78 {
vipinranka 12:9a20164dcc47 79 register uint32_t __regControl __ASM("control");
vipinranka 12:9a20164dcc47 80 __regControl = control;
vipinranka 12:9a20164dcc47 81 }
vipinranka 12:9a20164dcc47 82
vipinranka 12:9a20164dcc47 83
vipinranka 12:9a20164dcc47 84 /** \brief Get IPSR Register
vipinranka 12:9a20164dcc47 85
vipinranka 12:9a20164dcc47 86 This function returns the content of the IPSR Register.
vipinranka 12:9a20164dcc47 87
vipinranka 12:9a20164dcc47 88 \return IPSR Register value
vipinranka 12:9a20164dcc47 89 */
vipinranka 12:9a20164dcc47 90 __STATIC_INLINE uint32_t __get_IPSR(void)
vipinranka 12:9a20164dcc47 91 {
vipinranka 12:9a20164dcc47 92 register uint32_t __regIPSR __ASM("ipsr");
vipinranka 12:9a20164dcc47 93 return(__regIPSR);
vipinranka 12:9a20164dcc47 94 }
vipinranka 12:9a20164dcc47 95
vipinranka 12:9a20164dcc47 96
vipinranka 12:9a20164dcc47 97 /** \brief Get APSR Register
vipinranka 12:9a20164dcc47 98
vipinranka 12:9a20164dcc47 99 This function returns the content of the APSR Register.
vipinranka 12:9a20164dcc47 100
vipinranka 12:9a20164dcc47 101 \return APSR Register value
vipinranka 12:9a20164dcc47 102 */
vipinranka 12:9a20164dcc47 103 __STATIC_INLINE uint32_t __get_APSR(void)
vipinranka 12:9a20164dcc47 104 {
vipinranka 12:9a20164dcc47 105 register uint32_t __regAPSR __ASM("apsr");
vipinranka 12:9a20164dcc47 106 return(__regAPSR);
vipinranka 12:9a20164dcc47 107 }
vipinranka 12:9a20164dcc47 108
vipinranka 12:9a20164dcc47 109
vipinranka 12:9a20164dcc47 110 /** \brief Get xPSR Register
vipinranka 12:9a20164dcc47 111
vipinranka 12:9a20164dcc47 112 This function returns the content of the xPSR Register.
vipinranka 12:9a20164dcc47 113
vipinranka 12:9a20164dcc47 114 \return xPSR Register value
vipinranka 12:9a20164dcc47 115 */
vipinranka 12:9a20164dcc47 116 __STATIC_INLINE uint32_t __get_xPSR(void)
vipinranka 12:9a20164dcc47 117 {
vipinranka 12:9a20164dcc47 118 register uint32_t __regXPSR __ASM("xpsr");
vipinranka 12:9a20164dcc47 119 return(__regXPSR);
vipinranka 12:9a20164dcc47 120 }
vipinranka 12:9a20164dcc47 121
vipinranka 12:9a20164dcc47 122
vipinranka 12:9a20164dcc47 123 /** \brief Get Process Stack Pointer
vipinranka 12:9a20164dcc47 124
vipinranka 12:9a20164dcc47 125 This function returns the current value of the Process Stack Pointer (PSP).
vipinranka 12:9a20164dcc47 126
vipinranka 12:9a20164dcc47 127 \return PSP Register value
vipinranka 12:9a20164dcc47 128 */
vipinranka 12:9a20164dcc47 129 __STATIC_INLINE uint32_t __get_PSP(void)
vipinranka 12:9a20164dcc47 130 {
vipinranka 12:9a20164dcc47 131 register uint32_t __regProcessStackPointer __ASM("psp");
vipinranka 12:9a20164dcc47 132 return(__regProcessStackPointer);
vipinranka 12:9a20164dcc47 133 }
vipinranka 12:9a20164dcc47 134
vipinranka 12:9a20164dcc47 135
vipinranka 12:9a20164dcc47 136 /** \brief Set Process Stack Pointer
vipinranka 12:9a20164dcc47 137
vipinranka 12:9a20164dcc47 138 This function assigns the given value to the Process Stack Pointer (PSP).
vipinranka 12:9a20164dcc47 139
vipinranka 12:9a20164dcc47 140 \param [in] topOfProcStack Process Stack Pointer value to set
vipinranka 12:9a20164dcc47 141 */
vipinranka 12:9a20164dcc47 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
vipinranka 12:9a20164dcc47 143 {
vipinranka 12:9a20164dcc47 144 register uint32_t __regProcessStackPointer __ASM("psp");
vipinranka 12:9a20164dcc47 145 __regProcessStackPointer = topOfProcStack;
vipinranka 12:9a20164dcc47 146 }
vipinranka 12:9a20164dcc47 147
vipinranka 12:9a20164dcc47 148
vipinranka 12:9a20164dcc47 149 /** \brief Get Main Stack Pointer
vipinranka 12:9a20164dcc47 150
vipinranka 12:9a20164dcc47 151 This function returns the current value of the Main Stack Pointer (MSP).
vipinranka 12:9a20164dcc47 152
vipinranka 12:9a20164dcc47 153 \return MSP Register value
vipinranka 12:9a20164dcc47 154 */
vipinranka 12:9a20164dcc47 155 __STATIC_INLINE uint32_t __get_MSP(void)
vipinranka 12:9a20164dcc47 156 {
vipinranka 12:9a20164dcc47 157 register uint32_t __regMainStackPointer __ASM("msp");
vipinranka 12:9a20164dcc47 158 return(__regMainStackPointer);
vipinranka 12:9a20164dcc47 159 }
vipinranka 12:9a20164dcc47 160
vipinranka 12:9a20164dcc47 161
vipinranka 12:9a20164dcc47 162 /** \brief Set Main Stack Pointer
vipinranka 12:9a20164dcc47 163
vipinranka 12:9a20164dcc47 164 This function assigns the given value to the Main Stack Pointer (MSP).
vipinranka 12:9a20164dcc47 165
vipinranka 12:9a20164dcc47 166 \param [in] topOfMainStack Main Stack Pointer value to set
vipinranka 12:9a20164dcc47 167 */
vipinranka 12:9a20164dcc47 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
vipinranka 12:9a20164dcc47 169 {
vipinranka 12:9a20164dcc47 170 register uint32_t __regMainStackPointer __ASM("msp");
vipinranka 12:9a20164dcc47 171 __regMainStackPointer = topOfMainStack;
vipinranka 12:9a20164dcc47 172 }
vipinranka 12:9a20164dcc47 173
vipinranka 12:9a20164dcc47 174
vipinranka 12:9a20164dcc47 175 /** \brief Get Priority Mask
vipinranka 12:9a20164dcc47 176
vipinranka 12:9a20164dcc47 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
vipinranka 12:9a20164dcc47 178
vipinranka 12:9a20164dcc47 179 \return Priority Mask value
vipinranka 12:9a20164dcc47 180 */
vipinranka 12:9a20164dcc47 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
vipinranka 12:9a20164dcc47 182 {
vipinranka 12:9a20164dcc47 183 register uint32_t __regPriMask __ASM("primask");
vipinranka 12:9a20164dcc47 184 return(__regPriMask);
vipinranka 12:9a20164dcc47 185 }
vipinranka 12:9a20164dcc47 186
vipinranka 12:9a20164dcc47 187
vipinranka 12:9a20164dcc47 188 /** \brief Set Priority Mask
vipinranka 12:9a20164dcc47 189
vipinranka 12:9a20164dcc47 190 This function assigns the given value to the Priority Mask Register.
vipinranka 12:9a20164dcc47 191
vipinranka 12:9a20164dcc47 192 \param [in] priMask Priority Mask
vipinranka 12:9a20164dcc47 193 */
vipinranka 12:9a20164dcc47 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
vipinranka 12:9a20164dcc47 195 {
vipinranka 12:9a20164dcc47 196 register uint32_t __regPriMask __ASM("primask");
vipinranka 12:9a20164dcc47 197 __regPriMask = (priMask);
vipinranka 12:9a20164dcc47 198 }
vipinranka 12:9a20164dcc47 199
vipinranka 12:9a20164dcc47 200
vipinranka 12:9a20164dcc47 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
vipinranka 12:9a20164dcc47 202
vipinranka 12:9a20164dcc47 203 /** \brief Enable FIQ
vipinranka 12:9a20164dcc47 204
vipinranka 12:9a20164dcc47 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
vipinranka 12:9a20164dcc47 206 Can only be executed in Privileged modes.
vipinranka 12:9a20164dcc47 207 */
vipinranka 12:9a20164dcc47 208 #define __enable_fault_irq __enable_fiq
vipinranka 12:9a20164dcc47 209
vipinranka 12:9a20164dcc47 210
vipinranka 12:9a20164dcc47 211 /** \brief Disable FIQ
vipinranka 12:9a20164dcc47 212
vipinranka 12:9a20164dcc47 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
vipinranka 12:9a20164dcc47 214 Can only be executed in Privileged modes.
vipinranka 12:9a20164dcc47 215 */
vipinranka 12:9a20164dcc47 216 #define __disable_fault_irq __disable_fiq
vipinranka 12:9a20164dcc47 217
vipinranka 12:9a20164dcc47 218
vipinranka 12:9a20164dcc47 219 /** \brief Get Base Priority
vipinranka 12:9a20164dcc47 220
vipinranka 12:9a20164dcc47 221 This function returns the current value of the Base Priority register.
vipinranka 12:9a20164dcc47 222
vipinranka 12:9a20164dcc47 223 \return Base Priority register value
vipinranka 12:9a20164dcc47 224 */
vipinranka 12:9a20164dcc47 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
vipinranka 12:9a20164dcc47 226 {
vipinranka 12:9a20164dcc47 227 register uint32_t __regBasePri __ASM("basepri");
vipinranka 12:9a20164dcc47 228 return(__regBasePri);
vipinranka 12:9a20164dcc47 229 }
vipinranka 12:9a20164dcc47 230
vipinranka 12:9a20164dcc47 231
vipinranka 12:9a20164dcc47 232 /** \brief Set Base Priority
vipinranka 12:9a20164dcc47 233
vipinranka 12:9a20164dcc47 234 This function assigns the given value to the Base Priority register.
vipinranka 12:9a20164dcc47 235
vipinranka 12:9a20164dcc47 236 \param [in] basePri Base Priority value to set
vipinranka 12:9a20164dcc47 237 */
vipinranka 12:9a20164dcc47 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
vipinranka 12:9a20164dcc47 239 {
vipinranka 12:9a20164dcc47 240 register uint32_t __regBasePri __ASM("basepri");
vipinranka 12:9a20164dcc47 241 __regBasePri = (basePri & 0xff);
vipinranka 12:9a20164dcc47 242 }
vipinranka 12:9a20164dcc47 243
vipinranka 12:9a20164dcc47 244
vipinranka 12:9a20164dcc47 245 /** \brief Set Base Priority with condition
vipinranka 12:9a20164dcc47 246
vipinranka 12:9a20164dcc47 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
vipinranka 12:9a20164dcc47 248 or the new value increases the BASEPRI priority level.
vipinranka 12:9a20164dcc47 249
vipinranka 12:9a20164dcc47 250 \param [in] basePri Base Priority value to set
vipinranka 12:9a20164dcc47 251 */
vipinranka 12:9a20164dcc47 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
vipinranka 12:9a20164dcc47 253 {
vipinranka 12:9a20164dcc47 254 register uint32_t __regBasePriMax __ASM("basepri_max");
vipinranka 12:9a20164dcc47 255 __regBasePriMax = (basePri & 0xff);
vipinranka 12:9a20164dcc47 256 }
vipinranka 12:9a20164dcc47 257
vipinranka 12:9a20164dcc47 258
vipinranka 12:9a20164dcc47 259 /** \brief Get Fault Mask
vipinranka 12:9a20164dcc47 260
vipinranka 12:9a20164dcc47 261 This function returns the current value of the Fault Mask register.
vipinranka 12:9a20164dcc47 262
vipinranka 12:9a20164dcc47 263 \return Fault Mask register value
vipinranka 12:9a20164dcc47 264 */
vipinranka 12:9a20164dcc47 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
vipinranka 12:9a20164dcc47 266 {
vipinranka 12:9a20164dcc47 267 register uint32_t __regFaultMask __ASM("faultmask");
vipinranka 12:9a20164dcc47 268 return(__regFaultMask);
vipinranka 12:9a20164dcc47 269 }
vipinranka 12:9a20164dcc47 270
vipinranka 12:9a20164dcc47 271
vipinranka 12:9a20164dcc47 272 /** \brief Set Fault Mask
vipinranka 12:9a20164dcc47 273
vipinranka 12:9a20164dcc47 274 This function assigns the given value to the Fault Mask register.
vipinranka 12:9a20164dcc47 275
vipinranka 12:9a20164dcc47 276 \param [in] faultMask Fault Mask value to set
vipinranka 12:9a20164dcc47 277 */
vipinranka 12:9a20164dcc47 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
vipinranka 12:9a20164dcc47 279 {
vipinranka 12:9a20164dcc47 280 register uint32_t __regFaultMask __ASM("faultmask");
vipinranka 12:9a20164dcc47 281 __regFaultMask = (faultMask & (uint32_t)1);
vipinranka 12:9a20164dcc47 282 }
vipinranka 12:9a20164dcc47 283
vipinranka 12:9a20164dcc47 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
vipinranka 12:9a20164dcc47 285
vipinranka 12:9a20164dcc47 286
vipinranka 12:9a20164dcc47 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
vipinranka 12:9a20164dcc47 288
vipinranka 12:9a20164dcc47 289 /** \brief Get FPSCR
vipinranka 12:9a20164dcc47 290
vipinranka 12:9a20164dcc47 291 This function returns the current value of the Floating Point Status/Control register.
vipinranka 12:9a20164dcc47 292
vipinranka 12:9a20164dcc47 293 \return Floating Point Status/Control register value
vipinranka 12:9a20164dcc47 294 */
vipinranka 12:9a20164dcc47 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
vipinranka 12:9a20164dcc47 296 {
vipinranka 12:9a20164dcc47 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
vipinranka 12:9a20164dcc47 298 register uint32_t __regfpscr __ASM("fpscr");
vipinranka 12:9a20164dcc47 299 return(__regfpscr);
vipinranka 12:9a20164dcc47 300 #else
vipinranka 12:9a20164dcc47 301 return(0);
vipinranka 12:9a20164dcc47 302 #endif
vipinranka 12:9a20164dcc47 303 }
vipinranka 12:9a20164dcc47 304
vipinranka 12:9a20164dcc47 305
vipinranka 12:9a20164dcc47 306 /** \brief Set FPSCR
vipinranka 12:9a20164dcc47 307
vipinranka 12:9a20164dcc47 308 This function assigns the given value to the Floating Point Status/Control register.
vipinranka 12:9a20164dcc47 309
vipinranka 12:9a20164dcc47 310 \param [in] fpscr Floating Point Status/Control value to set
vipinranka 12:9a20164dcc47 311 */
vipinranka 12:9a20164dcc47 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
vipinranka 12:9a20164dcc47 313 {
vipinranka 12:9a20164dcc47 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
vipinranka 12:9a20164dcc47 315 register uint32_t __regfpscr __ASM("fpscr");
vipinranka 12:9a20164dcc47 316 __regfpscr = (fpscr);
vipinranka 12:9a20164dcc47 317 #endif
vipinranka 12:9a20164dcc47 318 }
vipinranka 12:9a20164dcc47 319
vipinranka 12:9a20164dcc47 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
vipinranka 12:9a20164dcc47 321
vipinranka 12:9a20164dcc47 322
vipinranka 12:9a20164dcc47 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
vipinranka 12:9a20164dcc47 324 /* GNU gcc specific functions */
vipinranka 12:9a20164dcc47 325
vipinranka 12:9a20164dcc47 326 /** \brief Enable IRQ Interrupts
vipinranka 12:9a20164dcc47 327
vipinranka 12:9a20164dcc47 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
vipinranka 12:9a20164dcc47 329 Can only be executed in Privileged modes.
vipinranka 12:9a20164dcc47 330 */
vipinranka 12:9a20164dcc47 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
vipinranka 12:9a20164dcc47 332 {
vipinranka 12:9a20164dcc47 333 __ASM volatile ("cpsie i" : : : "memory");
vipinranka 12:9a20164dcc47 334 }
vipinranka 12:9a20164dcc47 335
vipinranka 12:9a20164dcc47 336
vipinranka 12:9a20164dcc47 337 /** \brief Disable IRQ Interrupts
vipinranka 12:9a20164dcc47 338
vipinranka 12:9a20164dcc47 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
vipinranka 12:9a20164dcc47 340 Can only be executed in Privileged modes.
vipinranka 12:9a20164dcc47 341 */
vipinranka 12:9a20164dcc47 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
vipinranka 12:9a20164dcc47 343 {
vipinranka 12:9a20164dcc47 344 __ASM volatile ("cpsid i" : : : "memory");
vipinranka 12:9a20164dcc47 345 }
vipinranka 12:9a20164dcc47 346
vipinranka 12:9a20164dcc47 347
vipinranka 12:9a20164dcc47 348 /** \brief Get Control Register
vipinranka 12:9a20164dcc47 349
vipinranka 12:9a20164dcc47 350 This function returns the content of the Control Register.
vipinranka 12:9a20164dcc47 351
vipinranka 12:9a20164dcc47 352 \return Control Register value
vipinranka 12:9a20164dcc47 353 */
vipinranka 12:9a20164dcc47 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
vipinranka 12:9a20164dcc47 355 {
vipinranka 12:9a20164dcc47 356 uint32_t result;
vipinranka 12:9a20164dcc47 357
vipinranka 12:9a20164dcc47 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
vipinranka 12:9a20164dcc47 359 return(result);
vipinranka 12:9a20164dcc47 360 }
vipinranka 12:9a20164dcc47 361
vipinranka 12:9a20164dcc47 362
vipinranka 12:9a20164dcc47 363 /** \brief Set Control Register
vipinranka 12:9a20164dcc47 364
vipinranka 12:9a20164dcc47 365 This function writes the given value to the Control Register.
vipinranka 12:9a20164dcc47 366
vipinranka 12:9a20164dcc47 367 \param [in] control Control Register value to set
vipinranka 12:9a20164dcc47 368 */
vipinranka 12:9a20164dcc47 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
vipinranka 12:9a20164dcc47 370 {
vipinranka 12:9a20164dcc47 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
vipinranka 12:9a20164dcc47 372 }
vipinranka 12:9a20164dcc47 373
vipinranka 12:9a20164dcc47 374
vipinranka 12:9a20164dcc47 375 /** \brief Get IPSR Register
vipinranka 12:9a20164dcc47 376
vipinranka 12:9a20164dcc47 377 This function returns the content of the IPSR Register.
vipinranka 12:9a20164dcc47 378
vipinranka 12:9a20164dcc47 379 \return IPSR Register value
vipinranka 12:9a20164dcc47 380 */
vipinranka 12:9a20164dcc47 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
vipinranka 12:9a20164dcc47 382 {
vipinranka 12:9a20164dcc47 383 uint32_t result;
vipinranka 12:9a20164dcc47 384
vipinranka 12:9a20164dcc47 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
vipinranka 12:9a20164dcc47 386 return(result);
vipinranka 12:9a20164dcc47 387 }
vipinranka 12:9a20164dcc47 388
vipinranka 12:9a20164dcc47 389
vipinranka 12:9a20164dcc47 390 /** \brief Get APSR Register
vipinranka 12:9a20164dcc47 391
vipinranka 12:9a20164dcc47 392 This function returns the content of the APSR Register.
vipinranka 12:9a20164dcc47 393
vipinranka 12:9a20164dcc47 394 \return APSR Register value
vipinranka 12:9a20164dcc47 395 */
vipinranka 12:9a20164dcc47 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
vipinranka 12:9a20164dcc47 397 {
vipinranka 12:9a20164dcc47 398 uint32_t result;
vipinranka 12:9a20164dcc47 399
vipinranka 12:9a20164dcc47 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
vipinranka 12:9a20164dcc47 401 return(result);
vipinranka 12:9a20164dcc47 402 }
vipinranka 12:9a20164dcc47 403
vipinranka 12:9a20164dcc47 404
vipinranka 12:9a20164dcc47 405 /** \brief Get xPSR Register
vipinranka 12:9a20164dcc47 406
vipinranka 12:9a20164dcc47 407 This function returns the content of the xPSR Register.
vipinranka 12:9a20164dcc47 408
vipinranka 12:9a20164dcc47 409 \return xPSR Register value
vipinranka 12:9a20164dcc47 410 */
vipinranka 12:9a20164dcc47 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
vipinranka 12:9a20164dcc47 412 {
vipinranka 12:9a20164dcc47 413 uint32_t result;
vipinranka 12:9a20164dcc47 414
vipinranka 12:9a20164dcc47 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
vipinranka 12:9a20164dcc47 416 return(result);
vipinranka 12:9a20164dcc47 417 }
vipinranka 12:9a20164dcc47 418
vipinranka 12:9a20164dcc47 419
vipinranka 12:9a20164dcc47 420 /** \brief Get Process Stack Pointer
vipinranka 12:9a20164dcc47 421
vipinranka 12:9a20164dcc47 422 This function returns the current value of the Process Stack Pointer (PSP).
vipinranka 12:9a20164dcc47 423
vipinranka 12:9a20164dcc47 424 \return PSP Register value
vipinranka 12:9a20164dcc47 425 */
vipinranka 12:9a20164dcc47 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
vipinranka 12:9a20164dcc47 427 {
vipinranka 12:9a20164dcc47 428 register uint32_t result;
vipinranka 12:9a20164dcc47 429
vipinranka 12:9a20164dcc47 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
vipinranka 12:9a20164dcc47 431 return(result);
vipinranka 12:9a20164dcc47 432 }
vipinranka 12:9a20164dcc47 433
vipinranka 12:9a20164dcc47 434
vipinranka 12:9a20164dcc47 435 /** \brief Set Process Stack Pointer
vipinranka 12:9a20164dcc47 436
vipinranka 12:9a20164dcc47 437 This function assigns the given value to the Process Stack Pointer (PSP).
vipinranka 12:9a20164dcc47 438
vipinranka 12:9a20164dcc47 439 \param [in] topOfProcStack Process Stack Pointer value to set
vipinranka 12:9a20164dcc47 440 */
vipinranka 12:9a20164dcc47 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
vipinranka 12:9a20164dcc47 442 {
vipinranka 12:9a20164dcc47 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
vipinranka 12:9a20164dcc47 444 }
vipinranka 12:9a20164dcc47 445
vipinranka 12:9a20164dcc47 446
vipinranka 12:9a20164dcc47 447 /** \brief Get Main Stack Pointer
vipinranka 12:9a20164dcc47 448
vipinranka 12:9a20164dcc47 449 This function returns the current value of the Main Stack Pointer (MSP).
vipinranka 12:9a20164dcc47 450
vipinranka 12:9a20164dcc47 451 \return MSP Register value
vipinranka 12:9a20164dcc47 452 */
vipinranka 12:9a20164dcc47 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
vipinranka 12:9a20164dcc47 454 {
vipinranka 12:9a20164dcc47 455 register uint32_t result;
vipinranka 12:9a20164dcc47 456
vipinranka 12:9a20164dcc47 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
vipinranka 12:9a20164dcc47 458 return(result);
vipinranka 12:9a20164dcc47 459 }
vipinranka 12:9a20164dcc47 460
vipinranka 12:9a20164dcc47 461
vipinranka 12:9a20164dcc47 462 /** \brief Set Main Stack Pointer
vipinranka 12:9a20164dcc47 463
vipinranka 12:9a20164dcc47 464 This function assigns the given value to the Main Stack Pointer (MSP).
vipinranka 12:9a20164dcc47 465
vipinranka 12:9a20164dcc47 466 \param [in] topOfMainStack Main Stack Pointer value to set
vipinranka 12:9a20164dcc47 467 */
vipinranka 12:9a20164dcc47 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
vipinranka 12:9a20164dcc47 469 {
vipinranka 12:9a20164dcc47 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
vipinranka 12:9a20164dcc47 471 }
vipinranka 12:9a20164dcc47 472
vipinranka 12:9a20164dcc47 473
vipinranka 12:9a20164dcc47 474 /** \brief Get Priority Mask
vipinranka 12:9a20164dcc47 475
vipinranka 12:9a20164dcc47 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
vipinranka 12:9a20164dcc47 477
vipinranka 12:9a20164dcc47 478 \return Priority Mask value
vipinranka 12:9a20164dcc47 479 */
vipinranka 12:9a20164dcc47 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
vipinranka 12:9a20164dcc47 481 {
vipinranka 12:9a20164dcc47 482 uint32_t result;
vipinranka 12:9a20164dcc47 483
vipinranka 12:9a20164dcc47 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
vipinranka 12:9a20164dcc47 485 return(result);
vipinranka 12:9a20164dcc47 486 }
vipinranka 12:9a20164dcc47 487
vipinranka 12:9a20164dcc47 488
vipinranka 12:9a20164dcc47 489 /** \brief Set Priority Mask
vipinranka 12:9a20164dcc47 490
vipinranka 12:9a20164dcc47 491 This function assigns the given value to the Priority Mask Register.
vipinranka 12:9a20164dcc47 492
vipinranka 12:9a20164dcc47 493 \param [in] priMask Priority Mask
vipinranka 12:9a20164dcc47 494 */
vipinranka 12:9a20164dcc47 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
vipinranka 12:9a20164dcc47 496 {
vipinranka 12:9a20164dcc47 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
vipinranka 12:9a20164dcc47 498 }
vipinranka 12:9a20164dcc47 499
vipinranka 12:9a20164dcc47 500
vipinranka 12:9a20164dcc47 501 #if (__CORTEX_M >= 0x03)
vipinranka 12:9a20164dcc47 502
vipinranka 12:9a20164dcc47 503 /** \brief Enable FIQ
vipinranka 12:9a20164dcc47 504
vipinranka 12:9a20164dcc47 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
vipinranka 12:9a20164dcc47 506 Can only be executed in Privileged modes.
vipinranka 12:9a20164dcc47 507 */
vipinranka 12:9a20164dcc47 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
vipinranka 12:9a20164dcc47 509 {
vipinranka 12:9a20164dcc47 510 __ASM volatile ("cpsie f" : : : "memory");
vipinranka 12:9a20164dcc47 511 }
vipinranka 12:9a20164dcc47 512
vipinranka 12:9a20164dcc47 513
vipinranka 12:9a20164dcc47 514 /** \brief Disable FIQ
vipinranka 12:9a20164dcc47 515
vipinranka 12:9a20164dcc47 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
vipinranka 12:9a20164dcc47 517 Can only be executed in Privileged modes.
vipinranka 12:9a20164dcc47 518 */
vipinranka 12:9a20164dcc47 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
vipinranka 12:9a20164dcc47 520 {
vipinranka 12:9a20164dcc47 521 __ASM volatile ("cpsid f" : : : "memory");
vipinranka 12:9a20164dcc47 522 }
vipinranka 12:9a20164dcc47 523
vipinranka 12:9a20164dcc47 524
vipinranka 12:9a20164dcc47 525 /** \brief Get Base Priority
vipinranka 12:9a20164dcc47 526
vipinranka 12:9a20164dcc47 527 This function returns the current value of the Base Priority register.
vipinranka 12:9a20164dcc47 528
vipinranka 12:9a20164dcc47 529 \return Base Priority register value
vipinranka 12:9a20164dcc47 530 */
vipinranka 12:9a20164dcc47 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
vipinranka 12:9a20164dcc47 532 {
vipinranka 12:9a20164dcc47 533 uint32_t result;
vipinranka 12:9a20164dcc47 534
vipinranka 12:9a20164dcc47 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
vipinranka 12:9a20164dcc47 536 return(result);
vipinranka 12:9a20164dcc47 537 }
vipinranka 12:9a20164dcc47 538
vipinranka 12:9a20164dcc47 539
vipinranka 12:9a20164dcc47 540 /** \brief Set Base Priority
vipinranka 12:9a20164dcc47 541
vipinranka 12:9a20164dcc47 542 This function assigns the given value to the Base Priority register.
vipinranka 12:9a20164dcc47 543
vipinranka 12:9a20164dcc47 544 \param [in] basePri Base Priority value to set
vipinranka 12:9a20164dcc47 545 */
vipinranka 12:9a20164dcc47 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
vipinranka 12:9a20164dcc47 547 {
vipinranka 12:9a20164dcc47 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
vipinranka 12:9a20164dcc47 549 }
vipinranka 12:9a20164dcc47 550
vipinranka 12:9a20164dcc47 551
vipinranka 12:9a20164dcc47 552 /** \brief Set Base Priority with condition
vipinranka 12:9a20164dcc47 553
vipinranka 12:9a20164dcc47 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
vipinranka 12:9a20164dcc47 555 or the new value increases the BASEPRI priority level.
vipinranka 12:9a20164dcc47 556
vipinranka 12:9a20164dcc47 557 \param [in] basePri Base Priority value to set
vipinranka 12:9a20164dcc47 558 */
vipinranka 12:9a20164dcc47 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
vipinranka 12:9a20164dcc47 560 {
vipinranka 12:9a20164dcc47 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
vipinranka 12:9a20164dcc47 562 }
vipinranka 12:9a20164dcc47 563
vipinranka 12:9a20164dcc47 564
vipinranka 12:9a20164dcc47 565 /** \brief Get Fault Mask
vipinranka 12:9a20164dcc47 566
vipinranka 12:9a20164dcc47 567 This function returns the current value of the Fault Mask register.
vipinranka 12:9a20164dcc47 568
vipinranka 12:9a20164dcc47 569 \return Fault Mask register value
vipinranka 12:9a20164dcc47 570 */
vipinranka 12:9a20164dcc47 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
vipinranka 12:9a20164dcc47 572 {
vipinranka 12:9a20164dcc47 573 uint32_t result;
vipinranka 12:9a20164dcc47 574
vipinranka 12:9a20164dcc47 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
vipinranka 12:9a20164dcc47 576 return(result);
vipinranka 12:9a20164dcc47 577 }
vipinranka 12:9a20164dcc47 578
vipinranka 12:9a20164dcc47 579
vipinranka 12:9a20164dcc47 580 /** \brief Set Fault Mask
vipinranka 12:9a20164dcc47 581
vipinranka 12:9a20164dcc47 582 This function assigns the given value to the Fault Mask register.
vipinranka 12:9a20164dcc47 583
vipinranka 12:9a20164dcc47 584 \param [in] faultMask Fault Mask value to set
vipinranka 12:9a20164dcc47 585 */
vipinranka 12:9a20164dcc47 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
vipinranka 12:9a20164dcc47 587 {
vipinranka 12:9a20164dcc47 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
vipinranka 12:9a20164dcc47 589 }
vipinranka 12:9a20164dcc47 590
vipinranka 12:9a20164dcc47 591 #endif /* (__CORTEX_M >= 0x03) */
vipinranka 12:9a20164dcc47 592
vipinranka 12:9a20164dcc47 593
vipinranka 12:9a20164dcc47 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
vipinranka 12:9a20164dcc47 595
vipinranka 12:9a20164dcc47 596 /** \brief Get FPSCR
vipinranka 12:9a20164dcc47 597
vipinranka 12:9a20164dcc47 598 This function returns the current value of the Floating Point Status/Control register.
vipinranka 12:9a20164dcc47 599
vipinranka 12:9a20164dcc47 600 \return Floating Point Status/Control register value
vipinranka 12:9a20164dcc47 601 */
vipinranka 12:9a20164dcc47 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
vipinranka 12:9a20164dcc47 603 {
vipinranka 12:9a20164dcc47 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
vipinranka 12:9a20164dcc47 605 uint32_t result;
vipinranka 12:9a20164dcc47 606
vipinranka 12:9a20164dcc47 607 /* Empty asm statement works as a scheduling barrier */
vipinranka 12:9a20164dcc47 608 __ASM volatile ("");
vipinranka 12:9a20164dcc47 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
vipinranka 12:9a20164dcc47 610 __ASM volatile ("");
vipinranka 12:9a20164dcc47 611 return(result);
vipinranka 12:9a20164dcc47 612 #else
vipinranka 12:9a20164dcc47 613 return(0);
vipinranka 12:9a20164dcc47 614 #endif
vipinranka 12:9a20164dcc47 615 }
vipinranka 12:9a20164dcc47 616
vipinranka 12:9a20164dcc47 617
vipinranka 12:9a20164dcc47 618 /** \brief Set FPSCR
vipinranka 12:9a20164dcc47 619
vipinranka 12:9a20164dcc47 620 This function assigns the given value to the Floating Point Status/Control register.
vipinranka 12:9a20164dcc47 621
vipinranka 12:9a20164dcc47 622 \param [in] fpscr Floating Point Status/Control value to set
vipinranka 12:9a20164dcc47 623 */
vipinranka 12:9a20164dcc47 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
vipinranka 12:9a20164dcc47 625 {
vipinranka 12:9a20164dcc47 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
vipinranka 12:9a20164dcc47 627 /* Empty asm statement works as a scheduling barrier */
vipinranka 12:9a20164dcc47 628 __ASM volatile ("");
vipinranka 12:9a20164dcc47 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
vipinranka 12:9a20164dcc47 630 __ASM volatile ("");
vipinranka 12:9a20164dcc47 631 #endif
vipinranka 12:9a20164dcc47 632 }
vipinranka 12:9a20164dcc47 633
vipinranka 12:9a20164dcc47 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
vipinranka 12:9a20164dcc47 635
vipinranka 12:9a20164dcc47 636
vipinranka 12:9a20164dcc47 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
vipinranka 12:9a20164dcc47 638 /* IAR iccarm specific functions */
vipinranka 12:9a20164dcc47 639 #include <cmsis_iar.h>
vipinranka 12:9a20164dcc47 640
vipinranka 12:9a20164dcc47 641
vipinranka 12:9a20164dcc47 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
vipinranka 12:9a20164dcc47 643 /* TI CCS specific functions */
vipinranka 12:9a20164dcc47 644 #include <cmsis_ccs.h>
vipinranka 12:9a20164dcc47 645
vipinranka 12:9a20164dcc47 646
vipinranka 12:9a20164dcc47 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
vipinranka 12:9a20164dcc47 648 /* TASKING carm specific functions */
vipinranka 12:9a20164dcc47 649 /*
vipinranka 12:9a20164dcc47 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
vipinranka 12:9a20164dcc47 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
vipinranka 12:9a20164dcc47 652 * Including the CMSIS ones.
vipinranka 12:9a20164dcc47 653 */
vipinranka 12:9a20164dcc47 654
vipinranka 12:9a20164dcc47 655
vipinranka 12:9a20164dcc47 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
vipinranka 12:9a20164dcc47 657 /* Cosmic specific functions */
vipinranka 12:9a20164dcc47 658 #include <cmsis_csm.h>
vipinranka 12:9a20164dcc47 659
vipinranka 12:9a20164dcc47 660 #endif
vipinranka 12:9a20164dcc47 661
vipinranka 12:9a20164dcc47 662 /*@} end of CMSIS_Core_RegAccFunctions */
vipinranka 12:9a20164dcc47 663
vipinranka 12:9a20164dcc47 664 #endif /* __CORE_CMFUNC_H */