Vipin Ranka / MGAS_GR_Peach

This is the final version of Mini Gateway for Automation and Security desgined for Renesas GR Peach Design Contest

Dependencies:   GR-PEACH_video GraphicsFramework HTTPServer R_BSP mbed-rpc mbed-rtos Socket lwip-eth lwip-sys lwip FATFileSystem

Fork of mbed-os-example-mbed5-blinky by mbed-os-examples

UniGraphic/Inits/TFT_MIPI.cpp@12:9a20164dcc47, 2017-01-11 (annotated)

Committer:
vipinranka
Date:
Wed Jan 11 11:41:30 2017 +0000
Revision:
12:9a20164dcc47
This is the final version MGAS Project for Renesas GR Peach Design Contest

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vipinranka 12:9a20164dcc47 1 /* mbed UniGraphic library - Device specific class
vipinranka 12:9a20164dcc47 2 * Copyright (c) 2015 Giuliano Dianda
vipinranka 12:9a20164dcc47 3 * Released under the MIT License: http://mbed.org/license/mit
vipinranka 12:9a20164dcc47 4 */
vipinranka 12:9a20164dcc47 5 #include "Protocols.h"
vipinranka 12:9a20164dcc47 6 #include "TFT_MIPI.h"
vipinranka 12:9a20164dcc47 7
vipinranka 12:9a20164dcc47 8 //////////////////////////////////////////////////////////////////////////////////
vipinranka 12:9a20164dcc47 9 // display settings ///////////////////////////////////////////////////////
vipinranka 12:9a20164dcc47 10 /////////////////////////////////////////////////////////////////////////
vipinranka 12:9a20164dcc47 11
vipinranka 12:9a20164dcc47 12 // put in constructor
vipinranka 12:9a20164dcc47 13 //#define LCDSIZE_X 320 // display X pixels, TFTs are usually portrait view
vipinranka 12:9a20164dcc47 14 //#define LCDSIZE_Y 480 // display Y pixels
vipinranka 12:9a20164dcc47 15
vipinranka 12:9a20164dcc47 16
vipinranka 12:9a20164dcc47 17
vipinranka 12:9a20164dcc47 18 TFT_MIPI::TFT_MIPI(proto_t displayproto, PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD, const char *name , unsigned int LCDSIZE_X, unsigned int LCDSIZE_Y)
vipinranka 12:9a20164dcc47 19 : TFT(displayproto, port, CS, reset, DC, WR, RD, LCDSIZE_X, LCDSIZE_Y, name)
vipinranka 12:9a20164dcc47 20 {
vipinranka 12:9a20164dcc47 21 hw_reset();
vipinranka 12:9a20164dcc47 22 BusEnable(true);
vipinranka 12:9a20164dcc47 23 identify(); // will collect tftID, set mipistd flag
vipinranka 12:9a20164dcc47 24 init();
vipinranka 12:9a20164dcc47 25 auto_gram_read_format();// try to get read gram pixel format, could be 16bit or 18bit, RGB or BGR. Will set flags accordingly
vipinranka 12:9a20164dcc47 26 // scrollbugfix=1; // when scrolling 1 line, the last line disappears, set to 1 to fix it, for ili9481 is set automatically in identify()
vipinranka 12:9a20164dcc47 27 set_orientation(0);
vipinranka 12:9a20164dcc47 28 // FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. Give a try
vipinranka 12:9a20164dcc47 29 cls();
vipinranka 12:9a20164dcc47 30 locate(0,0);
vipinranka 12:9a20164dcc47 31 }
vipinranka 12:9a20164dcc47 32 TFT_MIPI::TFT_MIPI(proto_t displayproto, int Hz, PinName mosi, PinName miso, PinName sclk, PinName CS, PinName reset, PinName DC, const char *name , unsigned int LCDSIZE_X , unsigned int LCDSIZE_Y )
vipinranka 12:9a20164dcc47 33 : TFT(displayproto, Hz, mosi, miso, sclk, CS, reset, DC, LCDSIZE_X, LCDSIZE_Y, name)
vipinranka 12:9a20164dcc47 34 {
vipinranka 12:9a20164dcc47 35 hw_reset(); //TFT class forwards to Protocol class
vipinranka 12:9a20164dcc47 36 BusEnable(true); //TFT class forwards to Protocol class
vipinranka 12:9a20164dcc47 37 identify(); // will collect tftID and set mipistd flag
vipinranka 12:9a20164dcc47 38 init(); // per display custom init cmd sequence, implemented here
vipinranka 12:9a20164dcc47 39 auto_gram_read_format();// try to get read gram pixel format, could be 16bit or 18bit, RGB or BGR. Will set flags accordingly
vipinranka 12:9a20164dcc47 40 // scrollbugfix=1; // when scrolling 1 line, the last line disappears, set to 1 to fix it, for ili9481 is set automatically in identify()
vipinranka 12:9a20164dcc47 41 set_orientation(0); //TFT class does for MIPI standard and some ILIxxx
vipinranka 12:9a20164dcc47 42 // FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. Give a try
vipinranka 12:9a20164dcc47 43 cls();
vipinranka 12:9a20164dcc47 44 locate(0,0);
vipinranka 12:9a20164dcc47 45 }
vipinranka 12:9a20164dcc47 46 // reset and init the lcd controller
vipinranka 12:9a20164dcc47 47 void TFT_MIPI::init()
vipinranka 12:9a20164dcc47 48 {
vipinranka 12:9a20164dcc47 49 /* Start Initial Sequence ----------------------------------------------------*/
vipinranka 12:9a20164dcc47 50
vipinranka 12:9a20164dcc47 51 /* Start Initial Sequence ----------------------------------------------------*/
vipinranka 12:9a20164dcc47 52 wr_cmd8(0xD0); // POWER SETTING
vipinranka 12:9a20164dcc47 53 wr_data8(0x07);
vipinranka 12:9a20164dcc47 54 wr_data8(0x42);
vipinranka 12:9a20164dcc47 55 wr_data8(0x18);
vipinranka 12:9a20164dcc47 56
vipinranka 12:9a20164dcc47 57 wr_cmd8(0xD1); // VCOM control
vipinranka 12:9a20164dcc47 58 wr_data8(0x00);
vipinranka 12:9a20164dcc47 59 wr_data8(0x07);
vipinranka 12:9a20164dcc47 60 wr_data8(0x10);
vipinranka 12:9a20164dcc47 61
vipinranka 12:9a20164dcc47 62 wr_cmd8(0xD2); // Power_Setting for Normal Mode
vipinranka 12:9a20164dcc47 63 wr_data8(0x01); // LCD power supply current
vipinranka 12:9a20164dcc47 64 wr_data8(0x02); // charge pumps
vipinranka 12:9a20164dcc47 65
vipinranka 12:9a20164dcc47 66 wr_cmd8(0xC0); // Panel Driving Setting
vipinranka 12:9a20164dcc47 67 wr_data8(0x10); // 10 orig
vipinranka 12:9a20164dcc47 68 wr_data8(0x3B); //number of lines+1 *8
vipinranka 12:9a20164dcc47 69 wr_data8(0x00);
vipinranka 12:9a20164dcc47 70 wr_data8(0x02);
vipinranka 12:9a20164dcc47 71 wr_data8(0x11);
vipinranka 12:9a20164dcc47 72
vipinranka 12:9a20164dcc47 73 // C1 missing? Display_Timing_Setting for Normal Mode
vipinranka 12:9a20164dcc47 74
vipinranka 12:9a20164dcc47 75 //renesas does not have this
vipinranka 12:9a20164dcc47 76 // wr_cmd8(0xC5); // Frame Rate and Inversion Control
vipinranka 12:9a20164dcc47 77 // wr_data8(0x03); // 72hz, datashet tells default 02=85hz
vipinranka 12:9a20164dcc47 78
vipinranka 12:9a20164dcc47 79 wr_cmd8(0xC8); // Gamma settings
vipinranka 12:9a20164dcc47 80 wr_data8(0x00);
vipinranka 12:9a20164dcc47 81 wr_data8(0x32);
vipinranka 12:9a20164dcc47 82 wr_data8(0x36);
vipinranka 12:9a20164dcc47 83 wr_data8(0x45);
vipinranka 12:9a20164dcc47 84 wr_data8(0x06);
vipinranka 12:9a20164dcc47 85 wr_data8(0x16);
vipinranka 12:9a20164dcc47 86 wr_data8(0x37);
vipinranka 12:9a20164dcc47 87 wr_data8(0x75);
vipinranka 12:9a20164dcc47 88 wr_data8(0x77);
vipinranka 12:9a20164dcc47 89 wr_data8(0x54);
vipinranka 12:9a20164dcc47 90 wr_data8(0x0C);
vipinranka 12:9a20164dcc47 91 wr_data8(0x00);
vipinranka 12:9a20164dcc47 92
vipinranka 12:9a20164dcc47 93
vipinranka 12:9a20164dcc47 94
vipinranka 12:9a20164dcc47 95 wr_cmd8(0x36); // MEMORY_ACCESS_CONTROL (orientation stuff)
vipinranka 12:9a20164dcc47 96 wr_data8(0x0A); // 0A as per chinese example (vertical flipped)
vipinranka 12:9a20164dcc47 97
vipinranka 12:9a20164dcc47 98 wr_cmd8(0x3A); // COLMOD_PIXEL_FORMAT_SET, not present in AN
vipinranka 12:9a20164dcc47 99 wr_data8(0x55); // 16 bit pixel
vipinranka 12:9a20164dcc47 100
vipinranka 12:9a20164dcc47 101 wr_cmd8(0x13); // Nomal Displaymode
vipinranka 12:9a20164dcc47 102
vipinranka 12:9a20164dcc47 103 wr_cmd8(0x11); // sleep out
vipinranka 12:9a20164dcc47 104 wait_ms(150);
vipinranka 12:9a20164dcc47 105
vipinranka 12:9a20164dcc47 106 wr_cmd8(0x29); // display on
vipinranka 12:9a20164dcc47 107 wait_ms(150);
vipinranka 12:9a20164dcc47 108
vipinranka 12:9a20164dcc47 109 }