protegemed, aquisição via A/D simples utilizando interrupção do timer

Dependencies:   EthernetInterface NTPClient mbed-rtos mbed

Fork of ptgm_semDMA by Marcelo Rebonatto

Committer:
rebonatto
Date:
Tue Jan 05 11:47:35 2016 +0000
Revision:
0:fac116e94d44
Vers?o est?vel sem DMA e FFT. 128 amostras.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rebonatto 0:fac116e94d44 1 /*
rebonatto 0:fac116e94d44 2 * dma.c
rebonatto 0:fac116e94d44 3 *
rebonatto 0:fac116e94d44 4 * Created on: 03/07/2011
rebonatto 0:fac116e94d44 5 * Author: francisco
rebonatto 0:fac116e94d44 6 */
rebonatto 0:fac116e94d44 7 #include <LPC17xx.h>
rebonatto 0:fac116e94d44 8 #include "dma.h"
rebonatto 0:fac116e94d44 9
rebonatto 0:fac116e94d44 10 #define LPC_GPDMACH ((LPC_GPDMACH_TypeDef **) LPC_GPDMACH0_BASE )
rebonatto 0:fac116e94d44 11
rebonatto 0:fac116e94d44 12 void init_dma()
rebonatto 0:fac116e94d44 13 {
rebonatto 0:fac116e94d44 14 LPC_SC->PCONP |= 1<<29; //Power GPDMA module
rebonatto 0:fac116e94d44 15
rebonatto 0:fac116e94d44 16 LPC_GPDMA->DMACConfig = 1; //Enable GPDMA
rebonatto 0:fac116e94d44 17
rebonatto 0:fac116e94d44 18 //Clear any previous interrupts
rebonatto 0:fac116e94d44 19 LPC_GPDMA->DMACIntTCClear = 0xFF;
rebonatto 0:fac116e94d44 20 LPC_GPDMA->DMACIntErrClr = 0xFF;
rebonatto 0:fac116e94d44 21
rebonatto 0:fac116e94d44 22 NVIC_SetPriority(DMA_IRQn,(1<<__NVIC_PRIO_BITS) - 1);
rebonatto 0:fac116e94d44 23 NVIC_EnableIRQ(DMA_IRQn);
rebonatto 0:fac116e94d44 24 }
rebonatto 0:fac116e94d44 25
rebonatto 0:fac116e94d44 26 void setup_channel(dmaLinkedListNode* pList,int ch,int src,int dst)
rebonatto 0:fac116e94d44 27 {
rebonatto 0:fac116e94d44 28 //Initialize the channel with previously configured LL;
rebonatto 0:fac116e94d44 29 LPC_GPDMACH0->DMACCSrcAddr = pList->sourceAddr;
rebonatto 0:fac116e94d44 30 LPC_GPDMACH0->DMACCDestAddr = pList->destAddr;
rebonatto 0:fac116e94d44 31 LPC_GPDMACH0->DMACCControl = pList->dmaControl;
rebonatto 0:fac116e94d44 32 LPC_GPDMACH0->DMACCLLI = (unsigned long int) pList & 0xFFFFFFFC; //Lower bits must be 0
rebonatto 0:fac116e94d44 33
rebonatto 0:fac116e94d44 34 int transfer_type;
rebonatto 0:fac116e94d44 35 if(src == DMA_MEMORY && dst != DMA_MEMORY)
rebonatto 0:fac116e94d44 36 {
rebonatto 0:fac116e94d44 37 transfer_type = DMA_MEMORY_TO_PERIPHERAL;
rebonatto 0:fac116e94d44 38 src = 0;
rebonatto 0:fac116e94d44 39 }
rebonatto 0:fac116e94d44 40 else if(src != DMA_MEMORY && dst == DMA_MEMORY)
rebonatto 0:fac116e94d44 41 {
rebonatto 0:fac116e94d44 42 transfer_type = DMA_PERIPHERAL_TO_MEMORY;
rebonatto 0:fac116e94d44 43 dst = 0;
rebonatto 0:fac116e94d44 44 }
rebonatto 0:fac116e94d44 45 else if(src == DMA_MEMORY && dst == DMA_MEMORY)
rebonatto 0:fac116e94d44 46 {
rebonatto 0:fac116e94d44 47 transfer_type = DMA_MEMORY_TO_MEMORY;
rebonatto 0:fac116e94d44 48 src=dst = 0;
rebonatto 0:fac116e94d44 49 }
rebonatto 0:fac116e94d44 50 else if(src != DMA_MEMORY && dst != DMA_MEMORY)
rebonatto 0:fac116e94d44 51 transfer_type = DMA_PERIPHERAL_TO_PERIPHERAL;
rebonatto 0:fac116e94d44 52
rebonatto 0:fac116e94d44 53 //Set up all relevant bits
rebonatto 0:fac116e94d44 54 LPC_GPDMACH0->DMACCConfig = (src<<1) | (dst<<5) | (transfer_type<<11) | (1<<15);
rebonatto 0:fac116e94d44 55
rebonatto 0:fac116e94d44 56 //Finally, enable the channel -
rebonatto 0:fac116e94d44 57 LPC_GPDMACH0->DMACCConfig |= 1<<0;
rebonatto 0:fac116e94d44 58 }
rebonatto 0:fac116e94d44 59
rebonatto 0:fac116e94d44 60 void stop_channel()
rebonatto 0:fac116e94d44 61 {
rebonatto 0:fac116e94d44 62 LPC_GPDMACH0->DMACCConfig &= ~(1<<0);
rebonatto 0:fac116e94d44 63 }