Firmware for Nucleo boards for the SLab system Description at http://r6500.blogspot.com.es/2018/02/slab-first-release.html All associated files at https://github.com/R6500/SLab
main.cpp@0:39a545e08ccd, 2018-02-10 (annotated)
- Committer:
- vic20
- Date:
- Sat Feb 10 09:43:16 2018 +0000
- Revision:
- 0:39a545e08ccd
- Child:
- 1:d81bef65eece
First commit (Version 1.10)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
vic20 | 0:39a545e08ccd | 1 | /******************************************************* |
vic20 | 0:39a545e08ccd | 2 | |
vic20 | 0:39a545e08ccd | 3 | SLab - Python |
vic20 | 0:39a545e08ccd | 4 | |
vic20 | 0:39a545e08ccd | 5 | MBED Firmware for Nucleo Boards |
vic20 | 0:39a545e08ccd | 6 | Alternate version for profiling |
vic20 | 0:39a545e08ccd | 7 | |
vic20 | 0:39a545e08ccd | 8 | Program to operate a nucleo board from a PC |
vic20 | 0:39a545e08ccd | 9 | in order to perform measurements. |
vic20 | 0:39a545e08ccd | 10 | |
vic20 | 0:39a545e08ccd | 11 | Desgined for the Nucleo64 F303RE Board |
vic20 | 0:39a545e08ccd | 12 | |
vic20 | 0:39a545e08ccd | 13 | Commands implemented in version 1 |
vic20 | 0:39a545e08ccd | 14 | |
vic20 | 0:39a545e08ccd | 15 | Global |
vic20 | 0:39a545e08ccd | 16 | |
vic20 | 0:39a545e08ccd | 17 | F : Obtain a string that describes the firmware |
vic20 | 0:39a545e08ccd | 18 | M : Obtain 4 byte magic code |
vic20 | 0:39a545e08ccd | 19 | I : Board capabilities identification |
vic20 | 0:39a545e08ccd | 20 | L : Pin list |
vic20 | 0:39a545e08ccd | 21 | E : Soft Reset |
vic20 | 0:39a545e08ccd | 22 | |
vic20 | 0:39a545e08ccd | 23 | DC |
vic20 | 0:39a545e08ccd | 24 | |
vic20 | 0:39a545e08ccd | 25 | A + 1 : Read one ADC channel |
vic20 | 0:39a545e08ccd | 26 | D + 3 : Write one DAC channel |
vic20 | 0:39a545e08ccd | 27 | N + 2 : Set number of reads to average |
vic20 | 0:39a545e08ccd | 28 | |
vic20 | 0:39a545e08ccd | 29 | |
vic20 | 0:39a545e08ccd | 30 | Transient |
vic20 | 0:39a545e08ccd | 31 | |
vic20 | 0:39a545e08ccd | 32 | R + 2 : Set sample time |
vic20 | 0:39a545e08ccd | 33 | S + 4 : Set storage configuration |
vic20 | 0:39a545e08ccd | 34 | Y : Async read |
vic20 | 0:39a545e08ccd | 35 | G + 3 : Triggered read |
vic20 | 0:39a545e08ccd | 36 | P + 2 : Step response |
vic20 | 0:39a545e08ccd | 37 | |
vic20 | 0:39a545e08ccd | 38 | Wavetable |
vic20 | 0:39a545e08ccd | 39 | |
vic20 | 0:39a545e08ccd | 40 | W + n : Load a wavetable |
vic20 | 0:39a545e08ccd | 41 | w + n : Load a secondary wavetable |
vic20 | 0:39a545e08ccd | 42 | V + 2 : Wave response |
vic20 | 0:39a545e08ccd | 43 | v + 2 : Dual wave response |
vic20 | 0:39a545e08ccd | 44 | X + 3 : Single Wave Response |
vic20 | 0:39a545e08ccd | 45 | Q + 2 : Wave Play |
vic20 | 0:39a545e08ccd | 46 | q + 2 : Dual Wave Play |
vic20 | 0:39a545e08ccd | 47 | |
vic20 | 0:39a545e08ccd | 48 | Digital I/O |
vic20 | 0:39a545e08ccd | 49 | |
vic20 | 0:39a545e08ccd | 50 | H + 2 : dio mode |
vic20 | 0:39a545e08ccd | 51 | J + 2 : dio write |
vic20 | 0:39a545e08ccd | 52 | K + 1 : dio read |
vic20 | 0:39a545e08ccd | 53 | |
vic20 | 0:39a545e08ccd | 54 | Incidences: |
vic20 | 0:39a545e08ccd | 55 | |
vic20 | 0:39a545e08ccd | 56 | 06/04/2017 : Open Drain does not work as expected |
vic20 | 0:39a545e08ccd | 57 | It is currently disabled |
vic20 | 0:39a545e08ccd | 58 | |
vic20 | 0:39a545e08ccd | 59 | 25/10/2017 : v1.1 |
vic20 | 0:39a545e08ccd | 60 | Hardware profile lines added |
vic20 | 0:39a545e08ccd | 61 | Improved timings. Minimum sample times: |
vic20 | 0:39a545e08ccd | 62 | Asyn Read: 1CH (13us) 2CH (33us) 3CH (43us) 4CH (54us) |
vic20 | 0:39a545e08ccd | 63 | Trig Read: 1CH (13us) 2CH (33us) 3CH (44us) 4CH (54us) |
vic20 | 0:39a545e08ccd | 64 | Step Resp: 1CH (13us) 2CH (36us) 3CH (46us) 4CH (56us) |
vic20 | 0:39a545e08ccd | 65 | Wave Resp: 1CH (13us) 2CH (38us) 3CH (47us) 4CH (58us) |
vic20 | 0:39a545e08ccd | 66 | Dual Wave: 1CH (13us) 2CH (40us) 3CH (50us) 4CH (61us) |
vic20 | 0:39a545e08ccd | 67 | Sing Wave: 1CH Only (13us) |
vic20 | 0:39a545e08ccd | 68 | Wave play: No ADC (11us) |
vic20 | 0:39a545e08ccd | 69 | Dual wave play: No ADC (11us) |
vic20 | 0:39a545e08ccd | 70 | |
vic20 | 0:39a545e08ccd | 71 | ********************************************************/ |
vic20 | 0:39a545e08ccd | 72 | |
vic20 | 0:39a545e08ccd | 73 | #include "mbed.h" |
vic20 | 0:39a545e08ccd | 74 | |
vic20 | 0:39a545e08ccd | 75 | /***************** MAIN DEFINES *************************************/ |
vic20 | 0:39a545e08ccd | 76 | |
vic20 | 0:39a545e08ccd | 77 | // Version string |
vic20 | 0:39a545e08ccd | 78 | #define VSTRING " v1.1" |
vic20 | 0:39a545e08ccd | 79 | |
vic20 | 0:39a545e08ccd | 80 | // Major number version changes when new commands are added |
vic20 | 0:39a545e08ccd | 81 | #define VERSION 1 |
vic20 | 0:39a545e08ccd | 82 | |
vic20 | 0:39a545e08ccd | 83 | // Uncomment to use hardware profiling during tests |
vic20 | 0:39a545e08ccd | 84 | // It should be commented for release versions |
vic20 | 0:39a545e08ccd | 85 | //#define USE_PROFILING 1 |
vic20 | 0:39a545e08ccd | 86 | |
vic20 | 0:39a545e08ccd | 87 | // Information about the board |
vic20 | 0:39a545e08ccd | 88 | #include "Nucleo64-F303RE.h" // Board 1 |
vic20 | 0:39a545e08ccd | 89 | //#include "Nucleo32-F303K8.h" // Board 2 |
vic20 | 0:39a545e08ccd | 90 | //#include "Nucleo64-L152RE.h" // Board 3 |
vic20 | 0:39a545e08ccd | 91 | |
vic20 | 0:39a545e08ccd | 92 | /******************* OTHER CONSTANTS ******************************/ |
vic20 | 0:39a545e08ccd | 93 | |
vic20 | 0:39a545e08ccd | 94 | // Max value in unsigned 16bit as float number |
vic20 | 0:39a545e08ccd | 95 | #define MAX16F 65536.0f |
vic20 | 0:39a545e08ccd | 96 | |
vic20 | 0:39a545e08ccd | 97 | // Special serial codes |
vic20 | 0:39a545e08ccd | 98 | #define ACK 181 |
vic20 | 0:39a545e08ccd | 99 | #define NACK 226 |
vic20 | 0:39a545e08ccd | 100 | #define ECRC 37 |
vic20 | 0:39a545e08ccd | 101 | |
vic20 | 0:39a545e08ccd | 102 | // Codes for transient responses |
vic20 | 0:39a545e08ccd | 103 | #define TRAN_OK 0 // Ok |
vic20 | 0:39a545e08ccd | 104 | #define TRAN_OVERRUN 1 // Sample overrun |
vic20 | 0:39a545e08ccd | 105 | #define TRAN_TIMEOUT 2 // Triggered timeout |
vic20 | 0:39a545e08ccd | 106 | |
vic20 | 0:39a545e08ccd | 107 | // Magic data is different for each firmware |
vic20 | 0:39a545e08ccd | 108 | #define MAGIC_SIZE 4 |
vic20 | 0:39a545e08ccd | 109 | const uint8_t magic[MAGIC_SIZE]={56,41,18,1}; |
vic20 | 0:39a545e08ccd | 110 | |
vic20 | 0:39a545e08ccd | 111 | /***************** VARIABLES AND OBJECTS *************************/ |
vic20 | 0:39a545e08ccd | 112 | |
vic20 | 0:39a545e08ccd | 113 | Serial pc(SERIAL_TX, SERIAL_RX, 38400); // Serial link with PC |
vic20 | 0:39a545e08ccd | 114 | |
vic20 | 0:39a545e08ccd | 115 | AnalogIn ain1(AD1); |
vic20 | 0:39a545e08ccd | 116 | AnalogIn ain2(AD2); |
vic20 | 0:39a545e08ccd | 117 | AnalogIn ain3(AD3); |
vic20 | 0:39a545e08ccd | 118 | AnalogIn ain4(AD4); |
vic20 | 0:39a545e08ccd | 119 | |
vic20 | 0:39a545e08ccd | 120 | AnalogIn *ainList[NADCS]; |
vic20 | 0:39a545e08ccd | 121 | |
vic20 | 0:39a545e08ccd | 122 | AnalogOut aout1(DA1); // DAC1 |
vic20 | 0:39a545e08ccd | 123 | AnalogOut aout2(DA2); // DAC2 |
vic20 | 0:39a545e08ccd | 124 | #ifdef EXIST_DAC3 |
vic20 | 0:39a545e08ccd | 125 | AnalogOut aout3(DA3); // DAC3 if exists |
vic20 | 0:39a545e08ccd | 126 | #endif |
vic20 | 0:39a545e08ccd | 127 | |
vic20 | 0:39a545e08ccd | 128 | #ifdef EXIST_DIO // For now, it requires 8 DIO |
vic20 | 0:39a545e08ccd | 129 | DigitalInOut dio1(DIO1); |
vic20 | 0:39a545e08ccd | 130 | DigitalInOut dio2(DIO2); |
vic20 | 0:39a545e08ccd | 131 | DigitalInOut dio3(DIO3); |
vic20 | 0:39a545e08ccd | 132 | DigitalInOut dio4(DIO4); |
vic20 | 0:39a545e08ccd | 133 | DigitalInOut dio5(DIO5); |
vic20 | 0:39a545e08ccd | 134 | DigitalInOut dio6(DIO6); |
vic20 | 0:39a545e08ccd | 135 | DigitalInOut dio7(DIO7); |
vic20 | 0:39a545e08ccd | 136 | DigitalInOut dio8(DIO8); |
vic20 | 0:39a545e08ccd | 137 | |
vic20 | 0:39a545e08ccd | 138 | DigitalInOut *dioList[NDIO]; |
vic20 | 0:39a545e08ccd | 139 | #endif |
vic20 | 0:39a545e08ccd | 140 | |
vic20 | 0:39a545e08ccd | 141 | // Sample time period defaults to 1ms |
vic20 | 0:39a545e08ccd | 142 | float stime = 0.001; |
vic20 | 0:39a545e08ccd | 143 | |
vic20 | 0:39a545e08ccd | 144 | // Buffer for storage of inputs (in U16) |
vic20 | 0:39a545e08ccd | 145 | //uint16_t inBuff[IN_BSIZE]; |
vic20 | 0:39a545e08ccd | 146 | |
vic20 | 0:39a545e08ccd | 147 | // Wavetable buffer (in U16) |
vic20 | 0:39a545e08ccd | 148 | //uint16_t waveBuff[WSIZE]; |
vic20 | 0:39a545e08ccd | 149 | |
vic20 | 0:39a545e08ccd | 150 | // Unified memory buffer |
vic20 | 0:39a545e08ccd | 151 | uint16_t buff[BSIZE]; |
vic20 | 0:39a545e08ccd | 152 | |
vic20 | 0:39a545e08ccd | 153 | // Start of all buffer sections |
vic20 | 0:39a545e08ccd | 154 | uint16_t *wave2buff = NULL; |
vic20 | 0:39a545e08ccd | 155 | uint16_t *tranBuff = NULL; |
vic20 | 0:39a545e08ccd | 156 | |
vic20 | 0:39a545e08ccd | 157 | // DC analog read number of readings |
vic20 | 0:39a545e08ccd | 158 | int nread = 10; |
vic20 | 0:39a545e08ccd | 159 | |
vic20 | 0:39a545e08ccd | 160 | // Input configuration |
vic20 | 0:39a545e08ccd | 161 | int n_ai = 1; // Number of analog inputs |
vic20 | 0:39a545e08ccd | 162 | int n_di = 0; // Number of digital inputs (always zero) |
vic20 | 0:39a545e08ccd | 163 | int n_s = 1000; // Number of samples |
vic20 | 0:39a545e08ccd | 164 | |
vic20 | 0:39a545e08ccd | 165 | // Ticker for readings |
vic20 | 0:39a545e08ccd | 166 | Ticker ticR; |
vic20 | 0:39a545e08ccd | 167 | |
vic20 | 0:39a545e08ccd | 168 | // Sample information for ticker |
vic20 | 0:39a545e08ccd | 169 | int samples = 0; // Number of processed samples |
vic20 | 0:39a545e08ccd | 170 | int inBuffPos = 0; // Current buffer position |
vic20 | 0:39a545e08ccd | 171 | |
vic20 | 0:39a545e08ccd | 172 | int presamples; // Number of samples before trigger |
vic20 | 0:39a545e08ccd | 173 | int postsamples; // Number of samples after trigger |
vic20 | 0:39a545e08ccd | 174 | int triggerSample; // Sample number at trigger point |
vic20 | 0:39a545e08ccd | 175 | int samplePhase; // Sample phase |
vic20 | 0:39a545e08ccd | 176 | int currentBsize; // Current buffer size |
vic20 | 0:39a545e08ccd | 177 | int trigger; // Trigger value |
vic20 | 0:39a545e08ccd | 178 | int triggerMode; // Trigger mode (0 Rise 1 Fall) |
vic20 | 0:39a545e08ccd | 179 | int stepValue; // Value for step analysis |
vic20 | 0:39a545e08ccd | 180 | |
vic20 | 0:39a545e08ccd | 181 | int checkTimeOut; // Indicates if we check timeout |
vic20 | 0:39a545e08ccd | 182 | uint32_t timeOut; // Timeout for triggered capture |
vic20 | 0:39a545e08ccd | 183 | |
vic20 | 0:39a545e08ccd | 184 | // Global to communicate with ISR ticker |
vic20 | 0:39a545e08ccd | 185 | volatile int endTicker = 0; |
vic20 | 0:39a545e08ccd | 186 | |
vic20 | 0:39a545e08ccd | 187 | // Global to check overruns |
vic20 | 0:39a545e08ccd | 188 | volatile int overrun = 0; |
vic20 | 0:39a545e08ccd | 189 | volatile int overrun_error = 0; |
vic20 | 0:39a545e08ccd | 190 | volatile int timeout_error = 0; |
vic20 | 0:39a545e08ccd | 191 | |
vic20 | 0:39a545e08ccd | 192 | int w_s = 0; // Wavetable size (in samples) |
vic20 | 0:39a545e08ccd | 193 | volatile int w_n = 10; // Number of waves before measurement |
vic20 | 0:39a545e08ccd | 194 | volatile int w_pos = 0; // Current wave position |
vic20 | 0:39a545e08ccd | 195 | |
vic20 | 0:39a545e08ccd | 196 | int w_s2 = 0; // Secondary wavetable size (in samples) |
vic20 | 0:39a545e08ccd | 197 | volatile int w_pos2 = 0; // Current secondary wave position |
vic20 | 0:39a545e08ccd | 198 | |
vic20 | 0:39a545e08ccd | 199 | // Globals for CRC |
vic20 | 0:39a545e08ccd | 200 | int crcTx,crcRx; |
vic20 | 0:39a545e08ccd | 201 | |
vic20 | 0:39a545e08ccd | 202 | // Selected ADC for transient |
vic20 | 0:39a545e08ccd | 203 | AnalogIn *ain_tran; |
vic20 | 0:39a545e08ccd | 204 | |
vic20 | 0:39a545e08ccd | 205 | // Indicate that board status is at reset condition |
vic20 | 0:39a545e08ccd | 206 | int resetState=1; |
vic20 | 0:39a545e08ccd | 207 | |
vic20 | 0:39a545e08ccd | 208 | /****************** HARDWARE PROFILING *********************************/ |
vic20 | 0:39a545e08ccd | 209 | // Uses GPIO lines to show system activity |
vic20 | 0:39a545e08ccd | 210 | |
vic20 | 0:39a545e08ccd | 211 | #ifdef USE_PROFILING |
vic20 | 0:39a545e08ccd | 212 | |
vic20 | 0:39a545e08ccd | 213 | // Profiling outputs |
vic20 | 0:39a545e08ccd | 214 | DigitalOut pro1(PRO1_PIN); |
vic20 | 0:39a545e08ccd | 215 | DigitalOut pro2(PRO2_PIN); |
vic20 | 0:39a545e08ccd | 216 | |
vic20 | 0:39a545e08ccd | 217 | #else |
vic20 | 0:39a545e08ccd | 218 | |
vic20 | 0:39a545e08ccd | 219 | #define PRO1_SET /* No code */ |
vic20 | 0:39a545e08ccd | 220 | #define PRO1_CLEAR /* No code */ |
vic20 | 0:39a545e08ccd | 221 | #define PRO2_SET /* No code */ |
vic20 | 0:39a545e08ccd | 222 | #define PRO2_CLEAR /* No code */ |
vic20 | 0:39a545e08ccd | 223 | |
vic20 | 0:39a545e08ccd | 224 | #endif //USE_PROFILING |
vic20 | 0:39a545e08ccd | 225 | |
vic20 | 0:39a545e08ccd | 226 | /*********************** SERIAL CODE **********************************/ |
vic20 | 0:39a545e08ccd | 227 | |
vic20 | 0:39a545e08ccd | 228 | // Start Tx |
vic20 | 0:39a545e08ccd | 229 | // Clears the tx crc |
vic20 | 0:39a545e08ccd | 230 | void startTx() |
vic20 | 0:39a545e08ccd | 231 | { |
vic20 | 0:39a545e08ccd | 232 | crcTx = 0; |
vic20 | 0:39a545e08ccd | 233 | } |
vic20 | 0:39a545e08ccd | 234 | |
vic20 | 0:39a545e08ccd | 235 | // Send Tx CRC |
vic20 | 0:39a545e08ccd | 236 | // Usually that ends transmission |
vic20 | 0:39a545e08ccd | 237 | void sendCRC() |
vic20 | 0:39a545e08ccd | 238 | { |
vic20 | 0:39a545e08ccd | 239 | pc.putc(crcTx); |
vic20 | 0:39a545e08ccd | 240 | } |
vic20 | 0:39a545e08ccd | 241 | |
vic20 | 0:39a545e08ccd | 242 | // Send one byte and computes crc |
vic20 | 0:39a545e08ccd | 243 | void sendByte(int value) |
vic20 | 0:39a545e08ccd | 244 | { |
vic20 | 0:39a545e08ccd | 245 | pc.putc(value); |
vic20 | 0:39a545e08ccd | 246 | crcTx = crcTx ^ value; |
vic20 | 0:39a545e08ccd | 247 | } |
vic20 | 0:39a545e08ccd | 248 | |
vic20 | 0:39a545e08ccd | 249 | // Send one uint16 and computes crc |
vic20 | 0:39a545e08ccd | 250 | void sendU16(int value) |
vic20 | 0:39a545e08ccd | 251 | { |
vic20 | 0:39a545e08ccd | 252 | int low,high; |
vic20 | 0:39a545e08ccd | 253 | |
vic20 | 0:39a545e08ccd | 254 | high = value / 256; |
vic20 | 0:39a545e08ccd | 255 | low = value % 256; |
vic20 | 0:39a545e08ccd | 256 | |
vic20 | 0:39a545e08ccd | 257 | sendByte(low); |
vic20 | 0:39a545e08ccd | 258 | sendByte(high); |
vic20 | 0:39a545e08ccd | 259 | } |
vic20 | 0:39a545e08ccd | 260 | |
vic20 | 0:39a545e08ccd | 261 | // Send float as mantisa and exponent |
vic20 | 0:39a545e08ccd | 262 | void sendMantExp(int mantissa, int exponent) |
vic20 | 0:39a545e08ccd | 263 | { |
vic20 | 0:39a545e08ccd | 264 | sendByte(exponent+128); |
vic20 | 0:39a545e08ccd | 265 | sendU16(mantissa+20000); |
vic20 | 0:39a545e08ccd | 266 | } |
vic20 | 0:39a545e08ccd | 267 | |
vic20 | 0:39a545e08ccd | 268 | // Send one string and computes crc |
vic20 | 0:39a545e08ccd | 269 | void sendString(char *str) |
vic20 | 0:39a545e08ccd | 270 | { |
vic20 | 0:39a545e08ccd | 271 | while (*str) |
vic20 | 0:39a545e08ccd | 272 | { |
vic20 | 0:39a545e08ccd | 273 | sendByte(*str); |
vic20 | 0:39a545e08ccd | 274 | str++; |
vic20 | 0:39a545e08ccd | 275 | } |
vic20 | 0:39a545e08ccd | 276 | } |
vic20 | 0:39a545e08ccd | 277 | |
vic20 | 0:39a545e08ccd | 278 | // Start of a Rx reception |
vic20 | 0:39a545e08ccd | 279 | void startRx() |
vic20 | 0:39a545e08ccd | 280 | { |
vic20 | 0:39a545e08ccd | 281 | crcRx = 0; |
vic20 | 0:39a545e08ccd | 282 | } |
vic20 | 0:39a545e08ccd | 283 | |
vic20 | 0:39a545e08ccd | 284 | |
vic20 | 0:39a545e08ccd | 285 | // Get CRC anc check it |
vic20 | 0:39a545e08ccd | 286 | // It usually ends the Rx reception |
vic20 | 0:39a545e08ccd | 287 | // Returns 1 if CRC is ok, 0 if not |
vic20 | 0:39a545e08ccd | 288 | int getAndCheckCRC() |
vic20 | 0:39a545e08ccd | 289 | { |
vic20 | 0:39a545e08ccd | 290 | int crc; |
vic20 | 0:39a545e08ccd | 291 | |
vic20 | 0:39a545e08ccd | 292 | crc = pc.getc(); |
vic20 | 0:39a545e08ccd | 293 | if (crc != crcRx) return 0; |
vic20 | 0:39a545e08ccd | 294 | return 1; |
vic20 | 0:39a545e08ccd | 295 | } |
vic20 | 0:39a545e08ccd | 296 | |
vic20 | 0:39a545e08ccd | 297 | // Get and check CRC and sends ECRC in case of error |
vic20 | 0:39a545e08ccd | 298 | // If no error, don't respond anything |
vic20 | 0:39a545e08ccd | 299 | // Returns 1 if CRC is ok, 0 if not |
vic20 | 0:39a545e08ccd | 300 | int crcResponse() |
vic20 | 0:39a545e08ccd | 301 | { |
vic20 | 0:39a545e08ccd | 302 | // Check if CRC is ok |
vic20 | 0:39a545e08ccd | 303 | if (getAndCheckCRC()) return 1; |
vic20 | 0:39a545e08ccd | 304 | |
vic20 | 0:39a545e08ccd | 305 | // If CRC is not ok |
vic20 | 0:39a545e08ccd | 306 | sendByte(ECRC); |
vic20 | 0:39a545e08ccd | 307 | // End transmission |
vic20 | 0:39a545e08ccd | 308 | sendCRC(); |
vic20 | 0:39a545e08ccd | 309 | return 0; |
vic20 | 0:39a545e08ccd | 310 | } |
vic20 | 0:39a545e08ccd | 311 | |
vic20 | 0:39a545e08ccd | 312 | |
vic20 | 0:39a545e08ccd | 313 | // Get one byte and computes crc |
vic20 | 0:39a545e08ccd | 314 | int getByte() |
vic20 | 0:39a545e08ccd | 315 | { |
vic20 | 0:39a545e08ccd | 316 | int byte; |
vic20 | 0:39a545e08ccd | 317 | |
vic20 | 0:39a545e08ccd | 318 | byte = pc.getc(); |
vic20 | 0:39a545e08ccd | 319 | crcRx = crcRx ^byte; |
vic20 | 0:39a545e08ccd | 320 | return byte; |
vic20 | 0:39a545e08ccd | 321 | } |
vic20 | 0:39a545e08ccd | 322 | |
vic20 | 0:39a545e08ccd | 323 | |
vic20 | 0:39a545e08ccd | 324 | // Get one uint16 and computes crc |
vic20 | 0:39a545e08ccd | 325 | int getU16() |
vic20 | 0:39a545e08ccd | 326 | { |
vic20 | 0:39a545e08ccd | 327 | int low, high, value; |
vic20 | 0:39a545e08ccd | 328 | |
vic20 | 0:39a545e08ccd | 329 | low = getByte(); |
vic20 | 0:39a545e08ccd | 330 | high = getByte(); |
vic20 | 0:39a545e08ccd | 331 | value = (256 * high) + low; |
vic20 | 0:39a545e08ccd | 332 | |
vic20 | 0:39a545e08ccd | 333 | return value; |
vic20 | 0:39a545e08ccd | 334 | } |
vic20 | 0:39a545e08ccd | 335 | |
vic20 | 0:39a545e08ccd | 336 | |
vic20 | 0:39a545e08ccd | 337 | // Get one float value and computes crc |
vic20 | 0:39a545e08ccd | 338 | float getFloat() |
vic20 | 0:39a545e08ccd | 339 | { |
vic20 | 0:39a545e08ccd | 340 | int exp,mant; |
vic20 | 0:39a545e08ccd | 341 | float value; |
vic20 | 0:39a545e08ccd | 342 | |
vic20 | 0:39a545e08ccd | 343 | exp = getByte() - 128; |
vic20 | 0:39a545e08ccd | 344 | mant = getU16() - 20000; |
vic20 | 0:39a545e08ccd | 345 | |
vic20 | 0:39a545e08ccd | 346 | value = ((float)mant) * pow((float)10.0,(float)exp); |
vic20 | 0:39a545e08ccd | 347 | |
vic20 | 0:39a545e08ccd | 348 | return value; |
vic20 | 0:39a545e08ccd | 349 | } |
vic20 | 0:39a545e08ccd | 350 | |
vic20 | 0:39a545e08ccd | 351 | /*********************** DC CODE ********************************/ |
vic20 | 0:39a545e08ccd | 352 | |
vic20 | 0:39a545e08ccd | 353 | // Reads one analog line 1... |
vic20 | 0:39a545e08ccd | 354 | // Discards the first reading |
vic20 | 0:39a545e08ccd | 355 | // Uses the indicated number of readings |
vic20 | 0:39a545e08ccd | 356 | static int analogRead(int line) |
vic20 | 0:39a545e08ccd | 357 | { |
vic20 | 0:39a545e08ccd | 358 | int i,value; |
vic20 | 0:39a545e08ccd | 359 | uint32_t sum; |
vic20 | 0:39a545e08ccd | 360 | |
vic20 | 0:39a545e08ccd | 361 | sum = 0; |
vic20 | 0:39a545e08ccd | 362 | for(i=0;i<=nread;i++) |
vic20 | 0:39a545e08ccd | 363 | { |
vic20 | 0:39a545e08ccd | 364 | value=ainList[line-1]->read_u16(); |
vic20 | 0:39a545e08ccd | 365 | if (i) sum+=value; |
vic20 | 0:39a545e08ccd | 366 | } |
vic20 | 0:39a545e08ccd | 367 | |
vic20 | 0:39a545e08ccd | 368 | value = sum/nread; |
vic20 | 0:39a545e08ccd | 369 | |
vic20 | 0:39a545e08ccd | 370 | return value; |
vic20 | 0:39a545e08ccd | 371 | } |
vic20 | 0:39a545e08ccd | 372 | |
vic20 | 0:39a545e08ccd | 373 | /********************* TRANSIENT CODE ***************************/ |
vic20 | 0:39a545e08ccd | 374 | |
vic20 | 0:39a545e08ccd | 375 | // Calculates available transize |
vic20 | 0:39a545e08ccd | 376 | static inline uint16_t tranBuffSize() |
vic20 | 0:39a545e08ccd | 377 | { |
vic20 | 0:39a545e08ccd | 378 | uint16_t size; |
vic20 | 0:39a545e08ccd | 379 | |
vic20 | 0:39a545e08ccd | 380 | size = BSIZE - w_s - w_s2; |
vic20 | 0:39a545e08ccd | 381 | return size; |
vic20 | 0:39a545e08ccd | 382 | } |
vic20 | 0:39a545e08ccd | 383 | |
vic20 | 0:39a545e08ccd | 384 | // Calculates available wave 2 buff size |
vic20 | 0:39a545e08ccd | 385 | static inline uint16_t wave2buffSize() |
vic20 | 0:39a545e08ccd | 386 | { |
vic20 | 0:39a545e08ccd | 387 | uint16_t size; |
vic20 | 0:39a545e08ccd | 388 | |
vic20 | 0:39a545e08ccd | 389 | size = BSIZE - w_s; |
vic20 | 0:39a545e08ccd | 390 | return size; |
vic20 | 0:39a545e08ccd | 391 | } |
vic20 | 0:39a545e08ccd | 392 | |
vic20 | 0:39a545e08ccd | 393 | // Implements command 'R' |
vic20 | 0:39a545e08ccd | 394 | // Sets the sample period time |
vic20 | 0:39a545e08ccd | 395 | void setSampleTime() |
vic20 | 0:39a545e08ccd | 396 | { |
vic20 | 0:39a545e08ccd | 397 | //Get sample time |
vic20 | 0:39a545e08ccd | 398 | stime = getFloat(); |
vic20 | 0:39a545e08ccd | 399 | |
vic20 | 0:39a545e08ccd | 400 | // End of message, check CRC |
vic20 | 0:39a545e08ccd | 401 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 402 | |
vic20 | 0:39a545e08ccd | 403 | // Check limits |
vic20 | 0:39a545e08ccd | 404 | if ((stime < MIN_STIME) || (stime > MAX_STIME)) |
vic20 | 0:39a545e08ccd | 405 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 406 | else |
vic20 | 0:39a545e08ccd | 407 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 408 | |
vic20 | 0:39a545e08ccd | 409 | // End of message |
vic20 | 0:39a545e08ccd | 410 | sendCRC(); |
vic20 | 0:39a545e08ccd | 411 | } |
vic20 | 0:39a545e08ccd | 412 | |
vic20 | 0:39a545e08ccd | 413 | // Implements command 'S' |
vic20 | 0:39a545e08ccd | 414 | // Configure storage |
vic20 | 0:39a545e08ccd | 415 | void setStorage() |
vic20 | 0:39a545e08ccd | 416 | { |
vic20 | 0:39a545e08ccd | 417 | int sample_size,size; |
vic20 | 0:39a545e08ccd | 418 | int error = 0; |
vic20 | 0:39a545e08ccd | 419 | |
vic20 | 0:39a545e08ccd | 420 | // Get number of analog inputs |
vic20 | 0:39a545e08ccd | 421 | n_ai = getByte(); |
vic20 | 0:39a545e08ccd | 422 | if (n_ai > 4) error = 1; |
vic20 | 0:39a545e08ccd | 423 | |
vic20 | 0:39a545e08ccd | 424 | // Get number of digital inputs |
vic20 | 0:39a545e08ccd | 425 | // Not implemented yet |
vic20 | 0:39a545e08ccd | 426 | n_di = getByte(); |
vic20 | 0:39a545e08ccd | 427 | if (n_di != 0) error = 1; |
vic20 | 0:39a545e08ccd | 428 | |
vic20 | 0:39a545e08ccd | 429 | // Get the number of samples |
vic20 | 0:39a545e08ccd | 430 | n_s = getU16(); |
vic20 | 0:39a545e08ccd | 431 | |
vic20 | 0:39a545e08ccd | 432 | // End of message, check CRC |
vic20 | 0:39a545e08ccd | 433 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 434 | |
vic20 | 0:39a545e08ccd | 435 | // Check if it fits the buffer |
vic20 | 0:39a545e08ccd | 436 | if (n_di) |
vic20 | 0:39a545e08ccd | 437 | sample_size = n_ai+1; |
vic20 | 0:39a545e08ccd | 438 | else |
vic20 | 0:39a545e08ccd | 439 | sample_size = n_ai; |
vic20 | 0:39a545e08ccd | 440 | |
vic20 | 0:39a545e08ccd | 441 | size = n_s*sample_size; |
vic20 | 0:39a545e08ccd | 442 | if (size > tranBuffSize()) error = 1; |
vic20 | 0:39a545e08ccd | 443 | |
vic20 | 0:39a545e08ccd | 444 | // Response depending on errors |
vic20 | 0:39a545e08ccd | 445 | if (error) |
vic20 | 0:39a545e08ccd | 446 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 447 | else |
vic20 | 0:39a545e08ccd | 448 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 449 | |
vic20 | 0:39a545e08ccd | 450 | // End of message |
vic20 | 0:39a545e08ccd | 451 | sendCRC(); |
vic20 | 0:39a545e08ccd | 452 | } |
vic20 | 0:39a545e08ccd | 453 | |
vic20 | 0:39a545e08ccd | 454 | // Store analog inputs in circular buffer |
vic20 | 0:39a545e08ccd | 455 | static inline int storeAnalog() |
vic20 | 0:39a545e08ccd | 456 | { |
vic20 | 0:39a545e08ccd | 457 | int a1; |
vic20 | 0:39a545e08ccd | 458 | |
vic20 | 0:39a545e08ccd | 459 | a1 = ain1.read_u16(); |
vic20 | 0:39a545e08ccd | 460 | |
vic20 | 0:39a545e08ccd | 461 | if (n_ai >= 1) tranBuff[inBuffPos++]=a1; |
vic20 | 0:39a545e08ccd | 462 | if (n_ai >= 2) tranBuff[inBuffPos++]=ain2.read_u16(); |
vic20 | 0:39a545e08ccd | 463 | if (n_ai >= 3) tranBuff[inBuffPos++]=ain3.read_u16(); |
vic20 | 0:39a545e08ccd | 464 | if (n_ai >= 4) tranBuff[inBuffPos++]=ain4.read_u16(); |
vic20 | 0:39a545e08ccd | 465 | |
vic20 | 0:39a545e08ccd | 466 | if (inBuffPos == currentBsize) inBuffPos = 0; |
vic20 | 0:39a545e08ccd | 467 | |
vic20 | 0:39a545e08ccd | 468 | return a1; |
vic20 | 0:39a545e08ccd | 469 | } |
vic20 | 0:39a545e08ccd | 470 | |
vic20 | 0:39a545e08ccd | 471 | // Dumps the input buffer on serial |
vic20 | 0:39a545e08ccd | 472 | void dumpInBuffer() |
vic20 | 0:39a545e08ccd | 473 | { |
vic20 | 0:39a545e08ccd | 474 | int ia,is; |
vic20 | 0:39a545e08ccd | 475 | |
vic20 | 0:39a545e08ccd | 476 | // Response code |
vic20 | 0:39a545e08ccd | 477 | if (overrun_error) |
vic20 | 0:39a545e08ccd | 478 | { |
vic20 | 0:39a545e08ccd | 479 | sendByte(TRAN_OVERRUN); |
vic20 | 0:39a545e08ccd | 480 | return; |
vic20 | 0:39a545e08ccd | 481 | } |
vic20 | 0:39a545e08ccd | 482 | else |
vic20 | 0:39a545e08ccd | 483 | sendByte(TRAN_OK); |
vic20 | 0:39a545e08ccd | 484 | |
vic20 | 0:39a545e08ccd | 485 | sendByte(n_ai); // Number of analog |
vic20 | 0:39a545e08ccd | 486 | sendByte(n_di); // Number of digital (always zero) |
vic20 | 0:39a545e08ccd | 487 | sendU16(n_s); // Number of samples |
vic20 | 0:39a545e08ccd | 488 | |
vic20 | 0:39a545e08ccd | 489 | for(ia=0;ia<n_ai;ia++) // For every analog input |
vic20 | 0:39a545e08ccd | 490 | for(is=0;is<n_s;is++) // For every sample |
vic20 | 0:39a545e08ccd | 491 | sendU16(tranBuff[is*n_ai+ia]); // Send it |
vic20 | 0:39a545e08ccd | 492 | } |
vic20 | 0:39a545e08ccd | 493 | |
vic20 | 0:39a545e08ccd | 494 | // Dumps the input buffer on serial |
vic20 | 0:39a545e08ccd | 495 | // Overrides the nimber of analog channels and sets it to 1 |
vic20 | 0:39a545e08ccd | 496 | void dumpInSingleBuffer() |
vic20 | 0:39a545e08ccd | 497 | { |
vic20 | 0:39a545e08ccd | 498 | int is; |
vic20 | 0:39a545e08ccd | 499 | |
vic20 | 0:39a545e08ccd | 500 | // Response code |
vic20 | 0:39a545e08ccd | 501 | if (overrun_error) |
vic20 | 0:39a545e08ccd | 502 | { |
vic20 | 0:39a545e08ccd | 503 | sendByte(TRAN_OVERRUN); |
vic20 | 0:39a545e08ccd | 504 | return; |
vic20 | 0:39a545e08ccd | 505 | } |
vic20 | 0:39a545e08ccd | 506 | else |
vic20 | 0:39a545e08ccd | 507 | sendByte(TRAN_OK); |
vic20 | 0:39a545e08ccd | 508 | |
vic20 | 0:39a545e08ccd | 509 | sendByte(1); // Number of analog is 1 |
vic20 | 0:39a545e08ccd | 510 | sendByte(n_di); // Number of digital (always zero) |
vic20 | 0:39a545e08ccd | 511 | sendU16(n_s); // Number of samples |
vic20 | 0:39a545e08ccd | 512 | |
vic20 | 0:39a545e08ccd | 513 | for(is=0;is<n_s;is++) // For every sample |
vic20 | 0:39a545e08ccd | 514 | sendU16(tranBuff[is]); // Send it |
vic20 | 0:39a545e08ccd | 515 | } |
vic20 | 0:39a545e08ccd | 516 | |
vic20 | 0:39a545e08ccd | 517 | /********************* ASYNC READ ***************************/ |
vic20 | 0:39a545e08ccd | 518 | |
vic20 | 0:39a545e08ccd | 519 | // Hardware profiling operation (if enabled) |
vic20 | 0:39a545e08ccd | 520 | // PRO1 line high during ISR |
vic20 | 0:39a545e08ccd | 521 | // PRO2 line mimics overrun variable |
vic20 | 0:39a545e08ccd | 522 | |
vic20 | 0:39a545e08ccd | 523 | // ISR for the asyncRead function |
vic20 | 0:39a545e08ccd | 524 | void asyncReadISR() |
vic20 | 0:39a545e08ccd | 525 | { |
vic20 | 0:39a545e08ccd | 526 | PRO1_SET // Profiling |
vic20 | 0:39a545e08ccd | 527 | |
vic20 | 0:39a545e08ccd | 528 | // Store analog data |
vic20 | 0:39a545e08ccd | 529 | storeAnalog(); |
vic20 | 0:39a545e08ccd | 530 | |
vic20 | 0:39a545e08ccd | 531 | // Increase sample |
vic20 | 0:39a545e08ccd | 532 | samples++; |
vic20 | 0:39a545e08ccd | 533 | |
vic20 | 0:39a545e08ccd | 534 | // Check if we should end |
vic20 | 0:39a545e08ccd | 535 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 536 | { |
vic20 | 0:39a545e08ccd | 537 | // Disable ticker |
vic20 | 0:39a545e08ccd | 538 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 539 | // Signal end |
vic20 | 0:39a545e08ccd | 540 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 541 | PRO1_CLEAR // Profiling |
vic20 | 0:39a545e08ccd | 542 | return; |
vic20 | 0:39a545e08ccd | 543 | } |
vic20 | 0:39a545e08ccd | 544 | |
vic20 | 0:39a545e08ccd | 545 | // Check for overrun |
vic20 | 0:39a545e08ccd | 546 | if (overrun) |
vic20 | 0:39a545e08ccd | 547 | { |
vic20 | 0:39a545e08ccd | 548 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 549 | } |
vic20 | 0:39a545e08ccd | 550 | |
vic20 | 0:39a545e08ccd | 551 | overrun = 1; |
vic20 | 0:39a545e08ccd | 552 | |
vic20 | 0:39a545e08ccd | 553 | PRO2_SET // Profiling |
vic20 | 0:39a545e08ccd | 554 | PRO1_CLEAR |
vic20 | 0:39a545e08ccd | 555 | } |
vic20 | 0:39a545e08ccd | 556 | |
vic20 | 0:39a545e08ccd | 557 | // ISR for the asyncRead function |
vic20 | 0:39a545e08ccd | 558 | // Optimized timing when only reading one input |
vic20 | 0:39a545e08ccd | 559 | // Used only for one input and stime < 25us |
vic20 | 0:39a545e08ccd | 560 | void asyncReadSingleISR() |
vic20 | 0:39a545e08ccd | 561 | { |
vic20 | 0:39a545e08ccd | 562 | PRO1_SET // Profiling |
vic20 | 0:39a545e08ccd | 563 | |
vic20 | 0:39a545e08ccd | 564 | // Direct access to ADC registers |
vic20 | 0:39a545e08ccd | 565 | ADC1->CR |= ADC_CR_ADSTART; |
vic20 | 0:39a545e08ccd | 566 | while (!(ADC1->ISR & ADC_ISR_EOC)); |
vic20 | 0:39a545e08ccd | 567 | tranBuff[inBuffPos++] = (ADC1->DR)<<4; |
vic20 | 0:39a545e08ccd | 568 | |
vic20 | 0:39a545e08ccd | 569 | if (inBuffPos == currentBsize) inBuffPos = 0; |
vic20 | 0:39a545e08ccd | 570 | |
vic20 | 0:39a545e08ccd | 571 | // Increase sample |
vic20 | 0:39a545e08ccd | 572 | samples++; |
vic20 | 0:39a545e08ccd | 573 | |
vic20 | 0:39a545e08ccd | 574 | // Check if we should end |
vic20 | 0:39a545e08ccd | 575 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 576 | { |
vic20 | 0:39a545e08ccd | 577 | // Disable ticker |
vic20 | 0:39a545e08ccd | 578 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 579 | // Signal end |
vic20 | 0:39a545e08ccd | 580 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 581 | PRO1_CLEAR // Profiling |
vic20 | 0:39a545e08ccd | 582 | return; |
vic20 | 0:39a545e08ccd | 583 | } |
vic20 | 0:39a545e08ccd | 584 | |
vic20 | 0:39a545e08ccd | 585 | // Check for overrun |
vic20 | 0:39a545e08ccd | 586 | if (overrun) |
vic20 | 0:39a545e08ccd | 587 | { |
vic20 | 0:39a545e08ccd | 588 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 589 | } |
vic20 | 0:39a545e08ccd | 590 | overrun = 1; |
vic20 | 0:39a545e08ccd | 591 | |
vic20 | 0:39a545e08ccd | 592 | PRO2_SET // Profiling |
vic20 | 0:39a545e08ccd | 593 | PRO1_CLEAR |
vic20 | 0:39a545e08ccd | 594 | } |
vic20 | 0:39a545e08ccd | 595 | |
vic20 | 0:39a545e08ccd | 596 | // Implements command 'Y' |
vic20 | 0:39a545e08ccd | 597 | // Async read |
vic20 | 0:39a545e08ccd | 598 | // This command don't get any parameter |
vic20 | 0:39a545e08ccd | 599 | void asyncRead() |
vic20 | 0:39a545e08ccd | 600 | { |
vic20 | 0:39a545e08ccd | 601 | PRO1_CLEAR // Reset profiling lines |
vic20 | 0:39a545e08ccd | 602 | PRO2_CLEAR |
vic20 | 0:39a545e08ccd | 603 | |
vic20 | 0:39a545e08ccd | 604 | // Check of CRC |
vic20 | 0:39a545e08ccd | 605 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 606 | |
vic20 | 0:39a545e08ccd | 607 | // Send ACK to command |
vic20 | 0:39a545e08ccd | 608 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 609 | |
vic20 | 0:39a545e08ccd | 610 | // Configure ticker ISR |
vic20 | 0:39a545e08ccd | 611 | samples = 0; // Number of processed samples |
vic20 | 0:39a545e08ccd | 612 | inBuffPos = 0; // Current buffer position |
vic20 | 0:39a545e08ccd | 613 | endTicker = 0; // Ticker has not ended |
vic20 | 0:39a545e08ccd | 614 | |
vic20 | 0:39a545e08ccd | 615 | currentBsize = n_ai * n_s; // Current size for buffer |
vic20 | 0:39a545e08ccd | 616 | |
vic20 | 0:39a545e08ccd | 617 | // Clear overrun variables |
vic20 | 0:39a545e08ccd | 618 | overrun_error = 0; |
vic20 | 0:39a545e08ccd | 619 | overrun = 0; |
vic20 | 0:39a545e08ccd | 620 | PRO2_CLEAR // Profiling |
vic20 | 0:39a545e08ccd | 621 | |
vic20 | 0:39a545e08ccd | 622 | // Check if we only read one channel and stime is less than 41us |
vic20 | 0:39a545e08ccd | 623 | if ((n_ai==1)&&(stime<25e-6f)) |
vic20 | 0:39a545e08ccd | 624 | { |
vic20 | 0:39a545e08ccd | 625 | // Perform a dummy read |
vic20 | 0:39a545e08ccd | 626 | ain1.read_u16(); |
vic20 | 0:39a545e08ccd | 627 | // Programs the ticker for one input optimized ISR version |
vic20 | 0:39a545e08ccd | 628 | ticR.attach(&asyncReadSingleISR,stime); |
vic20 | 0:39a545e08ccd | 629 | } |
vic20 | 0:39a545e08ccd | 630 | else |
vic20 | 0:39a545e08ccd | 631 | { |
vic20 | 0:39a545e08ccd | 632 | // Programs the ticker for several inputs |
vic20 | 0:39a545e08ccd | 633 | ticR.attach(&asyncReadISR,stime); |
vic20 | 0:39a545e08ccd | 634 | } |
vic20 | 0:39a545e08ccd | 635 | |
vic20 | 0:39a545e08ccd | 636 | // Wait till end |
vic20 | 0:39a545e08ccd | 637 | while (!endTicker) { overrun = 0; PRO2_CLEAR } |
vic20 | 0:39a545e08ccd | 638 | |
vic20 | 0:39a545e08ccd | 639 | // Return data |
vic20 | 0:39a545e08ccd | 640 | dumpInBuffer(); // Dump data |
vic20 | 0:39a545e08ccd | 641 | |
vic20 | 0:39a545e08ccd | 642 | sendCRC(); // End of Tx |
vic20 | 0:39a545e08ccd | 643 | } |
vic20 | 0:39a545e08ccd | 644 | |
vic20 | 0:39a545e08ccd | 645 | /********************* TRIGGERED READ ***************************/ |
vic20 | 0:39a545e08ccd | 646 | |
vic20 | 0:39a545e08ccd | 647 | // Hardware profiling operation (if enabled) |
vic20 | 0:39a545e08ccd | 648 | // PRO1 line high during ISR |
vic20 | 0:39a545e08ccd | 649 | // PRO2 line mimics overrun variable |
vic20 | 0:39a545e08ccd | 650 | |
vic20 | 0:39a545e08ccd | 651 | // Dumps the input buffer on serial for triggered caputure |
vic20 | 0:39a545e08ccd | 652 | void dumpTriggeredInBuffer() |
vic20 | 0:39a545e08ccd | 653 | { |
vic20 | 0:39a545e08ccd | 654 | int ia,is,pos,sample,first; |
vic20 | 0:39a545e08ccd | 655 | |
vic20 | 0:39a545e08ccd | 656 | presamples = n_s/2; // Number of samples before trigger |
vic20 | 0:39a545e08ccd | 657 | postsamples = n_s - presamples; // Number of samples after trigger |
vic20 | 0:39a545e08ccd | 658 | |
vic20 | 0:39a545e08ccd | 659 | // Response code |
vic20 | 0:39a545e08ccd | 660 | if (overrun_error) |
vic20 | 0:39a545e08ccd | 661 | { |
vic20 | 0:39a545e08ccd | 662 | sendByte(TRAN_OVERRUN); |
vic20 | 0:39a545e08ccd | 663 | return; |
vic20 | 0:39a545e08ccd | 664 | } |
vic20 | 0:39a545e08ccd | 665 | |
vic20 | 0:39a545e08ccd | 666 | if (timeout_error) |
vic20 | 0:39a545e08ccd | 667 | { |
vic20 | 0:39a545e08ccd | 668 | sendByte(TRAN_TIMEOUT); |
vic20 | 0:39a545e08ccd | 669 | return; |
vic20 | 0:39a545e08ccd | 670 | } |
vic20 | 0:39a545e08ccd | 671 | |
vic20 | 0:39a545e08ccd | 672 | sendByte(TRAN_OK); |
vic20 | 0:39a545e08ccd | 673 | |
vic20 | 0:39a545e08ccd | 674 | sendByte(n_ai); // Number of analog |
vic20 | 0:39a545e08ccd | 675 | sendByte(n_di); // Number of digital (always zero) |
vic20 | 0:39a545e08ccd | 676 | sendU16(n_s); // Number of samples |
vic20 | 0:39a545e08ccd | 677 | |
vic20 | 0:39a545e08ccd | 678 | // First sample to send |
vic20 | 0:39a545e08ccd | 679 | first = (triggerSample - presamples + n_s)%n_s; |
vic20 | 0:39a545e08ccd | 680 | |
vic20 | 0:39a545e08ccd | 681 | for(ia=0;ia<n_ai;ia++) // For every analog input |
vic20 | 0:39a545e08ccd | 682 | for(is=0;is<n_s;is++) // For every sample |
vic20 | 0:39a545e08ccd | 683 | { |
vic20 | 0:39a545e08ccd | 684 | sample = (first+is)%n_s; // Calculate sample |
vic20 | 0:39a545e08ccd | 685 | pos = sample*n_ai+ia; // Calculate buff position |
vic20 | 0:39a545e08ccd | 686 | sendU16(tranBuff[pos]); // Send it |
vic20 | 0:39a545e08ccd | 687 | } |
vic20 | 0:39a545e08ccd | 688 | } |
vic20 | 0:39a545e08ccd | 689 | |
vic20 | 0:39a545e08ccd | 690 | // ISR for the triggeredRead function |
vic20 | 0:39a545e08ccd | 691 | void triggeredReadISR() |
vic20 | 0:39a545e08ccd | 692 | { |
vic20 | 0:39a545e08ccd | 693 | int a1; |
vic20 | 0:39a545e08ccd | 694 | |
vic20 | 0:39a545e08ccd | 695 | PRO1_SET |
vic20 | 0:39a545e08ccd | 696 | |
vic20 | 0:39a545e08ccd | 697 | // Store analog data |
vic20 | 0:39a545e08ccd | 698 | a1 = storeAnalog(); |
vic20 | 0:39a545e08ccd | 699 | |
vic20 | 0:39a545e08ccd | 700 | // Increase sample |
vic20 | 0:39a545e08ccd | 701 | samples++; |
vic20 | 0:39a545e08ccd | 702 | if (samples == n_s) samples = 0; |
vic20 | 0:39a545e08ccd | 703 | |
vic20 | 0:39a545e08ccd | 704 | // Decrease timeout |
vic20 | 0:39a545e08ccd | 705 | timeOut--; |
vic20 | 0:39a545e08ccd | 706 | |
vic20 | 0:39a545e08ccd | 707 | // Check phase |
vic20 | 0:39a545e08ccd | 708 | switch(samplePhase) |
vic20 | 0:39a545e08ccd | 709 | { |
vic20 | 0:39a545e08ccd | 710 | case 0: // Prefill of the buffer |
vic20 | 0:39a545e08ccd | 711 | presamples--; |
vic20 | 0:39a545e08ccd | 712 | if (!presamples) samplePhase = 1; |
vic20 | 0:39a545e08ccd | 713 | if (!timeOut) |
vic20 | 0:39a545e08ccd | 714 | { |
vic20 | 0:39a545e08ccd | 715 | // Set error |
vic20 | 0:39a545e08ccd | 716 | timeout_error = 1; |
vic20 | 0:39a545e08ccd | 717 | // Disable ticker |
vic20 | 0:39a545e08ccd | 718 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 719 | // Signal end |
vic20 | 0:39a545e08ccd | 720 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 721 | } |
vic20 | 0:39a545e08ccd | 722 | break; |
vic20 | 0:39a545e08ccd | 723 | case 1: // Wait for trigger precondition |
vic20 | 0:39a545e08ccd | 724 | if (triggerMode == 0) // Rise |
vic20 | 0:39a545e08ccd | 725 | if (a1 < trigger) samplePhase = 2; |
vic20 | 0:39a545e08ccd | 726 | if (triggerMode == 1) // Fall |
vic20 | 0:39a545e08ccd | 727 | if (a1 > trigger) samplePhase = 2; |
vic20 | 0:39a545e08ccd | 728 | if (!timeOut) |
vic20 | 0:39a545e08ccd | 729 | { |
vic20 | 0:39a545e08ccd | 730 | // Set error |
vic20 | 0:39a545e08ccd | 731 | timeout_error = 1; |
vic20 | 0:39a545e08ccd | 732 | // Disable ticker |
vic20 | 0:39a545e08ccd | 733 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 734 | // Signal end |
vic20 | 0:39a545e08ccd | 735 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 736 | } |
vic20 | 0:39a545e08ccd | 737 | break; |
vic20 | 0:39a545e08ccd | 738 | case 2: // Wait for trigger postcondition |
vic20 | 0:39a545e08ccd | 739 | if (triggerMode == 0) // Rise |
vic20 | 0:39a545e08ccd | 740 | if (a1 > trigger) |
vic20 | 0:39a545e08ccd | 741 | { |
vic20 | 0:39a545e08ccd | 742 | samplePhase = 3; |
vic20 | 0:39a545e08ccd | 743 | triggerSample = samples; |
vic20 | 0:39a545e08ccd | 744 | } |
vic20 | 0:39a545e08ccd | 745 | if (triggerMode == 1) // Fall |
vic20 | 0:39a545e08ccd | 746 | if (a1 < trigger) |
vic20 | 0:39a545e08ccd | 747 | { |
vic20 | 0:39a545e08ccd | 748 | samplePhase = 3; |
vic20 | 0:39a545e08ccd | 749 | triggerSample = samples; |
vic20 | 0:39a545e08ccd | 750 | } |
vic20 | 0:39a545e08ccd | 751 | if (!timeOut) |
vic20 | 0:39a545e08ccd | 752 | { |
vic20 | 0:39a545e08ccd | 753 | // Set error |
vic20 | 0:39a545e08ccd | 754 | timeout_error = 1; |
vic20 | 0:39a545e08ccd | 755 | // Disable ticker |
vic20 | 0:39a545e08ccd | 756 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 757 | // Signal end |
vic20 | 0:39a545e08ccd | 758 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 759 | } |
vic20 | 0:39a545e08ccd | 760 | break; |
vic20 | 0:39a545e08ccd | 761 | case 3: // Capture after trigger |
vic20 | 0:39a545e08ccd | 762 | postsamples--; |
vic20 | 0:39a545e08ccd | 763 | if (!postsamples) |
vic20 | 0:39a545e08ccd | 764 | { |
vic20 | 0:39a545e08ccd | 765 | // Disable ticker |
vic20 | 0:39a545e08ccd | 766 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 767 | // Signal end |
vic20 | 0:39a545e08ccd | 768 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 769 | } |
vic20 | 0:39a545e08ccd | 770 | break; |
vic20 | 0:39a545e08ccd | 771 | } |
vic20 | 0:39a545e08ccd | 772 | |
vic20 | 0:39a545e08ccd | 773 | // Check for overrun |
vic20 | 0:39a545e08ccd | 774 | if (overrun) |
vic20 | 0:39a545e08ccd | 775 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 776 | |
vic20 | 0:39a545e08ccd | 777 | overrun = 1; |
vic20 | 0:39a545e08ccd | 778 | |
vic20 | 0:39a545e08ccd | 779 | PRO2_SET |
vic20 | 0:39a545e08ccd | 780 | PRO1_CLEAR |
vic20 | 0:39a545e08ccd | 781 | } |
vic20 | 0:39a545e08ccd | 782 | |
vic20 | 0:39a545e08ccd | 783 | // ISR for the triggeredRead function |
vic20 | 0:39a545e08ccd | 784 | // Version optimized for only one channel |
vic20 | 0:39a545e08ccd | 785 | // Only used for single channel and stime < 30us |
vic20 | 0:39a545e08ccd | 786 | void triggeredReadSingleISR() |
vic20 | 0:39a545e08ccd | 787 | { |
vic20 | 0:39a545e08ccd | 788 | int a1; |
vic20 | 0:39a545e08ccd | 789 | |
vic20 | 0:39a545e08ccd | 790 | PRO1_SET |
vic20 | 0:39a545e08ccd | 791 | |
vic20 | 0:39a545e08ccd | 792 | // Direct access to ADC registers |
vic20 | 0:39a545e08ccd | 793 | ADC1->CR |= ADC_CR_ADSTART; |
vic20 | 0:39a545e08ccd | 794 | while (!(ADC1->ISR & ADC_ISR_EOC)); |
vic20 | 0:39a545e08ccd | 795 | a1=(ADC1->DR)<<4; |
vic20 | 0:39a545e08ccd | 796 | tranBuff[inBuffPos++]=a1; |
vic20 | 0:39a545e08ccd | 797 | |
vic20 | 0:39a545e08ccd | 798 | if (inBuffPos == currentBsize) inBuffPos = 0; |
vic20 | 0:39a545e08ccd | 799 | |
vic20 | 0:39a545e08ccd | 800 | // Increase sample |
vic20 | 0:39a545e08ccd | 801 | samples++; |
vic20 | 0:39a545e08ccd | 802 | if (samples == n_s) samples = 0; |
vic20 | 0:39a545e08ccd | 803 | |
vic20 | 0:39a545e08ccd | 804 | // Decrease timeout |
vic20 | 0:39a545e08ccd | 805 | timeOut--; |
vic20 | 0:39a545e08ccd | 806 | |
vic20 | 0:39a545e08ccd | 807 | // Check phase |
vic20 | 0:39a545e08ccd | 808 | switch(samplePhase) |
vic20 | 0:39a545e08ccd | 809 | { |
vic20 | 0:39a545e08ccd | 810 | case 0: // Prefill of the buffer |
vic20 | 0:39a545e08ccd | 811 | presamples--; |
vic20 | 0:39a545e08ccd | 812 | if (!presamples) samplePhase = 1; |
vic20 | 0:39a545e08ccd | 813 | if (!timeOut) |
vic20 | 0:39a545e08ccd | 814 | { |
vic20 | 0:39a545e08ccd | 815 | // Set error |
vic20 | 0:39a545e08ccd | 816 | timeout_error = 1; |
vic20 | 0:39a545e08ccd | 817 | // Disable ticker |
vic20 | 0:39a545e08ccd | 818 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 819 | // Signal end |
vic20 | 0:39a545e08ccd | 820 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 821 | } |
vic20 | 0:39a545e08ccd | 822 | break; |
vic20 | 0:39a545e08ccd | 823 | case 1: // Wait for trigger precondition |
vic20 | 0:39a545e08ccd | 824 | if (triggerMode == 0) // Rise |
vic20 | 0:39a545e08ccd | 825 | if (a1 < trigger) samplePhase = 2; |
vic20 | 0:39a545e08ccd | 826 | if (triggerMode == 1) // Fall |
vic20 | 0:39a545e08ccd | 827 | if (a1 > trigger) samplePhase = 2; |
vic20 | 0:39a545e08ccd | 828 | if (!timeOut) |
vic20 | 0:39a545e08ccd | 829 | { |
vic20 | 0:39a545e08ccd | 830 | // Set error |
vic20 | 0:39a545e08ccd | 831 | timeout_error = 1; |
vic20 | 0:39a545e08ccd | 832 | // Disable ticker |
vic20 | 0:39a545e08ccd | 833 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 834 | // Signal end |
vic20 | 0:39a545e08ccd | 835 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 836 | } |
vic20 | 0:39a545e08ccd | 837 | break; |
vic20 | 0:39a545e08ccd | 838 | case 2: // Wait for trigger postcondition |
vic20 | 0:39a545e08ccd | 839 | if (triggerMode == 0) // Rise |
vic20 | 0:39a545e08ccd | 840 | if (a1 > trigger) |
vic20 | 0:39a545e08ccd | 841 | { |
vic20 | 0:39a545e08ccd | 842 | samplePhase = 3; |
vic20 | 0:39a545e08ccd | 843 | triggerSample = samples; |
vic20 | 0:39a545e08ccd | 844 | } |
vic20 | 0:39a545e08ccd | 845 | if (triggerMode == 1) // Fall |
vic20 | 0:39a545e08ccd | 846 | if (a1 < trigger) |
vic20 | 0:39a545e08ccd | 847 | { |
vic20 | 0:39a545e08ccd | 848 | samplePhase = 3; |
vic20 | 0:39a545e08ccd | 849 | triggerSample = samples; |
vic20 | 0:39a545e08ccd | 850 | } |
vic20 | 0:39a545e08ccd | 851 | if (!timeOut) |
vic20 | 0:39a545e08ccd | 852 | { |
vic20 | 0:39a545e08ccd | 853 | // Set error |
vic20 | 0:39a545e08ccd | 854 | timeout_error = 1; |
vic20 | 0:39a545e08ccd | 855 | // Disable ticker |
vic20 | 0:39a545e08ccd | 856 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 857 | // Signal end |
vic20 | 0:39a545e08ccd | 858 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 859 | } |
vic20 | 0:39a545e08ccd | 860 | break; |
vic20 | 0:39a545e08ccd | 861 | case 3: // Capture after trigger |
vic20 | 0:39a545e08ccd | 862 | postsamples--; |
vic20 | 0:39a545e08ccd | 863 | if (!postsamples) |
vic20 | 0:39a545e08ccd | 864 | { |
vic20 | 0:39a545e08ccd | 865 | // Disable ticker |
vic20 | 0:39a545e08ccd | 866 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 867 | // Signal end |
vic20 | 0:39a545e08ccd | 868 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 869 | } |
vic20 | 0:39a545e08ccd | 870 | break; |
vic20 | 0:39a545e08ccd | 871 | } |
vic20 | 0:39a545e08ccd | 872 | |
vic20 | 0:39a545e08ccd | 873 | // Check for overrun |
vic20 | 0:39a545e08ccd | 874 | if (overrun) |
vic20 | 0:39a545e08ccd | 875 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 876 | |
vic20 | 0:39a545e08ccd | 877 | overrun = 1; |
vic20 | 0:39a545e08ccd | 878 | |
vic20 | 0:39a545e08ccd | 879 | PRO2_SET |
vic20 | 0:39a545e08ccd | 880 | PRO1_CLEAR |
vic20 | 0:39a545e08ccd | 881 | } |
vic20 | 0:39a545e08ccd | 882 | |
vic20 | 0:39a545e08ccd | 883 | // Implements command 'G' |
vic20 | 0:39a545e08ccd | 884 | // Triggered read |
vic20 | 0:39a545e08ccd | 885 | void triggeredRead() |
vic20 | 0:39a545e08ccd | 886 | { |
vic20 | 0:39a545e08ccd | 887 | PRO1_CLEAR // Reset profiling lines |
vic20 | 0:39a545e08ccd | 888 | PRO2_CLEAR |
vic20 | 0:39a545e08ccd | 889 | |
vic20 | 0:39a545e08ccd | 890 | // Get trigger point |
vic20 | 0:39a545e08ccd | 891 | trigger = getU16(); |
vic20 | 0:39a545e08ccd | 892 | // Get trigger mode |
vic20 | 0:39a545e08ccd | 893 | triggerMode = getByte(); |
vic20 | 0:39a545e08ccd | 894 | // Get timeout in seconds |
vic20 | 0:39a545e08ccd | 895 | timeOut = getByte(); |
vic20 | 0:39a545e08ccd | 896 | |
vic20 | 0:39a545e08ccd | 897 | if (timeOut) |
vic20 | 0:39a545e08ccd | 898 | { |
vic20 | 0:39a545e08ccd | 899 | checkTimeOut=1; |
vic20 | 0:39a545e08ccd | 900 | // Convert to samples |
vic20 | 0:39a545e08ccd | 901 | timeOut=int(1.0*timeOut/stime); |
vic20 | 0:39a545e08ccd | 902 | } |
vic20 | 0:39a545e08ccd | 903 | else |
vic20 | 0:39a545e08ccd | 904 | checkTimeOut = 0; |
vic20 | 0:39a545e08ccd | 905 | |
vic20 | 0:39a545e08ccd | 906 | // Erase timeout error |
vic20 | 0:39a545e08ccd | 907 | timeout_error = 0; |
vic20 | 0:39a545e08ccd | 908 | |
vic20 | 0:39a545e08ccd | 909 | // Check of CRC |
vic20 | 0:39a545e08ccd | 910 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 911 | |
vic20 | 0:39a545e08ccd | 912 | // Check mode |
vic20 | 0:39a545e08ccd | 913 | if ( (triggerMode != 0) && (triggerMode != 1) ) |
vic20 | 0:39a545e08ccd | 914 | { |
vic20 | 0:39a545e08ccd | 915 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 916 | sendCRC(); |
vic20 | 0:39a545e08ccd | 917 | return; |
vic20 | 0:39a545e08ccd | 918 | } |
vic20 | 0:39a545e08ccd | 919 | |
vic20 | 0:39a545e08ccd | 920 | // All ok |
vic20 | 0:39a545e08ccd | 921 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 922 | |
vic20 | 0:39a545e08ccd | 923 | // Configure ticker ISR |
vic20 | 0:39a545e08ccd | 924 | samples = 0; // Number of processed samples |
vic20 | 0:39a545e08ccd | 925 | inBuffPos = 0; // Current buffer position |
vic20 | 0:39a545e08ccd | 926 | endTicker = 0; // Ticker has not ended |
vic20 | 0:39a545e08ccd | 927 | |
vic20 | 0:39a545e08ccd | 928 | presamples = n_s/2; // Number of samples before trigger |
vic20 | 0:39a545e08ccd | 929 | postsamples = n_s - presamples; // Number of samples after trigger |
vic20 | 0:39a545e08ccd | 930 | currentBsize = n_ai * n_s; // Current size for buffer |
vic20 | 0:39a545e08ccd | 931 | |
vic20 | 0:39a545e08ccd | 932 | samplePhase = 0; // First phase: buffer prefill |
vic20 | 0:39a545e08ccd | 933 | |
vic20 | 0:39a545e08ccd | 934 | // Clear overrun variables |
vic20 | 0:39a545e08ccd | 935 | overrun_error = 0; |
vic20 | 0:39a545e08ccd | 936 | overrun = 0; |
vic20 | 0:39a545e08ccd | 937 | |
vic20 | 0:39a545e08ccd | 938 | // Check if we only read one channel |
vic20 | 0:39a545e08ccd | 939 | if ((n_ai==1)&&(stime<30e-6f)) |
vic20 | 0:39a545e08ccd | 940 | { |
vic20 | 0:39a545e08ccd | 941 | // Perform a dummy read |
vic20 | 0:39a545e08ccd | 942 | ain1.read_u16(); |
vic20 | 0:39a545e08ccd | 943 | // Programs the ticker for one input optimized ISR version |
vic20 | 0:39a545e08ccd | 944 | ticR.attach(&triggeredReadSingleISR,stime); |
vic20 | 0:39a545e08ccd | 945 | } |
vic20 | 0:39a545e08ccd | 946 | else |
vic20 | 0:39a545e08ccd | 947 | { |
vic20 | 0:39a545e08ccd | 948 | // Programs the ticker for several inputs |
vic20 | 0:39a545e08ccd | 949 | ticR.attach(&triggeredReadISR,stime); |
vic20 | 0:39a545e08ccd | 950 | } |
vic20 | 0:39a545e08ccd | 951 | |
vic20 | 0:39a545e08ccd | 952 | // Wait till end |
vic20 | 0:39a545e08ccd | 953 | while (!endTicker) { overrun = 0; PRO2_CLEAR } |
vic20 | 0:39a545e08ccd | 954 | |
vic20 | 0:39a545e08ccd | 955 | // Return data |
vic20 | 0:39a545e08ccd | 956 | dumpTriggeredInBuffer(); // Dump data |
vic20 | 0:39a545e08ccd | 957 | |
vic20 | 0:39a545e08ccd | 958 | // Send CRC to end Tx |
vic20 | 0:39a545e08ccd | 959 | sendCRC(); |
vic20 | 0:39a545e08ccd | 960 | } |
vic20 | 0:39a545e08ccd | 961 | |
vic20 | 0:39a545e08ccd | 962 | /********************* STEP RESPONSE ***************************/ |
vic20 | 0:39a545e08ccd | 963 | |
vic20 | 0:39a545e08ccd | 964 | // Hardware profiling operation (if enabled) |
vic20 | 0:39a545e08ccd | 965 | // Not implemented yet |
vic20 | 0:39a545e08ccd | 966 | |
vic20 | 0:39a545e08ccd | 967 | // ISR for the stepResponse function |
vic20 | 0:39a545e08ccd | 968 | void stepResponseISR() |
vic20 | 0:39a545e08ccd | 969 | { |
vic20 | 0:39a545e08ccd | 970 | // Store analog data |
vic20 | 0:39a545e08ccd | 971 | storeAnalog(); |
vic20 | 0:39a545e08ccd | 972 | |
vic20 | 0:39a545e08ccd | 973 | // Increase sample |
vic20 | 0:39a545e08ccd | 974 | samples++; |
vic20 | 0:39a545e08ccd | 975 | |
vic20 | 0:39a545e08ccd | 976 | // Check trigger position |
vic20 | 0:39a545e08ccd | 977 | if (samples == triggerSample) aout1 = stepValue / MAX16F; |
vic20 | 0:39a545e08ccd | 978 | |
vic20 | 0:39a545e08ccd | 979 | // Check if we should end |
vic20 | 0:39a545e08ccd | 980 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 981 | { |
vic20 | 0:39a545e08ccd | 982 | // Disable ticker |
vic20 | 0:39a545e08ccd | 983 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 984 | // Signal end |
vic20 | 0:39a545e08ccd | 985 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 986 | } |
vic20 | 0:39a545e08ccd | 987 | |
vic20 | 0:39a545e08ccd | 988 | // Check for overrun |
vic20 | 0:39a545e08ccd | 989 | if (overrun) |
vic20 | 0:39a545e08ccd | 990 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 991 | |
vic20 | 0:39a545e08ccd | 992 | overrun = 1; |
vic20 | 0:39a545e08ccd | 993 | } |
vic20 | 0:39a545e08ccd | 994 | |
vic20 | 0:39a545e08ccd | 995 | // ISR for the stepResponse function |
vic20 | 0:39a545e08ccd | 996 | // Time optimized version |
vic20 | 0:39a545e08ccd | 997 | // Only used for one channel and stime < 30us |
vic20 | 0:39a545e08ccd | 998 | void stepResponseSingleISR() |
vic20 | 0:39a545e08ccd | 999 | { |
vic20 | 0:39a545e08ccd | 1000 | // Direct access to ADC registers |
vic20 | 0:39a545e08ccd | 1001 | ADC1->CR |= ADC_CR_ADSTART; |
vic20 | 0:39a545e08ccd | 1002 | while (!(ADC1->ISR & ADC_ISR_EOC)); |
vic20 | 0:39a545e08ccd | 1003 | tranBuff[inBuffPos++]=(ADC1->DR)<<4; |
vic20 | 0:39a545e08ccd | 1004 | |
vic20 | 0:39a545e08ccd | 1005 | if (inBuffPos == currentBsize) inBuffPos = 0; |
vic20 | 0:39a545e08ccd | 1006 | |
vic20 | 0:39a545e08ccd | 1007 | // Increase sample |
vic20 | 0:39a545e08ccd | 1008 | samples++; |
vic20 | 0:39a545e08ccd | 1009 | |
vic20 | 0:39a545e08ccd | 1010 | // Check trigger position |
vic20 | 0:39a545e08ccd | 1011 | if (samples == triggerSample) |
vic20 | 0:39a545e08ccd | 1012 | DAC->DHR12R1 = (stepValue>>4); |
vic20 | 0:39a545e08ccd | 1013 | |
vic20 | 0:39a545e08ccd | 1014 | // Check if we should end |
vic20 | 0:39a545e08ccd | 1015 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 1016 | { |
vic20 | 0:39a545e08ccd | 1017 | // Disable ticker |
vic20 | 0:39a545e08ccd | 1018 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 1019 | // Signal end |
vic20 | 0:39a545e08ccd | 1020 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 1021 | } |
vic20 | 0:39a545e08ccd | 1022 | |
vic20 | 0:39a545e08ccd | 1023 | // Check for overrun |
vic20 | 0:39a545e08ccd | 1024 | if (overrun) |
vic20 | 0:39a545e08ccd | 1025 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 1026 | |
vic20 | 0:39a545e08ccd | 1027 | overrun = 1; |
vic20 | 0:39a545e08ccd | 1028 | } |
vic20 | 0:39a545e08ccd | 1029 | |
vic20 | 0:39a545e08ccd | 1030 | // Implements command 'P' |
vic20 | 0:39a545e08ccd | 1031 | // Step response |
vic20 | 0:39a545e08ccd | 1032 | void stepResponse() |
vic20 | 0:39a545e08ccd | 1033 | { |
vic20 | 0:39a545e08ccd | 1034 | // Read step value |
vic20 | 0:39a545e08ccd | 1035 | stepValue = getU16(); |
vic20 | 0:39a545e08ccd | 1036 | |
vic20 | 0:39a545e08ccd | 1037 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1038 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1039 | |
vic20 | 0:39a545e08ccd | 1040 | sendByte(ACK); // All Ok |
vic20 | 0:39a545e08ccd | 1041 | |
vic20 | 0:39a545e08ccd | 1042 | // Configure ticker ISR |
vic20 | 0:39a545e08ccd | 1043 | samples = 0; // Number of processed samples |
vic20 | 0:39a545e08ccd | 1044 | inBuffPos = 0; // Current buffer position |
vic20 | 0:39a545e08ccd | 1045 | endTicker = 0; // Ticker has not ended |
vic20 | 0:39a545e08ccd | 1046 | |
vic20 | 0:39a545e08ccd | 1047 | triggerSample = n_s/5; |
vic20 | 0:39a545e08ccd | 1048 | |
vic20 | 0:39a545e08ccd | 1049 | currentBsize = n_ai * n_s; // Current size for buffer |
vic20 | 0:39a545e08ccd | 1050 | |
vic20 | 0:39a545e08ccd | 1051 | // Clear overrun variables |
vic20 | 0:39a545e08ccd | 1052 | overrun_error = 0; |
vic20 | 0:39a545e08ccd | 1053 | overrun = 0; |
vic20 | 0:39a545e08ccd | 1054 | |
vic20 | 0:39a545e08ccd | 1055 | // Check if we only read one channel |
vic20 | 0:39a545e08ccd | 1056 | if ((n_ai==1)&&(stime<30e-6f)) |
vic20 | 0:39a545e08ccd | 1057 | { |
vic20 | 0:39a545e08ccd | 1058 | // Perform a dummy read |
vic20 | 0:39a545e08ccd | 1059 | ain1.read_u16(); |
vic20 | 0:39a545e08ccd | 1060 | // Programs the ticker |
vic20 | 0:39a545e08ccd | 1061 | ticR.attach(&stepResponseSingleISR,stime); |
vic20 | 0:39a545e08ccd | 1062 | } |
vic20 | 0:39a545e08ccd | 1063 | else |
vic20 | 0:39a545e08ccd | 1064 | { |
vic20 | 0:39a545e08ccd | 1065 | // Programs the ticker |
vic20 | 0:39a545e08ccd | 1066 | ticR.attach(&stepResponseISR,stime); |
vic20 | 0:39a545e08ccd | 1067 | } |
vic20 | 0:39a545e08ccd | 1068 | |
vic20 | 0:39a545e08ccd | 1069 | // Wait till end |
vic20 | 0:39a545e08ccd | 1070 | while (!endTicker) overrun = 0; |
vic20 | 0:39a545e08ccd | 1071 | |
vic20 | 0:39a545e08ccd | 1072 | // Return data |
vic20 | 0:39a545e08ccd | 1073 | dumpInBuffer(); // Dump data |
vic20 | 0:39a545e08ccd | 1074 | |
vic20 | 0:39a545e08ccd | 1075 | // Send CRC to end Tx |
vic20 | 0:39a545e08ccd | 1076 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1077 | } |
vic20 | 0:39a545e08ccd | 1078 | |
vic20 | 0:39a545e08ccd | 1079 | /********************* WAVETABLE CODE ***************************/ |
vic20 | 0:39a545e08ccd | 1080 | |
vic20 | 0:39a545e08ccd | 1081 | // Load a wavetable |
vic20 | 0:39a545e08ccd | 1082 | void loadWaveTable() |
vic20 | 0:39a545e08ccd | 1083 | { |
vic20 | 0:39a545e08ccd | 1084 | int i; |
vic20 | 0:39a545e08ccd | 1085 | |
vic20 | 0:39a545e08ccd | 1086 | // Eliminate secondary wavetable |
vic20 | 0:39a545e08ccd | 1087 | w_s2 = 0; |
vic20 | 0:39a545e08ccd | 1088 | |
vic20 | 0:39a545e08ccd | 1089 | // Get size |
vic20 | 0:39a545e08ccd | 1090 | w_s = getU16(); |
vic20 | 0:39a545e08ccd | 1091 | |
vic20 | 0:39a545e08ccd | 1092 | // Check size |
vic20 | 0:39a545e08ccd | 1093 | if (w_s > BSIZE) |
vic20 | 0:39a545e08ccd | 1094 | { |
vic20 | 0:39a545e08ccd | 1095 | w_s = 0; // Eliminate table |
vic20 | 0:39a545e08ccd | 1096 | |
vic20 | 0:39a545e08ccd | 1097 | // Calculate new memory configuration |
vic20 | 0:39a545e08ccd | 1098 | wave2buff=&buff[w_s]; |
vic20 | 0:39a545e08ccd | 1099 | tranBuff =&buff[w_s]; |
vic20 | 0:39a545e08ccd | 1100 | |
vic20 | 0:39a545e08ccd | 1101 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 1102 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1103 | return; |
vic20 | 0:39a545e08ccd | 1104 | } |
vic20 | 0:39a545e08ccd | 1105 | |
vic20 | 0:39a545e08ccd | 1106 | // Calculate new memory configuration |
vic20 | 0:39a545e08ccd | 1107 | wave2buff=&buff[w_s]; |
vic20 | 0:39a545e08ccd | 1108 | tranBuff =&buff[w_s]; |
vic20 | 0:39a545e08ccd | 1109 | |
vic20 | 0:39a545e08ccd | 1110 | if (w_s > 0) |
vic20 | 0:39a545e08ccd | 1111 | { |
vic20 | 0:39a545e08ccd | 1112 | // Load samples |
vic20 | 0:39a545e08ccd | 1113 | for(i=0;i<w_s;i++) |
vic20 | 0:39a545e08ccd | 1114 | buff[i] = getU16(); |
vic20 | 0:39a545e08ccd | 1115 | } |
vic20 | 0:39a545e08ccd | 1116 | |
vic20 | 0:39a545e08ccd | 1117 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1118 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1119 | |
vic20 | 0:39a545e08ccd | 1120 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1121 | |
vic20 | 0:39a545e08ccd | 1122 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1123 | } |
vic20 | 0:39a545e08ccd | 1124 | |
vic20 | 0:39a545e08ccd | 1125 | // Load a secondary wavetable |
vic20 | 0:39a545e08ccd | 1126 | void loadSecondaryWaveTable() |
vic20 | 0:39a545e08ccd | 1127 | { |
vic20 | 0:39a545e08ccd | 1128 | int i; |
vic20 | 0:39a545e08ccd | 1129 | |
vic20 | 0:39a545e08ccd | 1130 | // Get size |
vic20 | 0:39a545e08ccd | 1131 | w_s2 = getU16(); |
vic20 | 0:39a545e08ccd | 1132 | |
vic20 | 0:39a545e08ccd | 1133 | // Check size and primary wavetable |
vic20 | 0:39a545e08ccd | 1134 | if (w_s2 > wave2buffSize()) |
vic20 | 0:39a545e08ccd | 1135 | { |
vic20 | 0:39a545e08ccd | 1136 | w_s2 = 0; |
vic20 | 0:39a545e08ccd | 1137 | // Calculate new memory configuration |
vic20 | 0:39a545e08ccd | 1138 | tranBuff =&buff[w_s+w_s2]; |
vic20 | 0:39a545e08ccd | 1139 | |
vic20 | 0:39a545e08ccd | 1140 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 1141 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1142 | return; |
vic20 | 0:39a545e08ccd | 1143 | } |
vic20 | 0:39a545e08ccd | 1144 | |
vic20 | 0:39a545e08ccd | 1145 | // Calculate new memory configuration |
vic20 | 0:39a545e08ccd | 1146 | tranBuff =&buff[w_s+w_s2]; |
vic20 | 0:39a545e08ccd | 1147 | |
vic20 | 0:39a545e08ccd | 1148 | for(i=0;i<w_s2;i++) |
vic20 | 0:39a545e08ccd | 1149 | wave2buff[i] = getU16(); |
vic20 | 0:39a545e08ccd | 1150 | |
vic20 | 0:39a545e08ccd | 1151 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1152 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1153 | |
vic20 | 0:39a545e08ccd | 1154 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1155 | |
vic20 | 0:39a545e08ccd | 1156 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1157 | } |
vic20 | 0:39a545e08ccd | 1158 | |
vic20 | 0:39a545e08ccd | 1159 | |
vic20 | 0:39a545e08ccd | 1160 | /****************** WAVE RESPONSE CODE *************************/ |
vic20 | 0:39a545e08ccd | 1161 | |
vic20 | 0:39a545e08ccd | 1162 | // Hardware profiling operation (if enabled) |
vic20 | 0:39a545e08ccd | 1163 | // Not implemented |
vic20 | 0:39a545e08ccd | 1164 | |
vic20 | 0:39a545e08ccd | 1165 | // ISR for the waveResponse function |
vic20 | 0:39a545e08ccd | 1166 | void waveResponseISR() |
vic20 | 0:39a545e08ccd | 1167 | { |
vic20 | 0:39a545e08ccd | 1168 | // Write DAC |
vic20 | 0:39a545e08ccd | 1169 | aout1 = buff[w_pos++] / MAX16F; |
vic20 | 0:39a545e08ccd | 1170 | |
vic20 | 0:39a545e08ccd | 1171 | // Store analog data |
vic20 | 0:39a545e08ccd | 1172 | if (!w_n) |
vic20 | 0:39a545e08ccd | 1173 | { |
vic20 | 0:39a545e08ccd | 1174 | storeAnalog(); |
vic20 | 0:39a545e08ccd | 1175 | |
vic20 | 0:39a545e08ccd | 1176 | // Increase sample |
vic20 | 0:39a545e08ccd | 1177 | samples++; |
vic20 | 0:39a545e08ccd | 1178 | |
vic20 | 0:39a545e08ccd | 1179 | // Check if we should end |
vic20 | 0:39a545e08ccd | 1180 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 1181 | { |
vic20 | 0:39a545e08ccd | 1182 | // Disable ticker |
vic20 | 0:39a545e08ccd | 1183 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 1184 | // Signal end |
vic20 | 0:39a545e08ccd | 1185 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 1186 | } |
vic20 | 0:39a545e08ccd | 1187 | |
vic20 | 0:39a545e08ccd | 1188 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1189 | if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1190 | } |
vic20 | 0:39a545e08ccd | 1191 | else |
vic20 | 0:39a545e08ccd | 1192 | { |
vic20 | 0:39a545e08ccd | 1193 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1194 | if (w_pos == w_s) |
vic20 | 0:39a545e08ccd | 1195 | { |
vic20 | 0:39a545e08ccd | 1196 | w_pos = 0; |
vic20 | 0:39a545e08ccd | 1197 | w_n--; |
vic20 | 0:39a545e08ccd | 1198 | } |
vic20 | 0:39a545e08ccd | 1199 | } |
vic20 | 0:39a545e08ccd | 1200 | |
vic20 | 0:39a545e08ccd | 1201 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1202 | // if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1203 | |
vic20 | 0:39a545e08ccd | 1204 | // Check for overrun |
vic20 | 0:39a545e08ccd | 1205 | if (overrun) |
vic20 | 0:39a545e08ccd | 1206 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 1207 | |
vic20 | 0:39a545e08ccd | 1208 | overrun = 1; |
vic20 | 0:39a545e08ccd | 1209 | } |
vic20 | 0:39a545e08ccd | 1210 | |
vic20 | 0:39a545e08ccd | 1211 | // ISR for the waveResponse function |
vic20 | 0:39a545e08ccd | 1212 | // Time optimized version |
vic20 | 0:39a545e08ccd | 1213 | // Only used for single ADC and stime < 30us |
vic20 | 0:39a545e08ccd | 1214 | void waveResponseSingleISR() |
vic20 | 0:39a545e08ccd | 1215 | { |
vic20 | 0:39a545e08ccd | 1216 | // Write DAC |
vic20 | 0:39a545e08ccd | 1217 | DAC->DHR12R1 = (buff[w_pos++]>>4); |
vic20 | 0:39a545e08ccd | 1218 | |
vic20 | 0:39a545e08ccd | 1219 | // Store analog data |
vic20 | 0:39a545e08ccd | 1220 | if (!w_n) |
vic20 | 0:39a545e08ccd | 1221 | { |
vic20 | 0:39a545e08ccd | 1222 | // Direct access to ADC registers |
vic20 | 0:39a545e08ccd | 1223 | ADC1->CR |= ADC_CR_ADSTART; |
vic20 | 0:39a545e08ccd | 1224 | while (!(ADC1->ISR & ADC_ISR_EOC)); |
vic20 | 0:39a545e08ccd | 1225 | tranBuff[inBuffPos++]=(ADC1->DR)<<4; |
vic20 | 0:39a545e08ccd | 1226 | |
vic20 | 0:39a545e08ccd | 1227 | if (inBuffPos == currentBsize) inBuffPos = 0; |
vic20 | 0:39a545e08ccd | 1228 | |
vic20 | 0:39a545e08ccd | 1229 | // Increase sample |
vic20 | 0:39a545e08ccd | 1230 | samples++; |
vic20 | 0:39a545e08ccd | 1231 | |
vic20 | 0:39a545e08ccd | 1232 | // Check if we should end |
vic20 | 0:39a545e08ccd | 1233 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 1234 | { |
vic20 | 0:39a545e08ccd | 1235 | // Disable ticker |
vic20 | 0:39a545e08ccd | 1236 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 1237 | // Signal end |
vic20 | 0:39a545e08ccd | 1238 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 1239 | } |
vic20 | 0:39a545e08ccd | 1240 | |
vic20 | 0:39a545e08ccd | 1241 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1242 | if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1243 | } |
vic20 | 0:39a545e08ccd | 1244 | else |
vic20 | 0:39a545e08ccd | 1245 | { |
vic20 | 0:39a545e08ccd | 1246 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1247 | if (w_pos == w_s) |
vic20 | 0:39a545e08ccd | 1248 | { |
vic20 | 0:39a545e08ccd | 1249 | w_pos = 0; |
vic20 | 0:39a545e08ccd | 1250 | w_n--; |
vic20 | 0:39a545e08ccd | 1251 | } |
vic20 | 0:39a545e08ccd | 1252 | } |
vic20 | 0:39a545e08ccd | 1253 | |
vic20 | 0:39a545e08ccd | 1254 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1255 | // if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1256 | |
vic20 | 0:39a545e08ccd | 1257 | // Check for overrun |
vic20 | 0:39a545e08ccd | 1258 | if (overrun) |
vic20 | 0:39a545e08ccd | 1259 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 1260 | |
vic20 | 0:39a545e08ccd | 1261 | overrun = 1; |
vic20 | 0:39a545e08ccd | 1262 | } |
vic20 | 0:39a545e08ccd | 1263 | |
vic20 | 0:39a545e08ccd | 1264 | // Wave response |
vic20 | 0:39a545e08ccd | 1265 | void waveResponse() |
vic20 | 0:39a545e08ccd | 1266 | { |
vic20 | 0:39a545e08ccd | 1267 | // Read number of waves before mesurement |
vic20 | 0:39a545e08ccd | 1268 | w_n = getU16(); |
vic20 | 0:39a545e08ccd | 1269 | |
vic20 | 0:39a545e08ccd | 1270 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1271 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1272 | |
vic20 | 0:39a545e08ccd | 1273 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1274 | |
vic20 | 0:39a545e08ccd | 1275 | // Configure ticker ISR |
vic20 | 0:39a545e08ccd | 1276 | samples = 0; // Number of processed samples |
vic20 | 0:39a545e08ccd | 1277 | inBuffPos = 0; // Current buffer position |
vic20 | 0:39a545e08ccd | 1278 | endTicker = 0; // Ticker has not ended |
vic20 | 0:39a545e08ccd | 1279 | w_pos = 0; // Current wave position |
vic20 | 0:39a545e08ccd | 1280 | |
vic20 | 0:39a545e08ccd | 1281 | currentBsize = n_ai * n_s; // Current size for buffer |
vic20 | 0:39a545e08ccd | 1282 | |
vic20 | 0:39a545e08ccd | 1283 | // Clear overrun variables |
vic20 | 0:39a545e08ccd | 1284 | overrun_error = 0; |
vic20 | 0:39a545e08ccd | 1285 | overrun = 0; |
vic20 | 0:39a545e08ccd | 1286 | |
vic20 | 0:39a545e08ccd | 1287 | // Check if we only read one channel |
vic20 | 0:39a545e08ccd | 1288 | if ((n_ai==1)&&(stime<30e-6f)) |
vic20 | 0:39a545e08ccd | 1289 | { |
vic20 | 0:39a545e08ccd | 1290 | // Perform a dummy read |
vic20 | 0:39a545e08ccd | 1291 | ain1.read_u16(); |
vic20 | 0:39a545e08ccd | 1292 | // Programs the ticker |
vic20 | 0:39a545e08ccd | 1293 | ticR.attach(&waveResponseSingleISR,stime); |
vic20 | 0:39a545e08ccd | 1294 | } |
vic20 | 0:39a545e08ccd | 1295 | else |
vic20 | 0:39a545e08ccd | 1296 | { |
vic20 | 0:39a545e08ccd | 1297 | // Programs the ticker |
vic20 | 0:39a545e08ccd | 1298 | ticR.attach(&waveResponseISR,stime); |
vic20 | 0:39a545e08ccd | 1299 | } |
vic20 | 0:39a545e08ccd | 1300 | |
vic20 | 0:39a545e08ccd | 1301 | // Wait till end |
vic20 | 0:39a545e08ccd | 1302 | while (!endTicker) overrun = 0; |
vic20 | 0:39a545e08ccd | 1303 | |
vic20 | 0:39a545e08ccd | 1304 | // Return data |
vic20 | 0:39a545e08ccd | 1305 | dumpInBuffer(); // Dump data |
vic20 | 0:39a545e08ccd | 1306 | |
vic20 | 0:39a545e08ccd | 1307 | // End sending CRC |
vic20 | 0:39a545e08ccd | 1308 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1309 | } |
vic20 | 0:39a545e08ccd | 1310 | |
vic20 | 0:39a545e08ccd | 1311 | /*************** DUAL WAVE RESPONSE CODE *************************/ |
vic20 | 0:39a545e08ccd | 1312 | |
vic20 | 0:39a545e08ccd | 1313 | // ISR for the dualWaveResponse function |
vic20 | 0:39a545e08ccd | 1314 | void dualWaveResponseISR() |
vic20 | 0:39a545e08ccd | 1315 | { |
vic20 | 0:39a545e08ccd | 1316 | // Write DACs |
vic20 | 0:39a545e08ccd | 1317 | aout1 = buff[w_pos++] / MAX16F; |
vic20 | 0:39a545e08ccd | 1318 | aout2 = wave2buff[w_pos2++] / MAX16F; |
vic20 | 0:39a545e08ccd | 1319 | |
vic20 | 0:39a545e08ccd | 1320 | // Store analog data |
vic20 | 0:39a545e08ccd | 1321 | if (!w_n) |
vic20 | 0:39a545e08ccd | 1322 | { |
vic20 | 0:39a545e08ccd | 1323 | storeAnalog(); |
vic20 | 0:39a545e08ccd | 1324 | |
vic20 | 0:39a545e08ccd | 1325 | // Increase sample |
vic20 | 0:39a545e08ccd | 1326 | samples++; |
vic20 | 0:39a545e08ccd | 1327 | |
vic20 | 0:39a545e08ccd | 1328 | // Check if we should end |
vic20 | 0:39a545e08ccd | 1329 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 1330 | { |
vic20 | 0:39a545e08ccd | 1331 | // Disable ticker |
vic20 | 0:39a545e08ccd | 1332 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 1333 | // Signal end |
vic20 | 0:39a545e08ccd | 1334 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 1335 | } |
vic20 | 0:39a545e08ccd | 1336 | |
vic20 | 0:39a545e08ccd | 1337 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1338 | if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1339 | if (w_pos2 == w_s2) w_pos2 = 0; |
vic20 | 0:39a545e08ccd | 1340 | } |
vic20 | 0:39a545e08ccd | 1341 | else |
vic20 | 0:39a545e08ccd | 1342 | { |
vic20 | 0:39a545e08ccd | 1343 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1344 | if (w_pos == w_s) |
vic20 | 0:39a545e08ccd | 1345 | { |
vic20 | 0:39a545e08ccd | 1346 | w_pos = 0; |
vic20 | 0:39a545e08ccd | 1347 | w_n--; |
vic20 | 0:39a545e08ccd | 1348 | } |
vic20 | 0:39a545e08ccd | 1349 | if (w_pos2 == w_s2) w_pos2 = 0; |
vic20 | 0:39a545e08ccd | 1350 | } |
vic20 | 0:39a545e08ccd | 1351 | |
vic20 | 0:39a545e08ccd | 1352 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1353 | //if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1354 | |
vic20 | 0:39a545e08ccd | 1355 | // Check for overrun |
vic20 | 0:39a545e08ccd | 1356 | if (overrun) |
vic20 | 0:39a545e08ccd | 1357 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 1358 | |
vic20 | 0:39a545e08ccd | 1359 | overrun = 1; |
vic20 | 0:39a545e08ccd | 1360 | } |
vic20 | 0:39a545e08ccd | 1361 | |
vic20 | 0:39a545e08ccd | 1362 | // ISR for the dualWaveResponse function |
vic20 | 0:39a545e08ccd | 1363 | // Time optimized version |
vic20 | 0:39a545e08ccd | 1364 | // Use only for single ADC read and stime < 35us |
vic20 | 0:39a545e08ccd | 1365 | void dualWaveResponseSingleISR() |
vic20 | 0:39a545e08ccd | 1366 | { |
vic20 | 0:39a545e08ccd | 1367 | // Write DACs |
vic20 | 0:39a545e08ccd | 1368 | DAC->DHR12R1 = (buff[w_pos++]>>4); |
vic20 | 0:39a545e08ccd | 1369 | DAC->DHR12R2 = (wave2buff[w_pos2++]>>4); |
vic20 | 0:39a545e08ccd | 1370 | |
vic20 | 0:39a545e08ccd | 1371 | // Store analog data |
vic20 | 0:39a545e08ccd | 1372 | if (!w_n) |
vic20 | 0:39a545e08ccd | 1373 | { |
vic20 | 0:39a545e08ccd | 1374 | // Direct access to ADC registers |
vic20 | 0:39a545e08ccd | 1375 | ADC1->CR |= ADC_CR_ADSTART; |
vic20 | 0:39a545e08ccd | 1376 | while (!(ADC1->ISR & ADC_ISR_EOC)); |
vic20 | 0:39a545e08ccd | 1377 | tranBuff[inBuffPos++]=(ADC1->DR)<<4; |
vic20 | 0:39a545e08ccd | 1378 | |
vic20 | 0:39a545e08ccd | 1379 | if (inBuffPos == currentBsize) inBuffPos = 0; |
vic20 | 0:39a545e08ccd | 1380 | |
vic20 | 0:39a545e08ccd | 1381 | // Increase sample |
vic20 | 0:39a545e08ccd | 1382 | samples++; |
vic20 | 0:39a545e08ccd | 1383 | |
vic20 | 0:39a545e08ccd | 1384 | // Check if we should end |
vic20 | 0:39a545e08ccd | 1385 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 1386 | { |
vic20 | 0:39a545e08ccd | 1387 | // Disable ticker |
vic20 | 0:39a545e08ccd | 1388 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 1389 | // Signal end |
vic20 | 0:39a545e08ccd | 1390 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 1391 | } |
vic20 | 0:39a545e08ccd | 1392 | |
vic20 | 0:39a545e08ccd | 1393 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1394 | if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1395 | if (w_pos2 == w_s2) w_pos2 = 0; |
vic20 | 0:39a545e08ccd | 1396 | } |
vic20 | 0:39a545e08ccd | 1397 | else |
vic20 | 0:39a545e08ccd | 1398 | { |
vic20 | 0:39a545e08ccd | 1399 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1400 | if (w_pos == w_s) |
vic20 | 0:39a545e08ccd | 1401 | { |
vic20 | 0:39a545e08ccd | 1402 | w_pos = 0; |
vic20 | 0:39a545e08ccd | 1403 | w_n--; |
vic20 | 0:39a545e08ccd | 1404 | } |
vic20 | 0:39a545e08ccd | 1405 | if (w_pos2 == w_s2) w_pos2 = 0; |
vic20 | 0:39a545e08ccd | 1406 | } |
vic20 | 0:39a545e08ccd | 1407 | |
vic20 | 0:39a545e08ccd | 1408 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1409 | //if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1410 | |
vic20 | 0:39a545e08ccd | 1411 | // Check for overrun |
vic20 | 0:39a545e08ccd | 1412 | if (overrun) |
vic20 | 0:39a545e08ccd | 1413 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 1414 | |
vic20 | 0:39a545e08ccd | 1415 | overrun = 1; |
vic20 | 0:39a545e08ccd | 1416 | } |
vic20 | 0:39a545e08ccd | 1417 | |
vic20 | 0:39a545e08ccd | 1418 | // Dual wave response |
vic20 | 0:39a545e08ccd | 1419 | void dualWaveResponse() |
vic20 | 0:39a545e08ccd | 1420 | { |
vic20 | 0:39a545e08ccd | 1421 | // Read number of primary waves before mesurement |
vic20 | 0:39a545e08ccd | 1422 | w_n = getU16(); |
vic20 | 0:39a545e08ccd | 1423 | |
vic20 | 0:39a545e08ccd | 1424 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1425 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1426 | |
vic20 | 0:39a545e08ccd | 1427 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1428 | |
vic20 | 0:39a545e08ccd | 1429 | // Configure ticker ISR |
vic20 | 0:39a545e08ccd | 1430 | samples = 0; // Number of processed samples |
vic20 | 0:39a545e08ccd | 1431 | inBuffPos = 0; // Current buffer position |
vic20 | 0:39a545e08ccd | 1432 | endTicker = 0; // Ticker has not ended |
vic20 | 0:39a545e08ccd | 1433 | w_pos = 0; // Current wave position |
vic20 | 0:39a545e08ccd | 1434 | w_pos2 = 0; // Secondary wave position |
vic20 | 0:39a545e08ccd | 1435 | |
vic20 | 0:39a545e08ccd | 1436 | currentBsize = n_ai * n_s; // Current size for buffer |
vic20 | 0:39a545e08ccd | 1437 | |
vic20 | 0:39a545e08ccd | 1438 | // Clear overrun variables |
vic20 | 0:39a545e08ccd | 1439 | overrun_error = 0; |
vic20 | 0:39a545e08ccd | 1440 | overrun = 0; |
vic20 | 0:39a545e08ccd | 1441 | |
vic20 | 0:39a545e08ccd | 1442 | // Check if we only read one channel |
vic20 | 0:39a545e08ccd | 1443 | if ((n_ai==1)&&(stime<35e-6f)) |
vic20 | 0:39a545e08ccd | 1444 | { |
vic20 | 0:39a545e08ccd | 1445 | // Perform a dummy read |
vic20 | 0:39a545e08ccd | 1446 | ain1.read_u16(); |
vic20 | 0:39a545e08ccd | 1447 | // Programs the ticker |
vic20 | 0:39a545e08ccd | 1448 | ticR.attach(&dualWaveResponseSingleISR,stime); |
vic20 | 0:39a545e08ccd | 1449 | } |
vic20 | 0:39a545e08ccd | 1450 | else |
vic20 | 0:39a545e08ccd | 1451 | { |
vic20 | 0:39a545e08ccd | 1452 | // Programs the ticker |
vic20 | 0:39a545e08ccd | 1453 | ticR.attach(&dualWaveResponseISR,stime); |
vic20 | 0:39a545e08ccd | 1454 | } |
vic20 | 0:39a545e08ccd | 1455 | |
vic20 | 0:39a545e08ccd | 1456 | // Wait till end |
vic20 | 0:39a545e08ccd | 1457 | while (!endTicker) overrun = 0; |
vic20 | 0:39a545e08ccd | 1458 | |
vic20 | 0:39a545e08ccd | 1459 | // Return data |
vic20 | 0:39a545e08ccd | 1460 | dumpInBuffer(); // Dump data |
vic20 | 0:39a545e08ccd | 1461 | |
vic20 | 0:39a545e08ccd | 1462 | // End sending CRC |
vic20 | 0:39a545e08ccd | 1463 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1464 | } |
vic20 | 0:39a545e08ccd | 1465 | |
vic20 | 0:39a545e08ccd | 1466 | /*************** SINGLE WAVE RESPONSE CODE **********************/ |
vic20 | 0:39a545e08ccd | 1467 | // Hardware profiling operation (if enabled) |
vic20 | 0:39a545e08ccd | 1468 | // PRO1 line high during ISR |
vic20 | 0:39a545e08ccd | 1469 | // PRO2 line mimics overrun variable |
vic20 | 0:39a545e08ccd | 1470 | |
vic20 | 0:39a545e08ccd | 1471 | // ISR for the singleWaveResponse function |
vic20 | 0:39a545e08ccd | 1472 | void singleWaveResponseISR() |
vic20 | 0:39a545e08ccd | 1473 | { |
vic20 | 0:39a545e08ccd | 1474 | int a1; |
vic20 | 0:39a545e08ccd | 1475 | |
vic20 | 0:39a545e08ccd | 1476 | PRO1_SET |
vic20 | 0:39a545e08ccd | 1477 | |
vic20 | 0:39a545e08ccd | 1478 | // Write DAC1 |
vic20 | 0:39a545e08ccd | 1479 | aout1 = buff[w_pos++] / MAX16F; |
vic20 | 0:39a545e08ccd | 1480 | |
vic20 | 0:39a545e08ccd | 1481 | // Store analog data |
vic20 | 0:39a545e08ccd | 1482 | if (!w_n) |
vic20 | 0:39a545e08ccd | 1483 | { |
vic20 | 0:39a545e08ccd | 1484 | // Store data |
vic20 | 0:39a545e08ccd | 1485 | // Store data |
vic20 | 0:39a545e08ccd | 1486 | a1 = ain_tran->read_u16(); |
vic20 | 0:39a545e08ccd | 1487 | tranBuff[inBuffPos++]=a1; |
vic20 | 0:39a545e08ccd | 1488 | |
vic20 | 0:39a545e08ccd | 1489 | // Increase sample |
vic20 | 0:39a545e08ccd | 1490 | samples++; |
vic20 | 0:39a545e08ccd | 1491 | |
vic20 | 0:39a545e08ccd | 1492 | // Check if we should end |
vic20 | 0:39a545e08ccd | 1493 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 1494 | { |
vic20 | 0:39a545e08ccd | 1495 | // Disable ticker |
vic20 | 0:39a545e08ccd | 1496 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 1497 | // Signal end |
vic20 | 0:39a545e08ccd | 1498 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 1499 | } |
vic20 | 0:39a545e08ccd | 1500 | |
vic20 | 0:39a545e08ccd | 1501 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1502 | if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1503 | } |
vic20 | 0:39a545e08ccd | 1504 | else |
vic20 | 0:39a545e08ccd | 1505 | { |
vic20 | 0:39a545e08ccd | 1506 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1507 | if (w_pos == w_s) |
vic20 | 0:39a545e08ccd | 1508 | { |
vic20 | 0:39a545e08ccd | 1509 | w_pos = 0; |
vic20 | 0:39a545e08ccd | 1510 | w_n--; |
vic20 | 0:39a545e08ccd | 1511 | } |
vic20 | 0:39a545e08ccd | 1512 | } |
vic20 | 0:39a545e08ccd | 1513 | |
vic20 | 0:39a545e08ccd | 1514 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1515 | if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1516 | |
vic20 | 0:39a545e08ccd | 1517 | // Check for overrun |
vic20 | 0:39a545e08ccd | 1518 | if (overrun) |
vic20 | 0:39a545e08ccd | 1519 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 1520 | |
vic20 | 0:39a545e08ccd | 1521 | overrun = 1; |
vic20 | 0:39a545e08ccd | 1522 | |
vic20 | 0:39a545e08ccd | 1523 | PRO2_SET |
vic20 | 0:39a545e08ccd | 1524 | PRO1_CLEAR |
vic20 | 0:39a545e08ccd | 1525 | } |
vic20 | 0:39a545e08ccd | 1526 | |
vic20 | 0:39a545e08ccd | 1527 | // ISR for the singleWaveResponse function |
vic20 | 0:39a545e08ccd | 1528 | // Time optimized version |
vic20 | 0:39a545e08ccd | 1529 | // Only used for stime < 30us |
vic20 | 0:39a545e08ccd | 1530 | void singleWaveResponseFastISR() |
vic20 | 0:39a545e08ccd | 1531 | { |
vic20 | 0:39a545e08ccd | 1532 | int a1; |
vic20 | 0:39a545e08ccd | 1533 | |
vic20 | 0:39a545e08ccd | 1534 | PRO1_SET |
vic20 | 0:39a545e08ccd | 1535 | |
vic20 | 0:39a545e08ccd | 1536 | // Write DAC1 |
vic20 | 0:39a545e08ccd | 1537 | DAC->DHR12R1 = (buff[w_pos++]>>4); /* New faster code */ |
vic20 | 0:39a545e08ccd | 1538 | |
vic20 | 0:39a545e08ccd | 1539 | // Store analog data |
vic20 | 0:39a545e08ccd | 1540 | if (!w_n) |
vic20 | 0:39a545e08ccd | 1541 | { |
vic20 | 0:39a545e08ccd | 1542 | // Store data |
vic20 | 0:39a545e08ccd | 1543 | // Direct access to registers |
vic20 | 0:39a545e08ccd | 1544 | ADC1->CR |= ADC_CR_ADSTART; |
vic20 | 0:39a545e08ccd | 1545 | while (!(ADC1->ISR & ADC_ISR_EOC)); |
vic20 | 0:39a545e08ccd | 1546 | a1 = ADC1->DR; |
vic20 | 0:39a545e08ccd | 1547 | tranBuff[inBuffPos++]=a1<<4; |
vic20 | 0:39a545e08ccd | 1548 | |
vic20 | 0:39a545e08ccd | 1549 | // Increase sample |
vic20 | 0:39a545e08ccd | 1550 | samples++; |
vic20 | 0:39a545e08ccd | 1551 | |
vic20 | 0:39a545e08ccd | 1552 | // Check if we should end |
vic20 | 0:39a545e08ccd | 1553 | if (samples >= n_s) |
vic20 | 0:39a545e08ccd | 1554 | { |
vic20 | 0:39a545e08ccd | 1555 | // Disable ticker |
vic20 | 0:39a545e08ccd | 1556 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 1557 | // Signal end |
vic20 | 0:39a545e08ccd | 1558 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 1559 | } |
vic20 | 0:39a545e08ccd | 1560 | |
vic20 | 0:39a545e08ccd | 1561 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1562 | if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1563 | } |
vic20 | 0:39a545e08ccd | 1564 | else |
vic20 | 0:39a545e08ccd | 1565 | { |
vic20 | 0:39a545e08ccd | 1566 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1567 | if (w_pos == w_s) |
vic20 | 0:39a545e08ccd | 1568 | { |
vic20 | 0:39a545e08ccd | 1569 | w_pos = 0; |
vic20 | 0:39a545e08ccd | 1570 | w_n--; |
vic20 | 0:39a545e08ccd | 1571 | } |
vic20 | 0:39a545e08ccd | 1572 | } |
vic20 | 0:39a545e08ccd | 1573 | |
vic20 | 0:39a545e08ccd | 1574 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1575 | if (w_pos == w_s) w_pos = 0; |
vic20 | 0:39a545e08ccd | 1576 | |
vic20 | 0:39a545e08ccd | 1577 | // Check for overrun |
vic20 | 0:39a545e08ccd | 1578 | if (overrun) |
vic20 | 0:39a545e08ccd | 1579 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 1580 | |
vic20 | 0:39a545e08ccd | 1581 | overrun = 1; |
vic20 | 0:39a545e08ccd | 1582 | |
vic20 | 0:39a545e08ccd | 1583 | PRO2_SET |
vic20 | 0:39a545e08ccd | 1584 | PRO1_CLEAR |
vic20 | 0:39a545e08ccd | 1585 | } |
vic20 | 0:39a545e08ccd | 1586 | |
vic20 | 0:39a545e08ccd | 1587 | // Select analog channel |
vic20 | 0:39a545e08ccd | 1588 | // In case of error, closes the communication and returns 0 |
vic20 | 0:39a545e08ccd | 1589 | // If all is ok, returns 1 |
vic20 | 0:39a545e08ccd | 1590 | int selectTranChannel(int channel) |
vic20 | 0:39a545e08ccd | 1591 | { |
vic20 | 0:39a545e08ccd | 1592 | if ((channel<0) || (channel>4)) |
vic20 | 0:39a545e08ccd | 1593 | { |
vic20 | 0:39a545e08ccd | 1594 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 1595 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1596 | return 0; |
vic20 | 0:39a545e08ccd | 1597 | } |
vic20 | 0:39a545e08ccd | 1598 | |
vic20 | 0:39a545e08ccd | 1599 | switch(channel) |
vic20 | 0:39a545e08ccd | 1600 | { |
vic20 | 0:39a545e08ccd | 1601 | case 1: |
vic20 | 0:39a545e08ccd | 1602 | ain_tran=&ain1; |
vic20 | 0:39a545e08ccd | 1603 | break; |
vic20 | 0:39a545e08ccd | 1604 | case 2: |
vic20 | 0:39a545e08ccd | 1605 | ain_tran=&ain2; |
vic20 | 0:39a545e08ccd | 1606 | break; |
vic20 | 0:39a545e08ccd | 1607 | case 3: |
vic20 | 0:39a545e08ccd | 1608 | ain_tran=&ain3; |
vic20 | 0:39a545e08ccd | 1609 | break; |
vic20 | 0:39a545e08ccd | 1610 | case 4: |
vic20 | 0:39a545e08ccd | 1611 | ain_tran=&ain4; |
vic20 | 0:39a545e08ccd | 1612 | break; |
vic20 | 0:39a545e08ccd | 1613 | } |
vic20 | 0:39a545e08ccd | 1614 | |
vic20 | 0:39a545e08ccd | 1615 | return 1; |
vic20 | 0:39a545e08ccd | 1616 | } |
vic20 | 0:39a545e08ccd | 1617 | |
vic20 | 0:39a545e08ccd | 1618 | // Single Wave response |
vic20 | 0:39a545e08ccd | 1619 | void singleWaveResponse() |
vic20 | 0:39a545e08ccd | 1620 | { |
vic20 | 0:39a545e08ccd | 1621 | int channel; |
vic20 | 0:39a545e08ccd | 1622 | |
vic20 | 0:39a545e08ccd | 1623 | PRO1_CLEAR // Reset profile lines |
vic20 | 0:39a545e08ccd | 1624 | PRO2_CLEAR |
vic20 | 0:39a545e08ccd | 1625 | |
vic20 | 0:39a545e08ccd | 1626 | // Read channel to read |
vic20 | 0:39a545e08ccd | 1627 | channel = getByte(); |
vic20 | 0:39a545e08ccd | 1628 | |
vic20 | 0:39a545e08ccd | 1629 | // Read number of waves before mesurement |
vic20 | 0:39a545e08ccd | 1630 | w_n = getU16(); |
vic20 | 0:39a545e08ccd | 1631 | |
vic20 | 0:39a545e08ccd | 1632 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1633 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1634 | |
vic20 | 0:39a545e08ccd | 1635 | // Configure the input channel |
vic20 | 0:39a545e08ccd | 1636 | if (!selectTranChannel(channel)) return; |
vic20 | 0:39a545e08ccd | 1637 | |
vic20 | 0:39a545e08ccd | 1638 | // Dummy read |
vic20 | 0:39a545e08ccd | 1639 | ain_tran->read_u16(); |
vic20 | 0:39a545e08ccd | 1640 | |
vic20 | 0:39a545e08ccd | 1641 | // Send ACK |
vic20 | 0:39a545e08ccd | 1642 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1643 | |
vic20 | 0:39a545e08ccd | 1644 | // Configure ticker ISR |
vic20 | 0:39a545e08ccd | 1645 | samples = 0; // Number of processed samples |
vic20 | 0:39a545e08ccd | 1646 | inBuffPos = 0; // Current buffer position |
vic20 | 0:39a545e08ccd | 1647 | endTicker = 0; // Ticker has not ended |
vic20 | 0:39a545e08ccd | 1648 | w_pos = 0; // Current wave position |
vic20 | 0:39a545e08ccd | 1649 | |
vic20 | 0:39a545e08ccd | 1650 | currentBsize = n_s; // Current size for buffer |
vic20 | 0:39a545e08ccd | 1651 | |
vic20 | 0:39a545e08ccd | 1652 | // Clear overrun variables |
vic20 | 0:39a545e08ccd | 1653 | overrun_error = 0; |
vic20 | 0:39a545e08ccd | 1654 | overrun = 0; |
vic20 | 0:39a545e08ccd | 1655 | |
vic20 | 0:39a545e08ccd | 1656 | if (stime < 30e-6f) |
vic20 | 0:39a545e08ccd | 1657 | { |
vic20 | 0:39a545e08ccd | 1658 | // Programs the ticker with fast version |
vic20 | 0:39a545e08ccd | 1659 | ticR.attach(&singleWaveResponseFastISR,stime); |
vic20 | 0:39a545e08ccd | 1660 | } |
vic20 | 0:39a545e08ccd | 1661 | else |
vic20 | 0:39a545e08ccd | 1662 | { |
vic20 | 0:39a545e08ccd | 1663 | // Programs the ticker with normal version |
vic20 | 0:39a545e08ccd | 1664 | ticR.attach(&singleWaveResponseISR,stime); |
vic20 | 0:39a545e08ccd | 1665 | } |
vic20 | 0:39a545e08ccd | 1666 | |
vic20 | 0:39a545e08ccd | 1667 | // Wait till end |
vic20 | 0:39a545e08ccd | 1668 | while (!endTicker) { overrun = 0; PRO2_CLEAR } |
vic20 | 0:39a545e08ccd | 1669 | |
vic20 | 0:39a545e08ccd | 1670 | // Return data |
vic20 | 0:39a545e08ccd | 1671 | dumpInSingleBuffer(); // Dump data |
vic20 | 0:39a545e08ccd | 1672 | |
vic20 | 0:39a545e08ccd | 1673 | // End sending CRC |
vic20 | 0:39a545e08ccd | 1674 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1675 | } |
vic20 | 0:39a545e08ccd | 1676 | |
vic20 | 0:39a545e08ccd | 1677 | /****************** WAVE PLAY CODE *************************/ |
vic20 | 0:39a545e08ccd | 1678 | |
vic20 | 0:39a545e08ccd | 1679 | // ISR for the wavePlay function |
vic20 | 0:39a545e08ccd | 1680 | void wavePlayISR() |
vic20 | 0:39a545e08ccd | 1681 | { |
vic20 | 0:39a545e08ccd | 1682 | // Write DAC (Old code) |
vic20 | 0:39a545e08ccd | 1683 | // aout1 = buff[w_pos++] / MAX16F; |
vic20 | 0:39a545e08ccd | 1684 | |
vic20 | 0:39a545e08ccd | 1685 | // Write DACs (New faster code) |
vic20 | 0:39a545e08ccd | 1686 | DAC->DHR12R1 = (buff[w_pos++]>>4); |
vic20 | 0:39a545e08ccd | 1687 | |
vic20 | 0:39a545e08ccd | 1688 | // Check wave rollover |
vic20 | 0:39a545e08ccd | 1689 | if (w_pos == w_s) |
vic20 | 0:39a545e08ccd | 1690 | { |
vic20 | 0:39a545e08ccd | 1691 | w_pos = 0; |
vic20 | 0:39a545e08ccd | 1692 | w_n--; |
vic20 | 0:39a545e08ccd | 1693 | if (w_n <= 0) |
vic20 | 0:39a545e08ccd | 1694 | { |
vic20 | 0:39a545e08ccd | 1695 | // Disable ticker |
vic20 | 0:39a545e08ccd | 1696 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 1697 | // Signal end |
vic20 | 0:39a545e08ccd | 1698 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 1699 | return; |
vic20 | 0:39a545e08ccd | 1700 | } |
vic20 | 0:39a545e08ccd | 1701 | } |
vic20 | 0:39a545e08ccd | 1702 | |
vic20 | 0:39a545e08ccd | 1703 | // Check for overrun |
vic20 | 0:39a545e08ccd | 1704 | if (overrun) |
vic20 | 0:39a545e08ccd | 1705 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 1706 | |
vic20 | 0:39a545e08ccd | 1707 | overrun = 1; |
vic20 | 0:39a545e08ccd | 1708 | } |
vic20 | 0:39a545e08ccd | 1709 | |
vic20 | 0:39a545e08ccd | 1710 | // Wave Play |
vic20 | 0:39a545e08ccd | 1711 | void wavePlay() |
vic20 | 0:39a545e08ccd | 1712 | { |
vic20 | 0:39a545e08ccd | 1713 | PRO1_SET |
vic20 | 0:39a545e08ccd | 1714 | // Read number of waves to send |
vic20 | 0:39a545e08ccd | 1715 | w_n = getU16(); |
vic20 | 0:39a545e08ccd | 1716 | |
vic20 | 0:39a545e08ccd | 1717 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1718 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1719 | |
vic20 | 0:39a545e08ccd | 1720 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1721 | |
vic20 | 0:39a545e08ccd | 1722 | // Configure ticker ISR |
vic20 | 0:39a545e08ccd | 1723 | endTicker = 0; // Ticker has not ended |
vic20 | 0:39a545e08ccd | 1724 | w_pos = 0; // Current wave position |
vic20 | 0:39a545e08ccd | 1725 | |
vic20 | 0:39a545e08ccd | 1726 | // Clear overrun variables |
vic20 | 0:39a545e08ccd | 1727 | overrun_error = 0; |
vic20 | 0:39a545e08ccd | 1728 | overrun = 0; |
vic20 | 0:39a545e08ccd | 1729 | |
vic20 | 0:39a545e08ccd | 1730 | // Programs the ticker |
vic20 | 0:39a545e08ccd | 1731 | ticR.attach(&wavePlayISR,stime); |
vic20 | 0:39a545e08ccd | 1732 | |
vic20 | 0:39a545e08ccd | 1733 | // Wait till end |
vic20 | 0:39a545e08ccd | 1734 | while (!endTicker) overrun = 0; |
vic20 | 0:39a545e08ccd | 1735 | |
vic20 | 0:39a545e08ccd | 1736 | PRO1_CLEAR |
vic20 | 0:39a545e08ccd | 1737 | |
vic20 | 0:39a545e08ccd | 1738 | // Response code |
vic20 | 0:39a545e08ccd | 1739 | if (overrun_error) |
vic20 | 0:39a545e08ccd | 1740 | sendByte(TRAN_OVERRUN); |
vic20 | 0:39a545e08ccd | 1741 | else |
vic20 | 0:39a545e08ccd | 1742 | sendByte(TRAN_OK); |
vic20 | 0:39a545e08ccd | 1743 | |
vic20 | 0:39a545e08ccd | 1744 | // End sending CRC |
vic20 | 0:39a545e08ccd | 1745 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1746 | } |
vic20 | 0:39a545e08ccd | 1747 | |
vic20 | 0:39a545e08ccd | 1748 | /****************** DUAL WAVE PLAY CODE *************************/ |
vic20 | 0:39a545e08ccd | 1749 | |
vic20 | 0:39a545e08ccd | 1750 | // ISR for the dualWavePlay function |
vic20 | 0:39a545e08ccd | 1751 | void dualWavePlayISR() |
vic20 | 0:39a545e08ccd | 1752 | { |
vic20 | 0:39a545e08ccd | 1753 | // Write DAC (Old code) |
vic20 | 0:39a545e08ccd | 1754 | //aout1 = buff[w_pos++] / MAX16F; |
vic20 | 0:39a545e08ccd | 1755 | //aout2 = wave2buff[w_pos2++] / MAX16F; |
vic20 | 0:39a545e08ccd | 1756 | |
vic20 | 0:39a545e08ccd | 1757 | // Write DACs (New faster code) |
vic20 | 0:39a545e08ccd | 1758 | DAC->DHR12R1 = (buff[w_pos++]>>4); |
vic20 | 0:39a545e08ccd | 1759 | DAC->DHR12R2 = (wave2buff[w_pos2++]>>4); |
vic20 | 0:39a545e08ccd | 1760 | |
vic20 | 0:39a545e08ccd | 1761 | // Check primary wave rollover |
vic20 | 0:39a545e08ccd | 1762 | if (w_pos == w_s) |
vic20 | 0:39a545e08ccd | 1763 | { |
vic20 | 0:39a545e08ccd | 1764 | w_pos = 0; |
vic20 | 0:39a545e08ccd | 1765 | w_n--; |
vic20 | 0:39a545e08ccd | 1766 | if (w_n <= 0) |
vic20 | 0:39a545e08ccd | 1767 | { |
vic20 | 0:39a545e08ccd | 1768 | // Disable ticker |
vic20 | 0:39a545e08ccd | 1769 | ticR.detach(); |
vic20 | 0:39a545e08ccd | 1770 | // Signal end |
vic20 | 0:39a545e08ccd | 1771 | endTicker = 1; |
vic20 | 0:39a545e08ccd | 1772 | } |
vic20 | 0:39a545e08ccd | 1773 | } |
vic20 | 0:39a545e08ccd | 1774 | |
vic20 | 0:39a545e08ccd | 1775 | // Check for secondary wave rollover |
vic20 | 0:39a545e08ccd | 1776 | if (w_pos2 == w_s2) w_pos2 = 0; |
vic20 | 0:39a545e08ccd | 1777 | |
vic20 | 0:39a545e08ccd | 1778 | // Check for overrun |
vic20 | 0:39a545e08ccd | 1779 | if (overrun) |
vic20 | 0:39a545e08ccd | 1780 | overrun_error = 1; |
vic20 | 0:39a545e08ccd | 1781 | |
vic20 | 0:39a545e08ccd | 1782 | overrun = 1; |
vic20 | 0:39a545e08ccd | 1783 | } |
vic20 | 0:39a545e08ccd | 1784 | |
vic20 | 0:39a545e08ccd | 1785 | // Dual Wave Play |
vic20 | 0:39a545e08ccd | 1786 | void dualWavePlay() |
vic20 | 0:39a545e08ccd | 1787 | { |
vic20 | 0:39a545e08ccd | 1788 | // Read number of primary waves to send |
vic20 | 0:39a545e08ccd | 1789 | w_n = getU16(); |
vic20 | 0:39a545e08ccd | 1790 | |
vic20 | 0:39a545e08ccd | 1791 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1792 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1793 | |
vic20 | 0:39a545e08ccd | 1794 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1795 | |
vic20 | 0:39a545e08ccd | 1796 | // Configure ticker ISR |
vic20 | 0:39a545e08ccd | 1797 | endTicker = 0; // Ticker has not ended |
vic20 | 0:39a545e08ccd | 1798 | w_pos = 0; // Current primary wave position |
vic20 | 0:39a545e08ccd | 1799 | w_pos2 = 0; // Current secondary wave position |
vic20 | 0:39a545e08ccd | 1800 | |
vic20 | 0:39a545e08ccd | 1801 | // Clear overrun variables |
vic20 | 0:39a545e08ccd | 1802 | overrun_error = 0; |
vic20 | 0:39a545e08ccd | 1803 | overrun = 0; |
vic20 | 0:39a545e08ccd | 1804 | |
vic20 | 0:39a545e08ccd | 1805 | // Programs the ticker |
vic20 | 0:39a545e08ccd | 1806 | ticR.attach(&dualWavePlayISR,stime); |
vic20 | 0:39a545e08ccd | 1807 | |
vic20 | 0:39a545e08ccd | 1808 | // Wait till end |
vic20 | 0:39a545e08ccd | 1809 | while (!endTicker) overrun = 0; |
vic20 | 0:39a545e08ccd | 1810 | |
vic20 | 0:39a545e08ccd | 1811 | // Response code |
vic20 | 0:39a545e08ccd | 1812 | if (overrun_error) |
vic20 | 0:39a545e08ccd | 1813 | sendByte(TRAN_OVERRUN); |
vic20 | 0:39a545e08ccd | 1814 | else |
vic20 | 0:39a545e08ccd | 1815 | sendByte(TRAN_OK); |
vic20 | 0:39a545e08ccd | 1816 | |
vic20 | 0:39a545e08ccd | 1817 | // End sending CRC |
vic20 | 0:39a545e08ccd | 1818 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1819 | } |
vic20 | 0:39a545e08ccd | 1820 | |
vic20 | 0:39a545e08ccd | 1821 | /***************** DC DIGITAL IO *********************************/ |
vic20 | 0:39a545e08ccd | 1822 | |
vic20 | 0:39a545e08ccd | 1823 | // Digital IO mode |
vic20 | 0:39a545e08ccd | 1824 | void dioMode() |
vic20 | 0:39a545e08ccd | 1825 | { |
vic20 | 0:39a545e08ccd | 1826 | int line,mode,error; |
vic20 | 0:39a545e08ccd | 1827 | |
vic20 | 0:39a545e08ccd | 1828 | // Read line to configure |
vic20 | 0:39a545e08ccd | 1829 | line = getByte(); |
vic20 | 0:39a545e08ccd | 1830 | |
vic20 | 0:39a545e08ccd | 1831 | // Read mode to set |
vic20 | 0:39a545e08ccd | 1832 | mode = getByte(); |
vic20 | 0:39a545e08ccd | 1833 | |
vic20 | 0:39a545e08ccd | 1834 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1835 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1836 | |
vic20 | 0:39a545e08ccd | 1837 | // No error for now |
vic20 | 0:39a545e08ccd | 1838 | error = 0; |
vic20 | 0:39a545e08ccd | 1839 | |
vic20 | 0:39a545e08ccd | 1840 | // Check line number |
vic20 | 0:39a545e08ccd | 1841 | if ((line <= 0)||(line > NDIO)) error = 1; |
vic20 | 0:39a545e08ccd | 1842 | |
vic20 | 0:39a545e08ccd | 1843 | // Set dio mode |
vic20 | 0:39a545e08ccd | 1844 | if (!error) |
vic20 | 0:39a545e08ccd | 1845 | switch(mode) |
vic20 | 0:39a545e08ccd | 1846 | { |
vic20 | 0:39a545e08ccd | 1847 | case 10: |
vic20 | 0:39a545e08ccd | 1848 | dioList[line-1]->input(); |
vic20 | 0:39a545e08ccd | 1849 | dioList[line-1]->mode(PullNone); |
vic20 | 0:39a545e08ccd | 1850 | break; |
vic20 | 0:39a545e08ccd | 1851 | case 11: |
vic20 | 0:39a545e08ccd | 1852 | dioList[line-1]->input(); |
vic20 | 0:39a545e08ccd | 1853 | dioList[line-1]->mode(PullUp); |
vic20 | 0:39a545e08ccd | 1854 | break; |
vic20 | 0:39a545e08ccd | 1855 | case 12: |
vic20 | 0:39a545e08ccd | 1856 | dioList[line-1]->input(); |
vic20 | 0:39a545e08ccd | 1857 | dioList[line-1]->mode(PullDown); |
vic20 | 0:39a545e08ccd | 1858 | break; |
vic20 | 0:39a545e08ccd | 1859 | case 20: |
vic20 | 0:39a545e08ccd | 1860 | dioList[line-1]->mode(PullNone); |
vic20 | 0:39a545e08ccd | 1861 | dioList[line-1]->output(); |
vic20 | 0:39a545e08ccd | 1862 | break; |
vic20 | 0:39a545e08ccd | 1863 | // case 21: |
vic20 | 0:39a545e08ccd | 1864 | // dioList[line-1]->mode(OpenDrain); |
vic20 | 0:39a545e08ccd | 1865 | // dioList[line-1]->output(); |
vic20 | 0:39a545e08ccd | 1866 | // break; |
vic20 | 0:39a545e08ccd | 1867 | default: |
vic20 | 0:39a545e08ccd | 1868 | error = 1; |
vic20 | 0:39a545e08ccd | 1869 | break; |
vic20 | 0:39a545e08ccd | 1870 | } |
vic20 | 0:39a545e08ccd | 1871 | |
vic20 | 0:39a545e08ccd | 1872 | if (error) |
vic20 | 0:39a545e08ccd | 1873 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 1874 | else |
vic20 | 0:39a545e08ccd | 1875 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1876 | |
vic20 | 0:39a545e08ccd | 1877 | // End sending CRC |
vic20 | 0:39a545e08ccd | 1878 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1879 | } |
vic20 | 0:39a545e08ccd | 1880 | |
vic20 | 0:39a545e08ccd | 1881 | // Digital Write |
vic20 | 0:39a545e08ccd | 1882 | void dioWrite() |
vic20 | 0:39a545e08ccd | 1883 | { |
vic20 | 0:39a545e08ccd | 1884 | int line,value; |
vic20 | 0:39a545e08ccd | 1885 | |
vic20 | 0:39a545e08ccd | 1886 | // Read line to write |
vic20 | 0:39a545e08ccd | 1887 | line = getByte(); |
vic20 | 0:39a545e08ccd | 1888 | |
vic20 | 0:39a545e08ccd | 1889 | // Value to set |
vic20 | 0:39a545e08ccd | 1890 | value = getByte(); |
vic20 | 0:39a545e08ccd | 1891 | |
vic20 | 0:39a545e08ccd | 1892 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1893 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1894 | |
vic20 | 0:39a545e08ccd | 1895 | // Check line number |
vic20 | 0:39a545e08ccd | 1896 | if ((line <= 0)||(line > NDIO)) |
vic20 | 0:39a545e08ccd | 1897 | { |
vic20 | 0:39a545e08ccd | 1898 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 1899 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1900 | return; |
vic20 | 0:39a545e08ccd | 1901 | } |
vic20 | 0:39a545e08ccd | 1902 | |
vic20 | 0:39a545e08ccd | 1903 | // Set dio value |
vic20 | 0:39a545e08ccd | 1904 | dioList[line-1]->write(value); |
vic20 | 0:39a545e08ccd | 1905 | |
vic20 | 0:39a545e08ccd | 1906 | // Send ACK and CRC |
vic20 | 0:39a545e08ccd | 1907 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1908 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1909 | } |
vic20 | 0:39a545e08ccd | 1910 | |
vic20 | 0:39a545e08ccd | 1911 | // Digital Read |
vic20 | 0:39a545e08ccd | 1912 | void dioRead() |
vic20 | 0:39a545e08ccd | 1913 | { |
vic20 | 0:39a545e08ccd | 1914 | int line,value; |
vic20 | 0:39a545e08ccd | 1915 | |
vic20 | 0:39a545e08ccd | 1916 | // Read line to read |
vic20 | 0:39a545e08ccd | 1917 | line = getByte(); |
vic20 | 0:39a545e08ccd | 1918 | |
vic20 | 0:39a545e08ccd | 1919 | // Check of CRC |
vic20 | 0:39a545e08ccd | 1920 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 1921 | |
vic20 | 0:39a545e08ccd | 1922 | // Check line number |
vic20 | 0:39a545e08ccd | 1923 | if ((line <= 0)||(line > NDIO)) |
vic20 | 0:39a545e08ccd | 1924 | { |
vic20 | 0:39a545e08ccd | 1925 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 1926 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1927 | return; |
vic20 | 0:39a545e08ccd | 1928 | } |
vic20 | 0:39a545e08ccd | 1929 | |
vic20 | 0:39a545e08ccd | 1930 | // Send ACK |
vic20 | 0:39a545e08ccd | 1931 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 1932 | |
vic20 | 0:39a545e08ccd | 1933 | // Read and send dio value |
vic20 | 0:39a545e08ccd | 1934 | value=dioList[line-1]->read(); |
vic20 | 0:39a545e08ccd | 1935 | if (value) |
vic20 | 0:39a545e08ccd | 1936 | sendByte(1); |
vic20 | 0:39a545e08ccd | 1937 | else |
vic20 | 0:39a545e08ccd | 1938 | sendByte(0); |
vic20 | 0:39a545e08ccd | 1939 | |
vic20 | 0:39a545e08ccd | 1940 | // Send CRC |
vic20 | 0:39a545e08ccd | 1941 | sendCRC(); |
vic20 | 0:39a545e08ccd | 1942 | } |
vic20 | 0:39a545e08ccd | 1943 | |
vic20 | 0:39a545e08ccd | 1944 | /***************** MAIN LOOP CODE ********************************/ |
vic20 | 0:39a545e08ccd | 1945 | |
vic20 | 0:39a545e08ccd | 1946 | // Soft reset |
vic20 | 0:39a545e08ccd | 1947 | // Put the system in default reset state |
vic20 | 0:39a545e08ccd | 1948 | void softReset(void) |
vic20 | 0:39a545e08ccd | 1949 | { |
vic20 | 0:39a545e08ccd | 1950 | int i; |
vic20 | 0:39a545e08ccd | 1951 | |
vic20 | 0:39a545e08ccd | 1952 | // Sample time period defaults to 1ms |
vic20 | 0:39a545e08ccd | 1953 | stime = 0.001; |
vic20 | 0:39a545e08ccd | 1954 | |
vic20 | 0:39a545e08ccd | 1955 | // Set number of DC readings to 10 |
vic20 | 0:39a545e08ccd | 1956 | nread = 10; |
vic20 | 0:39a545e08ccd | 1957 | |
vic20 | 0:39a545e08ccd | 1958 | // Input configuration |
vic20 | 0:39a545e08ccd | 1959 | n_ai = 1; // Number of analog inputs |
vic20 | 0:39a545e08ccd | 1960 | n_di = 0; // Number of digital inputs (always zero) |
vic20 | 0:39a545e08ccd | 1961 | n_s = 1000; // Number of samples |
vic20 | 0:39a545e08ccd | 1962 | |
vic20 | 0:39a545e08ccd | 1963 | // Eliminate wavetables |
vic20 | 0:39a545e08ccd | 1964 | w_s = 0; |
vic20 | 0:39a545e08ccd | 1965 | w_s2 = 0; |
vic20 | 0:39a545e08ccd | 1966 | |
vic20 | 0:39a545e08ccd | 1967 | // Initialize unified memory |
vic20 | 0:39a545e08ccd | 1968 | wave2buff = buff; |
vic20 | 0:39a545e08ccd | 1969 | tranBuff = buff; |
vic20 | 0:39a545e08ccd | 1970 | |
vic20 | 0:39a545e08ccd | 1971 | // Set DACs to zero |
vic20 | 0:39a545e08ccd | 1972 | aout1 = 0.0; |
vic20 | 0:39a545e08ccd | 1973 | aout2 = 0.0; |
vic20 | 0:39a545e08ccd | 1974 | |
vic20 | 0:39a545e08ccd | 1975 | // Fill ain list |
vic20 | 0:39a545e08ccd | 1976 | ainList[0]=&ain1; |
vic20 | 0:39a545e08ccd | 1977 | ainList[1]=&ain2; |
vic20 | 0:39a545e08ccd | 1978 | ainList[2]=&ain3; |
vic20 | 0:39a545e08ccd | 1979 | ainList[3]=&ain4; |
vic20 | 0:39a545e08ccd | 1980 | |
vic20 | 0:39a545e08ccd | 1981 | // Configure DIO |
vic20 | 0:39a545e08ccd | 1982 | #ifdef EXIST_DIO |
vic20 | 0:39a545e08ccd | 1983 | // Setup dioList |
vic20 | 0:39a545e08ccd | 1984 | dioList[0]=&dio1; |
vic20 | 0:39a545e08ccd | 1985 | dioList[1]=&dio2; |
vic20 | 0:39a545e08ccd | 1986 | dioList[2]=&dio3; |
vic20 | 0:39a545e08ccd | 1987 | dioList[3]=&dio4; |
vic20 | 0:39a545e08ccd | 1988 | dioList[4]=&dio5; |
vic20 | 0:39a545e08ccd | 1989 | dioList[5]=&dio6; |
vic20 | 0:39a545e08ccd | 1990 | dioList[6]=&dio7; |
vic20 | 0:39a545e08ccd | 1991 | dioList[7]=&dio8; |
vic20 | 0:39a545e08ccd | 1992 | // Default configuration |
vic20 | 0:39a545e08ccd | 1993 | for(i=0;i<NDIO;i++) |
vic20 | 0:39a545e08ccd | 1994 | { |
vic20 | 0:39a545e08ccd | 1995 | dioList[i]->mode(PullNone); |
vic20 | 0:39a545e08ccd | 1996 | dioList[i]->input(); |
vic20 | 0:39a545e08ccd | 1997 | } |
vic20 | 0:39a545e08ccd | 1998 | #endif |
vic20 | 0:39a545e08ccd | 1999 | } |
vic20 | 0:39a545e08ccd | 2000 | |
vic20 | 0:39a545e08ccd | 2001 | // Process one character received from the PC |
vic20 | 0:39a545e08ccd | 2002 | void process(int car) |
vic20 | 0:39a545e08ccd | 2003 | { |
vic20 | 0:39a545e08ccd | 2004 | int i; |
vic20 | 0:39a545e08ccd | 2005 | uint16_t value; |
vic20 | 0:39a545e08ccd | 2006 | |
vic20 | 0:39a545e08ccd | 2007 | // Initialize Tx CRC |
vic20 | 0:39a545e08ccd | 2008 | startTx(); |
vic20 | 0:39a545e08ccd | 2009 | |
vic20 | 0:39a545e08ccd | 2010 | switch(car) |
vic20 | 0:39a545e08ccd | 2011 | { |
vic20 | 0:39a545e08ccd | 2012 | case 'F': // Get firmware string |
vic20 | 0:39a545e08ccd | 2013 | sendString(BSTRING); |
vic20 | 0:39a545e08ccd | 2014 | sendString(VSTRING); |
vic20 | 0:39a545e08ccd | 2015 | sendString("\n\r"); |
vic20 | 0:39a545e08ccd | 2016 | break; |
vic20 | 0:39a545e08ccd | 2017 | case 'M': // Get magic |
vic20 | 0:39a545e08ccd | 2018 | // Check CRC of command. Returns 1 if Ok |
vic20 | 0:39a545e08ccd | 2019 | // On error Sends ECRC + CRC and return 0 |
vic20 | 0:39a545e08ccd | 2020 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 2021 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 2022 | // Send magic |
vic20 | 0:39a545e08ccd | 2023 | for(i=0;i<MAGIC_SIZE;i++) |
vic20 | 0:39a545e08ccd | 2024 | sendByte(magic[i]); |
vic20 | 0:39a545e08ccd | 2025 | // Send CRC |
vic20 | 0:39a545e08ccd | 2026 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2027 | break; |
vic20 | 0:39a545e08ccd | 2028 | case 'I': // Get board capabilities |
vic20 | 0:39a545e08ccd | 2029 | // Check CRC of command. Returns 1 if Ok |
vic20 | 0:39a545e08ccd | 2030 | // On error Sends ECRC + CRC and return 0 |
vic20 | 0:39a545e08ccd | 2031 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 2032 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 2033 | |
vic20 | 0:39a545e08ccd | 2034 | sendByte(NDACS); // 1 |
vic20 | 0:39a545e08ccd | 2035 | sendByte(NADCS); // 2 |
vic20 | 0:39a545e08ccd | 2036 | sendU16(BSIZE); // 4 Buffer |
vic20 | 0:39a545e08ccd | 2037 | sendMantExp(MAX_S_M,MAX_S_E); // 7 |
vic20 | 0:39a545e08ccd | 2038 | sendMantExp(MIN_S_M,MIN_S_E); // 10 |
vic20 | 0:39a545e08ccd | 2039 | sendMantExp(VDD_M,VDD_E); // 13 |
vic20 | 0:39a545e08ccd | 2040 | sendMantExp(MAX_SF_M,MAX_SF_E); // 16 |
vic20 | 0:39a545e08ccd | 2041 | sendMantExp(VREF_M,VREF_E); // 29 |
vic20 | 0:39a545e08ccd | 2042 | sendByte(DAC_BITS); // 20 |
vic20 | 0:39a545e08ccd | 2043 | sendByte(ADC_BITS); // 21 |
vic20 | 0:39a545e08ccd | 2044 | sendByte(NDIO); // 22 |
vic20 | 0:39a545e08ccd | 2045 | sendByte(resetState); // 23 |
vic20 | 0:39a545e08ccd | 2046 | |
vic20 | 0:39a545e08ccd | 2047 | // Send CRC |
vic20 | 0:39a545e08ccd | 2048 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2049 | break; |
vic20 | 0:39a545e08ccd | 2050 | case 'L' : // Send pin list |
vic20 | 0:39a545e08ccd | 2051 | // Check CRC of command. Returns 1 if Ok |
vic20 | 0:39a545e08ccd | 2052 | // On error Sends ECRC + CRC and return 0 |
vic20 | 0:39a545e08ccd | 2053 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 2054 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 2055 | |
vic20 | 0:39a545e08ccd | 2056 | sendString(PIN_LIST); |
vic20 | 0:39a545e08ccd | 2057 | |
vic20 | 0:39a545e08ccd | 2058 | // Send CRC |
vic20 | 0:39a545e08ccd | 2059 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2060 | break; |
vic20 | 0:39a545e08ccd | 2061 | |
vic20 | 0:39a545e08ccd | 2062 | |
vic20 | 0:39a545e08ccd | 2063 | case 'A' : // ADC Read |
vic20 | 0:39a545e08ccd | 2064 | i = getByte(); // Channel to read |
vic20 | 0:39a545e08ccd | 2065 | // Check CRC of command. Returns 1 if Ok |
vic20 | 0:39a545e08ccd | 2066 | // On error Sends ECRC + CRC and return 0 |
vic20 | 0:39a545e08ccd | 2067 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 2068 | |
vic20 | 0:39a545e08ccd | 2069 | /* |
vic20 | 0:39a545e08ccd | 2070 | switch(i) |
vic20 | 0:39a545e08ccd | 2071 | { |
vic20 | 0:39a545e08ccd | 2072 | case 1: |
vic20 | 0:39a545e08ccd | 2073 | value = ain1.read_u16(); // Two reads |
vic20 | 0:39a545e08ccd | 2074 | value = ain1.read_u16(); |
vic20 | 0:39a545e08ccd | 2075 | break; |
vic20 | 0:39a545e08ccd | 2076 | case 2: |
vic20 | 0:39a545e08ccd | 2077 | value = ain2.read_u16(); // Two reads |
vic20 | 0:39a545e08ccd | 2078 | value = ain2.read_u16(); |
vic20 | 0:39a545e08ccd | 2079 | break; |
vic20 | 0:39a545e08ccd | 2080 | case 3: |
vic20 | 0:39a545e08ccd | 2081 | value = ain3.read_u16(); // Two reads |
vic20 | 0:39a545e08ccd | 2082 | value = ain3.read_u16(); |
vic20 | 0:39a545e08ccd | 2083 | break; |
vic20 | 0:39a545e08ccd | 2084 | case 4: |
vic20 | 0:39a545e08ccd | 2085 | value = ain4.read_u16(); // Two reads |
vic20 | 0:39a545e08ccd | 2086 | value = ain4.read_u16(); |
vic20 | 0:39a545e08ccd | 2087 | break; |
vic20 | 0:39a545e08ccd | 2088 | default: |
vic20 | 0:39a545e08ccd | 2089 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 2090 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2091 | return; |
vic20 | 0:39a545e08ccd | 2092 | } |
vic20 | 0:39a545e08ccd | 2093 | */ |
vic20 | 0:39a545e08ccd | 2094 | if ((i<1)||(i>NADCS)) |
vic20 | 0:39a545e08ccd | 2095 | { |
vic20 | 0:39a545e08ccd | 2096 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 2097 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2098 | return; |
vic20 | 0:39a545e08ccd | 2099 | } |
vic20 | 0:39a545e08ccd | 2100 | |
vic20 | 0:39a545e08ccd | 2101 | value = analogRead(i); |
vic20 | 0:39a545e08ccd | 2102 | |
vic20 | 0:39a545e08ccd | 2103 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 2104 | sendU16(value); |
vic20 | 0:39a545e08ccd | 2105 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2106 | break; |
vic20 | 0:39a545e08ccd | 2107 | |
vic20 | 0:39a545e08ccd | 2108 | case 'D' : // DAC Write |
vic20 | 0:39a545e08ccd | 2109 | i = getByte(); // Channel to write |
vic20 | 0:39a545e08ccd | 2110 | value = getU16(); // Read value to set |
vic20 | 0:39a545e08ccd | 2111 | // Check CRC of command. Returns 1 if Ok |
vic20 | 0:39a545e08ccd | 2112 | // On error Sends ECRC + CRC and return 0 |
vic20 | 0:39a545e08ccd | 2113 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 2114 | switch(i) |
vic20 | 0:39a545e08ccd | 2115 | { |
vic20 | 0:39a545e08ccd | 2116 | case 1: |
vic20 | 0:39a545e08ccd | 2117 | aout1 = value / MAX16F; // Scale to float and send |
vic20 | 0:39a545e08ccd | 2118 | break; |
vic20 | 0:39a545e08ccd | 2119 | case 2: |
vic20 | 0:39a545e08ccd | 2120 | aout2 = value / MAX16F; // Scale to float and send |
vic20 | 0:39a545e08ccd | 2121 | break; |
vic20 | 0:39a545e08ccd | 2122 | #ifdef EXIST_DAC3 |
vic20 | 0:39a545e08ccd | 2123 | case 3: |
vic20 | 0:39a545e08ccd | 2124 | aout3 = value / MAX16F; // Scale to float and send |
vic20 | 0:39a545e08ccd | 2125 | break; |
vic20 | 0:39a545e08ccd | 2126 | #endif |
vic20 | 0:39a545e08ccd | 2127 | default: |
vic20 | 0:39a545e08ccd | 2128 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 2129 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2130 | return; |
vic20 | 0:39a545e08ccd | 2131 | } |
vic20 | 0:39a545e08ccd | 2132 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 2133 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2134 | resetState=0; // State change |
vic20 | 0:39a545e08ccd | 2135 | break; |
vic20 | 0:39a545e08ccd | 2136 | |
vic20 | 0:39a545e08ccd | 2137 | case 'R': // Set sample period time |
vic20 | 0:39a545e08ccd | 2138 | setSampleTime(); |
vic20 | 0:39a545e08ccd | 2139 | resetState=0; // State change |
vic20 | 0:39a545e08ccd | 2140 | break; |
vic20 | 0:39a545e08ccd | 2141 | case 'S': // Set Storage |
vic20 | 0:39a545e08ccd | 2142 | setStorage(); |
vic20 | 0:39a545e08ccd | 2143 | resetState=0; // State change |
vic20 | 0:39a545e08ccd | 2144 | break; |
vic20 | 0:39a545e08ccd | 2145 | case 'Y': // Async Read |
vic20 | 0:39a545e08ccd | 2146 | asyncRead(); |
vic20 | 0:39a545e08ccd | 2147 | break; |
vic20 | 0:39a545e08ccd | 2148 | case 'G': // Triggered Read |
vic20 | 0:39a545e08ccd | 2149 | triggeredRead(); |
vic20 | 0:39a545e08ccd | 2150 | break; |
vic20 | 0:39a545e08ccd | 2151 | case 'P': // Step response |
vic20 | 0:39a545e08ccd | 2152 | stepResponse(); |
vic20 | 0:39a545e08ccd | 2153 | break; |
vic20 | 0:39a545e08ccd | 2154 | |
vic20 | 0:39a545e08ccd | 2155 | case 'W': // Load wavetable |
vic20 | 0:39a545e08ccd | 2156 | loadWaveTable(); |
vic20 | 0:39a545e08ccd | 2157 | resetState=0; // State change |
vic20 | 0:39a545e08ccd | 2158 | break; |
vic20 | 0:39a545e08ccd | 2159 | case 'w': // Load secondary wavetable |
vic20 | 0:39a545e08ccd | 2160 | loadSecondaryWaveTable(); |
vic20 | 0:39a545e08ccd | 2161 | resetState=0; // State change |
vic20 | 0:39a545e08ccd | 2162 | break; |
vic20 | 0:39a545e08ccd | 2163 | case 'V': // Wave response |
vic20 | 0:39a545e08ccd | 2164 | waveResponse(); |
vic20 | 0:39a545e08ccd | 2165 | break; |
vic20 | 0:39a545e08ccd | 2166 | case 'v': // Dual wave response |
vic20 | 0:39a545e08ccd | 2167 | dualWaveResponse(); |
vic20 | 0:39a545e08ccd | 2168 | break; |
vic20 | 0:39a545e08ccd | 2169 | case 'X': // Single Wave response |
vic20 | 0:39a545e08ccd | 2170 | singleWaveResponse(); |
vic20 | 0:39a545e08ccd | 2171 | break; |
vic20 | 0:39a545e08ccd | 2172 | case 'Q': // Wave Play |
vic20 | 0:39a545e08ccd | 2173 | wavePlay(); |
vic20 | 0:39a545e08ccd | 2174 | break; |
vic20 | 0:39a545e08ccd | 2175 | case 'q': // Wave Play |
vic20 | 0:39a545e08ccd | 2176 | dualWavePlay(); |
vic20 | 0:39a545e08ccd | 2177 | break; |
vic20 | 0:39a545e08ccd | 2178 | |
vic20 | 0:39a545e08ccd | 2179 | case 'E': // Soft Reset |
vic20 | 0:39a545e08ccd | 2180 | if (!crcResponse()) return; |
vic20 | 0:39a545e08ccd | 2181 | |
vic20 | 0:39a545e08ccd | 2182 | softReset(); |
vic20 | 0:39a545e08ccd | 2183 | resetState=1; // Return to reset state |
vic20 | 0:39a545e08ccd | 2184 | |
vic20 | 0:39a545e08ccd | 2185 | sendByte(ACK); |
vic20 | 0:39a545e08ccd | 2186 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2187 | break; |
vic20 | 0:39a545e08ccd | 2188 | |
vic20 | 0:39a545e08ccd | 2189 | case 'H': // DIO mode |
vic20 | 0:39a545e08ccd | 2190 | dioMode(); |
vic20 | 0:39a545e08ccd | 2191 | resetState=0; // State change |
vic20 | 0:39a545e08ccd | 2192 | break; |
vic20 | 0:39a545e08ccd | 2193 | case 'J': // DIO Write |
vic20 | 0:39a545e08ccd | 2194 | dioWrite(); |
vic20 | 0:39a545e08ccd | 2195 | resetState=0; // State change |
vic20 | 0:39a545e08ccd | 2196 | break; |
vic20 | 0:39a545e08ccd | 2197 | case 'K': // DIO Read |
vic20 | 0:39a545e08ccd | 2198 | dioRead(); |
vic20 | 0:39a545e08ccd | 2199 | break; |
vic20 | 0:39a545e08ccd | 2200 | |
vic20 | 0:39a545e08ccd | 2201 | case 'N': // Number of reads in DC |
vic20 | 0:39a545e08ccd | 2202 | value = getU16(); // Read value to set |
vic20 | 0:39a545e08ccd | 2203 | if (!crcResponse()) return; // Check CRC |
vic20 | 0:39a545e08ccd | 2204 | if (value==0) value=1; // At least it shall be one |
vic20 | 0:39a545e08ccd | 2205 | nread = value; |
vic20 | 0:39a545e08ccd | 2206 | sendByte(ACK); // Send ACK and CRC |
vic20 | 0:39a545e08ccd | 2207 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2208 | resetState=0; // State change |
vic20 | 0:39a545e08ccd | 2209 | break; |
vic20 | 0:39a545e08ccd | 2210 | |
vic20 | 0:39a545e08ccd | 2211 | default: |
vic20 | 0:39a545e08ccd | 2212 | // Unknown command |
vic20 | 0:39a545e08ccd | 2213 | sendByte(NACK); |
vic20 | 0:39a545e08ccd | 2214 | sendCRC(); |
vic20 | 0:39a545e08ccd | 2215 | break; |
vic20 | 0:39a545e08ccd | 2216 | } |
vic20 | 0:39a545e08ccd | 2217 | } |
vic20 | 0:39a545e08ccd | 2218 | |
vic20 | 0:39a545e08ccd | 2219 | int main() |
vic20 | 0:39a545e08ccd | 2220 | { |
vic20 | 0:39a545e08ccd | 2221 | int car; |
vic20 | 0:39a545e08ccd | 2222 | |
vic20 | 0:39a545e08ccd | 2223 | // Generate soft reset |
vic20 | 0:39a545e08ccd | 2224 | softReset(); |
vic20 | 0:39a545e08ccd | 2225 | |
vic20 | 0:39a545e08ccd | 2226 | pc.printf("%s%s\n\r",BSTRING,VSTRING); |
vic20 | 0:39a545e08ccd | 2227 | |
vic20 | 0:39a545e08ccd | 2228 | // Reset profile lines (if enabled) |
vic20 | 0:39a545e08ccd | 2229 | PRO1_CLEAR |
vic20 | 0:39a545e08ccd | 2230 | PRO2_CLEAR |
vic20 | 0:39a545e08ccd | 2231 | |
vic20 | 0:39a545e08ccd | 2232 | // New ADC code |
vic20 | 0:39a545e08ccd | 2233 | //adc_init(); |
vic20 | 0:39a545e08ccd | 2234 | |
vic20 | 0:39a545e08ccd | 2235 | // Loop that processes each received char |
vic20 | 0:39a545e08ccd | 2236 | while(1) |
vic20 | 0:39a545e08ccd | 2237 | { |
vic20 | 0:39a545e08ccd | 2238 | startRx(); // Init Rx CRC |
vic20 | 0:39a545e08ccd | 2239 | car = getByte(); // Get command |
vic20 | 0:39a545e08ccd | 2240 | process(car); // Process command |
vic20 | 0:39a545e08ccd | 2241 | } |
vic20 | 0:39a545e08ccd | 2242 | } |
vic20 | 0:39a545e08ccd | 2243 | |
vic20 | 0:39a545e08ccd | 2244 |