V D
/
di19sept2017
Potmeter FastPWM.h
Device/FastPWM_STM_TIM_PinOut.cpp@0:16be67f4d9ac, 2017-09-19 (annotated)
- Committer:
- vd
- Date:
- Tue Sep 19 16:52:01 2017 +0000
- Revision:
- 0:16be67f4d9ac
Potmeter FastPWM.h
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
vd | 0:16be67f4d9ac | 1 | #include "mbed.h" |
vd | 0:16be67f4d9ac | 2 | |
vd | 0:16be67f4d9ac | 3 | #if defined (TARGET_NUCLEO_F030R8) || (TARGET_DISCO_F051R8) |
vd | 0:16be67f4d9ac | 4 | __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { |
vd | 0:16be67f4d9ac | 5 | switch (pin) { |
vd | 0:16be67f4d9ac | 6 | // Channels 1 |
vd | 0:16be67f4d9ac | 7 | case PA_4: case PA_6: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6: case PB_6: case PB_7: |
vd | 0:16be67f4d9ac | 8 | return &pwm->CCR1; |
vd | 0:16be67f4d9ac | 9 | |
vd | 0:16be67f4d9ac | 10 | // Channels 2 |
vd | 0:16be67f4d9ac | 11 | case PA_7: case PB_5: case PC_7: |
vd | 0:16be67f4d9ac | 12 | return &pwm->CCR2; |
vd | 0:16be67f4d9ac | 13 | |
vd | 0:16be67f4d9ac | 14 | // Channels 3 |
vd | 0:16be67f4d9ac | 15 | case PB_0: case PC_8: |
vd | 0:16be67f4d9ac | 16 | return &pwm->CCR3; |
vd | 0:16be67f4d9ac | 17 | |
vd | 0:16be67f4d9ac | 18 | // Channels 4 |
vd | 0:16be67f4d9ac | 19 | case PC_9: |
vd | 0:16be67f4d9ac | 20 | return &pwm->CCR4; |
vd | 0:16be67f4d9ac | 21 | } |
vd | 0:16be67f4d9ac | 22 | return NULL; |
vd | 0:16be67f4d9ac | 23 | } |
vd | 0:16be67f4d9ac | 24 | #endif |
vd | 0:16be67f4d9ac | 25 | |
vd | 0:16be67f4d9ac | 26 | #if defined (TARGET_NUCLEO_F103RB) || (TARGET_DISCO_F100RB) |
vd | 0:16be67f4d9ac | 27 | __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { |
vd | 0:16be67f4d9ac | 28 | switch (pin) { |
vd | 0:16be67f4d9ac | 29 | // Channels 1 : PWMx/1 |
vd | 0:16be67f4d9ac | 30 | case PA_6: case PA_8: case PA_15: case PB_4: case PC_6: case PB_13: |
vd | 0:16be67f4d9ac | 31 | return &pwm->CCR1; |
vd | 0:16be67f4d9ac | 32 | |
vd | 0:16be67f4d9ac | 33 | // Channels 2 : PWMx/2 |
vd | 0:16be67f4d9ac | 34 | case PA_1: case PA_7: case PA_9: case PB_3: case PB_5: case PC_7: case PB_14: |
vd | 0:16be67f4d9ac | 35 | return &pwm->CCR2; |
vd | 0:16be67f4d9ac | 36 | |
vd | 0:16be67f4d9ac | 37 | // Channels 3 : PWMx/3 |
vd | 0:16be67f4d9ac | 38 | case PA_2: case PA_10: case PB_0: case PB_10: case PC_8: case PB_15: |
vd | 0:16be67f4d9ac | 39 | return &pwm->CCR3; |
vd | 0:16be67f4d9ac | 40 | |
vd | 0:16be67f4d9ac | 41 | // Channels 4 : PWMx/4 |
vd | 0:16be67f4d9ac | 42 | case PA_3: case PA_11: case PB_1: case PB_11: case PC_9: |
vd | 0:16be67f4d9ac | 43 | return &pwm->CCR4; |
vd | 0:16be67f4d9ac | 44 | } |
vd | 0:16be67f4d9ac | 45 | return NULL; |
vd | 0:16be67f4d9ac | 46 | } |
vd | 0:16be67f4d9ac | 47 | #endif |
vd | 0:16be67f4d9ac | 48 | |
vd | 0:16be67f4d9ac | 49 | #if defined TARGET_NUCLEO_F072RB |
vd | 0:16be67f4d9ac | 50 | __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { |
vd | 0:16be67f4d9ac | 51 | switch (pin) { |
vd | 0:16be67f4d9ac | 52 | // Channels 1 : PWMx/1 |
vd | 0:16be67f4d9ac | 53 | case PA_2: case PA_6: case PA_4: case PA_7: case PA_8: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6: |
vd | 0:16be67f4d9ac | 54 | // Channels 1N : PWMx/1N |
vd | 0:16be67f4d9ac | 55 | case PA_1: case PB_6: case PB_7: case PB_13: |
vd | 0:16be67f4d9ac | 56 | return &pwm->CCR1; |
vd | 0:16be67f4d9ac | 57 | |
vd | 0:16be67f4d9ac | 58 | // Channels 2 : PWMx/2 |
vd | 0:16be67f4d9ac | 59 | case PA_3: case PA_9: case PB_5: case PC_7: case PB_15: |
vd | 0:16be67f4d9ac | 60 | return &pwm->CCR2; |
vd | 0:16be67f4d9ac | 61 | |
vd | 0:16be67f4d9ac | 62 | // Channels 3 : PWMx/3 |
vd | 0:16be67f4d9ac | 63 | case PA_10: case PB_0: case PC_8: |
vd | 0:16be67f4d9ac | 64 | return &pwm->CCR3; |
vd | 0:16be67f4d9ac | 65 | |
vd | 0:16be67f4d9ac | 66 | // Channels 4 : PWMx/4 |
vd | 0:16be67f4d9ac | 67 | case PA_11: case PC_9: |
vd | 0:16be67f4d9ac | 68 | return &pwm->CCR4; |
vd | 0:16be67f4d9ac | 69 | } |
vd | 0:16be67f4d9ac | 70 | return NULL; |
vd | 0:16be67f4d9ac | 71 | } |
vd | 0:16be67f4d9ac | 72 | #endif |
vd | 0:16be67f4d9ac | 73 | |
vd | 0:16be67f4d9ac | 74 | |
vd | 0:16be67f4d9ac | 75 | |
vd | 0:16be67f4d9ac | 76 | #if defined (TARGET_NUCLEO_L152RE) |
vd | 0:16be67f4d9ac | 77 | __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) { |
vd | 0:16be67f4d9ac | 78 | switch (pin) { |
vd | 0:16be67f4d9ac | 79 | // Channels 1 : PWMx/1 |
vd | 0:16be67f4d9ac | 80 | case PA_6: case PB_4: case PB_12: case PB_13: case PC_6: |
vd | 0:16be67f4d9ac | 81 | return &pwm->CCR1; |
vd | 0:16be67f4d9ac | 82 | |
vd | 0:16be67f4d9ac | 83 | // Channels 2 : PWMx/2 |
vd | 0:16be67f4d9ac | 84 | case PA_1: case PA_7: case PB_3: case PB_5: case PB_14: case PB_7: case PC_7: |
vd | 0:16be67f4d9ac | 85 | return &pwm->CCR2; |
vd | 0:16be67f4d9ac | 86 | |
vd | 0:16be67f4d9ac | 87 | // Channels 3 : PWMx/3 |
vd | 0:16be67f4d9ac | 88 | case PA_2: case PB_0: case PB_8: case PB_10: case PC_8: |
vd | 0:16be67f4d9ac | 89 | return &pwm->CCR3; |
vd | 0:16be67f4d9ac | 90 | |
vd | 0:16be67f4d9ac | 91 | // Channels 4 : PWMx/4 |
vd | 0:16be67f4d9ac | 92 | case PA_3: case PB_1:case PB_9: case PB_11: case PC_9: |
vd | 0:16be67f4d9ac | 93 | return &pwm->CCR4; |
vd | 0:16be67f4d9ac | 94 | default: |
vd | 0:16be67f4d9ac | 95 | /* NOP */ |
vd | 0:16be67f4d9ac | 96 | break; |
vd | 0:16be67f4d9ac | 97 | } |
vd | 0:16be67f4d9ac | 98 | return NULL; |
vd | 0:16be67f4d9ac | 99 | } |
vd | 0:16be67f4d9ac | 100 | #endif |
vd | 0:16be67f4d9ac | 101 | |
vd | 0:16be67f4d9ac | 102 |