Nora Vazbyte
/
MPU9250
dev thing
Fork of MPU9250 by
MPU9250.h@1:eafdbfde5367, 2018-10-28 (annotated)
- Committer:
- vazbyte
- Date:
- Sun Oct 28 12:08:42 2018 +0000
- Revision:
- 1:eafdbfde5367
- Parent:
- 0:98a0cccbc509
stole some classes
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
brdarji | 0:98a0cccbc509 | 1 | #include "mbed.h" |
brdarji | 0:98a0cccbc509 | 2 | #include "math.h" |
brdarji | 0:98a0cccbc509 | 3 | |
brdarji | 0:98a0cccbc509 | 4 | // See also MPU-9250 Register Map and Descriptions, Revision 4.0, RM-MPU-9250A-00, Rev. 1.4, 9/9/2013 for registers not listed in |
brdarji | 0:98a0cccbc509 | 5 | // above document; the MPU9250 and MPU9150 are virtually identical but the latter has a different register map |
brdarji | 0:98a0cccbc509 | 6 | // |
brdarji | 0:98a0cccbc509 | 7 | //Magnetometer Registers |
brdarji | 0:98a0cccbc509 | 8 | #define AK8963_ADDRESS 0x0C<<1 |
brdarji | 0:98a0cccbc509 | 9 | #define WHO_AM_I_AK8963 0x00 // should return 0x48 |
brdarji | 0:98a0cccbc509 | 10 | #define INFO 0x01 |
brdarji | 0:98a0cccbc509 | 11 | #define AK8963_ST1 0x02 // data ready status bit 0 |
brdarji | 0:98a0cccbc509 | 12 | #define AK8963_XOUT_L 0x03 // data |
brdarji | 0:98a0cccbc509 | 13 | #define AK8963_XOUT_H 0x04 |
brdarji | 0:98a0cccbc509 | 14 | #define AK8963_YOUT_L 0x05 |
brdarji | 0:98a0cccbc509 | 15 | #define AK8963_YOUT_H 0x06 |
brdarji | 0:98a0cccbc509 | 16 | #define AK8963_ZOUT_L 0x07 |
brdarji | 0:98a0cccbc509 | 17 | #define AK8963_ZOUT_H 0x08 |
brdarji | 0:98a0cccbc509 | 18 | #define AK8963_ST2 0x09 // Data overflow bit 3 and data read error status bit 2 |
brdarji | 0:98a0cccbc509 | 19 | #define AK8963_CNTL 0x0A // Power down (0000), single-measurement (0001), self-test (1000) and Fuse ROM (1111) modes on bits 3:0 |
brdarji | 0:98a0cccbc509 | 20 | #define AK8963_ASTC 0x0C // Self test control |
brdarji | 0:98a0cccbc509 | 21 | #define AK8963_I2CDIS 0x0F // I2C disable |
brdarji | 0:98a0cccbc509 | 22 | #define AK8963_ASAX 0x10 // Fuse ROM x-axis sensitivity adjustment value |
brdarji | 0:98a0cccbc509 | 23 | #define AK8963_ASAY 0x11 // Fuse ROM y-axis sensitivity adjustment value |
brdarji | 0:98a0cccbc509 | 24 | #define AK8963_ASAZ 0x12 // Fuse ROM z-axis sensitivity adjustment value |
brdarji | 0:98a0cccbc509 | 25 | |
brdarji | 0:98a0cccbc509 | 26 | #define SELF_TEST_X_GYRO 0x00 |
brdarji | 0:98a0cccbc509 | 27 | #define SELF_TEST_Y_GYRO 0x01 |
brdarji | 0:98a0cccbc509 | 28 | #define SELF_TEST_Z_GYRO 0x02 |
brdarji | 0:98a0cccbc509 | 29 | |
brdarji | 0:98a0cccbc509 | 30 | /*#define X_FINE_GAIN 0x03 // [7:0] fine gain |
brdarji | 0:98a0cccbc509 | 31 | #define Y_FINE_GAIN 0x04 |
brdarji | 0:98a0cccbc509 | 32 | #define Z_FINE_GAIN 0x05 |
brdarji | 0:98a0cccbc509 | 33 | #define XA_OFFSET_H 0x06 // User-defined trim values for accelerometer |
brdarji | 0:98a0cccbc509 | 34 | #define XA_OFFSET_L_TC 0x07 |
brdarji | 0:98a0cccbc509 | 35 | #define YA_OFFSET_H 0x08 |
brdarji | 0:98a0cccbc509 | 36 | #define YA_OFFSET_L_TC 0x09 |
brdarji | 0:98a0cccbc509 | 37 | #define ZA_OFFSET_H 0x0A |
brdarji | 0:98a0cccbc509 | 38 | #define ZA_OFFSET_L_TC 0x0B */ |
brdarji | 0:98a0cccbc509 | 39 | |
brdarji | 0:98a0cccbc509 | 40 | #define SELF_TEST_X_ACCEL 0x0D |
brdarji | 0:98a0cccbc509 | 41 | #define SELF_TEST_Y_ACCEL 0x0E |
brdarji | 0:98a0cccbc509 | 42 | #define SELF_TEST_Z_ACCEL 0x0F |
brdarji | 0:98a0cccbc509 | 43 | |
brdarji | 0:98a0cccbc509 | 44 | #define SELF_TEST_A 0x10 |
brdarji | 0:98a0cccbc509 | 45 | |
brdarji | 0:98a0cccbc509 | 46 | #define XG_OFFSET_H 0x13 // User-defined trim values for gyroscope |
brdarji | 0:98a0cccbc509 | 47 | #define XG_OFFSET_L 0x14 |
brdarji | 0:98a0cccbc509 | 48 | #define YG_OFFSET_H 0x15 |
brdarji | 0:98a0cccbc509 | 49 | #define YG_OFFSET_L 0x16 |
brdarji | 0:98a0cccbc509 | 50 | #define ZG_OFFSET_H 0x17 |
brdarji | 0:98a0cccbc509 | 51 | #define ZG_OFFSET_L 0x18 |
brdarji | 0:98a0cccbc509 | 52 | #define SMPLRT_DIV 0x19 |
brdarji | 0:98a0cccbc509 | 53 | #define CONFIG 0x1A |
brdarji | 0:98a0cccbc509 | 54 | #define GYRO_CONFIG 0x1B |
brdarji | 0:98a0cccbc509 | 55 | #define ACCEL_CONFIG 0x1C |
brdarji | 0:98a0cccbc509 | 56 | #define ACCEL_CONFIG2 0x1D |
brdarji | 0:98a0cccbc509 | 57 | #define LP_ACCEL_ODR 0x1E |
brdarji | 0:98a0cccbc509 | 58 | #define WOM_THR 0x1F |
brdarji | 0:98a0cccbc509 | 59 | |
brdarji | 0:98a0cccbc509 | 60 | #define MOT_DUR 0x20 // Duration counter threshold for motion interrupt generation, 1 kHz rate, LSB = 1 ms |
brdarji | 0:98a0cccbc509 | 61 | #define ZMOT_THR 0x21 // Zero-motion detection threshold bits [7:0] |
brdarji | 0:98a0cccbc509 | 62 | #define ZRMOT_DUR 0x22 // Duration counter threshold for zero motion interrupt generation, 16 Hz rate, LSB = 64 ms |
brdarji | 0:98a0cccbc509 | 63 | |
brdarji | 0:98a0cccbc509 | 64 | #define FIFO_EN 0x23 |
brdarji | 0:98a0cccbc509 | 65 | #define I2C_MST_CTRL 0x24 |
brdarji | 0:98a0cccbc509 | 66 | #define I2C_SLV0_ADDR 0x25 |
brdarji | 0:98a0cccbc509 | 67 | #define I2C_SLV0_REG 0x26 |
brdarji | 0:98a0cccbc509 | 68 | #define I2C_SLV0_CTRL 0x27 |
brdarji | 0:98a0cccbc509 | 69 | #define I2C_SLV1_ADDR 0x28 |
brdarji | 0:98a0cccbc509 | 70 | #define I2C_SLV1_REG 0x29 |
brdarji | 0:98a0cccbc509 | 71 | #define I2C_SLV1_CTRL 0x2A |
brdarji | 0:98a0cccbc509 | 72 | #define I2C_SLV2_ADDR 0x2B |
brdarji | 0:98a0cccbc509 | 73 | #define I2C_SLV2_REG 0x2C |
brdarji | 0:98a0cccbc509 | 74 | #define I2C_SLV2_CTRL 0x2D |
brdarji | 0:98a0cccbc509 | 75 | #define I2C_SLV3_ADDR 0x2E |
brdarji | 0:98a0cccbc509 | 76 | #define I2C_SLV3_REG 0x2F |
brdarji | 0:98a0cccbc509 | 77 | #define I2C_SLV3_CTRL 0x30 |
brdarji | 0:98a0cccbc509 | 78 | #define I2C_SLV4_ADDR 0x31 |
brdarji | 0:98a0cccbc509 | 79 | #define I2C_SLV4_REG 0x32 |
brdarji | 0:98a0cccbc509 | 80 | #define I2C_SLV4_DO 0x33 |
brdarji | 0:98a0cccbc509 | 81 | #define I2C_SLV4_CTRL 0x34 |
brdarji | 0:98a0cccbc509 | 82 | #define I2C_SLV4_DI 0x35 |
brdarji | 0:98a0cccbc509 | 83 | #define I2C_MST_STATUS 0x36 |
brdarji | 0:98a0cccbc509 | 84 | #define INT_PIN_CFG 0x37 |
brdarji | 0:98a0cccbc509 | 85 | #define INT_ENABLE 0x38 |
brdarji | 0:98a0cccbc509 | 86 | #define DMP_INT_STATUS 0x39 // Check DMP interrupt |
brdarji | 0:98a0cccbc509 | 87 | #define INT_STATUS 0x3A |
brdarji | 0:98a0cccbc509 | 88 | #define ACCEL_XOUT_H 0x3B |
brdarji | 0:98a0cccbc509 | 89 | #define ACCEL_XOUT_L 0x3C |
brdarji | 0:98a0cccbc509 | 90 | #define ACCEL_YOUT_H 0x3D |
brdarji | 0:98a0cccbc509 | 91 | #define ACCEL_YOUT_L 0x3E |
brdarji | 0:98a0cccbc509 | 92 | #define ACCEL_ZOUT_H 0x3F |
brdarji | 0:98a0cccbc509 | 93 | #define ACCEL_ZOUT_L 0x40 |
brdarji | 0:98a0cccbc509 | 94 | #define TEMP_OUT_H 0x41 |
brdarji | 0:98a0cccbc509 | 95 | #define TEMP_OUT_L 0x42 |
brdarji | 0:98a0cccbc509 | 96 | #define GYRO_XOUT_H 0x43 |
brdarji | 0:98a0cccbc509 | 97 | #define GYRO_XOUT_L 0x44 |
brdarji | 0:98a0cccbc509 | 98 | #define GYRO_YOUT_H 0x45 |
brdarji | 0:98a0cccbc509 | 99 | #define GYRO_YOUT_L 0x46 |
brdarji | 0:98a0cccbc509 | 100 | #define GYRO_ZOUT_H 0x47 |
brdarji | 0:98a0cccbc509 | 101 | #define GYRO_ZOUT_L 0x48 |
brdarji | 0:98a0cccbc509 | 102 | #define EXT_SENS_DATA_00 0x49 |
brdarji | 0:98a0cccbc509 | 103 | #define EXT_SENS_DATA_01 0x4A |
brdarji | 0:98a0cccbc509 | 104 | #define EXT_SENS_DATA_02 0x4B |
brdarji | 0:98a0cccbc509 | 105 | #define EXT_SENS_DATA_03 0x4C |
brdarji | 0:98a0cccbc509 | 106 | #define EXT_SENS_DATA_04 0x4D |
brdarji | 0:98a0cccbc509 | 107 | #define EXT_SENS_DATA_05 0x4E |
brdarji | 0:98a0cccbc509 | 108 | #define EXT_SENS_DATA_06 0x4F |
brdarji | 0:98a0cccbc509 | 109 | #define EXT_SENS_DATA_07 0x50 |
brdarji | 0:98a0cccbc509 | 110 | #define EXT_SENS_DATA_08 0x51 |
brdarji | 0:98a0cccbc509 | 111 | #define EXT_SENS_DATA_09 0x52 |
brdarji | 0:98a0cccbc509 | 112 | #define EXT_SENS_DATA_10 0x53 |
brdarji | 0:98a0cccbc509 | 113 | #define EXT_SENS_DATA_11 0x54 |
brdarji | 0:98a0cccbc509 | 114 | #define EXT_SENS_DATA_12 0x55 |
brdarji | 0:98a0cccbc509 | 115 | #define EXT_SENS_DATA_13 0x56 |
brdarji | 0:98a0cccbc509 | 116 | #define EXT_SENS_DATA_14 0x57 |
brdarji | 0:98a0cccbc509 | 117 | #define EXT_SENS_DATA_15 0x58 |
brdarji | 0:98a0cccbc509 | 118 | #define EXT_SENS_DATA_16 0x59 |
brdarji | 0:98a0cccbc509 | 119 | #define EXT_SENS_DATA_17 0x5A |
brdarji | 0:98a0cccbc509 | 120 | #define EXT_SENS_DATA_18 0x5B |
brdarji | 0:98a0cccbc509 | 121 | #define EXT_SENS_DATA_19 0x5C |
brdarji | 0:98a0cccbc509 | 122 | #define EXT_SENS_DATA_20 0x5D |
brdarji | 0:98a0cccbc509 | 123 | #define EXT_SENS_DATA_21 0x5E |
brdarji | 0:98a0cccbc509 | 124 | #define EXT_SENS_DATA_22 0x5F |
brdarji | 0:98a0cccbc509 | 125 | #define EXT_SENS_DATA_23 0x60 |
brdarji | 0:98a0cccbc509 | 126 | #define MOT_DETECT_STATUS 0x61 |
brdarji | 0:98a0cccbc509 | 127 | #define I2C_SLV0_DO 0x63 |
brdarji | 0:98a0cccbc509 | 128 | #define I2C_SLV1_DO 0x64 |
brdarji | 0:98a0cccbc509 | 129 | #define I2C_SLV2_DO 0x65 |
brdarji | 0:98a0cccbc509 | 130 | #define I2C_SLV3_DO 0x66 |
brdarji | 0:98a0cccbc509 | 131 | #define I2C_MST_DELAY_CTRL 0x67 |
brdarji | 0:98a0cccbc509 | 132 | #define SIGNAL_PATH_RESET 0x68 |
brdarji | 0:98a0cccbc509 | 133 | #define MOT_DETECT_CTRL 0x69 |
brdarji | 0:98a0cccbc509 | 134 | #define USER_CTRL 0x6A // Bit 7 enable DMP, bit 3 reset DMP |
brdarji | 0:98a0cccbc509 | 135 | #define PWR_MGMT_1 0x6B // Device defaults to the SLEEP mode |
brdarji | 0:98a0cccbc509 | 136 | #define PWR_MGMT_2 0x6C |
brdarji | 0:98a0cccbc509 | 137 | #define DMP_BANK 0x6D // Activates a specific bank in the DMP |
brdarji | 0:98a0cccbc509 | 138 | #define DMP_RW_PNT 0x6E // Set read/write pointer to a specific start address in specified DMP bank |
brdarji | 0:98a0cccbc509 | 139 | #define DMP_REG 0x6F // Register in DMP from which to read or to which to write |
brdarji | 0:98a0cccbc509 | 140 | #define DMP_REG_1 0x70 |
brdarji | 0:98a0cccbc509 | 141 | #define DMP_REG_2 0x71 |
brdarji | 0:98a0cccbc509 | 142 | #define FIFO_COUNTH 0x72 |
brdarji | 0:98a0cccbc509 | 143 | #define FIFO_COUNTL 0x73 |
brdarji | 0:98a0cccbc509 | 144 | #define FIFO_R_W 0x74 |
brdarji | 0:98a0cccbc509 | 145 | #define WHO_AM_I_MPU9250 0x75 // Should return 0x71 |
brdarji | 0:98a0cccbc509 | 146 | #define XA_OFFSET_H 0x77 |
brdarji | 0:98a0cccbc509 | 147 | #define XA_OFFSET_L 0x78 |
brdarji | 0:98a0cccbc509 | 148 | #define YA_OFFSET_H 0x7A |
brdarji | 0:98a0cccbc509 | 149 | #define YA_OFFSET_L 0x7B |
brdarji | 0:98a0cccbc509 | 150 | #define ZA_OFFSET_H 0x7D |
brdarji | 0:98a0cccbc509 | 151 | #define ZA_OFFSET_L 0x7E |
brdarji | 0:98a0cccbc509 | 152 | |
brdarji | 0:98a0cccbc509 | 153 | #define PI 3.14159265358979323846f |
brdarji | 0:98a0cccbc509 | 154 | // Using the MSENSR-9250 breakout board, ADO is set to 0 |
brdarji | 0:98a0cccbc509 | 155 | // Seven-bit device address is 110100 for ADO = 0 and 110101 for ADO = 1 |
brdarji | 0:98a0cccbc509 | 156 | //mbed uses the eight-bit device address, so shift seven-bit addresses left by one! |
brdarji | 0:98a0cccbc509 | 157 | #define ADO 0 |
brdarji | 0:98a0cccbc509 | 158 | #if ADO |
brdarji | 0:98a0cccbc509 | 159 | #define MPU9250_ADDRESS 0x69<<1 // Device address when ADO = 1 |
brdarji | 0:98a0cccbc509 | 160 | #else |
brdarji | 0:98a0cccbc509 | 161 | #define MPU9250_ADDRESS 0x68<<1 // Device address when ADO = 0 |
brdarji | 0:98a0cccbc509 | 162 | #endif |
brdarji | 0:98a0cccbc509 | 163 | |
brdarji | 0:98a0cccbc509 | 164 | // Set initial input parameters |
brdarji | 0:98a0cccbc509 | 165 | enum Ascale { |
brdarji | 0:98a0cccbc509 | 166 | AFS_2G = 0, |
brdarji | 0:98a0cccbc509 | 167 | AFS_4G, |
brdarji | 0:98a0cccbc509 | 168 | AFS_8G, |
brdarji | 0:98a0cccbc509 | 169 | AFS_16G |
brdarji | 0:98a0cccbc509 | 170 | }; |
brdarji | 0:98a0cccbc509 | 171 | |
brdarji | 0:98a0cccbc509 | 172 | enum Gscale { |
brdarji | 0:98a0cccbc509 | 173 | GFS_250DPS = 0, |
brdarji | 0:98a0cccbc509 | 174 | GFS_500DPS, |
brdarji | 0:98a0cccbc509 | 175 | GFS_1000DPS, |
brdarji | 0:98a0cccbc509 | 176 | GFS_2000DPS |
brdarji | 0:98a0cccbc509 | 177 | }; |
brdarji | 0:98a0cccbc509 | 178 | |
brdarji | 0:98a0cccbc509 | 179 | enum Mscale { |
brdarji | 0:98a0cccbc509 | 180 | MFS_14BITS = 0, // 0.6 mG per LSB |
brdarji | 0:98a0cccbc509 | 181 | MFS_16BITS // 0.15 mG per LSB |
brdarji | 0:98a0cccbc509 | 182 | }; |
brdarji | 0:98a0cccbc509 | 183 | |
brdarji | 0:98a0cccbc509 | 184 | class MPU9250 { |
brdarji | 0:98a0cccbc509 | 185 | |
brdarji | 0:98a0cccbc509 | 186 | protected: |
brdarji | 0:98a0cccbc509 | 187 | |
brdarji | 0:98a0cccbc509 | 188 | public: |
brdarji | 0:98a0cccbc509 | 189 | |
brdarji | 0:98a0cccbc509 | 190 | MPU9250(PinName sda, PinName scl); |
brdarji | 0:98a0cccbc509 | 191 | MPU9250(I2C *i2c); |
brdarji | 0:98a0cccbc509 | 192 | ~MPU9250(); |
brdarji | 0:98a0cccbc509 | 193 | |
brdarji | 0:98a0cccbc509 | 194 | void writeByte(uint8_t address, uint8_t subAddress, uint8_t data); |
brdarji | 0:98a0cccbc509 | 195 | char readByte(uint8_t address, uint8_t subAddress); |
brdarji | 0:98a0cccbc509 | 196 | void readBytes(uint8_t address, uint8_t subAddress, uint8_t count, uint8_t * dest); |
brdarji | 0:98a0cccbc509 | 197 | void getMres(); |
brdarji | 0:98a0cccbc509 | 198 | void getGres(); |
brdarji | 0:98a0cccbc509 | 199 | void getAres(); |
brdarji | 0:98a0cccbc509 | 200 | void readAccelData(int16_t * destination); |
brdarji | 0:98a0cccbc509 | 201 | void readGyroData(int16_t * destination); |
brdarji | 0:98a0cccbc509 | 202 | void readMagData(int16_t * destination); |
brdarji | 0:98a0cccbc509 | 203 | int16_t readTempData(); |
brdarji | 0:98a0cccbc509 | 204 | void resetMPU9250(); |
brdarji | 0:98a0cccbc509 | 205 | void initAK8963(float * destination); |
brdarji | 0:98a0cccbc509 | 206 | void initMPU9250(); |
brdarji | 0:98a0cccbc509 | 207 | void calibrateMPU9250(float * dest1, float * dest2); |
brdarji | 0:98a0cccbc509 | 208 | void MPU9250SelfTest(float * destination); |
brdarji | 0:98a0cccbc509 | 209 | void MadgwickQuaternionUpdate(float ax, float ay, float az, float gx, float gy, float gz, float mx, float my, float mz); |
brdarji | 0:98a0cccbc509 | 210 | void MahonyQuaternionUpdate(float ax, float ay, float az, float gx, float gy, float gz, float mx, float my, float mz); |
brdarji | 0:98a0cccbc509 | 211 | |
brdarji | 0:98a0cccbc509 | 212 | float SelfTest[6]; |
brdarji | 0:98a0cccbc509 | 213 | float gyroBias[3],accelBias[3]; // Bias corrections for gyro and accelerometer |
brdarji | 0:98a0cccbc509 | 214 | float magCalibration[3], magbias[3]; // Factory mag calibration and mag bias |
brdarji | 0:98a0cccbc509 | 215 | |
brdarji | 0:98a0cccbc509 | 216 | uint8_t Ascale; // AFS_2G, AFS_4G, AFS_8G, AFS_16G |
brdarji | 0:98a0cccbc509 | 217 | uint8_t Gscale; // GFS_250DPS, GFS_500DPS, GFS_1000DPS, GFS_2000DPS |
brdarji | 0:98a0cccbc509 | 218 | uint8_t Mscale; // MFS_14BITS or MFS_16BITS, 14-bit or 16-bit magnetometer resolution |
brdarji | 0:98a0cccbc509 | 219 | uint8_t Mmode; // Either 8 Hz 0x02) or 100 Hz (0x06) magnetometer data ODR |
brdarji | 0:98a0cccbc509 | 220 | float aRes, gRes, mRes; // scale resolutions per LSB for the sensors |
brdarji | 0:98a0cccbc509 | 221 | |
brdarji | 0:98a0cccbc509 | 222 | int16_t accelCount[3]; // Stores the 16-bit signed accelerometer sensor output |
brdarji | 0:98a0cccbc509 | 223 | int16_t gyroCount[3]; // Stores the 16-bit signed gyro sensor output |
brdarji | 0:98a0cccbc509 | 224 | int16_t magCount[3]; // Stores the 16-bit signed magnetometer sensor output |
brdarji | 0:98a0cccbc509 | 225 | float q[4]; // vector to hold quaternion |
brdarji | 0:98a0cccbc509 | 226 | |
brdarji | 0:98a0cccbc509 | 227 | float ax, ay, az, gx, gy, gz, mx, my, mz; // variables to hold latest sensor data values |
brdarji | 0:98a0cccbc509 | 228 | float pitch, yaw, roll; |
brdarji | 0:98a0cccbc509 | 229 | float deltat; // integration interval for both filter schemes |
brdarji | 0:98a0cccbc509 | 230 | int lastUpdate, firstUpdate, Now; // used to calculate integration interval |
brdarji | 0:98a0cccbc509 | 231 | int delt_t; // used to control display output rate |
brdarji | 0:98a0cccbc509 | 232 | int count; // used to control display output rate |
brdarji | 0:98a0cccbc509 | 233 | int16_t tempCount; // Stores the real internal chip temperature in degrees Celsius |
brdarji | 0:98a0cccbc509 | 234 | float temperature; |
brdarji | 0:98a0cccbc509 | 235 | private: |
brdarji | 0:98a0cccbc509 | 236 | I2C *i2c_; |
brdarji | 0:98a0cccbc509 | 237 | }; |