File content as of revision 3:d7a7cde0bfb8:

// Target2.h 2013/9/8
#pragma once
#include "mbed.h"
#include "SWD.h"

#define TARGET_RUNNING  (1<<0)
#define TARGET_HALTED   (1<<1)

class Target2;
class CoreReg {
public:
    void setup(Target2* target, uint8_t reg);
    uint32_t read();
    void write(uint32_t value);
    
    CoreReg& operator= (int value) {
        write(value);
        return *this;
    }

    CoreReg& operator= (CoreReg& rhs) {
        write(rhs.read());
        return *this;
    }

    operator uint32_t() {
        return read();
    }
protected:
    Target2* _target;
    uint8_t _reg;    
};

class Target2 {
public:
    Target2(PinName swdio, PinName swclk, PinName reset, Serial* usbpc);
    bool setup();
    uint32_t readMemory(uint32_t addr);
    void readMemory(uint32_t addr, uint32_t* data, int count);
    void writeMemory(uint32_t addr, uint32_t data);
    void writeMemory(uint32_t addr, uint32_t* data, int count);
    uint8_t readMemory8(uint32_t addr);
    void writeMemory8(uint32_t addr, uint8_t data);
    void halt();
    void resume();
    void step();
    void Abort();
    void HardwareReset();
    void SoftwareReset();
    int getStatus();
    bool wait_status(int status, int timeout_ms = 500);
    CoreReg r0;
    CoreReg r1; 
    CoreReg r2; 
    CoreReg r3; 
    CoreReg r4; 
    CoreReg r5; 
    CoreReg r6; 
    CoreReg r7; 
    CoreReg r8; 
    CoreReg r9; 
    CoreReg r10; 
    CoreReg r11; 
    CoreReg r12; 
    CoreReg sp; 
    CoreReg lr; 
    CoreReg pc;
    CoreReg xpsr;
    
    uint32_t idcode;
private:
    void _setaddr(uint32_t addr); 
    void _setaddr8(uint32_t addr); 
protected:
    SWD _swd;
    Serial* _pc;
};