WIZ820io(W5200) network interface、EthernetNetIf compatible.

/media/uploads/va009039/wiz820ionetif.jpg

example

#include "WIZ820ioNetIf.h"
#include "HTTPClient.h"
#include "HTTPServer.h"

#if defined(TARGET_KL25Z)
WIZ820ioNetIf eth(PTD2,PTD3,PTD1,PTD0,PTD5);
#endif
HTTPClient http;
HTTPStream stream;

void callback(HTTPResult r){
    printf("callback %d %s\n", r, HTTPClient::ResultStr(r));
}

int main() {
    int err = eth.setup();
    if (err < 0) {
        printf("setup error %d\n", err);
        exit(-1);
    }    

    HTTPServer svr;
    svr.addHandler<SimpleHandler>("/");
    svr.bind(80);

    const char* uri = "http://va009039-mbed.appspot.com/kl25z/";
    http.get(uri, &stream, callback);
    uint8_t buf[256];
    int total = 0;
    stream.readNext(buf, sizeof(buf));
    while(1) {
        if(stream.readable()) {
            int len = stream.readLen();
            total += len;
            printf("%d %d\n", total, len);
            stream.readNext(buf, sizeof(buf));
        }
        Net::poll();
    }
}
Committer:
va009039
Date:
Fri Mar 22 11:51:24 2013 +0000
Revision:
0:bdeec5f86894
[mbed] converted /w5200NetIf/w5200NetIf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 0:bdeec5f86894 1 /*
va009039 0:bdeec5f86894 2 * Copyright (c) 2010 by Cristian Maglie <c.maglie@bug.st>
va009039 0:bdeec5f86894 3 *
va009039 0:bdeec5f86894 4 * This file is free software; you can redistribute it and/or modify
va009039 0:bdeec5f86894 5 * it under the terms of either the GNU General Public License version 2
va009039 0:bdeec5f86894 6 * or the GNU Lesser General Public License version 2.1, both as
va009039 0:bdeec5f86894 7 * published by the Free Software Foundation.
va009039 0:bdeec5f86894 8 */
va009039 0:bdeec5f86894 9
va009039 0:bdeec5f86894 10 #include <stdio.h>
va009039 0:bdeec5f86894 11 #include <string.h>
va009039 0:bdeec5f86894 12 #include "mbed.h"
va009039 0:bdeec5f86894 13 #include "w5100.h"
va009039 0:bdeec5f86894 14 #ifndef MBED
va009039 0:bdeec5f86894 15 #include <avr/interrupt.h>
va009039 0:bdeec5f86894 16 #endif //MBED
va009039 0:bdeec5f86894 17
va009039 0:bdeec5f86894 18 // W5100 controller instance
va009039 0:bdeec5f86894 19 W5100Class W5100;
va009039 0:bdeec5f86894 20
va009039 0:bdeec5f86894 21 #define TX_RX_MAX_BUF_SIZE 2048
va009039 0:bdeec5f86894 22 #define TX_BUF 0x1100
va009039 0:bdeec5f86894 23 #define RX_BUF (TX_BUF + TX_RX_MAX_BUF_SIZE)
va009039 0:bdeec5f86894 24
va009039 0:bdeec5f86894 25 #ifdef W5200
va009039 0:bdeec5f86894 26 #define TXBUF_BASE 0x8000
va009039 0:bdeec5f86894 27 #define RXBUF_BASE 0xC000
va009039 0:bdeec5f86894 28 #else
va009039 0:bdeec5f86894 29 #define TXBUF_BASE 0x4000
va009039 0:bdeec5f86894 30 #define RXBUF_BASE 0x6000
va009039 0:bdeec5f86894 31 #endif
va009039 0:bdeec5f86894 32
va009039 0:bdeec5f86894 33 #ifdef MBED
va009039 0:bdeec5f86894 34
va009039 0:bdeec5f86894 35 SPI* pSPI = NULL;
va009039 0:bdeec5f86894 36 DigitalOut* pCS = NULL;
va009039 0:bdeec5f86894 37
va009039 0:bdeec5f86894 38 inline void delay(int n) { wait_ms(n); }
va009039 0:bdeec5f86894 39 inline static void initSS(){ pCS->write(1); }
va009039 0:bdeec5f86894 40 inline static void setSS() { pCS->write(0); }
va009039 0:bdeec5f86894 41 inline static void resetSS() { pCS->write(1); }
va009039 0:bdeec5f86894 42
va009039 0:bdeec5f86894 43 #endif //MBED
va009039 0:bdeec5f86894 44
va009039 0:bdeec5f86894 45 void W5100Class::init(void)
va009039 0:bdeec5f86894 46 {
va009039 0:bdeec5f86894 47 if (!pSPI) {
va009039 0:bdeec5f86894 48 pSPI = new SPI(p11, p12, p13); // mosi, miso, sclk
va009039 0:bdeec5f86894 49 }
va009039 0:bdeec5f86894 50 if (!pCS) {
va009039 0:bdeec5f86894 51 pCS = new DigitalOut(p14);
va009039 0:bdeec5f86894 52 }
va009039 0:bdeec5f86894 53 initSS();
va009039 0:bdeec5f86894 54 writeMR(1<<RST);
va009039 0:bdeec5f86894 55
va009039 0:bdeec5f86894 56 #ifdef W5200
va009039 0:bdeec5f86894 57 for (int i=0; i<MAX_SOCK_NUM; i++) {
va009039 0:bdeec5f86894 58 write((0x4000 + i * 0x100 + 0x001F), 2);
va009039 0:bdeec5f86894 59 write((0x4000 + i * 0x100 + 0x001E), 2);
va009039 0:bdeec5f86894 60 }
va009039 0:bdeec5f86894 61 #else
va009039 0:bdeec5f86894 62 writeTMSR(0x55);
va009039 0:bdeec5f86894 63 writeRMSR(0x55);
va009039 0:bdeec5f86894 64 #endif
va009039 0:bdeec5f86894 65
va009039 0:bdeec5f86894 66 for (int i=0; i<MAX_SOCK_NUM; i++) {
va009039 0:bdeec5f86894 67 SBASE[i] = TXBUF_BASE + SSIZE * i;
va009039 0:bdeec5f86894 68 RBASE[i] = RXBUF_BASE + RSIZE * i;
va009039 0:bdeec5f86894 69 }
va009039 0:bdeec5f86894 70 }
va009039 0:bdeec5f86894 71
va009039 0:bdeec5f86894 72 uint16_t W5100Class::getTXFreeSize(SOCKET s)
va009039 0:bdeec5f86894 73 {
va009039 0:bdeec5f86894 74 uint16_t val=0, val1=0;
va009039 0:bdeec5f86894 75 do {
va009039 0:bdeec5f86894 76 val1 = readSnTX_FSR(s);
va009039 0:bdeec5f86894 77 if (val1 != 0)
va009039 0:bdeec5f86894 78 val = readSnTX_FSR(s);
va009039 0:bdeec5f86894 79 }
va009039 0:bdeec5f86894 80 while (val != val1);
va009039 0:bdeec5f86894 81 return val;
va009039 0:bdeec5f86894 82 }
va009039 0:bdeec5f86894 83
va009039 0:bdeec5f86894 84 uint16_t W5100Class::getRXReceivedSize(SOCKET s)
va009039 0:bdeec5f86894 85 {
va009039 0:bdeec5f86894 86 uint16_t val=0,val1=0;
va009039 0:bdeec5f86894 87 do {
va009039 0:bdeec5f86894 88 val1 = readSnRX_RSR(s);
va009039 0:bdeec5f86894 89 if (val1 != 0)
va009039 0:bdeec5f86894 90 val = readSnRX_RSR(s);
va009039 0:bdeec5f86894 91 }
va009039 0:bdeec5f86894 92 while (val != val1);
va009039 0:bdeec5f86894 93 return val;
va009039 0:bdeec5f86894 94 }
va009039 0:bdeec5f86894 95
va009039 0:bdeec5f86894 96
va009039 0:bdeec5f86894 97 void W5100Class::send_data_processing(SOCKET s, const uint8_t *data, uint16_t len)
va009039 0:bdeec5f86894 98 {
va009039 0:bdeec5f86894 99 // This is same as having no offset in a call to send_data_processing_offset
va009039 0:bdeec5f86894 100 send_data_processing_offset(s, 0, data, len);
va009039 0:bdeec5f86894 101 }
va009039 0:bdeec5f86894 102
va009039 0:bdeec5f86894 103 void W5100Class::send_data_processing_offset(SOCKET s, uint16_t data_offset, const uint8_t *data, uint16_t len)
va009039 0:bdeec5f86894 104 {
va009039 0:bdeec5f86894 105 uint16_t ptr = readSnTX_WR(s);
va009039 0:bdeec5f86894 106 ptr += data_offset;
va009039 0:bdeec5f86894 107 uint16_t offset = ptr & SMASK;
va009039 0:bdeec5f86894 108 uint16_t dstAddr = offset + SBASE[s];
va009039 0:bdeec5f86894 109
va009039 0:bdeec5f86894 110 if (offset + len > SSIZE)
va009039 0:bdeec5f86894 111 {
va009039 0:bdeec5f86894 112 // Wrap around circular buffer
va009039 0:bdeec5f86894 113 uint16_t size = SSIZE - offset;
va009039 0:bdeec5f86894 114 write(dstAddr, data, size);
va009039 0:bdeec5f86894 115 write(SBASE[s], data + size, len - size);
va009039 0:bdeec5f86894 116 }
va009039 0:bdeec5f86894 117 else {
va009039 0:bdeec5f86894 118 write(dstAddr, data, len);
va009039 0:bdeec5f86894 119 }
va009039 0:bdeec5f86894 120
va009039 0:bdeec5f86894 121 ptr += len;
va009039 0:bdeec5f86894 122 writeSnTX_WR(s, ptr);
va009039 0:bdeec5f86894 123 }
va009039 0:bdeec5f86894 124
va009039 0:bdeec5f86894 125
va009039 0:bdeec5f86894 126 void W5100Class::recv_data_processing(SOCKET s, uint8_t *data, uint16_t len, uint8_t peek)
va009039 0:bdeec5f86894 127 {
va009039 0:bdeec5f86894 128 uint16_t ptr;
va009039 0:bdeec5f86894 129 ptr = readSnRX_RD(s);
va009039 0:bdeec5f86894 130 read_data(s, (uint8_t *)ptr, data, len);
va009039 0:bdeec5f86894 131 if (!peek)
va009039 0:bdeec5f86894 132 {
va009039 0:bdeec5f86894 133 ptr += len;
va009039 0:bdeec5f86894 134 writeSnRX_RD(s, ptr);
va009039 0:bdeec5f86894 135 }
va009039 0:bdeec5f86894 136 }
va009039 0:bdeec5f86894 137
va009039 0:bdeec5f86894 138 void W5100Class::read_data(SOCKET s, volatile uint8_t *src, volatile uint8_t *dst, uint16_t len)
va009039 0:bdeec5f86894 139 {
va009039 0:bdeec5f86894 140 uint16_t size;
va009039 0:bdeec5f86894 141 uint16_t src_mask;
va009039 0:bdeec5f86894 142 uint16_t src_ptr;
va009039 0:bdeec5f86894 143
va009039 0:bdeec5f86894 144 #ifdef MBED
va009039 0:bdeec5f86894 145 src_mask = (int)src & RMASK;
va009039 0:bdeec5f86894 146 #else
va009039 0:bdeec5f86894 147 src_mask = (uint16_t)src & RMASK;
va009039 0:bdeec5f86894 148 #endif //MBED
va009039 0:bdeec5f86894 149 src_ptr = RBASE[s] + src_mask;
va009039 0:bdeec5f86894 150
va009039 0:bdeec5f86894 151 if( (src_mask + len) > RSIZE )
va009039 0:bdeec5f86894 152 {
va009039 0:bdeec5f86894 153 size = RSIZE - src_mask;
va009039 0:bdeec5f86894 154 read(src_ptr, (uint8_t *)dst, size);
va009039 0:bdeec5f86894 155 dst += size;
va009039 0:bdeec5f86894 156 read(RBASE[s], (uint8_t *) dst, len - size);
va009039 0:bdeec5f86894 157 }
va009039 0:bdeec5f86894 158 else
va009039 0:bdeec5f86894 159 read(src_ptr, (uint8_t *) dst, len);
va009039 0:bdeec5f86894 160 }
va009039 0:bdeec5f86894 161
va009039 0:bdeec5f86894 162
va009039 0:bdeec5f86894 163 uint8_t W5100Class::write(uint16_t _addr, uint8_t _data)
va009039 0:bdeec5f86894 164 {
va009039 0:bdeec5f86894 165 setSS();
va009039 0:bdeec5f86894 166
va009039 0:bdeec5f86894 167 #ifdef W5200
va009039 0:bdeec5f86894 168 pSPI->write(_addr >> 8);
va009039 0:bdeec5f86894 169 pSPI->write(_addr & 0xFF);
va009039 0:bdeec5f86894 170 pSPI->write(0x80);
va009039 0:bdeec5f86894 171 pSPI->write(0x01);
va009039 0:bdeec5f86894 172 #else
va009039 0:bdeec5f86894 173 pSPI->write(0xF0);
va009039 0:bdeec5f86894 174 pSPI->write(_addr >> 8);
va009039 0:bdeec5f86894 175 pSPI->write(_addr & 0xFF);
va009039 0:bdeec5f86894 176 #endif
va009039 0:bdeec5f86894 177 pSPI->write(_data);
va009039 0:bdeec5f86894 178 resetSS();
va009039 0:bdeec5f86894 179 return 1;
va009039 0:bdeec5f86894 180 }
va009039 0:bdeec5f86894 181
va009039 0:bdeec5f86894 182 uint16_t W5100Class::write(uint16_t _addr, const uint8_t *_buf, uint16_t _len)
va009039 0:bdeec5f86894 183 {
va009039 0:bdeec5f86894 184
va009039 0:bdeec5f86894 185 #ifdef W5200
va009039 0:bdeec5f86894 186 setSS();
va009039 0:bdeec5f86894 187 pSPI->write(_addr >> 8);
va009039 0:bdeec5f86894 188 pSPI->write(_addr & 0xFF);
va009039 0:bdeec5f86894 189 pSPI->write((0x80 | ((_len & 0x7F00) >> 8)));
va009039 0:bdeec5f86894 190 pSPI->write(_len & 0x00FF);
va009039 0:bdeec5f86894 191
va009039 0:bdeec5f86894 192 for (uint16_t i=0; i<_len; i++)
va009039 0:bdeec5f86894 193 {
va009039 0:bdeec5f86894 194 pSPI->write(_buf[i]);
va009039 0:bdeec5f86894 195
va009039 0:bdeec5f86894 196 }
va009039 0:bdeec5f86894 197 resetSS();
va009039 0:bdeec5f86894 198 #else
va009039 0:bdeec5f86894 199
va009039 0:bdeec5f86894 200 for (uint16_t i=0; i<_len; i++)
va009039 0:bdeec5f86894 201 {
va009039 0:bdeec5f86894 202 setSS();
va009039 0:bdeec5f86894 203 pSPI->write(0xF0);
va009039 0:bdeec5f86894 204 pSPI->write(_addr >> 8);
va009039 0:bdeec5f86894 205 pSPI->write(_addr & 0xFF);
va009039 0:bdeec5f86894 206 _addr++;
va009039 0:bdeec5f86894 207 pSPI->write(_buf[i]);
va009039 0:bdeec5f86894 208 resetSS();
va009039 0:bdeec5f86894 209 }
va009039 0:bdeec5f86894 210 #endif
va009039 0:bdeec5f86894 211
va009039 0:bdeec5f86894 212 return _len;
va009039 0:bdeec5f86894 213 }
va009039 0:bdeec5f86894 214
va009039 0:bdeec5f86894 215 uint8_t W5100Class::read(uint16_t _addr)
va009039 0:bdeec5f86894 216 {
va009039 0:bdeec5f86894 217 setSS();
va009039 0:bdeec5f86894 218 #ifdef W5200
va009039 0:bdeec5f86894 219 pSPI->write(_addr >> 8);
va009039 0:bdeec5f86894 220 pSPI->write(_addr & 0xFF);
va009039 0:bdeec5f86894 221 pSPI->write(0x00);
va009039 0:bdeec5f86894 222 pSPI->write(0x01);
va009039 0:bdeec5f86894 223 #else
va009039 0:bdeec5f86894 224 pSPI->write(0x0F);
va009039 0:bdeec5f86894 225 pSPI->write(_addr >> 8);
va009039 0:bdeec5f86894 226 pSPI->write(_addr & 0xFF);
va009039 0:bdeec5f86894 227 #endif
va009039 0:bdeec5f86894 228
va009039 0:bdeec5f86894 229 uint8_t _data = pSPI->write(0);
va009039 0:bdeec5f86894 230 resetSS();
va009039 0:bdeec5f86894 231 return _data;
va009039 0:bdeec5f86894 232 }
va009039 0:bdeec5f86894 233
va009039 0:bdeec5f86894 234 uint16_t W5100Class::read(uint16_t _addr, uint8_t *_buf, uint16_t _len)
va009039 0:bdeec5f86894 235 {
va009039 0:bdeec5f86894 236 #ifdef W5200
va009039 0:bdeec5f86894 237 setSS();
va009039 0:bdeec5f86894 238 pSPI->write(_addr >> 8);
va009039 0:bdeec5f86894 239 pSPI->write(_addr & 0xFF);
va009039 0:bdeec5f86894 240 pSPI->write((0x00 | ((_len & 0x7F00) >> 8)));
va009039 0:bdeec5f86894 241 pSPI->write(_len & 0x00FF);
va009039 0:bdeec5f86894 242
va009039 0:bdeec5f86894 243 for (uint16_t i=0; i<_len; i++)
va009039 0:bdeec5f86894 244 {
va009039 0:bdeec5f86894 245 _buf[i] = pSPI->write(0);
va009039 0:bdeec5f86894 246
va009039 0:bdeec5f86894 247 }
va009039 0:bdeec5f86894 248 resetSS();
va009039 0:bdeec5f86894 249
va009039 0:bdeec5f86894 250 #else
va009039 0:bdeec5f86894 251
va009039 0:bdeec5f86894 252 for (uint16_t i=0; i<_len; i++)
va009039 0:bdeec5f86894 253 {
va009039 0:bdeec5f86894 254 setSS();
va009039 0:bdeec5f86894 255 pSPI->write(0x0F);
va009039 0:bdeec5f86894 256 pSPI->write(_addr >> 8);
va009039 0:bdeec5f86894 257 pSPI->write(_addr & 0xFF);
va009039 0:bdeec5f86894 258 _addr++;
va009039 0:bdeec5f86894 259 _buf[i] = pSPI->write(0);
va009039 0:bdeec5f86894 260 resetSS();
va009039 0:bdeec5f86894 261 }
va009039 0:bdeec5f86894 262 #endif
va009039 0:bdeec5f86894 263 return _len;
va009039 0:bdeec5f86894 264 }
va009039 0:bdeec5f86894 265
va009039 0:bdeec5f86894 266 void W5100Class::execCmdSn(SOCKET s, SockCMD _cmd) {
va009039 0:bdeec5f86894 267 // Send command to socket
va009039 0:bdeec5f86894 268 writeSnCR(s, _cmd);
va009039 0:bdeec5f86894 269 // Wait for command to complete
va009039 0:bdeec5f86894 270 while (readSnCR(s))
va009039 0:bdeec5f86894 271 ;
va009039 0:bdeec5f86894 272 }