USB composite device example program, drag-and-drop flash writer.
Dependencies: SWD USBDevice mbed BaseDAP
Target2.h@0:2385683c867a, 2013-09-17 (annotated)
- Committer:
- va009039
- Date:
- Tue Sep 17 04:33:44 2013 +0000
- Revision:
- 0:2385683c867a
- Child:
- 1:ea8e179320d7
first commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
va009039 | 0:2385683c867a | 1 | // Target2.h 2013/9/17 |
va009039 | 0:2385683c867a | 2 | #pragma once |
va009039 | 0:2385683c867a | 3 | #include "mbed.h" |
va009039 | 0:2385683c867a | 4 | #include "SWD.h" |
va009039 | 0:2385683c867a | 5 | |
va009039 | 0:2385683c867a | 6 | #define TARGET_RUNNING (1<<0) |
va009039 | 0:2385683c867a | 7 | #define TARGET_HALTED (1<<1) |
va009039 | 0:2385683c867a | 8 | |
va009039 | 0:2385683c867a | 9 | class Target2; |
va009039 | 0:2385683c867a | 10 | class CoreReg { |
va009039 | 0:2385683c867a | 11 | public: |
va009039 | 0:2385683c867a | 12 | void setup(Target2* target, uint8_t reg); |
va009039 | 0:2385683c867a | 13 | uint32_t read(); |
va009039 | 0:2385683c867a | 14 | void write(uint32_t value); |
va009039 | 0:2385683c867a | 15 | |
va009039 | 0:2385683c867a | 16 | CoreReg& operator= (int value) { |
va009039 | 0:2385683c867a | 17 | write(value); |
va009039 | 0:2385683c867a | 18 | return *this; |
va009039 | 0:2385683c867a | 19 | } |
va009039 | 0:2385683c867a | 20 | |
va009039 | 0:2385683c867a | 21 | CoreReg& operator= (CoreReg& rhs) { |
va009039 | 0:2385683c867a | 22 | write(rhs.read()); |
va009039 | 0:2385683c867a | 23 | return *this; |
va009039 | 0:2385683c867a | 24 | } |
va009039 | 0:2385683c867a | 25 | |
va009039 | 0:2385683c867a | 26 | operator uint32_t() { |
va009039 | 0:2385683c867a | 27 | return read(); |
va009039 | 0:2385683c867a | 28 | } |
va009039 | 0:2385683c867a | 29 | protected: |
va009039 | 0:2385683c867a | 30 | Target2* _target; |
va009039 | 0:2385683c867a | 31 | uint8_t _reg; |
va009039 | 0:2385683c867a | 32 | }; |
va009039 | 0:2385683c867a | 33 | |
va009039 | 0:2385683c867a | 34 | /** Target MCU interface |
va009039 | 0:2385683c867a | 35 | */ |
va009039 | 0:2385683c867a | 36 | class Target2 { |
va009039 | 0:2385683c867a | 37 | public: |
va009039 | 0:2385683c867a | 38 | /** create target MCU interface |
va009039 | 0:2385683c867a | 39 | * @param swdio SWD(swdio) pin |
va009039 | 0:2385683c867a | 40 | * @param swclk SWD(swclk) pin |
va009039 | 0:2385683c867a | 41 | * @param reset reset pin |
va009039 | 0:2385683c867a | 42 | */ |
va009039 | 0:2385683c867a | 43 | Target2(PinName swdio, PinName swclk, PinName reset); |
va009039 | 0:2385683c867a | 44 | bool setup(); |
va009039 | 0:2385683c867a | 45 | void SWJClock(uint32_t clock_hz); |
va009039 | 0:2385683c867a | 46 | uint32_t readMemory(uint32_t addr); |
va009039 | 0:2385683c867a | 47 | void readMemory(uint32_t addr, uint32_t* data, int count); |
va009039 | 0:2385683c867a | 48 | void writeMemory(uint32_t addr, uint32_t data); |
va009039 | 0:2385683c867a | 49 | void writeMemory(uint32_t addr, uint32_t* data, int count); |
va009039 | 0:2385683c867a | 50 | uint8_t readMemory8(uint32_t addr); |
va009039 | 0:2385683c867a | 51 | void writeMemory8(uint32_t addr, uint8_t data); |
va009039 | 0:2385683c867a | 52 | void halt(); |
va009039 | 0:2385683c867a | 53 | void resume(); |
va009039 | 0:2385683c867a | 54 | void step(); |
va009039 | 0:2385683c867a | 55 | void Abort(); |
va009039 | 0:2385683c867a | 56 | void HardwareReset(); |
va009039 | 0:2385683c867a | 57 | void SoftwareReset(); |
va009039 | 0:2385683c867a | 58 | int getStatus(); |
va009039 | 0:2385683c867a | 59 | bool wait_status(int status, int timeout_ms = 500); |
va009039 | 0:2385683c867a | 60 | bool prog_status(); |
va009039 | 0:2385683c867a | 61 | bool setBreakpoint0(uint32_t addr); |
va009039 | 0:2385683c867a | 62 | void removeBreakpoint0(uint32_t addr); |
va009039 | 0:2385683c867a | 63 | |
va009039 | 0:2385683c867a | 64 | CoreReg r0; |
va009039 | 0:2385683c867a | 65 | CoreReg r1; |
va009039 | 0:2385683c867a | 66 | CoreReg r2; |
va009039 | 0:2385683c867a | 67 | CoreReg r3; |
va009039 | 0:2385683c867a | 68 | CoreReg r4; |
va009039 | 0:2385683c867a | 69 | CoreReg r5; |
va009039 | 0:2385683c867a | 70 | CoreReg r6; |
va009039 | 0:2385683c867a | 71 | CoreReg r7; |
va009039 | 0:2385683c867a | 72 | CoreReg r8; |
va009039 | 0:2385683c867a | 73 | CoreReg r9; |
va009039 | 0:2385683c867a | 74 | CoreReg r10; |
va009039 | 0:2385683c867a | 75 | CoreReg r11; |
va009039 | 0:2385683c867a | 76 | CoreReg r12; |
va009039 | 0:2385683c867a | 77 | CoreReg sp; |
va009039 | 0:2385683c867a | 78 | CoreReg lr; |
va009039 | 0:2385683c867a | 79 | CoreReg pc; |
va009039 | 0:2385683c867a | 80 | CoreReg xpsr; |
va009039 | 0:2385683c867a | 81 | |
va009039 | 0:2385683c867a | 82 | uint32_t idcode; |
va009039 | 0:2385683c867a | 83 | protected: |
va009039 | 0:2385683c867a | 84 | void _setaddr(uint32_t addr); |
va009039 | 0:2385683c867a | 85 | void _setaddr8(uint32_t addr); |
va009039 | 0:2385683c867a | 86 | void JTAG2SWD(); |
va009039 | 0:2385683c867a | 87 | |
va009039 | 0:2385683c867a | 88 | SWD _swd; |
va009039 | 0:2385683c867a | 89 | }; |