DHCP Client for WIZ820io(W5200)

Dependencies:   EthernetNetIf mbed

Committer:
va009039
Date:
Tue Apr 10 03:38:22 2012 +0000
Revision:
0:db4242c89949

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 0:db4242c89949 1 /*
va009039 0:db4242c89949 2 * Copyright (c) 2010 by Cristian Maglie <c.maglie@bug.st>
va009039 0:db4242c89949 3 *
va009039 0:db4242c89949 4 * This file is free software; you can redistribute it and/or modify
va009039 0:db4242c89949 5 * it under the terms of either the GNU General Public License version 2
va009039 0:db4242c89949 6 * or the GNU Lesser General Public License version 2.1, both as
va009039 0:db4242c89949 7 * published by the Free Software Foundation.
va009039 0:db4242c89949 8 */
va009039 0:db4242c89949 9
va009039 0:db4242c89949 10 #ifndef W5100_H_INCLUDED
va009039 0:db4242c89949 11 #define W5100_H_INCLUDED
va009039 0:db4242c89949 12 #define MBED
va009039 0:db4242c89949 13 #ifdef MBED
va009039 0:db4242c89949 14 #include "mbed.h"
va009039 0:db4242c89949 15 typedef unsigned char uint8_t;
va009039 0:db4242c89949 16 typedef unsigned short uint16_t;
va009039 0:db4242c89949 17 #else //MBED
va009039 0:db4242c89949 18 #include <avr/pgmspace.h>
va009039 0:db4242c89949 19 #include <SPI.h>
va009039 0:db4242c89949 20 #endif //MBED
va009039 0:db4242c89949 21 #define W5200
va009039 0:db4242c89949 22
va009039 0:db4242c89949 23 #ifdef W5200
va009039 0:db4242c89949 24 #define MAX_SOCK_NUM 8
va009039 0:db4242c89949 25 #else
va009039 0:db4242c89949 26 #define MAX_SOCK_NUM 4
va009039 0:db4242c89949 27 #endif
va009039 0:db4242c89949 28
va009039 0:db4242c89949 29
va009039 0:db4242c89949 30 typedef uint8_t SOCKET;
va009039 0:db4242c89949 31
va009039 0:db4242c89949 32 #ifndef W5200
va009039 0:db4242c89949 33 #define IDM_OR 0x8000
va009039 0:db4242c89949 34 #define IDM_AR0 0x8001
va009039 0:db4242c89949 35 #define IDM_AR1 0x8002
va009039 0:db4242c89949 36 #define IDM_DR 0x8003
va009039 0:db4242c89949 37 #endif
va009039 0:db4242c89949 38
va009039 0:db4242c89949 39 /*
va009039 0:db4242c89949 40 class MR {
va009039 0:db4242c89949 41 public:
va009039 0:db4242c89949 42 static const uint8_t RST = 0x80;
va009039 0:db4242c89949 43 static const uint8_t PB = 0x10;
va009039 0:db4242c89949 44 static const uint8_t PPPOE = 0x08;
va009039 0:db4242c89949 45 static const uint8_t LB = 0x04;
va009039 0:db4242c89949 46 static const uint8_t AI = 0x02;
va009039 0:db4242c89949 47 static const uint8_t IND = 0x01;
va009039 0:db4242c89949 48 };
va009039 0:db4242c89949 49 */
va009039 0:db4242c89949 50 /*
va009039 0:db4242c89949 51 class IR {
va009039 0:db4242c89949 52 public:
va009039 0:db4242c89949 53 static const uint8_t CONFLICT = 0x80;
va009039 0:db4242c89949 54 static const uint8_t UNREACH = 0x40;
va009039 0:db4242c89949 55 static const uint8_t PPPoE = 0x20;
va009039 0:db4242c89949 56 static const uint8_t SOCK0 = 0x01;
va009039 0:db4242c89949 57 static const uint8_t SOCK1 = 0x02;
va009039 0:db4242c89949 58 static const uint8_t SOCK2 = 0x04;
va009039 0:db4242c89949 59 static const uint8_t SOCK3 = 0x08;
va009039 0:db4242c89949 60 static inline uint8_t SOCK(SOCKET ch) { return (0x01 << ch); };
va009039 0:db4242c89949 61 };
va009039 0:db4242c89949 62 */
va009039 0:db4242c89949 63
va009039 0:db4242c89949 64 class SnMR {
va009039 0:db4242c89949 65 public:
va009039 0:db4242c89949 66 static const uint8_t CLOSE = 0x00;
va009039 0:db4242c89949 67 static const uint8_t TCP = 0x01;
va009039 0:db4242c89949 68 static const uint8_t UDP = 0x02;
va009039 0:db4242c89949 69 static const uint8_t IPRAW = 0x03;
va009039 0:db4242c89949 70 static const uint8_t MACRAW = 0x04;
va009039 0:db4242c89949 71 static const uint8_t PPPOE = 0x05;
va009039 0:db4242c89949 72 static const uint8_t ND = 0x20;
va009039 0:db4242c89949 73 static const uint8_t MULTI = 0x80;
va009039 0:db4242c89949 74 };
va009039 0:db4242c89949 75
va009039 0:db4242c89949 76 enum SockCMD {
va009039 0:db4242c89949 77 Sock_OPEN = 0x01,
va009039 0:db4242c89949 78 Sock_LISTEN = 0x02,
va009039 0:db4242c89949 79 Sock_CONNECT = 0x04,
va009039 0:db4242c89949 80 Sock_DISCON = 0x08,
va009039 0:db4242c89949 81 Sock_CLOSE = 0x10,
va009039 0:db4242c89949 82 Sock_SEND = 0x20,
va009039 0:db4242c89949 83 Sock_SEND_MAC = 0x21,
va009039 0:db4242c89949 84 Sock_SEND_KEEP = 0x22,
va009039 0:db4242c89949 85 Sock_RECV = 0x40
va009039 0:db4242c89949 86 };
va009039 0:db4242c89949 87
va009039 0:db4242c89949 88 /*class SnCmd {
va009039 0:db4242c89949 89 public:
va009039 0:db4242c89949 90 static const uint8_t OPEN = 0x01;
va009039 0:db4242c89949 91 static const uint8_t LISTEN = 0x02;
va009039 0:db4242c89949 92 static const uint8_t CONNECT = 0x04;
va009039 0:db4242c89949 93 static const uint8_t DISCON = 0x08;
va009039 0:db4242c89949 94 static const uint8_t CLOSE = 0x10;
va009039 0:db4242c89949 95 static const uint8_t SEND = 0x20;
va009039 0:db4242c89949 96 static const uint8_t SEND_MAC = 0x21;
va009039 0:db4242c89949 97 static const uint8_t SEND_KEEP = 0x22;
va009039 0:db4242c89949 98 static const uint8_t RECV = 0x40;
va009039 0:db4242c89949 99 };
va009039 0:db4242c89949 100 */
va009039 0:db4242c89949 101
va009039 0:db4242c89949 102 class SnIR {
va009039 0:db4242c89949 103 public:
va009039 0:db4242c89949 104 static const uint8_t SEND_OK = 0x10;
va009039 0:db4242c89949 105 static const uint8_t TIMEOUT = 0x08;
va009039 0:db4242c89949 106 static const uint8_t RECV = 0x04;
va009039 0:db4242c89949 107 static const uint8_t DISCON = 0x02;
va009039 0:db4242c89949 108 static const uint8_t CON = 0x01;
va009039 0:db4242c89949 109 };
va009039 0:db4242c89949 110
va009039 0:db4242c89949 111 class SnSR {
va009039 0:db4242c89949 112 public:
va009039 0:db4242c89949 113 static const uint8_t CLOSED = 0x00;
va009039 0:db4242c89949 114 static const uint8_t INIT = 0x13;
va009039 0:db4242c89949 115 static const uint8_t LISTEN = 0x14;
va009039 0:db4242c89949 116 static const uint8_t SYNSENT = 0x15;
va009039 0:db4242c89949 117 static const uint8_t SYNRECV = 0x16;
va009039 0:db4242c89949 118 static const uint8_t ESTABLISHED = 0x17;
va009039 0:db4242c89949 119 static const uint8_t FIN_WAIT = 0x18;
va009039 0:db4242c89949 120 static const uint8_t CLOSING = 0x1A;
va009039 0:db4242c89949 121 static const uint8_t TIME_WAIT = 0x1B;
va009039 0:db4242c89949 122 static const uint8_t CLOSE_WAIT = 0x1C;
va009039 0:db4242c89949 123 static const uint8_t LAST_ACK = 0x1D;
va009039 0:db4242c89949 124 static const uint8_t UDP = 0x22;
va009039 0:db4242c89949 125 static const uint8_t IPRAW = 0x32;
va009039 0:db4242c89949 126 static const uint8_t MACRAW = 0x42;
va009039 0:db4242c89949 127 static const uint8_t PPPOE = 0x5F;
va009039 0:db4242c89949 128 };
va009039 0:db4242c89949 129
va009039 0:db4242c89949 130 class IPPROTO {
va009039 0:db4242c89949 131 public:
va009039 0:db4242c89949 132 static const uint8_t IP = 0;
va009039 0:db4242c89949 133 static const uint8_t ICMP = 1;
va009039 0:db4242c89949 134 static const uint8_t IGMP = 2;
va009039 0:db4242c89949 135 static const uint8_t GGP = 3;
va009039 0:db4242c89949 136 static const uint8_t TCP = 6;
va009039 0:db4242c89949 137 static const uint8_t PUP = 12;
va009039 0:db4242c89949 138 static const uint8_t UDP = 17;
va009039 0:db4242c89949 139 static const uint8_t IDP = 22;
va009039 0:db4242c89949 140 static const uint8_t ND = 77;
va009039 0:db4242c89949 141 static const uint8_t RAW = 255;
va009039 0:db4242c89949 142 };
va009039 0:db4242c89949 143
va009039 0:db4242c89949 144 class W5100Class {
va009039 0:db4242c89949 145 public:
va009039 0:db4242c89949 146 #ifdef MBED
va009039 0:db4242c89949 147 void hardware_reset();
va009039 0:db4242c89949 148 #endif //MBED
va009039 0:db4242c89949 149 void init();
va009039 0:db4242c89949 150
va009039 0:db4242c89949 151 /**
va009039 0:db4242c89949 152 * @brief This function is being used for copy the data form Receive buffer of the chip to application buffer.
va009039 0:db4242c89949 153 *
va009039 0:db4242c89949 154 * It calculate the actual physical address where one has to read
va009039 0:db4242c89949 155 * the data from Receive buffer. Here also take care of the condition while it exceed
va009039 0:db4242c89949 156 * the Rx memory uper-bound of socket.
va009039 0:db4242c89949 157 */
va009039 0:db4242c89949 158 void read_data(SOCKET s, volatile uint8_t * src, volatile uint8_t * dst, uint16_t len);
va009039 0:db4242c89949 159
va009039 0:db4242c89949 160 /**
va009039 0:db4242c89949 161 * @brief This function is being called by send() and sendto() function also.
va009039 0:db4242c89949 162 *
va009039 0:db4242c89949 163 * This function read the Tx write pointer register and after copy the data in buffer update the Tx write pointer
va009039 0:db4242c89949 164 * register. User should read upper byte first and lower byte later to get proper value.
va009039 0:db4242c89949 165 */
va009039 0:db4242c89949 166 void send_data_processing(SOCKET s, const uint8_t *data, uint16_t len);
va009039 0:db4242c89949 167 /**
va009039 0:db4242c89949 168 * @brief A copy of send_data_processing that uses the provided ptr for the
va009039 0:db4242c89949 169 * write offset. Only needed for the "streaming" UDP API, where
va009039 0:db4242c89949 170 * a single UDP packet is built up over a number of calls to
va009039 0:db4242c89949 171 * send_data_processing_ptr, because TX_WR doesn't seem to get updated
va009039 0:db4242c89949 172 * correctly in those scenarios
va009039 0:db4242c89949 173 * @param ptr value to use in place of TX_WR. If 0, then the value is read
va009039 0:db4242c89949 174 * in from TX_WR
va009039 0:db4242c89949 175 * @return New value for ptr, to be used in the next call
va009039 0:db4242c89949 176 */
va009039 0:db4242c89949 177 // FIXME Update documentation
va009039 0:db4242c89949 178 void send_data_processing_offset(SOCKET s, uint16_t data_offset, const uint8_t *data, uint16_t len);
va009039 0:db4242c89949 179
va009039 0:db4242c89949 180 /**
va009039 0:db4242c89949 181 * @brief This function is being called by recv() also.
va009039 0:db4242c89949 182 *
va009039 0:db4242c89949 183 * This function read the Rx read pointer register
va009039 0:db4242c89949 184 * and after copy the data from receive buffer update the Rx write pointer register.
va009039 0:db4242c89949 185 * User should read upper byte first and lower byte later to get proper value.
va009039 0:db4242c89949 186 */
va009039 0:db4242c89949 187 void recv_data_processing(SOCKET s, uint8_t *data, uint16_t len, uint8_t peek = 0);
va009039 0:db4242c89949 188
va009039 0:db4242c89949 189 inline void setGatewayIp(uint8_t *_addr);
va009039 0:db4242c89949 190 inline void getGatewayIp(uint8_t *_addr);
va009039 0:db4242c89949 191
va009039 0:db4242c89949 192 inline void setSubnetMask(uint8_t *_addr);
va009039 0:db4242c89949 193 inline void getSubnetMask(uint8_t *_addr);
va009039 0:db4242c89949 194
va009039 0:db4242c89949 195 inline void setMACAddress(uint8_t * addr);
va009039 0:db4242c89949 196 inline void getMACAddress(uint8_t * addr);
va009039 0:db4242c89949 197
va009039 0:db4242c89949 198 inline void setIPAddress(uint8_t * addr);
va009039 0:db4242c89949 199 inline void getIPAddress(uint8_t * addr);
va009039 0:db4242c89949 200
va009039 0:db4242c89949 201 inline void setRetransmissionTime(uint16_t timeout);
va009039 0:db4242c89949 202 inline void setRetransmissionCount(uint8_t _retry);
va009039 0:db4242c89949 203
va009039 0:db4242c89949 204 void execCmdSn(SOCKET s, SockCMD _cmd);
va009039 0:db4242c89949 205
va009039 0:db4242c89949 206 uint16_t getTXFreeSize(SOCKET s);
va009039 0:db4242c89949 207 uint16_t getRXReceivedSize(SOCKET s);
va009039 0:db4242c89949 208
va009039 0:db4242c89949 209
va009039 0:db4242c89949 210 // W5100 Registers
va009039 0:db4242c89949 211 // ---------------
va009039 0:db4242c89949 212 private:
va009039 0:db4242c89949 213 static uint8_t write(uint16_t _addr, uint8_t _data);
va009039 0:db4242c89949 214 static uint16_t write(uint16_t addr, const uint8_t *buf, uint16_t len);
va009039 0:db4242c89949 215 static uint8_t read(uint16_t addr);
va009039 0:db4242c89949 216 static uint16_t read(uint16_t addr, uint8_t *buf, uint16_t len);
va009039 0:db4242c89949 217
va009039 0:db4242c89949 218 #define __GP_REGISTER8(name, address) \
va009039 0:db4242c89949 219 static inline void write##name(uint8_t _data) { \
va009039 0:db4242c89949 220 write(address, _data); \
va009039 0:db4242c89949 221 } \
va009039 0:db4242c89949 222 static inline uint8_t read##name() { \
va009039 0:db4242c89949 223 return read(address); \
va009039 0:db4242c89949 224 }
va009039 0:db4242c89949 225 #define __GP_REGISTER16(name, address) \
va009039 0:db4242c89949 226 static void write##name(uint16_t _data) { \
va009039 0:db4242c89949 227 write(address, _data >> 8); \
va009039 0:db4242c89949 228 write(address+1, _data & 0xFF); \
va009039 0:db4242c89949 229 } \
va009039 0:db4242c89949 230 static uint16_t read##name() { \
va009039 0:db4242c89949 231 uint16_t res = read(address); \
va009039 0:db4242c89949 232 res = (res << 8) + read(address + 1); \
va009039 0:db4242c89949 233 return res; \
va009039 0:db4242c89949 234 }
va009039 0:db4242c89949 235 #define __GP_REGISTER_N(name, address, size) \
va009039 0:db4242c89949 236 static uint16_t write##name(uint8_t *_buff) { \
va009039 0:db4242c89949 237 return write(address, _buff, size); \
va009039 0:db4242c89949 238 } \
va009039 0:db4242c89949 239 static uint16_t read##name(uint8_t *_buff) { \
va009039 0:db4242c89949 240 return read(address, _buff, size); \
va009039 0:db4242c89949 241 }
va009039 0:db4242c89949 242
va009039 0:db4242c89949 243 public:
va009039 0:db4242c89949 244 __GP_REGISTER8 (MR, 0x0000); // Mode
va009039 0:db4242c89949 245 __GP_REGISTER_N(GAR, 0x0001, 4); // Gateway IP address
va009039 0:db4242c89949 246 __GP_REGISTER_N(SUBR, 0x0005, 4); // Subnet mask address
va009039 0:db4242c89949 247 __GP_REGISTER_N(SHAR, 0x0009, 6); // Source MAC address
va009039 0:db4242c89949 248 __GP_REGISTER_N(SIPR, 0x000F, 4); // Source IP address
va009039 0:db4242c89949 249 __GP_REGISTER8 (IR, 0x0015); // Interrupt
va009039 0:db4242c89949 250 __GP_REGISTER8 (IMR, 0x0016); // Interrupt Mask
va009039 0:db4242c89949 251 __GP_REGISTER16(RTR, 0x0017); // Timeout address
va009039 0:db4242c89949 252 __GP_REGISTER8 (RCR, 0x0019); // Retry count
va009039 0:db4242c89949 253
va009039 0:db4242c89949 254 #ifndef W5200
va009039 0:db4242c89949 255 __GP_REGISTER8 (RMSR, 0x001A); // Receive memory size
va009039 0:db4242c89949 256 __GP_REGISTER8 (TMSR, 0x001B); // Transmit memory size
va009039 0:db4242c89949 257 #endif
va009039 0:db4242c89949 258 __GP_REGISTER8 (PATR, 0x001C); // Authentication type address in PPPoE mode
va009039 0:db4242c89949 259
va009039 0:db4242c89949 260 __GP_REGISTER8 (VERSIONR,0x001f); // Chip version
va009039 0:db4242c89949 261
va009039 0:db4242c89949 262 __GP_REGISTER8 (PTIMER, 0x0028); // PPP LCP Request Timer
va009039 0:db4242c89949 263 __GP_REGISTER8 (PMAGIC, 0x0029); // PPP LCP Magic Number
va009039 0:db4242c89949 264 #ifndef W5200
va009039 0:db4242c89949 265 __GP_REGISTER_N(UIPR, 0x002A, 4); // Unreachable IP address in UDP mode
va009039 0:db4242c89949 266 __GP_REGISTER16(UPORT, 0x002E); // Unreachable Port address in UDP mode
va009039 0:db4242c89949 267 #endif
va009039 0:db4242c89949 268 __GP_REGISTER8 (PHYSTATUS,0x0035); // PHY Status
va009039 0:db4242c89949 269
va009039 0:db4242c89949 270 #undef __GP_REGISTER8
va009039 0:db4242c89949 271 #undef __GP_REGISTER16
va009039 0:db4242c89949 272 #undef __GP_REGISTER_N
va009039 0:db4242c89949 273
va009039 0:db4242c89949 274 // W5100 Socket registers
va009039 0:db4242c89949 275 // ----------------------
va009039 0:db4242c89949 276 private:
va009039 0:db4242c89949 277 static inline uint8_t readSn(SOCKET _s, uint16_t _addr);
va009039 0:db4242c89949 278 static inline uint8_t writeSn(SOCKET _s, uint16_t _addr, uint8_t _data);
va009039 0:db4242c89949 279 static inline uint16_t readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len);
va009039 0:db4242c89949 280 static inline uint16_t writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len);
va009039 0:db4242c89949 281
va009039 0:db4242c89949 282 #ifdef W5200
va009039 0:db4242c89949 283 static const uint16_t CH_BASE = 0x4000;
va009039 0:db4242c89949 284 #else
va009039 0:db4242c89949 285 static const uint16_t CH_BASE = 0x0400;
va009039 0:db4242c89949 286 #endif
va009039 0:db4242c89949 287
va009039 0:db4242c89949 288 static const uint16_t CH_SIZE = 0x0100;
va009039 0:db4242c89949 289
va009039 0:db4242c89949 290 #define __SOCKET_REGISTER8(name, address) \
va009039 0:db4242c89949 291 static inline void write##name(SOCKET _s, uint8_t _data) { \
va009039 0:db4242c89949 292 writeSn(_s, address, _data); \
va009039 0:db4242c89949 293 } \
va009039 0:db4242c89949 294 static inline uint8_t read##name(SOCKET _s) { \
va009039 0:db4242c89949 295 return readSn(_s, address); \
va009039 0:db4242c89949 296 }
va009039 0:db4242c89949 297 #define __SOCKET_REGISTER16(name, address) \
va009039 0:db4242c89949 298 static void write##name(SOCKET _s, uint16_t _data) { \
va009039 0:db4242c89949 299 writeSn(_s, address, _data >> 8); \
va009039 0:db4242c89949 300 writeSn(_s, address+1, _data & 0xFF); \
va009039 0:db4242c89949 301 } \
va009039 0:db4242c89949 302 static uint16_t read##name(SOCKET _s) { \
va009039 0:db4242c89949 303 uint16_t res = readSn(_s, address); \
va009039 0:db4242c89949 304 res = (res << 8) + readSn(_s, address + 1); \
va009039 0:db4242c89949 305 return res; \
va009039 0:db4242c89949 306 }
va009039 0:db4242c89949 307 #define __SOCKET_REGISTER_N(name, address, size) \
va009039 0:db4242c89949 308 static uint16_t write##name(SOCKET _s, uint8_t *_buff) { \
va009039 0:db4242c89949 309 return writeSn(_s, address, _buff, size); \
va009039 0:db4242c89949 310 } \
va009039 0:db4242c89949 311 static uint16_t read##name(SOCKET _s, uint8_t *_buff) { \
va009039 0:db4242c89949 312 return readSn(_s, address, _buff, size); \
va009039 0:db4242c89949 313 }
va009039 0:db4242c89949 314
va009039 0:db4242c89949 315 public:
va009039 0:db4242c89949 316 __SOCKET_REGISTER8(SnMR, 0x0000) // Mode
va009039 0:db4242c89949 317 __SOCKET_REGISTER8(SnCR, 0x0001) // Command
va009039 0:db4242c89949 318 __SOCKET_REGISTER8(SnIR, 0x0002) // Interrupt
va009039 0:db4242c89949 319 __SOCKET_REGISTER8(SnSR, 0x0003) // Status
va009039 0:db4242c89949 320 __SOCKET_REGISTER16(SnPORT, 0x0004) // Source Port
va009039 0:db4242c89949 321 __SOCKET_REGISTER_N(SnDHAR, 0x0006, 6) // Destination Hardw Addr
va009039 0:db4242c89949 322 __SOCKET_REGISTER_N(SnDIPR, 0x000C, 4) // Destination IP Addr
va009039 0:db4242c89949 323 __SOCKET_REGISTER16(SnDPORT, 0x0010) // Destination Port
va009039 0:db4242c89949 324 __SOCKET_REGISTER16(SnMSSR, 0x0012) // Max Segment Size
va009039 0:db4242c89949 325 __SOCKET_REGISTER8(SnPROTO, 0x0014) // Protocol in IP RAW Mode
va009039 0:db4242c89949 326 __SOCKET_REGISTER8(SnTOS, 0x0015) // IP TOS
va009039 0:db4242c89949 327 __SOCKET_REGISTER8(SnTTL, 0x0016) // IP TTL
va009039 0:db4242c89949 328 __SOCKET_REGISTER16(SnTX_FSR, 0x0020) // TX Free Size
va009039 0:db4242c89949 329 __SOCKET_REGISTER16(SnTX_RD, 0x0022) // TX Read Pointer
va009039 0:db4242c89949 330 __SOCKET_REGISTER16(SnTX_WR, 0x0024) // TX Write Pointer
va009039 0:db4242c89949 331 __SOCKET_REGISTER16(SnRX_RSR, 0x0026) // RX Free Size
va009039 0:db4242c89949 332 __SOCKET_REGISTER16(SnRX_RD, 0x0028) // RX Read Pointer
va009039 0:db4242c89949 333 __SOCKET_REGISTER16(SnRX_WR, 0x002A) // RX Write Pointer (supported?)
va009039 0:db4242c89949 334
va009039 0:db4242c89949 335 #undef __SOCKET_REGISTER8
va009039 0:db4242c89949 336 #undef __SOCKET_REGISTER16
va009039 0:db4242c89949 337 #undef __SOCKET_REGISTER_N
va009039 0:db4242c89949 338
va009039 0:db4242c89949 339
va009039 0:db4242c89949 340 private:
va009039 0:db4242c89949 341 static const uint8_t RST = 7; // Reset BIT
va009039 0:db4242c89949 342
va009039 0:db4242c89949 343 #ifdef W5200
va009039 0:db4242c89949 344 static const int SOCKETS = 8;
va009039 0:db4242c89949 345 #else
va009039 0:db4242c89949 346 static const int SOCKETS = 4;
va009039 0:db4242c89949 347 #endif
va009039 0:db4242c89949 348
va009039 0:db4242c89949 349 static const uint16_t SMASK = 0x07FF; // Tx buffer MASK
va009039 0:db4242c89949 350 static const uint16_t RMASK = 0x07FF; // Rx buffer MASK
va009039 0:db4242c89949 351 public:
va009039 0:db4242c89949 352 static const uint16_t SSIZE = 2048; // Max Tx buffer size
va009039 0:db4242c89949 353 private:
va009039 0:db4242c89949 354 static const uint16_t RSIZE = 2048; // Max Rx buffer size
va009039 0:db4242c89949 355 uint16_t SBASE[SOCKETS]; // Tx buffer base address
va009039 0:db4242c89949 356 uint16_t RBASE[SOCKETS]; // Rx buffer base address
va009039 0:db4242c89949 357
va009039 0:db4242c89949 358 private:
va009039 0:db4242c89949 359 #if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
va009039 0:db4242c89949 360 inline static void initSS() { DDRB |= _BV(4); };
va009039 0:db4242c89949 361 inline static void setSS() { PORTB &= ~_BV(4); };
va009039 0:db4242c89949 362 inline static void resetSS() { PORTB |= _BV(4); };
va009039 0:db4242c89949 363 #elif defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB162__)
va009039 0:db4242c89949 364 inline static void initSS() { DDRB |= _BV(0); };
va009039 0:db4242c89949 365 inline static void setSS() { PORTB &= ~_BV(0); };
va009039 0:db4242c89949 366 inline static void resetSS() { PORTB |= _BV(0); };
va009039 0:db4242c89949 367 #else
va009039 0:db4242c89949 368 #ifndef MBED
va009039 0:db4242c89949 369 inline static void initSS() { DDRB |= _BV(2); };
va009039 0:db4242c89949 370 inline static void setSS() { PORTB &= ~_BV(2); };
va009039 0:db4242c89949 371 inline static void resetSS() { PORTB |= _BV(2); };
va009039 0:db4242c89949 372 #endif //MBED
va009039 0:db4242c89949 373 #endif
va009039 0:db4242c89949 374
va009039 0:db4242c89949 375 };
va009039 0:db4242c89949 376
va009039 0:db4242c89949 377 extern W5100Class W5100;
va009039 0:db4242c89949 378
va009039 0:db4242c89949 379 uint8_t W5100Class::readSn(SOCKET _s, uint16_t _addr) {
va009039 0:db4242c89949 380 return read(CH_BASE + _s * CH_SIZE + _addr);
va009039 0:db4242c89949 381 }
va009039 0:db4242c89949 382
va009039 0:db4242c89949 383 uint8_t W5100Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t _data) {
va009039 0:db4242c89949 384 return write(CH_BASE + _s * CH_SIZE + _addr, _data);
va009039 0:db4242c89949 385 }
va009039 0:db4242c89949 386
va009039 0:db4242c89949 387 uint16_t W5100Class::readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) {
va009039 0:db4242c89949 388 return read(CH_BASE + _s * CH_SIZE + _addr, _buf, _len);
va009039 0:db4242c89949 389 }
va009039 0:db4242c89949 390
va009039 0:db4242c89949 391 uint16_t W5100Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) {
va009039 0:db4242c89949 392 return write(CH_BASE + _s * CH_SIZE + _addr, _buf, _len);
va009039 0:db4242c89949 393 }
va009039 0:db4242c89949 394
va009039 0:db4242c89949 395 void W5100Class::getGatewayIp(uint8_t *_addr) {
va009039 0:db4242c89949 396 readGAR(_addr);
va009039 0:db4242c89949 397 }
va009039 0:db4242c89949 398
va009039 0:db4242c89949 399 void W5100Class::setGatewayIp(uint8_t *_addr) {
va009039 0:db4242c89949 400 writeGAR(_addr);
va009039 0:db4242c89949 401 }
va009039 0:db4242c89949 402
va009039 0:db4242c89949 403 void W5100Class::getSubnetMask(uint8_t *_addr) {
va009039 0:db4242c89949 404 readSUBR(_addr);
va009039 0:db4242c89949 405 }
va009039 0:db4242c89949 406
va009039 0:db4242c89949 407 void W5100Class::setSubnetMask(uint8_t *_addr) {
va009039 0:db4242c89949 408 writeSUBR(_addr);
va009039 0:db4242c89949 409 }
va009039 0:db4242c89949 410
va009039 0:db4242c89949 411 void W5100Class::getMACAddress(uint8_t *_addr) {
va009039 0:db4242c89949 412 readSHAR(_addr);
va009039 0:db4242c89949 413 }
va009039 0:db4242c89949 414
va009039 0:db4242c89949 415 void W5100Class::setMACAddress(uint8_t *_addr) {
va009039 0:db4242c89949 416 writeSHAR(_addr);
va009039 0:db4242c89949 417 }
va009039 0:db4242c89949 418
va009039 0:db4242c89949 419 void W5100Class::getIPAddress(uint8_t *_addr) {
va009039 0:db4242c89949 420 readSIPR(_addr);
va009039 0:db4242c89949 421 }
va009039 0:db4242c89949 422
va009039 0:db4242c89949 423 void W5100Class::setIPAddress(uint8_t *_addr) {
va009039 0:db4242c89949 424 writeSIPR(_addr);
va009039 0:db4242c89949 425 }
va009039 0:db4242c89949 426
va009039 0:db4242c89949 427 void W5100Class::setRetransmissionTime(uint16_t _timeout) {
va009039 0:db4242c89949 428 writeRTR(_timeout);
va009039 0:db4242c89949 429 }
va009039 0:db4242c89949 430
va009039 0:db4242c89949 431 void W5100Class::setRetransmissionCount(uint8_t _retry) {
va009039 0:db4242c89949 432 writeRCR(_retry);
va009039 0:db4242c89949 433 }
va009039 0:db4242c89949 434
va009039 0:db4242c89949 435 #endif