mbed library sources. Supersedes mbed-src. Edited target satm32f446 for user USART3 pins
Fork of mbed-dev by
targets/TARGET_TOSHIBA/TARGET_TMPM46B/trng_api.c@188:3f10722804f9, 2018-07-30 (annotated)
- Committer:
- ua1arn
- Date:
- Mon Jul 30 12:31:10 2018 +0000
- Revision:
- 188:3f10722804f9
- Parent:
- 184:08ed48f1de7f
before add multi-configuration USB descriptors
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 184:08ed48f1de7f | 1 | /* mbed Microcontroller Library |
AnnaBridge | 184:08ed48f1de7f | 2 | * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2017 All rights reserved |
AnnaBridge | 184:08ed48f1de7f | 3 | * |
AnnaBridge | 184:08ed48f1de7f | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 184:08ed48f1de7f | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 184:08ed48f1de7f | 6 | * You may obtain a copy of the License at |
AnnaBridge | 184:08ed48f1de7f | 7 | * |
AnnaBridge | 184:08ed48f1de7f | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 184:08ed48f1de7f | 9 | * |
AnnaBridge | 184:08ed48f1de7f | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 184:08ed48f1de7f | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 184:08ed48f1de7f | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 184:08ed48f1de7f | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 184:08ed48f1de7f | 14 | * limitations under the License. |
AnnaBridge | 184:08ed48f1de7f | 15 | */ |
AnnaBridge | 184:08ed48f1de7f | 16 | #include "mbed_error.h" |
AnnaBridge | 184:08ed48f1de7f | 17 | #include "tmpm46b_esg.h" |
AnnaBridge | 184:08ed48f1de7f | 18 | #include "trng_api.h" |
AnnaBridge | 184:08ed48f1de7f | 19 | |
AnnaBridge | 184:08ed48f1de7f | 20 | static Result ESG_Config(void) |
AnnaBridge | 184:08ed48f1de7f | 21 | { |
AnnaBridge | 184:08ed48f1de7f | 22 | Result ret = ERROR; |
AnnaBridge | 184:08ed48f1de7f | 23 | uint16_t Fintming = 560U; |
AnnaBridge | 184:08ed48f1de7f | 24 | |
AnnaBridge | 184:08ed48f1de7f | 25 | // Confirm the ESG core stops |
AnnaBridge | 184:08ed48f1de7f | 26 | if (ESG_GetCalculationStatus() == ESG_CALCULATION_COMPLETE) { |
AnnaBridge | 184:08ed48f1de7f | 27 | // Confirm no interrupt generation |
AnnaBridge | 184:08ed48f1de7f | 28 | if (ESG_GetIntStatus() == DISABLE) { |
AnnaBridge | 184:08ed48f1de7f | 29 | // Set the latch timing & output timing |
AnnaBridge | 184:08ed48f1de7f | 30 | if ((ESG_SetLatchTiming(ESG_LATCH_TIMING_1) == SUCCESS) && |
AnnaBridge | 184:08ed48f1de7f | 31 | (ESG_SetFintiming(Fintming) == SUCCESS)) { |
AnnaBridge | 184:08ed48f1de7f | 32 | ret = SUCCESS; |
AnnaBridge | 184:08ed48f1de7f | 33 | } |
AnnaBridge | 184:08ed48f1de7f | 34 | } |
AnnaBridge | 184:08ed48f1de7f | 35 | } |
AnnaBridge | 184:08ed48f1de7f | 36 | return ret; |
AnnaBridge | 184:08ed48f1de7f | 37 | } |
AnnaBridge | 184:08ed48f1de7f | 38 | |
AnnaBridge | 184:08ed48f1de7f | 39 | void trng_init(trng_t *obj) |
AnnaBridge | 184:08ed48f1de7f | 40 | { |
AnnaBridge | 184:08ed48f1de7f | 41 | // Enable clock supply |
AnnaBridge | 184:08ed48f1de7f | 42 | CG_SetFcPeriphB(CG_FC_PERIPH_ESG, ENABLE); |
AnnaBridge | 184:08ed48f1de7f | 43 | // Initialise ESG core & Start up the ESG core |
AnnaBridge | 184:08ed48f1de7f | 44 | if ((ESG_Config() == SUCCESS) && (ESG_Startup() == SUCCESS)) { |
AnnaBridge | 184:08ed48f1de7f | 45 | obj->trng_init = true; |
AnnaBridge | 184:08ed48f1de7f | 46 | } else { |
AnnaBridge | 184:08ed48f1de7f | 47 | error("TRNG is not Initialised"); |
AnnaBridge | 184:08ed48f1de7f | 48 | obj->trng_init = false; |
AnnaBridge | 184:08ed48f1de7f | 49 | } |
AnnaBridge | 184:08ed48f1de7f | 50 | } |
AnnaBridge | 184:08ed48f1de7f | 51 | |
AnnaBridge | 184:08ed48f1de7f | 52 | void trng_free(trng_t *obj) |
AnnaBridge | 184:08ed48f1de7f | 53 | { |
AnnaBridge | 184:08ed48f1de7f | 54 | ESG_IPReset(); |
AnnaBridge | 184:08ed48f1de7f | 55 | // Disable clock supply |
AnnaBridge | 184:08ed48f1de7f | 56 | CG_SetFcPeriphB(CG_FC_PERIPH_ESG, DISABLE); |
AnnaBridge | 184:08ed48f1de7f | 57 | obj->trng_init = false; |
AnnaBridge | 184:08ed48f1de7f | 58 | } |
AnnaBridge | 184:08ed48f1de7f | 59 | |
AnnaBridge | 184:08ed48f1de7f | 60 | int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_length) |
AnnaBridge | 184:08ed48f1de7f | 61 | { |
AnnaBridge | 184:08ed48f1de7f | 62 | volatile uint8_t random[64] = {0}; |
AnnaBridge | 184:08ed48f1de7f | 63 | uint8_t i; |
AnnaBridge | 184:08ed48f1de7f | 64 | Result ret = ERROR; |
AnnaBridge | 184:08ed48f1de7f | 65 | |
AnnaBridge | 184:08ed48f1de7f | 66 | *output_length = 0; |
AnnaBridge | 184:08ed48f1de7f | 67 | |
AnnaBridge | 184:08ed48f1de7f | 68 | if (!obj->trng_init) { |
AnnaBridge | 184:08ed48f1de7f | 69 | error("TRNG is not Initialised"); |
AnnaBridge | 184:08ed48f1de7f | 70 | return FAIL; // fail i.e. -1 |
AnnaBridge | 184:08ed48f1de7f | 71 | } |
AnnaBridge | 184:08ed48f1de7f | 72 | |
AnnaBridge | 184:08ed48f1de7f | 73 | while (ESG_GetIntStatus() == DISABLE) { |
AnnaBridge | 184:08ed48f1de7f | 74 | // Wait for ESG core for generating an interrupt |
AnnaBridge | 184:08ed48f1de7f | 75 | } |
AnnaBridge | 184:08ed48f1de7f | 76 | // Interrupt clearing |
AnnaBridge | 184:08ed48f1de7f | 77 | ret = ESG_ClrInt(); |
AnnaBridge | 184:08ed48f1de7f | 78 | if (ret == ERROR) { |
AnnaBridge | 184:08ed48f1de7f | 79 | return FAIL; // fail i.e. -1 |
AnnaBridge | 184:08ed48f1de7f | 80 | } |
AnnaBridge | 184:08ed48f1de7f | 81 | // Get the calculation result |
AnnaBridge | 184:08ed48f1de7f | 82 | ESG_GetResult((uint32_t*)random); //512-bit entropy |
AnnaBridge | 184:08ed48f1de7f | 83 | |
AnnaBridge | 184:08ed48f1de7f | 84 | for (i = 0; (i < 64) && (i < length); i++) { |
AnnaBridge | 184:08ed48f1de7f | 85 | *output++ = random[i]; |
AnnaBridge | 184:08ed48f1de7f | 86 | // clear the buffer |
AnnaBridge | 184:08ed48f1de7f | 87 | random[i] = 0; |
AnnaBridge | 184:08ed48f1de7f | 88 | } |
AnnaBridge | 184:08ed48f1de7f | 89 | *output_length = i; |
AnnaBridge | 184:08ed48f1de7f | 90 | //clear and restart the ESG core |
AnnaBridge | 184:08ed48f1de7f | 91 | ESG_IPReset(); |
AnnaBridge | 184:08ed48f1de7f | 92 | ret |= ESG_Startup(); |
AnnaBridge | 184:08ed48f1de7f | 93 | if (ret == ERROR) { |
AnnaBridge | 184:08ed48f1de7f | 94 | return FAIL; // fail i.e. -1 |
AnnaBridge | 184:08ed48f1de7f | 95 | } |
AnnaBridge | 184:08ed48f1de7f | 96 | |
AnnaBridge | 184:08ed48f1de7f | 97 | return ret; |
AnnaBridge | 184:08ed48f1de7f | 98 | } |