Tsungta Wu / Mbed OS mbed_SPIS_multiByte_example

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

spi_api_multibyte.h@2:c520d7c7739d, 2017-05-31 (annotated)

Committer:
tsungta
Date:
Wed May 31 09:30:53 2017 +0000
Revision:
2:c520d7c7739d
Parent:
0:b7415ae44dac 
Modified API receive and reply; 'receive' is functional ; 'reply' need to FIX

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tsungta 0:b7415ae44dac 1
tsungta 0:b7415ae44dac 2 /** \addtogroup hal */
tsungta 0:b7415ae44dac 3 /** @{*/
tsungta 0:b7415ae44dac 4 /* mbed Microcontroller Library
tsungta 0:b7415ae44dac 5 * Copyright (c) 2006-2013 ARM Limited
tsungta 0:b7415ae44dac 6 *
tsungta 0:b7415ae44dac 7 * Licensed under the Apache License, Version 2.0 (the "License");
tsungta 0:b7415ae44dac 8 * you may not use this file except in compliance with the License.
tsungta 0:b7415ae44dac 9 * You may obtain a copy of the License at
tsungta 0:b7415ae44dac 10 *
tsungta 0:b7415ae44dac 11 * http://www.apache.org/licenses/LICENSE-2.0
tsungta 0:b7415ae44dac 12 *
tsungta 0:b7415ae44dac 13 * Unless required by applicable law or agreed to in writing, software
tsungta 0:b7415ae44dac 14 * distributed under the License is distributed on an "AS IS" BASIS,
tsungta 0:b7415ae44dac 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
tsungta 0:b7415ae44dac 16 * See the License for the specific language governing permissions and
tsungta 0:b7415ae44dac 17 * limitations under the License.
tsungta 0:b7415ae44dac 18 */
tsungta 0:b7415ae44dac 19 #ifndef MBED_SPI_API_MULTIBYTE_H
tsungta 0:b7415ae44dac 20 #define MBED_SPI_API_MULTIBYTE_H
tsungta 0:b7415ae44dac 21
tsungta 0:b7415ae44dac 22 #include "device.h"
tsungta 0:b7415ae44dac 23 #include "hal/dma_api.h"
tsungta 0:b7415ae44dac 24 #include "hal/buffer.h"
tsungta 0:b7415ae44dac 25
tsungta 0:b7415ae44dac 26 #if DEVICE_SPI
tsungta 0:b7415ae44dac 27
tsungta 0:b7415ae44dac 28 #define SPI_EVENT_ERROR (1 << 1)
tsungta 0:b7415ae44dac 29 #define SPI_EVENT_COMPLETE (1 << 2)
tsungta 0:b7415ae44dac 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
tsungta 0:b7415ae44dac 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
tsungta 0:b7415ae44dac 32
tsungta 0:b7415ae44dac 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
tsungta 0:b7415ae44dac 34
tsungta 0:b7415ae44dac 35 #define SPI_FILL_WORD (0xFFFF)
tsungta 0:b7415ae44dac 36
tsungta 0:b7415ae44dac 37 #if DEVICE_SPI_ASYNCH
tsungta 0:b7415ae44dac 38 /** Asynch SPI HAL structure
tsungta 0:b7415ae44dac 39 */
tsungta 0:b7415ae44dac 40 typedef struct {
tsungta 0:b7415ae44dac 41 struct spi_s spi; /**< Target specific SPI structure */
tsungta 0:b7415ae44dac 42 struct buffer_s tx_buff; /**< Tx buffer */
tsungta 0:b7415ae44dac 43 struct buffer_s rx_buff; /**< Rx buffer */
tsungta 0:b7415ae44dac 44 } spi_mb_t;
tsungta 0:b7415ae44dac 45
tsungta 0:b7415ae44dac 46 #else
tsungta 0:b7415ae44dac 47 /** Non-asynch SPI HAL structure
tsungta 0:b7415ae44dac 48 */
tsungta 0:b7415ae44dac 49 typedef struct spi_s spi_mb_t;
tsungta 0:b7415ae44dac 50
tsungta 0:b7415ae44dac 51 #endif
tsungta 0:b7415ae44dac 52
tsungta 0:b7415ae44dac 53 #ifdef __cplusplus
tsungta 0:b7415ae44dac 54 extern "C" {
tsungta 0:b7415ae44dac 55 #endif
tsungta 0:b7415ae44dac 56
tsungta 0:b7415ae44dac 57 /**
tsungta 0:b7415ae44dac 58 * \defgroup hal_GeneralSPI SPI Configuration Functions
tsungta 0:b7415ae44dac 59 * @{
tsungta 0:b7415ae44dac 60 */
tsungta 0:b7415ae44dac 61
tsungta 0:b7415ae44dac 62 /** Initialize the SPI peripheral
tsungta 0:b7415ae44dac 63 *
tsungta 0:b7415ae44dac 64 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
tsungta 0:b7415ae44dac 65 * @param[out] obj The SPI object to initialize
tsungta 0:b7415ae44dac 66 * @param[in] mosi The pin to use for MOSI
tsungta 0:b7415ae44dac 67 * @param[in] miso The pin to use for MISO
tsungta 0:b7415ae44dac 68 * @param[in] sclk The pin to use for SCLK
tsungta 0:b7415ae44dac 69 * @param[in] ssel The pin to use for SSEL
tsungta 0:b7415ae44dac 70 */
tsungta 0:b7415ae44dac 71 void spi_init_multibyte(spi_mb_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
tsungta 0:b7415ae44dac 72
tsungta 0:b7415ae44dac 73 /** Release a SPI object
tsungta 0:b7415ae44dac 74 *
tsungta 0:b7415ae44dac 75 * TODO: spi_free is currently unimplemented
tsungta 0:b7415ae44dac 76 * This will require reference counting at the C++ level to be safe
tsungta 0:b7415ae44dac 77 *
tsungta 0:b7415ae44dac 78 * Return the pins owned by the SPI object to their reset state
tsungta 0:b7415ae44dac 79 * Disable the SPI peripheral
tsungta 0:b7415ae44dac 80 * Disable the SPI clock
tsungta 0:b7415ae44dac 81 * @param[in] obj The SPI object to deinitialize
tsungta 0:b7415ae44dac 82 */
tsungta 0:b7415ae44dac 83 void spi_free_multibyte(spi_mb_t *obj);
tsungta 0:b7415ae44dac 84
tsungta 0:b7415ae44dac 85 /** Configure the SPI format
tsungta 0:b7415ae44dac 86 *
tsungta 0:b7415ae44dac 87 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
tsungta 0:b7415ae44dac 88 * The default bit order is MSB.
tsungta 0:b7415ae44dac 89 * @param[in,out] obj The SPI object to configure
tsungta 0:b7415ae44dac 90 * @param[in] bits The number of bits per frame
tsungta 0:b7415ae44dac 91 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
tsungta 0:b7415ae44dac 92 * @param[in] slave Zero for master mode or non-zero for slave mode
tsungta 0:b7415ae44dac 93 */
tsungta 0:b7415ae44dac 94 void spi_format_multibyte(spi_mb_t *obj, int bits, int mode, int slave);
tsungta 0:b7415ae44dac 95
tsungta 0:b7415ae44dac 96 /** Set the SPI baud rate
tsungta 0:b7415ae44dac 97 *
tsungta 0:b7415ae44dac 98 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
tsungta 0:b7415ae44dac 99 * Configures the SPI peripheral's baud rate
tsungta 0:b7415ae44dac 100 * @param[in,out] obj The SPI object to configure
tsungta 0:b7415ae44dac 101 * @param[in] hz The baud rate in Hz
tsungta 0:b7415ae44dac 102 */
tsungta 0:b7415ae44dac 103 void spi_frequency_multibyte(spi_mb_t *obj, int hz);
tsungta 0:b7415ae44dac 104
tsungta 0:b7415ae44dac 105 /**@}*/
tsungta 0:b7415ae44dac 106 /**
tsungta 0:b7415ae44dac 107 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
tsungta 0:b7415ae44dac 108 * @{
tsungta 0:b7415ae44dac 109 */
tsungta 0:b7415ae44dac 110
tsungta 0:b7415ae44dac 111 /** Write a byte out in master mode and receive a value
tsungta 0:b7415ae44dac 112 *
tsungta 0:b7415ae44dac 113 * @param[in] obj The SPI peripheral to use for sending
tsungta 0:b7415ae44dac 114 * @param[in] value The value to send
tsungta 0:b7415ae44dac 115 * @return Returns the value received during send
tsungta 0:b7415ae44dac 116 */
tsungta 0:b7415ae44dac 117 int spi_master_write_multibyte(spi_mb_t *obj, int value);
tsungta 0:b7415ae44dac 118
tsungta 0:b7415ae44dac 119 /** Check if a value is available to read
tsungta 0:b7415ae44dac 120 *
tsungta 0:b7415ae44dac 121 * @param[in] obj The SPI peripheral to check
tsungta 0:b7415ae44dac 122 * @return non-zero if a value is available
tsungta 0:b7415ae44dac 123 */
tsungta 2:c520d7c7739d 124 int spi_slave_receive_multibyte(spi_mb_t *obj, int bytes);
tsungta 0:b7415ae44dac 125
tsungta 0:b7415ae44dac 126 /** Get a received value out of the SPI receive buffer in slave mode
tsungta 0:b7415ae44dac 127 *
tsungta 0:b7415ae44dac 128 * Blocks until a value is available
tsungta 0:b7415ae44dac 129 * @param[in] obj The SPI peripheral to read
tsungta 0:b7415ae44dac 130 * @return The value received
tsungta 0:b7415ae44dac 131 */
tsungta 0:b7415ae44dac 132 int spi_slave_read_multibyte(spi_mb_t *obj);
tsungta 0:b7415ae44dac 133
tsungta 0:b7415ae44dac 134 /** Write a value to the SPI peripheral in slave mode
tsungta 0:b7415ae44dac 135 *
tsungta 0:b7415ae44dac 136 * Blocks until the SPI peripheral can be written to
tsungta 0:b7415ae44dac 137 * @param[in] obj The SPI peripheral to write
tsungta 0:b7415ae44dac 138 * @param[in] value The value to write
tsungta 0:b7415ae44dac 139 */
tsungta 2:c520d7c7739d 140 void spi_slave_write_multibyte(spi_mb_t *obj, uint8_t *value, int bytes);
tsungta 0:b7415ae44dac 141
tsungta 0:b7415ae44dac 142 /** Checks if the specified SPI peripheral is in use
tsungta 0:b7415ae44dac 143 *
tsungta 0:b7415ae44dac 144 * @param[in] obj The SPI peripheral to check
tsungta 0:b7415ae44dac 145 * @return non-zero if the peripheral is currently transmitting
tsungta 0:b7415ae44dac 146 */
tsungta 0:b7415ae44dac 147 int spi_busy_multibyte(spi_mb_t *obj);
tsungta 0:b7415ae44dac 148
tsungta 0:b7415ae44dac 149 /** Get the module number
tsungta 0:b7415ae44dac 150 *
tsungta 0:b7415ae44dac 151 * @param[in] obj The SPI peripheral to check
tsungta 0:b7415ae44dac 152 * @return The module number
tsungta 0:b7415ae44dac 153 */
tsungta 0:b7415ae44dac 154 uint8_t spi_get_module_multibyte(spi_mb_t *obj);
tsungta 0:b7415ae44dac 155
tsungta 0:b7415ae44dac 156 /**@}*/
tsungta 0:b7415ae44dac 157
tsungta 0:b7415ae44dac 158 #if DEVICE_SPI_ASYNCH
tsungta 0:b7415ae44dac 159 /**
tsungta 0:b7415ae44dac 160 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
tsungta 0:b7415ae44dac 161 * @{
tsungta 0:b7415ae44dac 162 */
tsungta 0:b7415ae44dac 163
tsungta 0:b7415ae44dac 164 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
tsungta 0:b7415ae44dac 165 *
tsungta 0:b7415ae44dac 166 * @param[in] obj The SPI object that holds the transfer information
tsungta 0:b7415ae44dac 167 * @param[in] tx The transmit buffer
tsungta 0:b7415ae44dac 168 * @param[in] tx_length The number of bytes to transmit
tsungta 0:b7415ae44dac 169 * @param[in] rx The receive buffer
tsungta 0:b7415ae44dac 170 * @param[in] rx_length The number of bytes to receive
tsungta 0:b7415ae44dac 171 * @param[in] bit_width The bit width of buffer words
tsungta 0:b7415ae44dac 172 * @param[in] event The logical OR of events to be registered
tsungta 0:b7415ae44dac 173 * @param[in] handler SPI interrupt handler
tsungta 0:b7415ae44dac 174 * @param[in] hint A suggestion for how to use DMA with this transfer
tsungta 0:b7415ae44dac 175 */
tsungta 0:b7415ae44dac 176 void spi_master_transfer_multibyte(spi_mb_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
tsungta 0:b7415ae44dac 177
tsungta 0:b7415ae44dac 178 /** The asynchronous IRQ handler
tsungta 0:b7415ae44dac 179 *
tsungta 0:b7415ae44dac 180 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
tsungta 0:b7415ae44dac 181 * conditions, such as buffer overflows or transfer complete.
tsungta 0:b7415ae44dac 182 * @param[in] obj The SPI object that holds the transfer information
tsungta 0:b7415ae44dac 183 * @return Event flags if a transfer termination condition was met; otherwise 0.
tsungta 0:b7415ae44dac 184 */
tsungta 0:b7415ae44dac 185 uint32_t spi_irq_handler_asynch_multibyte(spi_mb_t *obj);
tsungta 0:b7415ae44dac 186
tsungta 0:b7415ae44dac 187 /** Attempts to determine if the SPI peripheral is already in use
tsungta 0:b7415ae44dac 188 *
tsungta 0:b7415ae44dac 189 * If a temporary DMA channel has been allocated, peripheral is in use.
tsungta 0:b7415ae44dac 190 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
tsungta 0:b7415ae44dac 191 * channel were allocated.
tsungta 0:b7415ae44dac 192 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
tsungta 0:b7415ae44dac 193 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
tsungta 0:b7415ae44dac 194 * there are any bytes in the FIFOs.
tsungta 0:b7415ae44dac 195 * @param[in] obj The SPI object to check for activity
tsungta 0:b7415ae44dac 196 * @return Non-zero if the SPI port is active or zero if it is not.
tsungta 0:b7415ae44dac 197 */
tsungta 0:b7415ae44dac 198 uint8_t spi_active_multibyte(spi_mb_t *obj);
tsungta 0:b7415ae44dac 199
tsungta 0:b7415ae44dac 200 /** Abort an SPI transfer
tsungta 0:b7415ae44dac 201 *
tsungta 0:b7415ae44dac 202 * @param obj The SPI peripheral to stop
tsungta 0:b7415ae44dac 203 */
tsungta 0:b7415ae44dac 204 void spi_abort_asynch_multibyte(spi_mb_t *obj);
tsungta 0:b7415ae44dac 205
tsungta 0:b7415ae44dac 206
tsungta 0:b7415ae44dac 207 #endif
tsungta 0:b7415ae44dac 208
tsungta 0:b7415ae44dac 209 /**@}*/
tsungta 0:b7415ae44dac 210
tsungta 0:b7415ae44dac 211 #ifdef __cplusplus
tsungta 0:b7415ae44dac 212 }
tsungta 0:b7415ae44dac 213 #endif // __cplusplus
tsungta 0:b7415ae44dac 214
tsungta 0:b7415ae44dac 215 #endif // SPI_DEVICE
tsungta 0:b7415ae44dac 216
tsungta 0:b7415ae44dac 217 #endif // MBED_SPI_API_H
tsungta 0:b7415ae44dac 218
tsungta 0:b7415ae44dac 219 /** @}*/