Dependencies:   Buffer SoftSerial

Fork of BufferedSoftSerial by Erik -

Committer:
Sissors
Date:
Sat Jul 05 08:08:07 2014 +0000
Revision:
9:5b069a1896f9
Parent:
6:4e3e18b41ea6
Changed destructor

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 6:4e3e18b41ea6 1 /**
Sissors 6:4e3e18b41ea6 2 * @file BufferedSoftSerial.cpp
Sissors 6:4e3e18b41ea6 3 * @brief Software Buffer - Extends mbed Serial functionallity adding irq driven TX and RX
Sissors 6:4e3e18b41ea6 4 * @author sam grove
Sissors 6:4e3e18b41ea6 5 * @version 1.0
Sissors 6:4e3e18b41ea6 6 * @see
Sissors 6:4e3e18b41ea6 7 *
Sissors 6:4e3e18b41ea6 8 * Copyright (c) 2013
Sissors 6:4e3e18b41ea6 9 *
Sissors 6:4e3e18b41ea6 10 * Licensed under the Apache License, Version 2.0 (the "License");
Sissors 6:4e3e18b41ea6 11 * you may not use this file except in compliance with the License.
Sissors 6:4e3e18b41ea6 12 * You may obtain a copy of the License at
Sissors 6:4e3e18b41ea6 13 *
Sissors 6:4e3e18b41ea6 14 * http://www.apache.org/licenses/LICENSE-2.0
Sissors 6:4e3e18b41ea6 15 *
Sissors 6:4e3e18b41ea6 16 * Unless required by applicable law or agreed to in writing, software
Sissors 6:4e3e18b41ea6 17 * distributed under the License is distributed on an "AS IS" BASIS,
Sissors 6:4e3e18b41ea6 18 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Sissors 6:4e3e18b41ea6 19 * See the License for the specific language governing permissions and
Sissors 6:4e3e18b41ea6 20 * limitations under the License.
Sissors 6:4e3e18b41ea6 21 */
Sissors 6:4e3e18b41ea6 22
Sissors 6:4e3e18b41ea6 23 #include "BufferedSoftSerial.h"
Sissors 6:4e3e18b41ea6 24 #include <stdarg.h>
Sissors 6:4e3e18b41ea6 25
Sissors 6:4e3e18b41ea6 26 BufferedSoftSerial::BufferedSoftSerial(PinName tx, PinName rx, const char* name)
Sissors 6:4e3e18b41ea6 27 : SoftSerial(tx, rx, name)
Sissors 6:4e3e18b41ea6 28 {
Sissors 6:4e3e18b41ea6 29 SoftSerial::attach(this, &BufferedSoftSerial::rxIrq, SoftSerial::RxIrq);
Sissors 6:4e3e18b41ea6 30
Sissors 6:4e3e18b41ea6 31 return;
Sissors 6:4e3e18b41ea6 32 }
Sissors 6:4e3e18b41ea6 33
Sissors 6:4e3e18b41ea6 34 int BufferedSoftSerial::readable(void)
Sissors 6:4e3e18b41ea6 35 {
Sissors 6:4e3e18b41ea6 36 return _rxbuf.available(); // note: look if things are in the buffer
Sissors 6:4e3e18b41ea6 37 }
Sissors 6:4e3e18b41ea6 38
Sissors 6:4e3e18b41ea6 39 int BufferedSoftSerial::writeable(void)
Sissors 6:4e3e18b41ea6 40 {
Sissors 6:4e3e18b41ea6 41 return 1; // buffer allows overwriting by design, always true
Sissors 6:4e3e18b41ea6 42 }
Sissors 6:4e3e18b41ea6 43
Sissors 6:4e3e18b41ea6 44 int BufferedSoftSerial::getc(void)
Sissors 6:4e3e18b41ea6 45 {
Sissors 6:4e3e18b41ea6 46 return _rxbuf;
Sissors 6:4e3e18b41ea6 47 }
Sissors 6:4e3e18b41ea6 48
Sissors 6:4e3e18b41ea6 49 int BufferedSoftSerial::putc(int c)
Sissors 6:4e3e18b41ea6 50 {
Sissors 6:4e3e18b41ea6 51 _txbuf = (char)c;
Sissors 6:4e3e18b41ea6 52 BufferedSoftSerial::prime();
Sissors 6:4e3e18b41ea6 53
Sissors 6:4e3e18b41ea6 54 return c;
Sissors 6:4e3e18b41ea6 55 }
Sissors 6:4e3e18b41ea6 56
Sissors 6:4e3e18b41ea6 57 int BufferedSoftSerial::puts(const char *s)
Sissors 6:4e3e18b41ea6 58 {
Sissors 6:4e3e18b41ea6 59 const char* ptr = s;
Sissors 6:4e3e18b41ea6 60
Sissors 6:4e3e18b41ea6 61 while(*(ptr) != 0) {
Sissors 6:4e3e18b41ea6 62 _txbuf = *(ptr++);
Sissors 6:4e3e18b41ea6 63 }
Sissors 6:4e3e18b41ea6 64 _txbuf = '\n'; // done per puts definition
Sissors 6:4e3e18b41ea6 65 BufferedSoftSerial::prime();
Sissors 6:4e3e18b41ea6 66
Sissors 6:4e3e18b41ea6 67 return (ptr - s) + 1;
Sissors 6:4e3e18b41ea6 68 }
Sissors 6:4e3e18b41ea6 69
Sissors 6:4e3e18b41ea6 70 int BufferedSoftSerial::printf(const char* format, ...)
Sissors 6:4e3e18b41ea6 71 {
Sissors 6:4e3e18b41ea6 72 char buf[256] = {0};
Sissors 6:4e3e18b41ea6 73 int r = 0;
Sissors 6:4e3e18b41ea6 74
Sissors 6:4e3e18b41ea6 75 va_list arg;
Sissors 6:4e3e18b41ea6 76 va_start(arg, format);
Sissors 6:4e3e18b41ea6 77 r = vsprintf(buf, format, arg);
Sissors 6:4e3e18b41ea6 78 // this may not hit the heap but should alert the user anyways
Sissors 6:4e3e18b41ea6 79 if(r > sizeof(buf)) {
Sissors 6:4e3e18b41ea6 80 error("%s %d buffer overwrite!\n", __FILE__, __LINE__);
Sissors 6:4e3e18b41ea6 81 }
Sissors 6:4e3e18b41ea6 82 va_end(arg);
Sissors 6:4e3e18b41ea6 83 r = BufferedSoftSerial::write(buf, r);
Sissors 6:4e3e18b41ea6 84
Sissors 6:4e3e18b41ea6 85 return r;
Sissors 6:4e3e18b41ea6 86 }
Sissors 6:4e3e18b41ea6 87
Sissors 6:4e3e18b41ea6 88 ssize_t BufferedSoftSerial::write(const void *s, size_t length)
Sissors 6:4e3e18b41ea6 89 {
Sissors 6:4e3e18b41ea6 90 const char* ptr = (const char*)s;
Sissors 6:4e3e18b41ea6 91 const char* end = ptr + length;
Sissors 6:4e3e18b41ea6 92
Sissors 6:4e3e18b41ea6 93 while (ptr != end) {
Sissors 6:4e3e18b41ea6 94 _txbuf = *(ptr++);
Sissors 6:4e3e18b41ea6 95 }
Sissors 6:4e3e18b41ea6 96 BufferedSoftSerial::prime();
Sissors 6:4e3e18b41ea6 97
Sissors 6:4e3e18b41ea6 98 return ptr - (const char*)s;
Sissors 6:4e3e18b41ea6 99 }
Sissors 6:4e3e18b41ea6 100
Sissors 6:4e3e18b41ea6 101
Sissors 6:4e3e18b41ea6 102 void BufferedSoftSerial::rxIrq(void)
Sissors 6:4e3e18b41ea6 103 {
Sissors 6:4e3e18b41ea6 104 // read from the peripheral and make sure something is available
Sissors 6:4e3e18b41ea6 105 if(SoftSerial::readable()) {
Sissors 6:4e3e18b41ea6 106 _rxbuf = _getc(); // if so load them into a buffer
Sissors 6:4e3e18b41ea6 107 }
Sissors 6:4e3e18b41ea6 108
Sissors 6:4e3e18b41ea6 109 return;
Sissors 6:4e3e18b41ea6 110 }
Sissors 6:4e3e18b41ea6 111
Sissors 6:4e3e18b41ea6 112 void BufferedSoftSerial::txIrq(void)
Sissors 6:4e3e18b41ea6 113 {
Sissors 6:4e3e18b41ea6 114 // see if there is room in the hardware fifo and if something is in the software fifo
Sissors 6:4e3e18b41ea6 115 while(SoftSerial::writeable()) {
Sissors 6:4e3e18b41ea6 116 if(_txbuf.available()) {
Sissors 6:4e3e18b41ea6 117 _putc((int)_txbuf.get());
Sissors 6:4e3e18b41ea6 118 } else {
Sissors 6:4e3e18b41ea6 119 // disable the TX interrupt when there is nothing left to send
Sissors 6:4e3e18b41ea6 120 SoftSerial::attach(NULL, SoftSerial::TxIrq);
Sissors 6:4e3e18b41ea6 121 break;
Sissors 6:4e3e18b41ea6 122 }
Sissors 6:4e3e18b41ea6 123 }
Sissors 6:4e3e18b41ea6 124
Sissors 6:4e3e18b41ea6 125 return;
Sissors 6:4e3e18b41ea6 126 }
Sissors 6:4e3e18b41ea6 127
Sissors 6:4e3e18b41ea6 128 void BufferedSoftSerial::prime(void)
Sissors 6:4e3e18b41ea6 129 {
Sissors 6:4e3e18b41ea6 130 // if already busy then the irq will pick this up
Sissors 6:4e3e18b41ea6 131 if(SoftSerial::writeable()) {
Sissors 6:4e3e18b41ea6 132 SoftSerial::attach(NULL, SoftSerial::TxIrq); // make sure not to cause contention in the irq
Sissors 6:4e3e18b41ea6 133 BufferedSoftSerial::txIrq(); // only write to hardware in one place
Sissors 6:4e3e18b41ea6 134 SoftSerial::attach(this, &BufferedSoftSerial::txIrq, SoftSerial::TxIrq);
Sissors 6:4e3e18b41ea6 135 }
Sissors 6:4e3e18b41ea6 136
Sissors 6:4e3e18b41ea6 137 return;
Sissors 6:4e3e18b41ea6 138 }
Sissors 6:4e3e18b41ea6 139
Sissors 6:4e3e18b41ea6 140