Sean Houlihane / SPI_GFX_nano

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Dependencies:   Adafruit_GFX_nano SPI_Demo_Nano

main.cpp@9:bbe01bf9a3ef, 2015-02-25 (annotated)

Committer:
tsh
Date:
Wed Feb 25 23:43:51 2015 +0000
Revision:
9:bbe01bf9a3ef
Parent:
8:971ea27171dd
Child:
10:d9a6a2fede8c
include SPI in gfv, but no gxf instance

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tsh 0:057ae71e1b6f 1 /*
tsh 0:057ae71e1b6f 2
tsh 0:057ae71e1b6f 3 Copyright (c) 2012-2014 RedBearLab
tsh 0:057ae71e1b6f 4
tsh 0:057ae71e1b6f 5 Permission is hereby granted, free of charge, to any person obtaining a copy of this software
tsh 0:057ae71e1b6f 6 and associated documentation files (the "Software"), to deal in the Software without restriction,
tsh 0:057ae71e1b6f 7 including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
tsh 0:057ae71e1b6f 8 and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so,
tsh 0:057ae71e1b6f 9 subject to the following conditions:
tsh 0:057ae71e1b6f 10 The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
tsh 0:057ae71e1b6f 11
tsh 0:057ae71e1b6f 12 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
tsh 0:057ae71e1b6f 13 INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
tsh 0:057ae71e1b6f 14 PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE
tsh 0:057ae71e1b6f 15 FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
tsh 0:057ae71e1b6f 16 ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
tsh 0:057ae71e1b6f 17
tsh 0:057ae71e1b6f 18 */
tsh 0:057ae71e1b6f 19
tsh 0:057ae71e1b6f 20 #include "mbed.h"
tsh 0:057ae71e1b6f 21 #include "spi_master.h"
tsh 3:6122dfbc9d9e 22 #include "Adafruit_SSD1306.h"
tsh 0:057ae71e1b6f 23
tsh 8:971ea27171dd 24 #define SSD1306_SETCONTRAST 0x81
tsh 8:971ea27171dd 25 #define SSD1306_DISPLAYALLON_RESUME 0xA4
tsh 8:971ea27171dd 26 #define SSD1306_DISPLAYALLON 0xA5
tsh 8:971ea27171dd 27 #define SSD1306_NORMALDISPLAY 0xA6
tsh 8:971ea27171dd 28 #define SSD1306_INVERTDISPLAY 0xA7
tsh 8:971ea27171dd 29 #define SSD1306_DISPLAYOFF 0xAE
tsh 8:971ea27171dd 30 #define SSD1306_DISPLAYON 0xAF
tsh 8:971ea27171dd 31 #define SSD1306_SETDISPLAYOFFSET 0xD3
tsh 8:971ea27171dd 32 #define SSD1306_SETCOMPINS 0xDA
tsh 8:971ea27171dd 33 #define SSD1306_SETVCOMDETECT 0xDB
tsh 8:971ea27171dd 34 #define SSD1306_SETDISPLAYCLOCKDIV 0xD5
tsh 8:971ea27171dd 35 #define SSD1306_SETPRECHARGE 0xD9
tsh 8:971ea27171dd 36 #define SSD1306_SETMULTIPLEX 0xA8
tsh 8:971ea27171dd 37 #define SSD1306_SETLOWCOLUMN 0x00
tsh 8:971ea27171dd 38 #define SSD1306_SETHIGHCOLUMN 0x10
tsh 8:971ea27171dd 39 #define SSD1306_SETSTARTLINE 0x40
tsh 8:971ea27171dd 40 #define SSD1306_MEMORYMODE 0x20
tsh 8:971ea27171dd 41 #define SSD1306_COMSCANINC 0xC0
tsh 8:971ea27171dd 42 #define SSD1306_COMSCANDEC 0xC8
tsh 8:971ea27171dd 43 #define SSD1306_SEGREMAP 0xA0
tsh 8:971ea27171dd 44 #define SSD1306_CHARGEPUMP 0x8D
tsh 4:9decf12340fa 45 //DigitalOut spi_cs(P0_10);
tsh 4:9decf12340fa 46 DigitalOut rst(A3);
tsh 4:9decf12340fa 47 DigitalOut dc(A4);
tsh 4:9decf12340fa 48 DigitalOut cs(D2);
tsh 4:9decf12340fa 49 DigitalOut led(D13);
tsh 0:057ae71e1b6f 50
tsh 0:057ae71e1b6f 51 SPIClass SPI1(NRF_SPI1);
tsh 0:057ae71e1b6f 52
tsh 8:971ea27171dd 53
tsh 9:bbe01bf9a3ef 54 //Adafruit_SSD1306_nrf gOled1(A4,A3,D2);// SPI, DC, RST, CS
tsh 0:057ae71e1b6f 55
tsh 0:057ae71e1b6f 56 int main(void)
tsh 0:057ae71e1b6f 57 {
tsh 8:971ea27171dd 58
tsh 4:9decf12340fa 59 led = 1; // off
tsh 9:bbe01bf9a3ef 60 wait (0.3);
tsh 9:bbe01bf9a3ef 61 led = 0; // ON
tsh 9:bbe01bf9a3ef 62 wait (0.3);
tsh 9:bbe01bf9a3ef 63 led = 1; // off
tsh 9:bbe01bf9a3ef 64 // SPI1.begin(P0_8, P0_9, P0_11);//SCK, MOSI, MISO
tsh 8:971ea27171dd 65
tsh 8:971ea27171dd 66 //Display initialisation
tsh 4:9decf12340fa 67 rst = 1;
tsh 4:9decf12340fa 68 // VDD (3.3V) goes high at start, lets just chill for a ms
tsh 4:9decf12340fa 69 wait_ms(1);
tsh 4:9decf12340fa 70 // bring reset low
tsh 8:971ea27171dd 71 rst = 0;
tsh 4:9decf12340fa 72 // wait 10ms
tsh 4:9decf12340fa 73 wait_ms(10);
tsh 4:9decf12340fa 74 // bring out of reset
tsh 4:9decf12340fa 75 rst = 1;
tsh 4:9decf12340fa 76 // turn on VCC (9V?)
tsh 8:971ea27171dd 77 SPI1.transfer(SSD1306_DISPLAYOFF);
tsh 8:971ea27171dd 78 SPI1.transfer(SSD1306_SETDISPLAYCLOCKDIV);
tsh 8:971ea27171dd 79 SPI1.transfer(0x80); // the suggested ratio 0x80
tsh 8:971ea27171dd 80
tsh 8:971ea27171dd 81 SPI1.transfer(SSD1306_SETMULTIPLEX);
tsh 8:971ea27171dd 82 SPI1.transfer(31);
tsh 8:971ea27171dd 83
tsh 8:971ea27171dd 84 SPI1.transfer(SSD1306_SETDISPLAYOFFSET);
tsh 8:971ea27171dd 85 SPI1.transfer(0x0); // no offset
tsh 8:971ea27171dd 86
tsh 8:971ea27171dd 87 SPI1.transfer(SSD1306_SETSTARTLINE | 0x0); // line #0
tsh 8:971ea27171dd 88
tsh 8:971ea27171dd 89 SPI1.transfer(SSD1306_CHARGEPUMP);
tsh 8:971ea27171dd 90 SPI1.transfer(0x14);
tsh 8:971ea27171dd 91
tsh 8:971ea27171dd 92 SPI1.transfer(SSD1306_MEMORYMODE);
tsh 8:971ea27171dd 93 SPI1.transfer(0x00); // 0x0 act like ks0108
tsh 8:971ea27171dd 94
tsh 8:971ea27171dd 95 SPI1.transfer(SSD1306_SEGREMAP | 0x1);
tsh 8:971ea27171dd 96
tsh 8:971ea27171dd 97 SPI1.transfer(SSD1306_COMSCANDEC);
tsh 8:971ea27171dd 98
tsh 8:971ea27171dd 99 SPI1.transfer(SSD1306_SETCOMPINS);
tsh 8:971ea27171dd 100 SPI1.transfer(0x02); // TODO - calculate based on _rawHieght ?
tsh 8:971ea27171dd 101
tsh 8:971ea27171dd 102 SPI1.transfer(SSD1306_SETCONTRAST);
tsh 8:971ea27171dd 103 SPI1.transfer(0x8F );
tsh 8:971ea27171dd 104
tsh 8:971ea27171dd 105 SPI1.transfer(SSD1306_SETPRECHARGE);
tsh 8:971ea27171dd 106 SPI1.transfer( 0x22);
tsh 8:971ea27171dd 107
tsh 8:971ea27171dd 108 SPI1.transfer(SSD1306_SETVCOMDETECT);
tsh 8:971ea27171dd 109 SPI1.transfer(0x40);
tsh 8:971ea27171dd 110
tsh 8:971ea27171dd 111 SPI1.transfer(SSD1306_DISPLAYALLON_RESUME);
tsh 8:971ea27171dd 112
tsh 8:971ea27171dd 113 SPI1.transfer(SSD1306_NORMALDISPLAY);
tsh 8:971ea27171dd 114
tsh 8:971ea27171dd 115 SPI1.transfer(SSD1306_DISPLAYON);
tsh 8:971ea27171dd 116
tsh 8:971ea27171dd 117
tsh 8:971ea27171dd 118
tsh 8:971ea27171dd 119 while(1){
tsh 8:971ea27171dd 120 led = 0; // on
tsh 8:971ea27171dd 121 wait(1);
tsh 8:971ea27171dd 122 led = 1;
tsh 8:971ea27171dd 123 wait(1);
tsh 8:971ea27171dd 124 }
tsh 0:057ae71e1b6f 125 }
tsh 0:057ae71e1b6f 126
tsh 0:057ae71e1b6f 127
tsh 0:057ae71e1b6f 128
tsh 0:057ae71e1b6f 129
tsh 0:057ae71e1b6f 130
tsh 0:057ae71e1b6f 131
tsh 0:057ae71e1b6f 132