Darren Ulrich / UniGraphic

Added SPI burst mode to spi 8 bit.

Dependents:   Bicycl_Computer_NUCLEO-F411RE Bicycl_Computer_NUCLEO-L476RG

Fork of UniGraphic by GraphicsDisplay

Added SPI burst mode to this graphics driver. If whoever wants this rolled in to repository let me know. I replaced _spi.write(); with fastWrite(); and clearRX();

SPI8.cpp

// need to re-create SPI firmware to access SPI handle
static SPI_HandleTypeDef SpiHandle;

void SPI8::fastWrite(int data) {
    
      SpiHandle.Instance = SPI1;
    // Check if data is transmitted
    while ((SpiHandle.Instance->SR & SPI_SR_TXE) == 0);
    SpiHandle.Instance->DR = data;
}
    
void SPI8::clearRX( void ) {
        SpiHandle.Instance = SPI1;
    //Check if the RX buffer is busy
    //While busy, keep checking
    while (SpiHandle.Instance->SR & SPI_SR_BSY){   
        // Check RX buffer readable
        while ((SpiHandle.Instance->SR & SPI_SR_RXNE) == 0);
        int dummy = SpiHandle.Instance->DR;
    }
}

Diff: Protocols/PAR16.h

Revision:
7:bb0383b91104
Parent:
6:8356d48a07db
Child:
11:b842b8e332cb
diff -r 8356d48a07db -r bb0383b91104 Protocols/PAR16.h
--- a/Protocols/PAR16.h	Mon Feb 16 01:18:29 2015 +0000
+++ b/Protocols/PAR16.h	Tue Feb 17 11:02:06 2015 +0000
@@ -75,19 +75,26 @@
     */   
     virtual void wr_grambuf(unsigned short* data, unsigned int lenght);
     
-    /** Read 4x8bit data from display controller (with dummy cycle)
-    *
-    * @returns data as uint
-    *
-    */ 
-    virtual unsigned int rd_data32_wdummy();
-    
     /** Read 16bit pixeldata from display controller (with dummy cycle)
     *
     * @returns 16bit color
     */ 
     virtual unsigned short rd_gram();
     
+    /** Read 4x8bit register data (with dummy cycle)
+    * @param reg the register to read
+    * @returns data as uint
+    * 
+    */ 
+    virtual unsigned int rd_reg_data32(unsigned char reg);
+    
+    /** Read 3x8bit ExtendedCommands register data
+    * @param reg the register to read
+    * @returns data as uint
+    * @note EXTC regs (0xB0 to 0xFF) are read/write registers, for Parallel mode directly accessible in both directions
+    */ 
+    virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd);
+    
     /** HW reset sequence (without display init commands)   
     */
     virtual void hw_reset();