Darren Ulrich / UniGraphic

Added SPI burst mode to spi 8 bit.

Dependents:   Bicycl_Computer_NUCLEO-F411RE Bicycl_Computer_NUCLEO-L476RG

Fork of UniGraphic by GraphicsDisplay

Added SPI burst mode to this graphics driver. If whoever wants this rolled in to repository let me know. I replaced _spi.write(); with fastWrite(); and clearRX();

SPI8.cpp

// need to re-create SPI firmware to access SPI handle
static SPI_HandleTypeDef SpiHandle;

void SPI8::fastWrite(int data) {
    
      SpiHandle.Instance = SPI1;
    // Check if data is transmitted
    while ((SpiHandle.Instance->SR & SPI_SR_TXE) == 0);
    SpiHandle.Instance->DR = data;
}
    
void SPI8::clearRX( void ) {
        SpiHandle.Instance = SPI1;
    //Check if the RX buffer is busy
    //While busy, keep checking
    while (SpiHandle.Instance->SR & SPI_SR_BSY){   
        // Check RX buffer readable
        while ((SpiHandle.Instance->SR & SPI_SR_RXNE) == 0);
        int dummy = SpiHandle.Instance->DR;
    }
}

Protocols/SPI16.h@11:b842b8e332cb, 2015-02-20 (annotated)

Committer:
Geremia
Date:
Fri Feb 20 21:32:25 2015 +0000
Revision:
11:b842b8e332cb
Parent:
7:bb0383b91104
Child:
20:14daa48ffd4c
added auto_gram_read_format() to TFt inits. Even if write is set to 16bit RGB color, for some controllers the read cmd outputs 18bit BGR. Now that function will autodetect and set internal flags accordingly, so pixelread() is always correct.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Geremia 1:ff019d22b275 1 #ifndef SPI16_H
Geremia 1:ff019d22b275 2 #define SPI16_H
Geremia 1:ff019d22b275 3
Geremia 1:ff019d22b275 4 #include "mbed.h"
Geremia 1:ff019d22b275 5 #include "Protocols.h"
Geremia 1:ff019d22b275 6 //#include "GraphicsDisplay.h"
Geremia 1:ff019d22b275 7
Geremia 6:8356d48a07db 8 /** SPI 16bit interface
Geremia 6:8356d48a07db 9 */
Geremia 1:ff019d22b275 10 class SPI16 : public Protocols
Geremia 1:ff019d22b275 11 {
Geremia 1:ff019d22b275 12 public:
Geremia 1:ff019d22b275 13
Geremia 1:ff019d22b275 14 /** Create an SPI 8bit display interface with 3 control pins
Geremia 1:ff019d22b275 15 *
Geremia 1:ff019d22b275 16 * @param SPI mosi
Geremia 1:ff019d22b275 17 * @param SPI miso
Geremia 1:ff019d22b275 18 * @param SPI sclk
Geremia 1:ff019d22b275 19 * @param CS pin connected to CS of display
Geremia 1:ff019d22b275 20 * @param reset pin connected to RESET of display
Geremia 1:ff019d22b275 21 * @param DC pin connected to data/command of display
Geremia 1:ff019d22b275 22 */
Geremia 1:ff019d22b275 23 SPI16(int Hz, PinName mosi, PinName miso, PinName sclk, PinName CS, PinName reset, PinName DC);
Geremia 1:ff019d22b275 24
Geremia 1:ff019d22b275 25 protected:
Geremia 1:ff019d22b275 26
Geremia 1:ff019d22b275 27 /** Send 8bit command to display controller
Geremia 1:ff019d22b275 28 *
Geremia 1:ff019d22b275 29 * @note switches spi format 16->8->16, better use wr_cmd16 with NOP in front
Geremia 1:ff019d22b275 30 * @param cmd: byte to send
Geremia 1:ff019d22b275 31 *
Geremia 1:ff019d22b275 32 */
Geremia 1:ff019d22b275 33 virtual void wr_cmd8(unsigned char cmd);
Geremia 1:ff019d22b275 34
Geremia 1:ff019d22b275 35 /** Send 8bit data to display controller
Geremia 1:ff019d22b275 36 *
Geremia 1:ff019d22b275 37 * @note switches spi format 16->8->16, better use wr_data16 with repeated byte (if does not hurt)
Geremia 1:ff019d22b275 38 * @param data: byte to send
Geremia 1:ff019d22b275 39 *
Geremia 1:ff019d22b275 40 */
Geremia 1:ff019d22b275 41 virtual void wr_data8(unsigned char data);
Geremia 1:ff019d22b275 42
Geremia 4:12ba0ecc2c1f 43 /** Send 2x8bit command to display controller
Geremia 1:ff019d22b275 44 *
Geremia 1:ff019d22b275 45 * @param cmd: halfword to send
Geremia 4:12ba0ecc2c1f 46 * @note in SPI_16 mode a single 16bit transfer will be done
Geremia 1:ff019d22b275 47 */
Geremia 1:ff019d22b275 48 virtual void wr_cmd16(unsigned short cmd);
Geremia 1:ff019d22b275 49
Geremia 4:12ba0ecc2c1f 50 /** Send 2x8bit data to display controller
Geremia 4:12ba0ecc2c1f 51 *
Geremia 4:12ba0ecc2c1f 52 * @param data: halfword to send
Geremia 4:12ba0ecc2c1f 53 * @note in SPI_16 mode a single 16bit transfer will be done
Geremia 4:12ba0ecc2c1f 54 */
Geremia 4:12ba0ecc2c1f 55 virtual void wr_data16(unsigned short data);
Geremia 4:12ba0ecc2c1f 56
Geremia 4:12ba0ecc2c1f 57 /** Send 16bit pixeldata to display controller
Geremia 1:ff019d22b275 58 *
Geremia 1:ff019d22b275 59 * @param data: halfword to send
Geremia 1:ff019d22b275 60 *
Geremia 1:ff019d22b275 61 */
Geremia 4:12ba0ecc2c1f 62 virtual void wr_gram(unsigned short data);
Geremia 1:ff019d22b275 63
Geremia 4:12ba0ecc2c1f 64 /** Send same 16bit pixeldata to display controller multiple times
Geremia 1:ff019d22b275 65 *
Geremia 1:ff019d22b275 66 * @param data: halfword to send
Geremia 1:ff019d22b275 67 * @param count: how many
Geremia 1:ff019d22b275 68 *
Geremia 1:ff019d22b275 69 */
Geremia 4:12ba0ecc2c1f 70 virtual void wr_gram(unsigned short data, unsigned int count);
Geremia 1:ff019d22b275 71
Geremia 4:12ba0ecc2c1f 72 /** Send array of pixeldata shorts to display controller
Geremia 1:ff019d22b275 73 *
Geremia 4:12ba0ecc2c1f 74 * @param data: unsigned short pixeldata array
Geremia 1:ff019d22b275 75 * @param lenght: lenght (in shorts)
Geremia 1:ff019d22b275 76 *
Geremia 1:ff019d22b275 77 */
Geremia 4:12ba0ecc2c1f 78 virtual void wr_grambuf(unsigned short* data, unsigned int lenght);
Geremia 1:ff019d22b275 79
Geremia 5:b222a9461d6b 80 /** Read 16bit pixeldata from display controller (with dummy cycle)
Geremia 5:b222a9461d6b 81 *
Geremia 11:b842b8e332cb 82 * @param convert true/false. Convert 18bit to 16bit, some controllers returns 18bit
Geremia 5:b222a9461d6b 83 * @returns 16bit color
Geremia 5:b222a9461d6b 84 */
Geremia 11:b842b8e332cb 85 virtual unsigned short rd_gram(bool convert);
Geremia 5:b222a9461d6b 86
Geremia 7:bb0383b91104 87 /** Read 4x8bit register data (with dummy cycle)
Geremia 7:bb0383b91104 88 * @param reg the register to read
Geremia 7:bb0383b91104 89 * @returns data as uint
Geremia 7:bb0383b91104 90 *
Geremia 7:bb0383b91104 91 */
Geremia 7:bb0383b91104 92 virtual unsigned int rd_reg_data32(unsigned char reg);
Geremia 7:bb0383b91104 93
Geremia 7:bb0383b91104 94 /** Read 3x8bit ExtendedCommands register data
Geremia 7:bb0383b91104 95 * @param reg the register to read
Geremia 7:bb0383b91104 96 * @param SPIreadenablecmd vendor/device specific cmd to read EXTC registers
Geremia 7:bb0383b91104 97 * @returns data as uint
Geremia 7:bb0383b91104 98 * @note EXTC regs (0xB0 to 0xFF) are read/write registers but needs special cmd to be read in SPI mode
Geremia 7:bb0383b91104 99 */
Geremia 7:bb0383b91104 100 virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd);
Geremia 7:bb0383b91104 101
Geremia 1:ff019d22b275 102 /** HW reset sequence (without display init commands)
Geremia 1:ff019d22b275 103 */
Geremia 1:ff019d22b275 104 virtual void hw_reset();
Geremia 1:ff019d22b275 105
Geremia 1:ff019d22b275 106 /** Set ChipSelect high or low
Geremia 1:ff019d22b275 107 * @param enable 0/1
Geremia 1:ff019d22b275 108 */
Geremia 1:ff019d22b275 109 virtual void BusEnable(bool enable);
Geremia 1:ff019d22b275 110
Geremia 1:ff019d22b275 111 DigitalOut _CS;
Geremia 1:ff019d22b275 112
Geremia 1:ff019d22b275 113 private:
Geremia 1:ff019d22b275 114
Geremia 1:ff019d22b275 115 SPI _spi;
Geremia 1:ff019d22b275 116 DigitalOut _reset;
Geremia 1:ff019d22b275 117 DigitalOut _DC;
Geremia 1:ff019d22b275 118
Geremia 1:ff019d22b275 119 };
Geremia 1:ff019d22b275 120 #endif