Added SPI burst mode to spi 8 bit.
Dependents: Bicycl_Computer_NUCLEO-F411RE Bicycl_Computer_NUCLEO-L476RG
Fork of UniGraphic by
Added SPI burst mode to this graphics driver. If whoever wants this rolled in to repository let me know. I replaced _spi.write(); with fastWrite(); and clearRX();
SPI8.cpp
// need to re-create SPI firmware to access SPI handle static SPI_HandleTypeDef SpiHandle; void SPI8::fastWrite(int data) { SpiHandle.Instance = SPI1; // Check if data is transmitted while ((SpiHandle.Instance->SR & SPI_SR_TXE) == 0); SpiHandle.Instance->DR = data; } void SPI8::clearRX( void ) { SpiHandle.Instance = SPI1; //Check if the RX buffer is busy //While busy, keep checking while (SpiHandle.Instance->SR & SPI_SR_BSY){ // Check RX buffer readable while ((SpiHandle.Instance->SR & SPI_SR_RXNE) == 0); int dummy = SpiHandle.Instance->DR; } }
Inits/ILI9341.cpp@11:b842b8e332cb, 2015-02-20 (annotated)
- Committer:
- Geremia
- Date:
- Fri Feb 20 21:32:25 2015 +0000
- Revision:
- 11:b842b8e332cb
- Parent:
- 10:668cf78ff93a
- Child:
- 21:ae0a4eedfc90
added auto_gram_read_format() to TFt inits. Even if write is set to 16bit RGB color, for some controllers the read cmd outputs 18bit BGR. Now that function will autodetect and set internal flags accordingly, so pixelread() is always correct.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Geremia | 4:12ba0ecc2c1f | 1 | /* mbed UniGraphic library - Device specific class |
Geremia | 4:12ba0ecc2c1f | 2 | * Copyright (c) 2015 Giuliano Dianda |
Geremia | 4:12ba0ecc2c1f | 3 | * Released under the MIT License: http://mbed.org/license/mit |
Geremia | 4:12ba0ecc2c1f | 4 | */ |
Geremia | 4:12ba0ecc2c1f | 5 | |
Geremia | 2:713844a55c4e | 6 | #include "Protocols.h" |
Geremia | 2:713844a55c4e | 7 | #include "ILI9341.h" |
Geremia | 2:713844a55c4e | 8 | |
Geremia | 2:713844a55c4e | 9 | ////////////////////////////////////////////////////////////////////////////////// |
Geremia | 2:713844a55c4e | 10 | // display settings /////////////////////////////////////////////////////// |
Geremia | 2:713844a55c4e | 11 | ///////////////////////////////////////////////////////////////////////// |
Geremia | 2:713844a55c4e | 12 | |
dreschpe | 9:1749ae993cfe | 13 | // put in constructor |
dreschpe | 9:1749ae993cfe | 14 | //#define LCDSIZE_X 240 // display X pixels, TFTs are usually portrait view |
dreschpe | 9:1749ae993cfe | 15 | //#define LCDSIZE_Y 320 // display Y pixels |
Geremia | 2:713844a55c4e | 16 | |
Geremia | 2:713844a55c4e | 17 | |
Geremia | 2:713844a55c4e | 18 | |
dreschpe | 9:1749ae993cfe | 19 | ILI9341::ILI9341(proto_t displayproto, PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD, const char *name, unsigned int LCDSIZE_X, unsigned int LCDSIZE_Y) |
Geremia | 2:713844a55c4e | 20 | : TFT(displayproto, port, CS, reset, DC, WR, RD, LCDSIZE_X, LCDSIZE_Y, name) |
Geremia | 2:713844a55c4e | 21 | { |
Geremia | 2:713844a55c4e | 22 | hw_reset(); |
Geremia | 2:713844a55c4e | 23 | BusEnable(true); |
Geremia | 7:bb0383b91104 | 24 | identify(); // will collect tftID and set mipistd flag |
Geremia | 2:713844a55c4e | 25 | init(); |
Geremia | 11:b842b8e332cb | 26 | auto_gram_read_format(); |
Geremia | 4:12ba0ecc2c1f | 27 | set_orientation(0); |
Geremia | 2:713844a55c4e | 28 | cls(); |
Geremia | 10:668cf78ff93a | 29 | FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. |
Geremia | 2:713844a55c4e | 30 | locate(0,0); |
Geremia | 2:713844a55c4e | 31 | } |
dreschpe | 9:1749ae993cfe | 32 | ILI9341::ILI9341(proto_t displayproto, int Hz, PinName mosi, PinName miso, PinName sclk, PinName CS, PinName reset, PinName DC, const char *name, unsigned int LCDSIZE_X , unsigned int LCDSIZE_Y) |
Geremia | 2:713844a55c4e | 33 | : TFT(displayproto, Hz, mosi, miso, sclk, CS, reset, DC, LCDSIZE_X, LCDSIZE_Y, name) |
Geremia | 2:713844a55c4e | 34 | { |
Geremia | 2:713844a55c4e | 35 | hw_reset(); //TFT class forwards to Protocol class |
Geremia | 2:713844a55c4e | 36 | BusEnable(true); //TFT class forwards to Protocol class |
Geremia | 7:bb0383b91104 | 37 | identify(); // will collect tftID and set mipistd flag |
Geremia | 2:713844a55c4e | 38 | init(); // per display custom init cmd sequence, implemented here |
Geremia | 11:b842b8e332cb | 39 | auto_gram_read_format();// try to get read gram pixel format, could be 16bit or 18bit, RGB or BGR. Will set flags accordingly |
Geremia | 4:12ba0ecc2c1f | 40 | set_orientation(0); //TFT class does for MIPI standard and some ILIxxx |
Geremia | 10:668cf78ff93a | 41 | FastWindow(true); // most but not all controllers support this, even if datasheet tells they should. |
Geremia | 2:713844a55c4e | 42 | cls(); |
Geremia | 2:713844a55c4e | 43 | locate(0,0); |
Geremia | 2:713844a55c4e | 44 | } |
Geremia | 2:713844a55c4e | 45 | // reset and init the lcd controller |
Geremia | 2:713844a55c4e | 46 | void ILI9341::init() |
Geremia | 2:713844a55c4e | 47 | { |
Geremia | 2:713844a55c4e | 48 | /* Start Initial Sequence ----------------------------------------------------*/ |
Geremia | 2:713844a55c4e | 49 | |
Geremia | 2:713844a55c4e | 50 | wr_cmd8(0xCB); // POWER_ON_SEQ_CONTROL |
Geremia | 2:713844a55c4e | 51 | wr_data8(0x39); |
Geremia | 2:713844a55c4e | 52 | wr_data8(0x2C); |
Geremia | 2:713844a55c4e | 53 | wr_data8(0x00); |
Geremia | 2:713844a55c4e | 54 | wr_data8(0x34); |
Geremia | 2:713844a55c4e | 55 | wr_data8(0x02); |
Geremia | 2:713844a55c4e | 56 | |
Geremia | 2:713844a55c4e | 57 | wr_cmd8(0xCF); // POWER_CONTROL_B |
Geremia | 2:713844a55c4e | 58 | wr_data8(0x00); |
Geremia | 2:713844a55c4e | 59 | wr_data8(0xC1); // Applic Notes 81, was 83, C1 enables PCEQ: PC and EQ operation for power saving |
Geremia | 2:713844a55c4e | 60 | wr_data8(0x30); |
Geremia | 2:713844a55c4e | 61 | |
Geremia | 2:713844a55c4e | 62 | wr_cmd8(0xE8); // DRIVER_TIMING_CONTROL_A |
Geremia | 2:713844a55c4e | 63 | wr_data8(0x85); |
Geremia | 2:713844a55c4e | 64 | wr_data8(0x00); // AN 10, was 01 |
Geremia | 2:713844a55c4e | 65 | wr_data8(0x78); // AN 7A, was 79 |
Geremia | 2:713844a55c4e | 66 | |
Geremia | 2:713844a55c4e | 67 | wr_cmd8(0xEA); // DRIVER_TIMING_CONTROL_B |
Geremia | 2:713844a55c4e | 68 | wr_data8(0x00); |
Geremia | 2:713844a55c4e | 69 | wr_data8(0x00); |
Geremia | 2:713844a55c4e | 70 | |
Geremia | 2:713844a55c4e | 71 | wr_cmd8(0xED); |
Geremia | 2:713844a55c4e | 72 | wr_data8(0x64); |
Geremia | 2:713844a55c4e | 73 | wr_data8(0x03); |
Geremia | 2:713844a55c4e | 74 | wr_data8(0x12); |
Geremia | 2:713844a55c4e | 75 | wr_data8(0x81); |
Geremia | 2:713844a55c4e | 76 | |
Geremia | 2:713844a55c4e | 77 | wr_cmd8(0xF7); // PUMP_RATIO_CONTROL |
Geremia | 2:713844a55c4e | 78 | wr_data8(0x20); |
Geremia | 2:713844a55c4e | 79 | |
Geremia | 2:713844a55c4e | 80 | wr_cmd8(0xC0); // POWER_CONTROL_1 |
Geremia | 2:713844a55c4e | 81 | wr_data8(0x23); // AN 21, was 26 |
Geremia | 2:713844a55c4e | 82 | |
Geremia | 2:713844a55c4e | 83 | wr_cmd8(0xC1); // POWER_CONTROL_2 |
Geremia | 2:713844a55c4e | 84 | wr_data8(0x10); // AN 11, was 11 |
Geremia | 2:713844a55c4e | 85 | |
Geremia | 2:713844a55c4e | 86 | wr_cmd8(0xC5); // VCOM_CONTROL_1 |
Geremia | 2:713844a55c4e | 87 | wr_data8(0x3E); // AN 3F, was 35 |
Geremia | 2:713844a55c4e | 88 | wr_data8(0x28); // AN 3C, was 3E |
Geremia | 2:713844a55c4e | 89 | |
Geremia | 2:713844a55c4e | 90 | wr_cmd8(0xC7); // VCOM_CONTROL_2 |
Geremia | 2:713844a55c4e | 91 | wr_data8(0x86); // AN A7, was BE |
Geremia | 2:713844a55c4e | 92 | |
Geremia | 2:713844a55c4e | 93 | |
Geremia | 2:713844a55c4e | 94 | |
Geremia | 2:713844a55c4e | 95 | wr_cmd8(0xB1); // Frame Rate |
Geremia | 2:713844a55c4e | 96 | wr_data8(0x00); |
Geremia | 2:713844a55c4e | 97 | wr_data8(0x18); // AN 1B, was 1B 1B=70hz |
Geremia | 2:713844a55c4e | 98 | |
Geremia | 2:713844a55c4e | 99 | wr_cmd8(0xB6); // display function control, INTERESTING |
Geremia | 2:713844a55c4e | 100 | wr_data8(0x08); // AN 0A, was 0A |
Geremia | 2:713844a55c4e | 101 | wr_data8(0x82); // AN A2 |
Geremia | 2:713844a55c4e | 102 | wr_data8(0x27); // AN not present |
Geremia | 2:713844a55c4e | 103 | // wr_data8(0x00); // was present |
Geremia | 2:713844a55c4e | 104 | |
Geremia | 2:713844a55c4e | 105 | wr_cmd8(0xF2); // Gamma Function Disable |
Geremia | 2:713844a55c4e | 106 | wr_data8(0x00); // AN 00, was 08 |
Geremia | 2:713844a55c4e | 107 | |
Geremia | 2:713844a55c4e | 108 | wr_cmd8(0x26); |
Geremia | 2:713844a55c4e | 109 | wr_data8(0x01); // gamma set for curve 01/2/04/08 |
Geremia | 2:713844a55c4e | 110 | |
Geremia | 2:713844a55c4e | 111 | wr_cmd8(0xE0); // positive gamma correction |
Geremia | 2:713844a55c4e | 112 | wr_data8(0x0F); |
Geremia | 2:713844a55c4e | 113 | wr_data8(0x31); |
Geremia | 2:713844a55c4e | 114 | wr_data8(0x2B); |
Geremia | 2:713844a55c4e | 115 | wr_data8(0x0C); |
Geremia | 2:713844a55c4e | 116 | wr_data8(0x0E); |
Geremia | 2:713844a55c4e | 117 | wr_data8(0x08); |
Geremia | 2:713844a55c4e | 118 | wr_data8(0x4E); |
Geremia | 2:713844a55c4e | 119 | wr_data8(0xF1); |
Geremia | 2:713844a55c4e | 120 | wr_data8(0x37); |
Geremia | 2:713844a55c4e | 121 | wr_data8(0x07); |
Geremia | 2:713844a55c4e | 122 | wr_data8(0x10); |
Geremia | 2:713844a55c4e | 123 | wr_data8(0x03); |
Geremia | 2:713844a55c4e | 124 | wr_data8(0x0E); |
Geremia | 2:713844a55c4e | 125 | wr_data8(0x09); |
Geremia | 2:713844a55c4e | 126 | wr_data8(0x00); |
Geremia | 2:713844a55c4e | 127 | |
Geremia | 2:713844a55c4e | 128 | wr_cmd8(0xE1); // negativ gamma correction |
Geremia | 2:713844a55c4e | 129 | wr_data8(0x00); |
Geremia | 2:713844a55c4e | 130 | wr_data8(0x0E); |
Geremia | 2:713844a55c4e | 131 | wr_data8(0x14); |
Geremia | 2:713844a55c4e | 132 | wr_data8(0x03); |
Geremia | 2:713844a55c4e | 133 | wr_data8(0x11); |
Geremia | 2:713844a55c4e | 134 | wr_data8(0x07); |
Geremia | 2:713844a55c4e | 135 | wr_data8(0x31); |
Geremia | 2:713844a55c4e | 136 | wr_data8(0xC1); |
Geremia | 2:713844a55c4e | 137 | wr_data8(0x48); |
Geremia | 2:713844a55c4e | 138 | wr_data8(0x08); |
Geremia | 2:713844a55c4e | 139 | wr_data8(0x0F); |
Geremia | 2:713844a55c4e | 140 | wr_data8(0x0C); |
Geremia | 2:713844a55c4e | 141 | wr_data8(0x31); |
Geremia | 2:713844a55c4e | 142 | wr_data8(0x36); |
Geremia | 2:713844a55c4e | 143 | wr_data8(0x0F); |
Geremia | 2:713844a55c4e | 144 | |
Geremia | 2:713844a55c4e | 145 | //wr_cmd8(0x34); // tearing effect off |
Geremia | 2:713844a55c4e | 146 | |
Geremia | 2:713844a55c4e | 147 | //wr_cmd8(0x35); // tearing effect on |
Geremia | 2:713844a55c4e | 148 | |
Geremia | 2:713844a55c4e | 149 | // wr_cmd8(0xB7); // ENTRY_MODE_SET |
Geremia | 2:713844a55c4e | 150 | // wr_data8(0x07); |
Geremia | 4:12ba0ecc2c1f | 151 | |
Geremia | 4:12ba0ecc2c1f | 152 | wr_cmd8(0x36); // MEMORY_ACCESS_CONTROL (orientation stuff) |
Geremia | 4:12ba0ecc2c1f | 153 | wr_data8(0x48); |
Geremia | 4:12ba0ecc2c1f | 154 | |
Geremia | 4:12ba0ecc2c1f | 155 | wr_cmd8(0x3A); // COLMOD_PIXEL_FORMAT_SET |
Geremia | 4:12ba0ecc2c1f | 156 | wr_data8(0x55); // 16 bit pixel |
Geremia | 4:12ba0ecc2c1f | 157 | |
Geremia | 4:12ba0ecc2c1f | 158 | wr_cmd8(0x13); // Nomal Displaymode |
Geremia | 4:12ba0ecc2c1f | 159 | |
Geremia | 2:713844a55c4e | 160 | wr_cmd8(0x11); // sleep out |
Geremia | 2:713844a55c4e | 161 | wait_ms(150); |
Geremia | 2:713844a55c4e | 162 | |
Geremia | 2:713844a55c4e | 163 | wr_cmd8(0x29); // display on |
Geremia | 2:713844a55c4e | 164 | wait_ms(150); |
Geremia | 2:713844a55c4e | 165 | |
Geremia | 2:713844a55c4e | 166 | } |