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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_tim_ex.c@308:59cc78a25982, 2014-09-05 (annotated)
- Committer:
- todotani
- Date:
- Fri Sep 05 14:20:33 2014 +0000
- Revision:
- 308:59cc78a25982
- Parent:
- 237:f3da66175598
BLE_Health_Thermometer for mbed HRM1017 with BLE library 0.1.0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 237:f3da66175598 | 1 | /** |
mbed_official | 237:f3da66175598 | 2 | ****************************************************************************** |
mbed_official | 237:f3da66175598 | 3 | * @file stm32f3xx_hal_tim_ex.c |
mbed_official | 237:f3da66175598 | 4 | * @author MCD Application Team |
mbed_official | 237:f3da66175598 | 5 | * @version V1.0.1 |
mbed_official | 237:f3da66175598 | 6 | * @date 18-June-2014 |
mbed_official | 237:f3da66175598 | 7 | * @brief TIM HAL module driver. |
mbed_official | 237:f3da66175598 | 8 | * This file provides firmware functions to manage the following |
mbed_official | 237:f3da66175598 | 9 | * functionalities of the Timer extension peripheral: |
mbed_official | 237:f3da66175598 | 10 | * + Time Hall Sensor Interface Initialization |
mbed_official | 237:f3da66175598 | 11 | * + Time Hall Sensor Interface Start |
mbed_official | 237:f3da66175598 | 12 | * + Time Complementary signal bread and dead time configuration |
mbed_official | 237:f3da66175598 | 13 | * + Time Master and Slave synchronization configuration |
mbed_official | 237:f3da66175598 | 14 | * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6) |
mbed_official | 237:f3da66175598 | 15 | * + Time OCRef clear configuration |
mbed_official | 237:f3da66175598 | 16 | * + Timer remapping capabilities configuration |
mbed_official | 237:f3da66175598 | 17 | @verbatim |
mbed_official | 237:f3da66175598 | 18 | ============================================================================== |
mbed_official | 237:f3da66175598 | 19 | ##### TIMER Extended features ##### |
mbed_official | 237:f3da66175598 | 20 | ============================================================================== |
mbed_official | 237:f3da66175598 | 21 | [..] |
mbed_official | 237:f3da66175598 | 22 | The Timer Extension features include: |
mbed_official | 237:f3da66175598 | 23 | (#) Complementary outputs with programmable dead-time for : |
mbed_official | 237:f3da66175598 | 24 | (++) Output Compare |
mbed_official | 237:f3da66175598 | 25 | (++) PWM generation (Edge and Center-aligned Mode) |
mbed_official | 237:f3da66175598 | 26 | (++) One-pulse mode output |
mbed_official | 237:f3da66175598 | 27 | (#) Synchronization circuit to control the timer with external signals and to |
mbed_official | 237:f3da66175598 | 28 | interconnect several timers together. |
mbed_official | 237:f3da66175598 | 29 | (#) Break input to put the timer output signals in reset state or in a known state. |
mbed_official | 237:f3da66175598 | 30 | (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for |
mbed_official | 237:f3da66175598 | 31 | positioning purposes |
mbed_official | 237:f3da66175598 | 32 | |
mbed_official | 237:f3da66175598 | 33 | ##### How to use this driver ##### |
mbed_official | 237:f3da66175598 | 34 | ============================================================================== |
mbed_official | 237:f3da66175598 | 35 | [..] |
mbed_official | 237:f3da66175598 | 36 | (#) Initialize the TIM low level resources by implementing the following functions |
mbed_official | 237:f3da66175598 | 37 | depending from feature used : |
mbed_official | 237:f3da66175598 | 38 | (++) Complementary Output Compare : HAL_TIM_OC_MspInit() |
mbed_official | 237:f3da66175598 | 39 | (++) Complementary PWM generation : HAL_TIM_PWM_MspInit() |
mbed_official | 237:f3da66175598 | 40 | (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit() |
mbed_official | 237:f3da66175598 | 41 | (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit() |
mbed_official | 237:f3da66175598 | 42 | |
mbed_official | 237:f3da66175598 | 43 | (#) Initialize the TIM low level resources : |
mbed_official | 237:f3da66175598 | 44 | (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE(); |
mbed_official | 237:f3da66175598 | 45 | (##) TIM pins configuration |
mbed_official | 237:f3da66175598 | 46 | (+++) Enable the clock for the TIM GPIOs using the following function: |
mbed_official | 237:f3da66175598 | 47 | __GPIOx_CLK_ENABLE(); |
mbed_official | 237:f3da66175598 | 48 | (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); |
mbed_official | 237:f3da66175598 | 49 | |
mbed_official | 237:f3da66175598 | 50 | (#) The external Clock can be configured, if needed (the default clock is the |
mbed_official | 237:f3da66175598 | 51 | internal clock from the APBx), using the following function: |
mbed_official | 237:f3da66175598 | 52 | HAL_TIM_ConfigClockSource, the clock configuration should be done before |
mbed_official | 237:f3da66175598 | 53 | any start function. |
mbed_official | 237:f3da66175598 | 54 | |
mbed_official | 237:f3da66175598 | 55 | (#) Configure the TIM in the desired functioning mode using one of the |
mbed_official | 237:f3da66175598 | 56 | initialization function of this driver: |
mbed_official | 237:f3da66175598 | 57 | (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the |
mbed_official | 237:f3da66175598 | 58 | Timer Hall Sensor Interface and the commutation event with the corresponding |
mbed_official | 237:f3da66175598 | 59 | Interrupt and DMA request if needed (Note that One Timer is used to interface |
mbed_official | 237:f3da66175598 | 60 | with the Hall sensor Interface and another Timer should be used to use |
mbed_official | 237:f3da66175598 | 61 | the commutation event). |
mbed_official | 237:f3da66175598 | 62 | |
mbed_official | 237:f3da66175598 | 63 | (#) Activate the TIM peripheral using one of the start functions: |
mbed_official | 237:f3da66175598 | 64 | (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() |
mbed_official | 237:f3da66175598 | 65 | (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() |
mbed_official | 237:f3da66175598 | 66 | (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() |
mbed_official | 237:f3da66175598 | 67 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). |
mbed_official | 237:f3da66175598 | 68 | |
mbed_official | 237:f3da66175598 | 69 | |
mbed_official | 237:f3da66175598 | 70 | @endverbatim |
mbed_official | 237:f3da66175598 | 71 | ****************************************************************************** |
mbed_official | 237:f3da66175598 | 72 | * @attention |
mbed_official | 237:f3da66175598 | 73 | * |
mbed_official | 237:f3da66175598 | 74 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 237:f3da66175598 | 75 | * |
mbed_official | 237:f3da66175598 | 76 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 237:f3da66175598 | 77 | * are permitted provided that the following conditions are met: |
mbed_official | 237:f3da66175598 | 78 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 237:f3da66175598 | 79 | * this list of conditions and the following disclaimer. |
mbed_official | 237:f3da66175598 | 80 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 237:f3da66175598 | 81 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 237:f3da66175598 | 82 | * and/or other materials provided with the distribution. |
mbed_official | 237:f3da66175598 | 83 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 237:f3da66175598 | 84 | * may be used to endorse or promote products derived from this software |
mbed_official | 237:f3da66175598 | 85 | * without specific prior written permission. |
mbed_official | 237:f3da66175598 | 86 | * |
mbed_official | 237:f3da66175598 | 87 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 237:f3da66175598 | 88 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 237:f3da66175598 | 89 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 237:f3da66175598 | 90 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 237:f3da66175598 | 91 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 237:f3da66175598 | 92 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 237:f3da66175598 | 93 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 237:f3da66175598 | 94 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 237:f3da66175598 | 95 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 237:f3da66175598 | 96 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 237:f3da66175598 | 97 | * |
mbed_official | 237:f3da66175598 | 98 | ****************************************************************************** |
mbed_official | 237:f3da66175598 | 99 | */ |
mbed_official | 237:f3da66175598 | 100 | |
mbed_official | 237:f3da66175598 | 101 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 102 | #include "stm32f3xx_hal.h" |
mbed_official | 237:f3da66175598 | 103 | |
mbed_official | 237:f3da66175598 | 104 | /** @addtogroup STM32F3xx_HAL_Driver |
mbed_official | 237:f3da66175598 | 105 | * @{ |
mbed_official | 237:f3da66175598 | 106 | */ |
mbed_official | 237:f3da66175598 | 107 | |
mbed_official | 237:f3da66175598 | 108 | /** @defgroup TIMEx |
mbed_official | 237:f3da66175598 | 109 | * @brief TIM Extended HAL module driver |
mbed_official | 237:f3da66175598 | 110 | * @{ |
mbed_official | 237:f3da66175598 | 111 | */ |
mbed_official | 237:f3da66175598 | 112 | |
mbed_official | 237:f3da66175598 | 113 | #ifdef HAL_TIM_MODULE_ENABLED |
mbed_official | 237:f3da66175598 | 114 | |
mbed_official | 237:f3da66175598 | 115 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 116 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 117 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
mbed_official | 237:f3da66175598 | 118 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
mbed_official | 237:f3da66175598 | 119 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
mbed_official | 237:f3da66175598 | 120 | #define BDTR_BKF_SHIFT (16) |
mbed_official | 237:f3da66175598 | 121 | #define BDTR_BK2F_SHIFT (20) |
mbed_official | 237:f3da66175598 | 122 | #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
mbed_official | 237:f3da66175598 | 123 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
mbed_official | 237:f3da66175598 | 124 | /* STM32F303x8 || STM32F334x8 || STM32F328xx */ |
mbed_official | 237:f3da66175598 | 125 | |
mbed_official | 237:f3da66175598 | 126 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 127 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 128 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 129 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
mbed_official | 237:f3da66175598 | 130 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
mbed_official | 237:f3da66175598 | 131 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
mbed_official | 237:f3da66175598 | 132 | static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, |
mbed_official | 237:f3da66175598 | 133 | TIM_OC_InitTypeDef *OC_Config); |
mbed_official | 237:f3da66175598 | 134 | |
mbed_official | 237:f3da66175598 | 135 | static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, |
mbed_official | 237:f3da66175598 | 136 | TIM_OC_InitTypeDef *OC_Config); |
mbed_official | 237:f3da66175598 | 137 | #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
mbed_official | 237:f3da66175598 | 138 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
mbed_official | 237:f3da66175598 | 139 | /* STM32F303x8 || STM32F334x8 || STM32F328xx */ |
mbed_official | 237:f3da66175598 | 140 | |
mbed_official | 237:f3da66175598 | 141 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); |
mbed_official | 237:f3da66175598 | 142 | |
mbed_official | 237:f3da66175598 | 143 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 237:f3da66175598 | 144 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
mbed_official | 237:f3da66175598 | 145 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
mbed_official | 237:f3da66175598 | 146 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
mbed_official | 237:f3da66175598 | 147 | /** |
mbed_official | 237:f3da66175598 | 148 | * @brief Timer Ouput Compare 5 configuration |
mbed_official | 237:f3da66175598 | 149 | * @param TIMx to select the TIM peripheral |
mbed_official | 237:f3da66175598 | 150 | * @param OC_Config: The ouput configuration structure |
mbed_official | 237:f3da66175598 | 151 | * @retval None |
mbed_official | 237:f3da66175598 | 152 | */ |
mbed_official | 237:f3da66175598 | 153 | static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, |
mbed_official | 237:f3da66175598 | 154 | TIM_OC_InitTypeDef *OC_Config) |
mbed_official | 237:f3da66175598 | 155 | { |
mbed_official | 237:f3da66175598 | 156 | uint32_t tmpccmrx = 0; |
mbed_official | 237:f3da66175598 | 157 | uint32_t tmpccer = 0; |
mbed_official | 237:f3da66175598 | 158 | uint32_t tmpcr2 = 0; |
mbed_official | 237:f3da66175598 | 159 | |
mbed_official | 237:f3da66175598 | 160 | /* Disable the output: Reset the CCxE Bit */ |
mbed_official | 237:f3da66175598 | 161 | TIMx->CCER &= ~TIM_CCER_CC5E; |
mbed_official | 237:f3da66175598 | 162 | |
mbed_official | 237:f3da66175598 | 163 | /* Get the TIMx CCER register value */ |
mbed_official | 237:f3da66175598 | 164 | tmpccer = TIMx->CCER; |
mbed_official | 237:f3da66175598 | 165 | /* Get the TIMx CR2 register value */ |
mbed_official | 237:f3da66175598 | 166 | tmpcr2 = TIMx->CR2; |
mbed_official | 237:f3da66175598 | 167 | /* Get the TIMx CCMR1 register value */ |
mbed_official | 237:f3da66175598 | 168 | tmpccmrx = TIMx->CCMR3; |
mbed_official | 237:f3da66175598 | 169 | |
mbed_official | 237:f3da66175598 | 170 | /* Reset the Output Compare Mode Bits */ |
mbed_official | 237:f3da66175598 | 171 | tmpccmrx &= ~(TIM_CCMR3_OC5M); |
mbed_official | 237:f3da66175598 | 172 | /* Select the Output Compare Mode */ |
mbed_official | 237:f3da66175598 | 173 | tmpccmrx |= OC_Config->OCMode; |
mbed_official | 237:f3da66175598 | 174 | |
mbed_official | 237:f3da66175598 | 175 | /* Reset the Output Polarity level */ |
mbed_official | 237:f3da66175598 | 176 | tmpccer &= ~TIM_CCER_CC5P; |
mbed_official | 237:f3da66175598 | 177 | /* Set the Output Compare Polarity */ |
mbed_official | 237:f3da66175598 | 178 | tmpccer |= (OC_Config->OCPolarity << 16); |
mbed_official | 237:f3da66175598 | 179 | |
mbed_official | 237:f3da66175598 | 180 | if(IS_TIM_BREAK_INSTANCE(TIMx)) |
mbed_official | 237:f3da66175598 | 181 | { |
mbed_official | 237:f3da66175598 | 182 | /* Reset the Output Compare IDLE State */ |
mbed_official | 237:f3da66175598 | 183 | tmpcr2 &= ~TIM_CR2_OIS5; |
mbed_official | 237:f3da66175598 | 184 | /* Set the Output Idle state */ |
mbed_official | 237:f3da66175598 | 185 | tmpcr2 |= (OC_Config->OCIdleState << 8); |
mbed_official | 237:f3da66175598 | 186 | } |
mbed_official | 237:f3da66175598 | 187 | /* Write to TIMx CR2 */ |
mbed_official | 237:f3da66175598 | 188 | TIMx->CR2 = tmpcr2; |
mbed_official | 237:f3da66175598 | 189 | |
mbed_official | 237:f3da66175598 | 190 | /* Write to TIMx CCMR3 */ |
mbed_official | 237:f3da66175598 | 191 | TIMx->CCMR3 = tmpccmrx; |
mbed_official | 237:f3da66175598 | 192 | |
mbed_official | 237:f3da66175598 | 193 | /* Set the Capture Compare Register value */ |
mbed_official | 237:f3da66175598 | 194 | TIMx->CCR5 = OC_Config->Pulse; |
mbed_official | 237:f3da66175598 | 195 | |
mbed_official | 237:f3da66175598 | 196 | /* Write to TIMx CCER */ |
mbed_official | 237:f3da66175598 | 197 | TIMx->CCER = tmpccer; |
mbed_official | 237:f3da66175598 | 198 | } |
mbed_official | 237:f3da66175598 | 199 | |
mbed_official | 237:f3da66175598 | 200 | /** |
mbed_official | 237:f3da66175598 | 201 | * @brief Timer Ouput Compare 6 configuration |
mbed_official | 237:f3da66175598 | 202 | * @param TIMx to select the TIM peripheral |
mbed_official | 237:f3da66175598 | 203 | * @param OC_Config: The ouput configuration structure |
mbed_official | 237:f3da66175598 | 204 | * @retval None |
mbed_official | 237:f3da66175598 | 205 | */ |
mbed_official | 237:f3da66175598 | 206 | static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, |
mbed_official | 237:f3da66175598 | 207 | TIM_OC_InitTypeDef *OC_Config) |
mbed_official | 237:f3da66175598 | 208 | { |
mbed_official | 237:f3da66175598 | 209 | uint32_t tmpccmrx = 0; |
mbed_official | 237:f3da66175598 | 210 | uint32_t tmpccer = 0; |
mbed_official | 237:f3da66175598 | 211 | uint32_t tmpcr2 = 0; |
mbed_official | 237:f3da66175598 | 212 | |
mbed_official | 237:f3da66175598 | 213 | /* Disable the output: Reset the CCxE Bit */ |
mbed_official | 237:f3da66175598 | 214 | TIMx->CCER &= ~TIM_CCER_CC6E; |
mbed_official | 237:f3da66175598 | 215 | |
mbed_official | 237:f3da66175598 | 216 | /* Get the TIMx CCER register value */ |
mbed_official | 237:f3da66175598 | 217 | tmpccer = TIMx->CCER; |
mbed_official | 237:f3da66175598 | 218 | /* Get the TIMx CR2 register value */ |
mbed_official | 237:f3da66175598 | 219 | tmpcr2 = TIMx->CR2; |
mbed_official | 237:f3da66175598 | 220 | /* Get the TIMx CCMR1 register value */ |
mbed_official | 237:f3da66175598 | 221 | tmpccmrx = TIMx->CCMR3; |
mbed_official | 237:f3da66175598 | 222 | |
mbed_official | 237:f3da66175598 | 223 | /* Reset the Output Compare Mode Bits */ |
mbed_official | 237:f3da66175598 | 224 | tmpccmrx &= ~(TIM_CCMR3_OC6M); |
mbed_official | 237:f3da66175598 | 225 | /* Select the Output Compare Mode */ |
mbed_official | 237:f3da66175598 | 226 | tmpccmrx |= (OC_Config->OCMode << 8); |
mbed_official | 237:f3da66175598 | 227 | |
mbed_official | 237:f3da66175598 | 228 | /* Reset the Output Polarity level */ |
mbed_official | 237:f3da66175598 | 229 | tmpccer &= (uint32_t)~TIM_CCER_CC6P; |
mbed_official | 237:f3da66175598 | 230 | /* Set the Output Compare Polarity */ |
mbed_official | 237:f3da66175598 | 231 | tmpccer |= (OC_Config->OCPolarity << 20); |
mbed_official | 237:f3da66175598 | 232 | |
mbed_official | 237:f3da66175598 | 233 | if(IS_TIM_BREAK_INSTANCE(TIMx)) |
mbed_official | 237:f3da66175598 | 234 | { |
mbed_official | 237:f3da66175598 | 235 | /* Reset the Output Compare IDLE State */ |
mbed_official | 237:f3da66175598 | 236 | tmpcr2 &= ~TIM_CR2_OIS6; |
mbed_official | 237:f3da66175598 | 237 | /* Set the Output Idle state */ |
mbed_official | 237:f3da66175598 | 238 | tmpcr2 |= (OC_Config->OCIdleState << 10); |
mbed_official | 237:f3da66175598 | 239 | } |
mbed_official | 237:f3da66175598 | 240 | |
mbed_official | 237:f3da66175598 | 241 | /* Write to TIMx CR2 */ |
mbed_official | 237:f3da66175598 | 242 | TIMx->CR2 = tmpcr2; |
mbed_official | 237:f3da66175598 | 243 | |
mbed_official | 237:f3da66175598 | 244 | /* Write to TIMx CCMR3 */ |
mbed_official | 237:f3da66175598 | 245 | TIMx->CCMR3 = tmpccmrx; |
mbed_official | 237:f3da66175598 | 246 | |
mbed_official | 237:f3da66175598 | 247 | /* Set the Capture Compare Register value */ |
mbed_official | 237:f3da66175598 | 248 | TIMx->CCR6 = OC_Config->Pulse; |
mbed_official | 237:f3da66175598 | 249 | |
mbed_official | 237:f3da66175598 | 250 | /* Write to TIMx CCER */ |
mbed_official | 237:f3da66175598 | 251 | TIMx->CCER = tmpccer; |
mbed_official | 237:f3da66175598 | 252 | } |
mbed_official | 237:f3da66175598 | 253 | #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
mbed_official | 237:f3da66175598 | 254 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
mbed_official | 237:f3da66175598 | 255 | /* STM32F303x8 || STM32F334x8 || STM32F328xx */ |
mbed_official | 237:f3da66175598 | 256 | |
mbed_official | 237:f3da66175598 | 257 | /** @defgroup TIMEx_Private_Functions |
mbed_official | 237:f3da66175598 | 258 | * @{ |
mbed_official | 237:f3da66175598 | 259 | */ |
mbed_official | 237:f3da66175598 | 260 | |
mbed_official | 237:f3da66175598 | 261 | /** @defgroup TIMEx_Group1 Timer Hall Sensor functions |
mbed_official | 237:f3da66175598 | 262 | * @brief Timer Hall Sensor functions |
mbed_official | 237:f3da66175598 | 263 | * |
mbed_official | 237:f3da66175598 | 264 | @verbatim |
mbed_official | 237:f3da66175598 | 265 | ============================================================================== |
mbed_official | 237:f3da66175598 | 266 | ##### Timer Hall Sensor functions ##### |
mbed_official | 237:f3da66175598 | 267 | ============================================================================== |
mbed_official | 237:f3da66175598 | 268 | [..] |
mbed_official | 237:f3da66175598 | 269 | This section provides functions allowing to: |
mbed_official | 237:f3da66175598 | 270 | (+) Initialize and configure TIM HAL Sensor. |
mbed_official | 237:f3da66175598 | 271 | (+) De-initialize TIM HAL Sensor. |
mbed_official | 237:f3da66175598 | 272 | (+) Start the Hall Sensor Interface. |
mbed_official | 237:f3da66175598 | 273 | (+) Stop the Hall Sensor Interface. |
mbed_official | 237:f3da66175598 | 274 | (+) Start the Hall Sensor Interface and enable interrupts. |
mbed_official | 237:f3da66175598 | 275 | (+) Stop the Hall Sensor Interface and disable interrupts. |
mbed_official | 237:f3da66175598 | 276 | (+) Start the Hall Sensor Interface and enable DMA transfers. |
mbed_official | 237:f3da66175598 | 277 | (+) Stop the Hall Sensor Interface and disable DMA transfers. |
mbed_official | 237:f3da66175598 | 278 | |
mbed_official | 237:f3da66175598 | 279 | @endverbatim |
mbed_official | 237:f3da66175598 | 280 | * @{ |
mbed_official | 237:f3da66175598 | 281 | */ |
mbed_official | 237:f3da66175598 | 282 | /** |
mbed_official | 237:f3da66175598 | 283 | * @brief Initializes the TIM Hall Sensor Interface and create the associated handle. |
mbed_official | 237:f3da66175598 | 284 | * @param htim: TIM Encoder Interface handle |
mbed_official | 237:f3da66175598 | 285 | * @param sConfig: TIM Hall Sensor configuration structure |
mbed_official | 237:f3da66175598 | 286 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 287 | */ |
mbed_official | 237:f3da66175598 | 288 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) |
mbed_official | 237:f3da66175598 | 289 | { |
mbed_official | 237:f3da66175598 | 290 | TIM_OC_InitTypeDef OC_Config; |
mbed_official | 237:f3da66175598 | 291 | |
mbed_official | 237:f3da66175598 | 292 | /* Check the TIM handle allocation */ |
mbed_official | 237:f3da66175598 | 293 | if(htim == NULL) |
mbed_official | 237:f3da66175598 | 294 | { |
mbed_official | 237:f3da66175598 | 295 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 296 | } |
mbed_official | 237:f3da66175598 | 297 | |
mbed_official | 237:f3da66175598 | 298 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 299 | assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); |
mbed_official | 237:f3da66175598 | 300 | assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); |
mbed_official | 237:f3da66175598 | 301 | assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); |
mbed_official | 237:f3da66175598 | 302 | assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); |
mbed_official | 237:f3da66175598 | 303 | assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); |
mbed_official | 237:f3da66175598 | 304 | |
mbed_official | 237:f3da66175598 | 305 | /* Set the TIM state */ |
mbed_official | 237:f3da66175598 | 306 | htim->State= HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 307 | |
mbed_official | 237:f3da66175598 | 308 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
mbed_official | 237:f3da66175598 | 309 | HAL_TIMEx_HallSensor_MspInit(htim); |
mbed_official | 237:f3da66175598 | 310 | |
mbed_official | 237:f3da66175598 | 311 | /* Configure the Time base in the Encoder Mode */ |
mbed_official | 237:f3da66175598 | 312 | TIM_Base_SetConfig(htim->Instance, &htim->Init); |
mbed_official | 237:f3da66175598 | 313 | |
mbed_official | 237:f3da66175598 | 314 | /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ |
mbed_official | 237:f3da66175598 | 315 | TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); |
mbed_official | 237:f3da66175598 | 316 | |
mbed_official | 237:f3da66175598 | 317 | /* Reset the IC1PSC Bits */ |
mbed_official | 237:f3da66175598 | 318 | htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; |
mbed_official | 237:f3da66175598 | 319 | /* Set the IC1PSC value */ |
mbed_official | 237:f3da66175598 | 320 | htim->Instance->CCMR1 |= sConfig->IC1Prescaler; |
mbed_official | 237:f3da66175598 | 321 | |
mbed_official | 237:f3da66175598 | 322 | /* Enable the Hall sensor interface (XOR function of the three inputs) */ |
mbed_official | 237:f3da66175598 | 323 | htim->Instance->CR2 |= TIM_CR2_TI1S; |
mbed_official | 237:f3da66175598 | 324 | |
mbed_official | 237:f3da66175598 | 325 | /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ |
mbed_official | 237:f3da66175598 | 326 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
mbed_official | 237:f3da66175598 | 327 | htim->Instance->SMCR |= TIM_TS_TI1F_ED; |
mbed_official | 237:f3da66175598 | 328 | |
mbed_official | 237:f3da66175598 | 329 | /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ |
mbed_official | 237:f3da66175598 | 330 | htim->Instance->SMCR &= ~TIM_SMCR_SMS; |
mbed_official | 237:f3da66175598 | 331 | htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; |
mbed_official | 237:f3da66175598 | 332 | |
mbed_official | 237:f3da66175598 | 333 | /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ |
mbed_official | 237:f3da66175598 | 334 | OC_Config.OCFastMode = TIM_OCFAST_DISABLE; |
mbed_official | 237:f3da66175598 | 335 | OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; |
mbed_official | 237:f3da66175598 | 336 | OC_Config.OCMode = TIM_OCMODE_PWM2; |
mbed_official | 237:f3da66175598 | 337 | OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
mbed_official | 237:f3da66175598 | 338 | OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; |
mbed_official | 237:f3da66175598 | 339 | OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; |
mbed_official | 237:f3da66175598 | 340 | OC_Config.Pulse = sConfig->Commutation_Delay; |
mbed_official | 237:f3da66175598 | 341 | |
mbed_official | 237:f3da66175598 | 342 | TIM_OC2_SetConfig(htim->Instance, &OC_Config); |
mbed_official | 237:f3da66175598 | 343 | |
mbed_official | 237:f3da66175598 | 344 | /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 |
mbed_official | 237:f3da66175598 | 345 | register to 101 */ |
mbed_official | 237:f3da66175598 | 346 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
mbed_official | 237:f3da66175598 | 347 | htim->Instance->CR2 |= TIM_TRGO_OC2REF; |
mbed_official | 237:f3da66175598 | 348 | |
mbed_official | 237:f3da66175598 | 349 | /* Initialize the TIM state*/ |
mbed_official | 237:f3da66175598 | 350 | htim->State= HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 351 | |
mbed_official | 237:f3da66175598 | 352 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 353 | } |
mbed_official | 237:f3da66175598 | 354 | |
mbed_official | 237:f3da66175598 | 355 | /** |
mbed_official | 237:f3da66175598 | 356 | * @brief DeInitializes the TIM Hall Sensor interface |
mbed_official | 237:f3da66175598 | 357 | * @param htim: TIM Hall Sensor handle |
mbed_official | 237:f3da66175598 | 358 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 359 | */ |
mbed_official | 237:f3da66175598 | 360 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 361 | { |
mbed_official | 237:f3da66175598 | 362 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 363 | assert_param(IS_TIM_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 364 | |
mbed_official | 237:f3da66175598 | 365 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 366 | |
mbed_official | 237:f3da66175598 | 367 | /* Disable the TIM Peripheral Clock */ |
mbed_official | 237:f3da66175598 | 368 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 369 | |
mbed_official | 237:f3da66175598 | 370 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
mbed_official | 237:f3da66175598 | 371 | HAL_TIMEx_HallSensor_MspDeInit(htim); |
mbed_official | 237:f3da66175598 | 372 | |
mbed_official | 237:f3da66175598 | 373 | /* Change TIM state */ |
mbed_official | 237:f3da66175598 | 374 | htim->State = HAL_TIM_STATE_RESET; |
mbed_official | 237:f3da66175598 | 375 | |
mbed_official | 237:f3da66175598 | 376 | /* Release Lock */ |
mbed_official | 237:f3da66175598 | 377 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 378 | |
mbed_official | 237:f3da66175598 | 379 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 380 | } |
mbed_official | 237:f3da66175598 | 381 | |
mbed_official | 237:f3da66175598 | 382 | /** |
mbed_official | 237:f3da66175598 | 383 | * @brief Initializes the TIM Hall Sensor MSP. |
mbed_official | 237:f3da66175598 | 384 | * @param htim: TIM handle |
mbed_official | 237:f3da66175598 | 385 | * @retval None |
mbed_official | 237:f3da66175598 | 386 | */ |
mbed_official | 237:f3da66175598 | 387 | __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 388 | { |
mbed_official | 237:f3da66175598 | 389 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 237:f3da66175598 | 390 | the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file |
mbed_official | 237:f3da66175598 | 391 | */ |
mbed_official | 237:f3da66175598 | 392 | } |
mbed_official | 237:f3da66175598 | 393 | |
mbed_official | 237:f3da66175598 | 394 | /** |
mbed_official | 237:f3da66175598 | 395 | * @brief DeInitializes TIM Hall Sensor MSP. |
mbed_official | 237:f3da66175598 | 396 | * @param htim: TIM handle |
mbed_official | 237:f3da66175598 | 397 | * @retval None |
mbed_official | 237:f3da66175598 | 398 | */ |
mbed_official | 237:f3da66175598 | 399 | __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 400 | { |
mbed_official | 237:f3da66175598 | 401 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 237:f3da66175598 | 402 | the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file |
mbed_official | 237:f3da66175598 | 403 | */ |
mbed_official | 237:f3da66175598 | 404 | } |
mbed_official | 237:f3da66175598 | 405 | |
mbed_official | 237:f3da66175598 | 406 | /** |
mbed_official | 237:f3da66175598 | 407 | * @brief Starts the TIM Hall Sensor Interface. |
mbed_official | 237:f3da66175598 | 408 | * @param htim : TIM Hall Sensor handle |
mbed_official | 237:f3da66175598 | 409 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 410 | */ |
mbed_official | 237:f3da66175598 | 411 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 412 | { |
mbed_official | 237:f3da66175598 | 413 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 414 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 415 | |
mbed_official | 237:f3da66175598 | 416 | /* Enable the Input Capture channels 1 |
mbed_official | 237:f3da66175598 | 417 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 237:f3da66175598 | 418 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
mbed_official | 237:f3da66175598 | 419 | |
mbed_official | 237:f3da66175598 | 420 | /* Enable the Peripheral */ |
mbed_official | 237:f3da66175598 | 421 | __HAL_TIM_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 422 | |
mbed_official | 237:f3da66175598 | 423 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 424 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 425 | } |
mbed_official | 237:f3da66175598 | 426 | |
mbed_official | 237:f3da66175598 | 427 | /** |
mbed_official | 237:f3da66175598 | 428 | * @brief Stops the TIM Hall sensor Interface. |
mbed_official | 237:f3da66175598 | 429 | * @param htim : TIM Hall Sensor handle |
mbed_official | 237:f3da66175598 | 430 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 431 | */ |
mbed_official | 237:f3da66175598 | 432 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 433 | { |
mbed_official | 237:f3da66175598 | 434 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 435 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 436 | |
mbed_official | 237:f3da66175598 | 437 | /* Disable the Input Capture channels 1, 2 and 3 |
mbed_official | 237:f3da66175598 | 438 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 237:f3da66175598 | 439 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
mbed_official | 237:f3da66175598 | 440 | |
mbed_official | 237:f3da66175598 | 441 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 442 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 443 | |
mbed_official | 237:f3da66175598 | 444 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 445 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 446 | } |
mbed_official | 237:f3da66175598 | 447 | |
mbed_official | 237:f3da66175598 | 448 | /** |
mbed_official | 237:f3da66175598 | 449 | * @brief Starts the TIM Hall Sensor Interface in interrupt mode. |
mbed_official | 237:f3da66175598 | 450 | * @param htim : TIM Hall Sensor handle |
mbed_official | 237:f3da66175598 | 451 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 452 | */ |
mbed_official | 237:f3da66175598 | 453 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 454 | { |
mbed_official | 237:f3da66175598 | 455 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 456 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 457 | |
mbed_official | 237:f3da66175598 | 458 | /* Enable the capture compare Interrupts 1 event */ |
mbed_official | 237:f3da66175598 | 459 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 237:f3da66175598 | 460 | |
mbed_official | 237:f3da66175598 | 461 | /* Enable the Input Capture channels 1 |
mbed_official | 237:f3da66175598 | 462 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 237:f3da66175598 | 463 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
mbed_official | 237:f3da66175598 | 464 | |
mbed_official | 237:f3da66175598 | 465 | /* Enable the Peripheral */ |
mbed_official | 237:f3da66175598 | 466 | __HAL_TIM_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 467 | |
mbed_official | 237:f3da66175598 | 468 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 469 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 470 | } |
mbed_official | 237:f3da66175598 | 471 | |
mbed_official | 237:f3da66175598 | 472 | /** |
mbed_official | 237:f3da66175598 | 473 | * @brief Stops the TIM Hall Sensor Interface in interrupt mode. |
mbed_official | 237:f3da66175598 | 474 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 475 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 476 | */ |
mbed_official | 237:f3da66175598 | 477 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 478 | { |
mbed_official | 237:f3da66175598 | 479 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 480 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 481 | |
mbed_official | 237:f3da66175598 | 482 | /* Disable the Input Capture channels 1 |
mbed_official | 237:f3da66175598 | 483 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 237:f3da66175598 | 484 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
mbed_official | 237:f3da66175598 | 485 | |
mbed_official | 237:f3da66175598 | 486 | /* Disable the capture compare Interrupts event */ |
mbed_official | 237:f3da66175598 | 487 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 237:f3da66175598 | 488 | |
mbed_official | 237:f3da66175598 | 489 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 490 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 491 | |
mbed_official | 237:f3da66175598 | 492 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 493 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 494 | } |
mbed_official | 237:f3da66175598 | 495 | |
mbed_official | 237:f3da66175598 | 496 | /** |
mbed_official | 237:f3da66175598 | 497 | * @brief Starts the TIM Hall Sensor Interface in DMA mode. |
mbed_official | 237:f3da66175598 | 498 | * @param htim : TIM Hall Sensor handle |
mbed_official | 237:f3da66175598 | 499 | * @param pData: The destination Buffer address. |
mbed_official | 237:f3da66175598 | 500 | * @param Length: The length of data to be transferred from TIM peripheral to memory. |
mbed_official | 237:f3da66175598 | 501 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 502 | */ |
mbed_official | 237:f3da66175598 | 503 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) |
mbed_official | 237:f3da66175598 | 504 | { |
mbed_official | 237:f3da66175598 | 505 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 506 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 507 | |
mbed_official | 237:f3da66175598 | 508 | if((htim->State == HAL_TIM_STATE_BUSY)) |
mbed_official | 237:f3da66175598 | 509 | { |
mbed_official | 237:f3da66175598 | 510 | return HAL_BUSY; |
mbed_official | 237:f3da66175598 | 511 | } |
mbed_official | 237:f3da66175598 | 512 | else if((htim->State == HAL_TIM_STATE_READY)) |
mbed_official | 237:f3da66175598 | 513 | { |
mbed_official | 237:f3da66175598 | 514 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
mbed_official | 237:f3da66175598 | 515 | { |
mbed_official | 237:f3da66175598 | 516 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 517 | } |
mbed_official | 237:f3da66175598 | 518 | else |
mbed_official | 237:f3da66175598 | 519 | { |
mbed_official | 237:f3da66175598 | 520 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 521 | } |
mbed_official | 237:f3da66175598 | 522 | } |
mbed_official | 237:f3da66175598 | 523 | /* Enable the Input Capture channels 1 |
mbed_official | 237:f3da66175598 | 524 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 237:f3da66175598 | 525 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
mbed_official | 237:f3da66175598 | 526 | |
mbed_official | 237:f3da66175598 | 527 | /* Set the DMA Input Capture 1 Callback */ |
mbed_official | 237:f3da66175598 | 528 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt; |
mbed_official | 237:f3da66175598 | 529 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 530 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 237:f3da66175598 | 531 | |
mbed_official | 237:f3da66175598 | 532 | /* Enable the DMA channel for Capture 1*/ |
mbed_official | 237:f3da66175598 | 533 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); |
mbed_official | 237:f3da66175598 | 534 | |
mbed_official | 237:f3da66175598 | 535 | /* Enable the capture compare 1 Interrupt */ |
mbed_official | 237:f3da66175598 | 536 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 237:f3da66175598 | 537 | |
mbed_official | 237:f3da66175598 | 538 | /* Enable the Peripheral */ |
mbed_official | 237:f3da66175598 | 539 | __HAL_TIM_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 540 | |
mbed_official | 237:f3da66175598 | 541 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 542 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 543 | } |
mbed_official | 237:f3da66175598 | 544 | |
mbed_official | 237:f3da66175598 | 545 | /** |
mbed_official | 237:f3da66175598 | 546 | * @brief Stops the TIM Hall Sensor Interface in DMA mode. |
mbed_official | 237:f3da66175598 | 547 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 548 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 549 | */ |
mbed_official | 237:f3da66175598 | 550 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 551 | { |
mbed_official | 237:f3da66175598 | 552 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 553 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 554 | |
mbed_official | 237:f3da66175598 | 555 | /* Disable the Input Capture channels 1 |
mbed_official | 237:f3da66175598 | 556 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 237:f3da66175598 | 557 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
mbed_official | 237:f3da66175598 | 558 | |
mbed_official | 237:f3da66175598 | 559 | |
mbed_official | 237:f3da66175598 | 560 | /* Disable the capture compare Interrupts 1 event */ |
mbed_official | 237:f3da66175598 | 561 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 237:f3da66175598 | 562 | |
mbed_official | 237:f3da66175598 | 563 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 564 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 565 | |
mbed_official | 237:f3da66175598 | 566 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 567 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 568 | } |
mbed_official | 237:f3da66175598 | 569 | |
mbed_official | 237:f3da66175598 | 570 | /** |
mbed_official | 237:f3da66175598 | 571 | * @} |
mbed_official | 237:f3da66175598 | 572 | */ |
mbed_official | 237:f3da66175598 | 573 | |
mbed_official | 237:f3da66175598 | 574 | /** @defgroup TIMEx_Group2 Timer Complementary Output Compare functions |
mbed_official | 237:f3da66175598 | 575 | * @brief Timer Complementary Output Compare functions |
mbed_official | 237:f3da66175598 | 576 | * |
mbed_official | 237:f3da66175598 | 577 | @verbatim |
mbed_official | 237:f3da66175598 | 578 | ============================================================================== |
mbed_official | 237:f3da66175598 | 579 | ##### Timer Complementary Output Compare functions ##### |
mbed_official | 237:f3da66175598 | 580 | ============================================================================== |
mbed_official | 237:f3da66175598 | 581 | [..] |
mbed_official | 237:f3da66175598 | 582 | This section provides functions allowing to: |
mbed_official | 237:f3da66175598 | 583 | (+) Start the Complementary Output Compare/PWM. |
mbed_official | 237:f3da66175598 | 584 | (+) Stop the Complementary Output Compare/PWM. |
mbed_official | 237:f3da66175598 | 585 | (+) Start the Complementary Output Compare/PWM and enable interrupts. |
mbed_official | 237:f3da66175598 | 586 | (+) Stop the Complementary Output Compare/PWM and disable interrupts. |
mbed_official | 237:f3da66175598 | 587 | (+) Start the Complementary Output Compare/PWM and enable DMA transfers. |
mbed_official | 237:f3da66175598 | 588 | (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. |
mbed_official | 237:f3da66175598 | 589 | |
mbed_official | 237:f3da66175598 | 590 | @endverbatim |
mbed_official | 237:f3da66175598 | 591 | * @{ |
mbed_official | 237:f3da66175598 | 592 | */ |
mbed_official | 237:f3da66175598 | 593 | |
mbed_official | 237:f3da66175598 | 594 | /** |
mbed_official | 237:f3da66175598 | 595 | * @brief Starts the TIM Output Compare signal generation on the complementary |
mbed_official | 237:f3da66175598 | 596 | * output. |
mbed_official | 237:f3da66175598 | 597 | * @param htim : TIM Output Compare handle |
mbed_official | 237:f3da66175598 | 598 | * @param Channel : TIM Channel to be enabled |
mbed_official | 237:f3da66175598 | 599 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 600 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 601 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 602 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 603 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 604 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 605 | */ |
mbed_official | 237:f3da66175598 | 606 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 607 | { |
mbed_official | 237:f3da66175598 | 608 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 609 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 610 | |
mbed_official | 237:f3da66175598 | 611 | /* Enable the Capture compare channel N */ |
mbed_official | 237:f3da66175598 | 612 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 237:f3da66175598 | 613 | |
mbed_official | 237:f3da66175598 | 614 | /* Enable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 615 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 616 | |
mbed_official | 237:f3da66175598 | 617 | /* Enable the Peripheral */ |
mbed_official | 237:f3da66175598 | 618 | __HAL_TIM_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 619 | |
mbed_official | 237:f3da66175598 | 620 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 621 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 622 | } |
mbed_official | 237:f3da66175598 | 623 | |
mbed_official | 237:f3da66175598 | 624 | /** |
mbed_official | 237:f3da66175598 | 625 | * @brief Stops the TIM Output Compare signal generation on the complementary |
mbed_official | 237:f3da66175598 | 626 | * output. |
mbed_official | 237:f3da66175598 | 627 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 628 | * @param Channel : TIM Channel to be disabled |
mbed_official | 237:f3da66175598 | 629 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 630 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 631 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 632 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 633 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 634 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 635 | */ |
mbed_official | 237:f3da66175598 | 636 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 637 | { |
mbed_official | 237:f3da66175598 | 638 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 639 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 640 | |
mbed_official | 237:f3da66175598 | 641 | /* Disable the Capture compare channel N */ |
mbed_official | 237:f3da66175598 | 642 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 237:f3da66175598 | 643 | |
mbed_official | 237:f3da66175598 | 644 | /* Disable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 645 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 646 | |
mbed_official | 237:f3da66175598 | 647 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 648 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 649 | |
mbed_official | 237:f3da66175598 | 650 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 651 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 652 | } |
mbed_official | 237:f3da66175598 | 653 | |
mbed_official | 237:f3da66175598 | 654 | /** |
mbed_official | 237:f3da66175598 | 655 | * @brief Starts the TIM Output Compare signal generation in interrupt mode |
mbed_official | 237:f3da66175598 | 656 | * on the complementary output. |
mbed_official | 237:f3da66175598 | 657 | * @param htim : TIM OC handle |
mbed_official | 237:f3da66175598 | 658 | * @param Channel : TIM Channel to be enabled |
mbed_official | 237:f3da66175598 | 659 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 660 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 661 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 662 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 663 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 664 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 665 | */ |
mbed_official | 237:f3da66175598 | 666 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 667 | { |
mbed_official | 237:f3da66175598 | 668 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 669 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 670 | |
mbed_official | 237:f3da66175598 | 671 | switch (Channel) |
mbed_official | 237:f3da66175598 | 672 | { |
mbed_official | 237:f3da66175598 | 673 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 674 | { |
mbed_official | 237:f3da66175598 | 675 | /* Enable the TIM Output Compare interrupt */ |
mbed_official | 237:f3da66175598 | 676 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 237:f3da66175598 | 677 | } |
mbed_official | 237:f3da66175598 | 678 | break; |
mbed_official | 237:f3da66175598 | 679 | |
mbed_official | 237:f3da66175598 | 680 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 681 | { |
mbed_official | 237:f3da66175598 | 682 | /* Enable the TIM Output Compare interrupt */ |
mbed_official | 237:f3da66175598 | 683 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 237:f3da66175598 | 684 | } |
mbed_official | 237:f3da66175598 | 685 | break; |
mbed_official | 237:f3da66175598 | 686 | |
mbed_official | 237:f3da66175598 | 687 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 688 | { |
mbed_official | 237:f3da66175598 | 689 | /* Enable the TIM Output Compare interrupt */ |
mbed_official | 237:f3da66175598 | 690 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
mbed_official | 237:f3da66175598 | 691 | } |
mbed_official | 237:f3da66175598 | 692 | break; |
mbed_official | 237:f3da66175598 | 693 | |
mbed_official | 237:f3da66175598 | 694 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 695 | { |
mbed_official | 237:f3da66175598 | 696 | /* Enable the TIM Output Compare interrupt */ |
mbed_official | 237:f3da66175598 | 697 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
mbed_official | 237:f3da66175598 | 698 | } |
mbed_official | 237:f3da66175598 | 699 | break; |
mbed_official | 237:f3da66175598 | 700 | |
mbed_official | 237:f3da66175598 | 701 | default: |
mbed_official | 237:f3da66175598 | 702 | break; |
mbed_official | 237:f3da66175598 | 703 | } |
mbed_official | 237:f3da66175598 | 704 | |
mbed_official | 237:f3da66175598 | 705 | /* Enable the Capture compare channel N */ |
mbed_official | 237:f3da66175598 | 706 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 237:f3da66175598 | 707 | |
mbed_official | 237:f3da66175598 | 708 | /* Enable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 709 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 710 | |
mbed_official | 237:f3da66175598 | 711 | /* Enable the Peripheral */ |
mbed_official | 237:f3da66175598 | 712 | __HAL_TIM_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 713 | |
mbed_official | 237:f3da66175598 | 714 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 715 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 716 | } |
mbed_official | 237:f3da66175598 | 717 | |
mbed_official | 237:f3da66175598 | 718 | /** |
mbed_official | 237:f3da66175598 | 719 | * @brief Stops the TIM Output Compare signal generation in interrupt mode |
mbed_official | 237:f3da66175598 | 720 | * on the complementary output. |
mbed_official | 237:f3da66175598 | 721 | * @param htim : TIM Output Compare handle |
mbed_official | 237:f3da66175598 | 722 | * @param Channel : TIM Channel to be disabled |
mbed_official | 237:f3da66175598 | 723 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 724 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 725 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 726 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 727 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 728 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 729 | */ |
mbed_official | 237:f3da66175598 | 730 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 731 | { |
mbed_official | 237:f3da66175598 | 732 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 733 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 734 | |
mbed_official | 237:f3da66175598 | 735 | switch (Channel) |
mbed_official | 237:f3da66175598 | 736 | { |
mbed_official | 237:f3da66175598 | 737 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 738 | { |
mbed_official | 237:f3da66175598 | 739 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 237:f3da66175598 | 740 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 237:f3da66175598 | 741 | } |
mbed_official | 237:f3da66175598 | 742 | break; |
mbed_official | 237:f3da66175598 | 743 | |
mbed_official | 237:f3da66175598 | 744 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 745 | { |
mbed_official | 237:f3da66175598 | 746 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 237:f3da66175598 | 747 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 237:f3da66175598 | 748 | } |
mbed_official | 237:f3da66175598 | 749 | break; |
mbed_official | 237:f3da66175598 | 750 | |
mbed_official | 237:f3da66175598 | 751 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 752 | { |
mbed_official | 237:f3da66175598 | 753 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 237:f3da66175598 | 754 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
mbed_official | 237:f3da66175598 | 755 | } |
mbed_official | 237:f3da66175598 | 756 | break; |
mbed_official | 237:f3da66175598 | 757 | |
mbed_official | 237:f3da66175598 | 758 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 759 | { |
mbed_official | 237:f3da66175598 | 760 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 237:f3da66175598 | 761 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
mbed_official | 237:f3da66175598 | 762 | } |
mbed_official | 237:f3da66175598 | 763 | break; |
mbed_official | 237:f3da66175598 | 764 | |
mbed_official | 237:f3da66175598 | 765 | default: |
mbed_official | 237:f3da66175598 | 766 | break; |
mbed_official | 237:f3da66175598 | 767 | } |
mbed_official | 237:f3da66175598 | 768 | |
mbed_official | 237:f3da66175598 | 769 | /* Disable the Capture compare channel N */ |
mbed_official | 237:f3da66175598 | 770 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 237:f3da66175598 | 771 | |
mbed_official | 237:f3da66175598 | 772 | /* Disable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 773 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 774 | |
mbed_official | 237:f3da66175598 | 775 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 776 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 777 | |
mbed_official | 237:f3da66175598 | 778 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 779 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 780 | } |
mbed_official | 237:f3da66175598 | 781 | |
mbed_official | 237:f3da66175598 | 782 | /** |
mbed_official | 237:f3da66175598 | 783 | * @brief Starts the TIM Output Compare signal generation in DMA mode |
mbed_official | 237:f3da66175598 | 784 | * on the complementary output. |
mbed_official | 237:f3da66175598 | 785 | * @param htim : TIM Output Compare handle |
mbed_official | 237:f3da66175598 | 786 | * @param Channel : TIM Channel to be enabled |
mbed_official | 237:f3da66175598 | 787 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 788 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 789 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 790 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 791 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 792 | * @param pData: The source Buffer address. |
mbed_official | 237:f3da66175598 | 793 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
mbed_official | 237:f3da66175598 | 794 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 795 | */ |
mbed_official | 237:f3da66175598 | 796 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
mbed_official | 237:f3da66175598 | 797 | { |
mbed_official | 237:f3da66175598 | 798 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 799 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 800 | |
mbed_official | 237:f3da66175598 | 801 | if((htim->State == HAL_TIM_STATE_BUSY)) |
mbed_official | 237:f3da66175598 | 802 | { |
mbed_official | 237:f3da66175598 | 803 | return HAL_BUSY; |
mbed_official | 237:f3da66175598 | 804 | } |
mbed_official | 237:f3da66175598 | 805 | else if((htim->State == HAL_TIM_STATE_READY)) |
mbed_official | 237:f3da66175598 | 806 | { |
mbed_official | 237:f3da66175598 | 807 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
mbed_official | 237:f3da66175598 | 808 | { |
mbed_official | 237:f3da66175598 | 809 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 810 | } |
mbed_official | 237:f3da66175598 | 811 | else |
mbed_official | 237:f3da66175598 | 812 | { |
mbed_official | 237:f3da66175598 | 813 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 814 | } |
mbed_official | 237:f3da66175598 | 815 | } |
mbed_official | 237:f3da66175598 | 816 | switch (Channel) |
mbed_official | 237:f3da66175598 | 817 | { |
mbed_official | 237:f3da66175598 | 818 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 819 | { |
mbed_official | 237:f3da66175598 | 820 | /* Set the DMA Period elapsed callback */ |
mbed_official | 237:f3da66175598 | 821 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 237:f3da66175598 | 822 | |
mbed_official | 237:f3da66175598 | 823 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 824 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 237:f3da66175598 | 825 | |
mbed_official | 237:f3da66175598 | 826 | /* Enable the DMA channel */ |
mbed_official | 237:f3da66175598 | 827 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
mbed_official | 237:f3da66175598 | 828 | |
mbed_official | 237:f3da66175598 | 829 | /* Enable the TIM Output Compare DMA request */ |
mbed_official | 237:f3da66175598 | 830 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 237:f3da66175598 | 831 | } |
mbed_official | 237:f3da66175598 | 832 | break; |
mbed_official | 237:f3da66175598 | 833 | |
mbed_official | 237:f3da66175598 | 834 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 835 | { |
mbed_official | 237:f3da66175598 | 836 | /* Set the DMA Period elapsed callback */ |
mbed_official | 237:f3da66175598 | 837 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 237:f3da66175598 | 838 | |
mbed_official | 237:f3da66175598 | 839 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 840 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 237:f3da66175598 | 841 | |
mbed_official | 237:f3da66175598 | 842 | /* Enable the DMA channel */ |
mbed_official | 237:f3da66175598 | 843 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
mbed_official | 237:f3da66175598 | 844 | |
mbed_official | 237:f3da66175598 | 845 | /* Enable the TIM Output Compare DMA request */ |
mbed_official | 237:f3da66175598 | 846 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
mbed_official | 237:f3da66175598 | 847 | } |
mbed_official | 237:f3da66175598 | 848 | break; |
mbed_official | 237:f3da66175598 | 849 | |
mbed_official | 237:f3da66175598 | 850 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 851 | { |
mbed_official | 237:f3da66175598 | 852 | /* Set the DMA Period elapsed callback */ |
mbed_official | 237:f3da66175598 | 853 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 237:f3da66175598 | 854 | |
mbed_official | 237:f3da66175598 | 855 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 856 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 237:f3da66175598 | 857 | |
mbed_official | 237:f3da66175598 | 858 | /* Enable the DMA channel */ |
mbed_official | 237:f3da66175598 | 859 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
mbed_official | 237:f3da66175598 | 860 | |
mbed_official | 237:f3da66175598 | 861 | /* Enable the TIM Output Compare DMA request */ |
mbed_official | 237:f3da66175598 | 862 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
mbed_official | 237:f3da66175598 | 863 | } |
mbed_official | 237:f3da66175598 | 864 | break; |
mbed_official | 237:f3da66175598 | 865 | |
mbed_official | 237:f3da66175598 | 866 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 867 | { |
mbed_official | 237:f3da66175598 | 868 | /* Set the DMA Period elapsed callback */ |
mbed_official | 237:f3da66175598 | 869 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 237:f3da66175598 | 870 | |
mbed_official | 237:f3da66175598 | 871 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 872 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 237:f3da66175598 | 873 | |
mbed_official | 237:f3da66175598 | 874 | /* Enable the DMA channel */ |
mbed_official | 237:f3da66175598 | 875 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
mbed_official | 237:f3da66175598 | 876 | |
mbed_official | 237:f3da66175598 | 877 | /* Enable the TIM Output Compare DMA request */ |
mbed_official | 237:f3da66175598 | 878 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
mbed_official | 237:f3da66175598 | 879 | } |
mbed_official | 237:f3da66175598 | 880 | break; |
mbed_official | 237:f3da66175598 | 881 | |
mbed_official | 237:f3da66175598 | 882 | default: |
mbed_official | 237:f3da66175598 | 883 | break; |
mbed_official | 237:f3da66175598 | 884 | } |
mbed_official | 237:f3da66175598 | 885 | |
mbed_official | 237:f3da66175598 | 886 | /* Enable the Capture compare channel N */ |
mbed_official | 237:f3da66175598 | 887 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 237:f3da66175598 | 888 | |
mbed_official | 237:f3da66175598 | 889 | /* Enable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 890 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 891 | |
mbed_official | 237:f3da66175598 | 892 | /* Enable the Peripheral */ |
mbed_official | 237:f3da66175598 | 893 | __HAL_TIM_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 894 | |
mbed_official | 237:f3da66175598 | 895 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 896 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 897 | } |
mbed_official | 237:f3da66175598 | 898 | |
mbed_official | 237:f3da66175598 | 899 | /** |
mbed_official | 237:f3da66175598 | 900 | * @brief Stops the TIM Output Compare signal generation in DMA mode |
mbed_official | 237:f3da66175598 | 901 | * on the complementary output. |
mbed_official | 237:f3da66175598 | 902 | * @param htim : TIM Output Compare handle |
mbed_official | 237:f3da66175598 | 903 | * @param Channel : TIM Channel to be disabled |
mbed_official | 237:f3da66175598 | 904 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 905 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 906 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 907 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 908 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 909 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 910 | */ |
mbed_official | 237:f3da66175598 | 911 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 912 | { |
mbed_official | 237:f3da66175598 | 913 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 914 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 915 | |
mbed_official | 237:f3da66175598 | 916 | switch (Channel) |
mbed_official | 237:f3da66175598 | 917 | { |
mbed_official | 237:f3da66175598 | 918 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 919 | { |
mbed_official | 237:f3da66175598 | 920 | /* Disable the TIM Output Compare DMA request */ |
mbed_official | 237:f3da66175598 | 921 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 237:f3da66175598 | 922 | } |
mbed_official | 237:f3da66175598 | 923 | break; |
mbed_official | 237:f3da66175598 | 924 | |
mbed_official | 237:f3da66175598 | 925 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 926 | { |
mbed_official | 237:f3da66175598 | 927 | /* Disable the TIM Output Compare DMA request */ |
mbed_official | 237:f3da66175598 | 928 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
mbed_official | 237:f3da66175598 | 929 | } |
mbed_official | 237:f3da66175598 | 930 | break; |
mbed_official | 237:f3da66175598 | 931 | |
mbed_official | 237:f3da66175598 | 932 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 933 | { |
mbed_official | 237:f3da66175598 | 934 | /* Disable the TIM Output Compare DMA request */ |
mbed_official | 237:f3da66175598 | 935 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
mbed_official | 237:f3da66175598 | 936 | } |
mbed_official | 237:f3da66175598 | 937 | break; |
mbed_official | 237:f3da66175598 | 938 | |
mbed_official | 237:f3da66175598 | 939 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 940 | { |
mbed_official | 237:f3da66175598 | 941 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 237:f3da66175598 | 942 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
mbed_official | 237:f3da66175598 | 943 | } |
mbed_official | 237:f3da66175598 | 944 | break; |
mbed_official | 237:f3da66175598 | 945 | |
mbed_official | 237:f3da66175598 | 946 | default: |
mbed_official | 237:f3da66175598 | 947 | break; |
mbed_official | 237:f3da66175598 | 948 | } |
mbed_official | 237:f3da66175598 | 949 | |
mbed_official | 237:f3da66175598 | 950 | /* Disable the Capture compare channel N */ |
mbed_official | 237:f3da66175598 | 951 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 237:f3da66175598 | 952 | |
mbed_official | 237:f3da66175598 | 953 | /* Disable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 954 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 955 | |
mbed_official | 237:f3da66175598 | 956 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 957 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 958 | |
mbed_official | 237:f3da66175598 | 959 | /* Change the htim state */ |
mbed_official | 237:f3da66175598 | 960 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 961 | |
mbed_official | 237:f3da66175598 | 962 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 963 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 964 | } |
mbed_official | 237:f3da66175598 | 965 | |
mbed_official | 237:f3da66175598 | 966 | /** |
mbed_official | 237:f3da66175598 | 967 | * @} |
mbed_official | 237:f3da66175598 | 968 | */ |
mbed_official | 237:f3da66175598 | 969 | |
mbed_official | 237:f3da66175598 | 970 | /** @defgroup TIMEx_Group3 Timer Complementary PWM functions |
mbed_official | 237:f3da66175598 | 971 | * @brief Timer Complementary PWM functions |
mbed_official | 237:f3da66175598 | 972 | * |
mbed_official | 237:f3da66175598 | 973 | @verbatim |
mbed_official | 237:f3da66175598 | 974 | ============================================================================== |
mbed_official | 237:f3da66175598 | 975 | ##### Timer Complementary PWM functions ##### |
mbed_official | 237:f3da66175598 | 976 | ============================================================================== |
mbed_official | 237:f3da66175598 | 977 | [..] |
mbed_official | 237:f3da66175598 | 978 | This section provides functions allowing to: |
mbed_official | 237:f3da66175598 | 979 | (+) Start the Complementary PWM. |
mbed_official | 237:f3da66175598 | 980 | (+) Stop the Complementary PWM. |
mbed_official | 237:f3da66175598 | 981 | (+) Start the Complementary PWM and enable interrupts. |
mbed_official | 237:f3da66175598 | 982 | (+) Stop the Complementary PWM and disable interrupts. |
mbed_official | 237:f3da66175598 | 983 | (+) Start the Complementary PWM and enable DMA transfers. |
mbed_official | 237:f3da66175598 | 984 | (+) Stop the Complementary PWM and disable DMA transfers. |
mbed_official | 237:f3da66175598 | 985 | (+) Start the Complementary Input Capture measurement. |
mbed_official | 237:f3da66175598 | 986 | (+) Stop the Complementary Input Capture. |
mbed_official | 237:f3da66175598 | 987 | (+) Start the Complementary Input Capture and enable interrupts. |
mbed_official | 237:f3da66175598 | 988 | (+) Stop the Complementary Input Capture and disable interrupts. |
mbed_official | 237:f3da66175598 | 989 | (+) Start the Complementary Input Capture and enable DMA transfers. |
mbed_official | 237:f3da66175598 | 990 | (+) Stop the Complementary Input Capture and disable DMA transfers. |
mbed_official | 237:f3da66175598 | 991 | (+) Start the Complementary One Pulse generation. |
mbed_official | 237:f3da66175598 | 992 | (+) Stop the Complementary One Pulse. |
mbed_official | 237:f3da66175598 | 993 | (+) Start the Complementary One Pulse and enable interrupts. |
mbed_official | 237:f3da66175598 | 994 | (+) Stop the Complementary One Pulse and disable interrupts. |
mbed_official | 237:f3da66175598 | 995 | |
mbed_official | 237:f3da66175598 | 996 | @endverbatim |
mbed_official | 237:f3da66175598 | 997 | * @{ |
mbed_official | 237:f3da66175598 | 998 | */ |
mbed_official | 237:f3da66175598 | 999 | |
mbed_official | 237:f3da66175598 | 1000 | /** |
mbed_official | 237:f3da66175598 | 1001 | * @brief Starts the PWM signal generation on the complementary output. |
mbed_official | 237:f3da66175598 | 1002 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 1003 | * @param Channel : TIM Channel to be enabled |
mbed_official | 237:f3da66175598 | 1004 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1005 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1006 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1007 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 1008 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 1009 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1010 | */ |
mbed_official | 237:f3da66175598 | 1011 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 1012 | { |
mbed_official | 237:f3da66175598 | 1013 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1014 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 1015 | |
mbed_official | 237:f3da66175598 | 1016 | /* Enable the complementary PWM output */ |
mbed_official | 237:f3da66175598 | 1017 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 237:f3da66175598 | 1018 | |
mbed_official | 237:f3da66175598 | 1019 | /* Enable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1020 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 1021 | |
mbed_official | 237:f3da66175598 | 1022 | /* Enable the Peripheral */ |
mbed_official | 237:f3da66175598 | 1023 | __HAL_TIM_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 1024 | |
mbed_official | 237:f3da66175598 | 1025 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1026 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1027 | } |
mbed_official | 237:f3da66175598 | 1028 | |
mbed_official | 237:f3da66175598 | 1029 | /** |
mbed_official | 237:f3da66175598 | 1030 | * @brief Stops the PWM signal generation on the complementary output. |
mbed_official | 237:f3da66175598 | 1031 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 1032 | * @param Channel : TIM Channel to be disabled |
mbed_official | 237:f3da66175598 | 1033 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1034 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1035 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1036 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 1037 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 1038 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1039 | */ |
mbed_official | 237:f3da66175598 | 1040 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 1041 | { |
mbed_official | 237:f3da66175598 | 1042 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1043 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 1044 | |
mbed_official | 237:f3da66175598 | 1045 | /* Disable the complementary PWM output */ |
mbed_official | 237:f3da66175598 | 1046 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 237:f3da66175598 | 1047 | |
mbed_official | 237:f3da66175598 | 1048 | /* Disable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1049 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1050 | |
mbed_official | 237:f3da66175598 | 1051 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 1052 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1053 | |
mbed_official | 237:f3da66175598 | 1054 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1055 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1056 | } |
mbed_official | 237:f3da66175598 | 1057 | |
mbed_official | 237:f3da66175598 | 1058 | /** |
mbed_official | 237:f3da66175598 | 1059 | * @brief Starts the PWM signal generation in interrupt mode on the |
mbed_official | 237:f3da66175598 | 1060 | * complementary output. |
mbed_official | 237:f3da66175598 | 1061 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 1062 | * @param Channel : TIM Channel to be disabled |
mbed_official | 237:f3da66175598 | 1063 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1064 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1065 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1066 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 1067 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 1068 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1069 | */ |
mbed_official | 237:f3da66175598 | 1070 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 1071 | { |
mbed_official | 237:f3da66175598 | 1072 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1073 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 1074 | |
mbed_official | 237:f3da66175598 | 1075 | switch (Channel) |
mbed_official | 237:f3da66175598 | 1076 | { |
mbed_official | 237:f3da66175598 | 1077 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 1078 | { |
mbed_official | 237:f3da66175598 | 1079 | /* Enable the TIM Capture/Compare 1 interrupt */ |
mbed_official | 237:f3da66175598 | 1080 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 237:f3da66175598 | 1081 | } |
mbed_official | 237:f3da66175598 | 1082 | break; |
mbed_official | 237:f3da66175598 | 1083 | |
mbed_official | 237:f3da66175598 | 1084 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 1085 | { |
mbed_official | 237:f3da66175598 | 1086 | /* Enable the TIM Capture/Compare 2 interrupt */ |
mbed_official | 237:f3da66175598 | 1087 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 237:f3da66175598 | 1088 | } |
mbed_official | 237:f3da66175598 | 1089 | break; |
mbed_official | 237:f3da66175598 | 1090 | |
mbed_official | 237:f3da66175598 | 1091 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 1092 | { |
mbed_official | 237:f3da66175598 | 1093 | /* Enable the TIM Capture/Compare 3 interrupt */ |
mbed_official | 237:f3da66175598 | 1094 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
mbed_official | 237:f3da66175598 | 1095 | } |
mbed_official | 237:f3da66175598 | 1096 | break; |
mbed_official | 237:f3da66175598 | 1097 | |
mbed_official | 237:f3da66175598 | 1098 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 1099 | { |
mbed_official | 237:f3da66175598 | 1100 | /* Enable the TIM Capture/Compare 4 interrupt */ |
mbed_official | 237:f3da66175598 | 1101 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
mbed_official | 237:f3da66175598 | 1102 | } |
mbed_official | 237:f3da66175598 | 1103 | break; |
mbed_official | 237:f3da66175598 | 1104 | |
mbed_official | 237:f3da66175598 | 1105 | default: |
mbed_official | 237:f3da66175598 | 1106 | break; |
mbed_official | 237:f3da66175598 | 1107 | } |
mbed_official | 237:f3da66175598 | 1108 | |
mbed_official | 237:f3da66175598 | 1109 | /* Enable the TIM Break interrupt */ |
mbed_official | 237:f3da66175598 | 1110 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
mbed_official | 237:f3da66175598 | 1111 | |
mbed_official | 237:f3da66175598 | 1112 | /* Enable the complementary PWM output */ |
mbed_official | 237:f3da66175598 | 1113 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 237:f3da66175598 | 1114 | |
mbed_official | 237:f3da66175598 | 1115 | /* Enable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1116 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 1117 | |
mbed_official | 237:f3da66175598 | 1118 | /* Enable the Peripheral */ |
mbed_official | 237:f3da66175598 | 1119 | __HAL_TIM_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 1120 | |
mbed_official | 237:f3da66175598 | 1121 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1122 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1123 | } |
mbed_official | 237:f3da66175598 | 1124 | |
mbed_official | 237:f3da66175598 | 1125 | /** |
mbed_official | 237:f3da66175598 | 1126 | * @brief Stops the PWM signal generation in interrupt mode on the |
mbed_official | 237:f3da66175598 | 1127 | * complementary output. |
mbed_official | 237:f3da66175598 | 1128 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 1129 | * @param Channel : TIM Channel to be disabled |
mbed_official | 237:f3da66175598 | 1130 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1131 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1132 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1133 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 1134 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 1135 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1136 | */ |
mbed_official | 237:f3da66175598 | 1137 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 1138 | { |
mbed_official | 237:f3da66175598 | 1139 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1140 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 1141 | |
mbed_official | 237:f3da66175598 | 1142 | switch (Channel) |
mbed_official | 237:f3da66175598 | 1143 | { |
mbed_official | 237:f3da66175598 | 1144 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 1145 | { |
mbed_official | 237:f3da66175598 | 1146 | /* Disable the TIM Capture/Compare 1 interrupt */ |
mbed_official | 237:f3da66175598 | 1147 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 237:f3da66175598 | 1148 | } |
mbed_official | 237:f3da66175598 | 1149 | break; |
mbed_official | 237:f3da66175598 | 1150 | |
mbed_official | 237:f3da66175598 | 1151 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 1152 | { |
mbed_official | 237:f3da66175598 | 1153 | /* Disable the TIM Capture/Compare 2 interrupt */ |
mbed_official | 237:f3da66175598 | 1154 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 237:f3da66175598 | 1155 | } |
mbed_official | 237:f3da66175598 | 1156 | break; |
mbed_official | 237:f3da66175598 | 1157 | |
mbed_official | 237:f3da66175598 | 1158 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 1159 | { |
mbed_official | 237:f3da66175598 | 1160 | /* Disable the TIM Capture/Compare 3 interrupt */ |
mbed_official | 237:f3da66175598 | 1161 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
mbed_official | 237:f3da66175598 | 1162 | } |
mbed_official | 237:f3da66175598 | 1163 | break; |
mbed_official | 237:f3da66175598 | 1164 | |
mbed_official | 237:f3da66175598 | 1165 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 1166 | { |
mbed_official | 237:f3da66175598 | 1167 | /* Disable the TIM Capture/Compare 3 interrupt */ |
mbed_official | 237:f3da66175598 | 1168 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
mbed_official | 237:f3da66175598 | 1169 | } |
mbed_official | 237:f3da66175598 | 1170 | break; |
mbed_official | 237:f3da66175598 | 1171 | |
mbed_official | 237:f3da66175598 | 1172 | default: |
mbed_official | 237:f3da66175598 | 1173 | break; |
mbed_official | 237:f3da66175598 | 1174 | } |
mbed_official | 237:f3da66175598 | 1175 | |
mbed_official | 237:f3da66175598 | 1176 | /* Disable the TIM Break interrupt */ |
mbed_official | 237:f3da66175598 | 1177 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
mbed_official | 237:f3da66175598 | 1178 | |
mbed_official | 237:f3da66175598 | 1179 | /* Disable the complementary PWM output */ |
mbed_official | 237:f3da66175598 | 1180 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 237:f3da66175598 | 1181 | |
mbed_official | 237:f3da66175598 | 1182 | /* Disable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1183 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1184 | |
mbed_official | 237:f3da66175598 | 1185 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 1186 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1187 | |
mbed_official | 237:f3da66175598 | 1188 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1189 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1190 | } |
mbed_official | 237:f3da66175598 | 1191 | |
mbed_official | 237:f3da66175598 | 1192 | /** |
mbed_official | 237:f3da66175598 | 1193 | * @brief Starts the TIM PWM signal generation in DMA mode on the |
mbed_official | 237:f3da66175598 | 1194 | * complementary output |
mbed_official | 237:f3da66175598 | 1195 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 1196 | * @param Channel : TIM Channel to be enabled |
mbed_official | 237:f3da66175598 | 1197 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1198 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1199 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1200 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 1201 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 1202 | * @param pData: The source Buffer address. |
mbed_official | 237:f3da66175598 | 1203 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
mbed_official | 237:f3da66175598 | 1204 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1205 | */ |
mbed_official | 237:f3da66175598 | 1206 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
mbed_official | 237:f3da66175598 | 1207 | { |
mbed_official | 237:f3da66175598 | 1208 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1209 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 1210 | |
mbed_official | 237:f3da66175598 | 1211 | if((htim->State == HAL_TIM_STATE_BUSY)) |
mbed_official | 237:f3da66175598 | 1212 | { |
mbed_official | 237:f3da66175598 | 1213 | return HAL_BUSY; |
mbed_official | 237:f3da66175598 | 1214 | } |
mbed_official | 237:f3da66175598 | 1215 | else if((htim->State == HAL_TIM_STATE_READY)) |
mbed_official | 237:f3da66175598 | 1216 | { |
mbed_official | 237:f3da66175598 | 1217 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
mbed_official | 237:f3da66175598 | 1218 | { |
mbed_official | 237:f3da66175598 | 1219 | return HAL_ERROR; |
mbed_official | 237:f3da66175598 | 1220 | } |
mbed_official | 237:f3da66175598 | 1221 | else |
mbed_official | 237:f3da66175598 | 1222 | { |
mbed_official | 237:f3da66175598 | 1223 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 1224 | } |
mbed_official | 237:f3da66175598 | 1225 | } |
mbed_official | 237:f3da66175598 | 1226 | switch (Channel) |
mbed_official | 237:f3da66175598 | 1227 | { |
mbed_official | 237:f3da66175598 | 1228 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 1229 | { |
mbed_official | 237:f3da66175598 | 1230 | /* Set the DMA Period elapsed callback */ |
mbed_official | 237:f3da66175598 | 1231 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 237:f3da66175598 | 1232 | |
mbed_official | 237:f3da66175598 | 1233 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 1234 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 237:f3da66175598 | 1235 | |
mbed_official | 237:f3da66175598 | 1236 | /* Enable the DMA channel */ |
mbed_official | 237:f3da66175598 | 1237 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
mbed_official | 237:f3da66175598 | 1238 | |
mbed_official | 237:f3da66175598 | 1239 | /* Enable the TIM Capture/Compare 1 DMA request */ |
mbed_official | 237:f3da66175598 | 1240 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 237:f3da66175598 | 1241 | } |
mbed_official | 237:f3da66175598 | 1242 | break; |
mbed_official | 237:f3da66175598 | 1243 | |
mbed_official | 237:f3da66175598 | 1244 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 1245 | { |
mbed_official | 237:f3da66175598 | 1246 | /* Set the DMA Period elapsed callback */ |
mbed_official | 237:f3da66175598 | 1247 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 237:f3da66175598 | 1248 | |
mbed_official | 237:f3da66175598 | 1249 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 1250 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 237:f3da66175598 | 1251 | |
mbed_official | 237:f3da66175598 | 1252 | /* Enable the DMA channel */ |
mbed_official | 237:f3da66175598 | 1253 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
mbed_official | 237:f3da66175598 | 1254 | |
mbed_official | 237:f3da66175598 | 1255 | /* Enable the TIM Capture/Compare 2 DMA request */ |
mbed_official | 237:f3da66175598 | 1256 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
mbed_official | 237:f3da66175598 | 1257 | } |
mbed_official | 237:f3da66175598 | 1258 | break; |
mbed_official | 237:f3da66175598 | 1259 | |
mbed_official | 237:f3da66175598 | 1260 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 1261 | { |
mbed_official | 237:f3da66175598 | 1262 | /* Set the DMA Period elapsed callback */ |
mbed_official | 237:f3da66175598 | 1263 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 237:f3da66175598 | 1264 | |
mbed_official | 237:f3da66175598 | 1265 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 1266 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 237:f3da66175598 | 1267 | |
mbed_official | 237:f3da66175598 | 1268 | /* Enable the DMA channel */ |
mbed_official | 237:f3da66175598 | 1269 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
mbed_official | 237:f3da66175598 | 1270 | |
mbed_official | 237:f3da66175598 | 1271 | /* Enable the TIM Capture/Compare 3 DMA request */ |
mbed_official | 237:f3da66175598 | 1272 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
mbed_official | 237:f3da66175598 | 1273 | } |
mbed_official | 237:f3da66175598 | 1274 | break; |
mbed_official | 237:f3da66175598 | 1275 | |
mbed_official | 237:f3da66175598 | 1276 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 1277 | { |
mbed_official | 237:f3da66175598 | 1278 | /* Set the DMA Period elapsed callback */ |
mbed_official | 237:f3da66175598 | 1279 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 237:f3da66175598 | 1280 | |
mbed_official | 237:f3da66175598 | 1281 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 1282 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 237:f3da66175598 | 1283 | |
mbed_official | 237:f3da66175598 | 1284 | /* Enable the DMA channel */ |
mbed_official | 237:f3da66175598 | 1285 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
mbed_official | 237:f3da66175598 | 1286 | |
mbed_official | 237:f3da66175598 | 1287 | /* Enable the TIM Capture/Compare 4 DMA request */ |
mbed_official | 237:f3da66175598 | 1288 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
mbed_official | 237:f3da66175598 | 1289 | } |
mbed_official | 237:f3da66175598 | 1290 | break; |
mbed_official | 237:f3da66175598 | 1291 | |
mbed_official | 237:f3da66175598 | 1292 | default: |
mbed_official | 237:f3da66175598 | 1293 | break; |
mbed_official | 237:f3da66175598 | 1294 | } |
mbed_official | 237:f3da66175598 | 1295 | |
mbed_official | 237:f3da66175598 | 1296 | /* Enable the complementary PWM output */ |
mbed_official | 237:f3da66175598 | 1297 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 237:f3da66175598 | 1298 | |
mbed_official | 237:f3da66175598 | 1299 | /* Enable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1300 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 1301 | |
mbed_official | 237:f3da66175598 | 1302 | /* Enable the Peripheral */ |
mbed_official | 237:f3da66175598 | 1303 | __HAL_TIM_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 1304 | |
mbed_official | 237:f3da66175598 | 1305 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1306 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1307 | } |
mbed_official | 237:f3da66175598 | 1308 | |
mbed_official | 237:f3da66175598 | 1309 | /** |
mbed_official | 237:f3da66175598 | 1310 | * @brief Stops the TIM PWM signal generation in DMA mode on the complementary |
mbed_official | 237:f3da66175598 | 1311 | * output |
mbed_official | 237:f3da66175598 | 1312 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 1313 | * @param Channel : TIM Channel to be disabled |
mbed_official | 237:f3da66175598 | 1314 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1315 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1316 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1317 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 1318 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 1319 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1320 | */ |
mbed_official | 237:f3da66175598 | 1321 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 237:f3da66175598 | 1322 | { |
mbed_official | 237:f3da66175598 | 1323 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1324 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 237:f3da66175598 | 1325 | |
mbed_official | 237:f3da66175598 | 1326 | switch (Channel) |
mbed_official | 237:f3da66175598 | 1327 | { |
mbed_official | 237:f3da66175598 | 1328 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 1329 | { |
mbed_official | 237:f3da66175598 | 1330 | /* Disable the TIM Capture/Compare 1 DMA request */ |
mbed_official | 237:f3da66175598 | 1331 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 237:f3da66175598 | 1332 | } |
mbed_official | 237:f3da66175598 | 1333 | break; |
mbed_official | 237:f3da66175598 | 1334 | |
mbed_official | 237:f3da66175598 | 1335 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 1336 | { |
mbed_official | 237:f3da66175598 | 1337 | /* Disable the TIM Capture/Compare 2 DMA request */ |
mbed_official | 237:f3da66175598 | 1338 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
mbed_official | 237:f3da66175598 | 1339 | } |
mbed_official | 237:f3da66175598 | 1340 | break; |
mbed_official | 237:f3da66175598 | 1341 | |
mbed_official | 237:f3da66175598 | 1342 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 1343 | { |
mbed_official | 237:f3da66175598 | 1344 | /* Disable the TIM Capture/Compare 3 DMA request */ |
mbed_official | 237:f3da66175598 | 1345 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
mbed_official | 237:f3da66175598 | 1346 | } |
mbed_official | 237:f3da66175598 | 1347 | break; |
mbed_official | 237:f3da66175598 | 1348 | |
mbed_official | 237:f3da66175598 | 1349 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 1350 | { |
mbed_official | 237:f3da66175598 | 1351 | /* Disable the TIM Capture/Compare 4 DMA request */ |
mbed_official | 237:f3da66175598 | 1352 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
mbed_official | 237:f3da66175598 | 1353 | } |
mbed_official | 237:f3da66175598 | 1354 | break; |
mbed_official | 237:f3da66175598 | 1355 | |
mbed_official | 237:f3da66175598 | 1356 | default: |
mbed_official | 237:f3da66175598 | 1357 | break; |
mbed_official | 237:f3da66175598 | 1358 | } |
mbed_official | 237:f3da66175598 | 1359 | |
mbed_official | 237:f3da66175598 | 1360 | /* Disable the complementary PWM output */ |
mbed_official | 237:f3da66175598 | 1361 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 237:f3da66175598 | 1362 | |
mbed_official | 237:f3da66175598 | 1363 | /* Disable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1364 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1365 | |
mbed_official | 237:f3da66175598 | 1366 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 1367 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1368 | |
mbed_official | 237:f3da66175598 | 1369 | /* Change the htim state */ |
mbed_official | 237:f3da66175598 | 1370 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 1371 | |
mbed_official | 237:f3da66175598 | 1372 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1373 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1374 | } |
mbed_official | 237:f3da66175598 | 1375 | |
mbed_official | 237:f3da66175598 | 1376 | /** |
mbed_official | 237:f3da66175598 | 1377 | * @} |
mbed_official | 237:f3da66175598 | 1378 | */ |
mbed_official | 237:f3da66175598 | 1379 | |
mbed_official | 237:f3da66175598 | 1380 | /** @defgroup TIMEx_Group4 Timer Complementary One Pulse functions |
mbed_official | 237:f3da66175598 | 1381 | * @brief Timer Complementary One Pulse functions |
mbed_official | 237:f3da66175598 | 1382 | * |
mbed_official | 237:f3da66175598 | 1383 | @verbatim |
mbed_official | 237:f3da66175598 | 1384 | ============================================================================== |
mbed_official | 237:f3da66175598 | 1385 | ##### Timer Complementary One Pulse functions ##### |
mbed_official | 237:f3da66175598 | 1386 | ============================================================================== |
mbed_official | 237:f3da66175598 | 1387 | [..] |
mbed_official | 237:f3da66175598 | 1388 | This section provides functions allowing to: |
mbed_official | 237:f3da66175598 | 1389 | (+) Start the Complementary One Pulse generation. |
mbed_official | 237:f3da66175598 | 1390 | (+) Stop the Complementary One Pulse. |
mbed_official | 237:f3da66175598 | 1391 | (+) Start the Complementary One Pulse and enable interrupts. |
mbed_official | 237:f3da66175598 | 1392 | (+) Stop the Complementary One Pulse and disable interrupts. |
mbed_official | 237:f3da66175598 | 1393 | |
mbed_official | 237:f3da66175598 | 1394 | @endverbatim |
mbed_official | 237:f3da66175598 | 1395 | * @{ |
mbed_official | 237:f3da66175598 | 1396 | */ |
mbed_official | 237:f3da66175598 | 1397 | |
mbed_official | 237:f3da66175598 | 1398 | /** |
mbed_official | 237:f3da66175598 | 1399 | * @brief Starts the TIM One Pulse signal generation on the complemetary |
mbed_official | 237:f3da66175598 | 1400 | * output. |
mbed_official | 237:f3da66175598 | 1401 | * @param htim : TIM One Pulse handle |
mbed_official | 237:f3da66175598 | 1402 | * @param OutputChannel : TIM Channel to be enabled |
mbed_official | 237:f3da66175598 | 1403 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1404 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1405 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1406 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1407 | */ |
mbed_official | 237:f3da66175598 | 1408 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
mbed_official | 237:f3da66175598 | 1409 | { |
mbed_official | 237:f3da66175598 | 1410 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1411 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
mbed_official | 237:f3da66175598 | 1412 | |
mbed_official | 237:f3da66175598 | 1413 | /* Enable the complementary One Pulse output */ |
mbed_official | 237:f3da66175598 | 1414 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
mbed_official | 237:f3da66175598 | 1415 | |
mbed_official | 237:f3da66175598 | 1416 | /* Enable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1417 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 1418 | |
mbed_official | 237:f3da66175598 | 1419 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1420 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1421 | } |
mbed_official | 237:f3da66175598 | 1422 | |
mbed_official | 237:f3da66175598 | 1423 | /** |
mbed_official | 237:f3da66175598 | 1424 | * @brief Stops the TIM One Pulse signal generation on the complementary |
mbed_official | 237:f3da66175598 | 1425 | * output. |
mbed_official | 237:f3da66175598 | 1426 | * @param htim : TIM One Pulse handle |
mbed_official | 237:f3da66175598 | 1427 | * @param OutputChannel : TIM Channel to be disabled |
mbed_official | 237:f3da66175598 | 1428 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1429 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1430 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1431 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1432 | */ |
mbed_official | 237:f3da66175598 | 1433 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
mbed_official | 237:f3da66175598 | 1434 | { |
mbed_official | 237:f3da66175598 | 1435 | |
mbed_official | 237:f3da66175598 | 1436 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1437 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
mbed_official | 237:f3da66175598 | 1438 | |
mbed_official | 237:f3da66175598 | 1439 | /* Disable the complementary One Pulse output */ |
mbed_official | 237:f3da66175598 | 1440 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
mbed_official | 237:f3da66175598 | 1441 | |
mbed_official | 237:f3da66175598 | 1442 | /* Disable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1443 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1444 | |
mbed_official | 237:f3da66175598 | 1445 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 1446 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1447 | |
mbed_official | 237:f3da66175598 | 1448 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1449 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1450 | } |
mbed_official | 237:f3da66175598 | 1451 | |
mbed_official | 237:f3da66175598 | 1452 | /** |
mbed_official | 237:f3da66175598 | 1453 | * @brief Starts the TIM One Pulse signal generation in interrupt mode on the |
mbed_official | 237:f3da66175598 | 1454 | * complementary channel. |
mbed_official | 237:f3da66175598 | 1455 | * @param htim : TIM One Pulse handle |
mbed_official | 237:f3da66175598 | 1456 | * @param OutputChannel : TIM Channel to be enabled |
mbed_official | 237:f3da66175598 | 1457 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1458 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1459 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1460 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1461 | */ |
mbed_official | 237:f3da66175598 | 1462 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
mbed_official | 237:f3da66175598 | 1463 | { |
mbed_official | 237:f3da66175598 | 1464 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1465 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
mbed_official | 237:f3da66175598 | 1466 | |
mbed_official | 237:f3da66175598 | 1467 | /* Enable the TIM Capture/Compare 1 interrupt */ |
mbed_official | 237:f3da66175598 | 1468 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 237:f3da66175598 | 1469 | |
mbed_official | 237:f3da66175598 | 1470 | /* Enable the TIM Capture/Compare 2 interrupt */ |
mbed_official | 237:f3da66175598 | 1471 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 237:f3da66175598 | 1472 | |
mbed_official | 237:f3da66175598 | 1473 | /* Enable the complementary One Pulse output */ |
mbed_official | 237:f3da66175598 | 1474 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
mbed_official | 237:f3da66175598 | 1475 | |
mbed_official | 237:f3da66175598 | 1476 | /* Enable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1477 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 237:f3da66175598 | 1478 | |
mbed_official | 237:f3da66175598 | 1479 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1480 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1481 | } |
mbed_official | 237:f3da66175598 | 1482 | |
mbed_official | 237:f3da66175598 | 1483 | /** |
mbed_official | 237:f3da66175598 | 1484 | * @brief Stops the TIM One Pulse signal generation in interrupt mode on the |
mbed_official | 237:f3da66175598 | 1485 | * complementary channel. |
mbed_official | 237:f3da66175598 | 1486 | * @param htim : TIM One Pulse handle |
mbed_official | 237:f3da66175598 | 1487 | * @param OutputChannel : TIM Channel to be disabled |
mbed_official | 237:f3da66175598 | 1488 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1489 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1490 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1491 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1492 | */ |
mbed_official | 237:f3da66175598 | 1493 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
mbed_official | 237:f3da66175598 | 1494 | { |
mbed_official | 237:f3da66175598 | 1495 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1496 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
mbed_official | 237:f3da66175598 | 1497 | |
mbed_official | 237:f3da66175598 | 1498 | /* Disable the TIM Capture/Compare 1 interrupt */ |
mbed_official | 237:f3da66175598 | 1499 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 237:f3da66175598 | 1500 | |
mbed_official | 237:f3da66175598 | 1501 | /* Disable the TIM Capture/Compare 2 interrupt */ |
mbed_official | 237:f3da66175598 | 1502 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 237:f3da66175598 | 1503 | |
mbed_official | 237:f3da66175598 | 1504 | /* Disable the complementary One Pulse output */ |
mbed_official | 237:f3da66175598 | 1505 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
mbed_official | 237:f3da66175598 | 1506 | |
mbed_official | 237:f3da66175598 | 1507 | /* Disable the Main Ouput */ |
mbed_official | 237:f3da66175598 | 1508 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1509 | |
mbed_official | 237:f3da66175598 | 1510 | /* Disable the Peripheral */ |
mbed_official | 237:f3da66175598 | 1511 | __HAL_TIM_DISABLE(htim); |
mbed_official | 237:f3da66175598 | 1512 | |
mbed_official | 237:f3da66175598 | 1513 | /* Return function status */ |
mbed_official | 237:f3da66175598 | 1514 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1515 | } |
mbed_official | 237:f3da66175598 | 1516 | |
mbed_official | 237:f3da66175598 | 1517 | |
mbed_official | 237:f3da66175598 | 1518 | |
mbed_official | 237:f3da66175598 | 1519 | /** |
mbed_official | 237:f3da66175598 | 1520 | * @} |
mbed_official | 237:f3da66175598 | 1521 | */ |
mbed_official | 237:f3da66175598 | 1522 | /** @defgroup TIMEx_Group5 Peripheral Control functions |
mbed_official | 237:f3da66175598 | 1523 | * @brief Peripheral Control functions |
mbed_official | 237:f3da66175598 | 1524 | * |
mbed_official | 237:f3da66175598 | 1525 | @verbatim |
mbed_official | 237:f3da66175598 | 1526 | ============================================================================== |
mbed_official | 237:f3da66175598 | 1527 | ##### Peripheral Control functions ##### |
mbed_official | 237:f3da66175598 | 1528 | ============================================================================== |
mbed_official | 237:f3da66175598 | 1529 | [..] |
mbed_official | 237:f3da66175598 | 1530 | This section provides functions allowing to: |
mbed_official | 237:f3da66175598 | 1531 | (+) Configure the commutation event in case of use of the Hall sensor interface. |
mbed_official | 237:f3da66175598 | 1532 | (+) Configure Output channels for OC and PWM mode. |
mbed_official | 237:f3da66175598 | 1533 | |
mbed_official | 237:f3da66175598 | 1534 | (+) Configure Complementary channels, break features and dead time. |
mbed_official | 237:f3da66175598 | 1535 | (+) Configure Master synchronization. |
mbed_official | 237:f3da66175598 | 1536 | (+) Configure timer remapping capabilities. |
mbed_official | 237:f3da66175598 | 1537 | (+) Enable or disable channel grouping |
mbed_official | 237:f3da66175598 | 1538 | |
mbed_official | 237:f3da66175598 | 1539 | @endverbatim |
mbed_official | 237:f3da66175598 | 1540 | * @{ |
mbed_official | 237:f3da66175598 | 1541 | */ |
mbed_official | 237:f3da66175598 | 1542 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
mbed_official | 237:f3da66175598 | 1543 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
mbed_official | 237:f3da66175598 | 1544 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
mbed_official | 237:f3da66175598 | 1545 | /** |
mbed_official | 237:f3da66175598 | 1546 | * @brief Configure the TIM commutation event sequence. |
mbed_official | 237:f3da66175598 | 1547 | * @note: this function is mandatory to use the commutation event in order to |
mbed_official | 237:f3da66175598 | 1548 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
mbed_official | 237:f3da66175598 | 1549 | * the typical use of this feature is with the use of another Timer(interface Timer) |
mbed_official | 237:f3da66175598 | 1550 | * configured in Hall sensor interface, this interface Timer will generate the |
mbed_official | 237:f3da66175598 | 1551 | * commutation at its TRGO output (connected to Timer used in this function) each time |
mbed_official | 237:f3da66175598 | 1552 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
mbed_official | 237:f3da66175598 | 1553 | * @param htim: TIM handle |
mbed_official | 237:f3da66175598 | 1554 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
mbed_official | 237:f3da66175598 | 1555 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1556 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
mbed_official | 237:f3da66175598 | 1557 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
mbed_official | 237:f3da66175598 | 1558 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
mbed_official | 237:f3da66175598 | 1559 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
mbed_official | 237:f3da66175598 | 1560 | * @arg TIM_TS_NONE: No trigger is needed |
mbed_official | 237:f3da66175598 | 1561 | * @param CommutationSource : the Commutation Event source |
mbed_official | 237:f3da66175598 | 1562 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1563 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
mbed_official | 237:f3da66175598 | 1564 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
mbed_official | 237:f3da66175598 | 1565 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1566 | */ |
mbed_official | 237:f3da66175598 | 1567 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
mbed_official | 237:f3da66175598 | 1568 | { |
mbed_official | 237:f3da66175598 | 1569 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1570 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1571 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
mbed_official | 237:f3da66175598 | 1572 | |
mbed_official | 237:f3da66175598 | 1573 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 1574 | |
mbed_official | 237:f3da66175598 | 1575 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
mbed_official | 237:f3da66175598 | 1576 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
mbed_official | 237:f3da66175598 | 1577 | { |
mbed_official | 237:f3da66175598 | 1578 | /* Select the Input trigger */ |
mbed_official | 237:f3da66175598 | 1579 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
mbed_official | 237:f3da66175598 | 1580 | htim->Instance->SMCR |= InputTrigger; |
mbed_official | 237:f3da66175598 | 1581 | } |
mbed_official | 237:f3da66175598 | 1582 | |
mbed_official | 237:f3da66175598 | 1583 | /* Select the Capture Compare preload feature */ |
mbed_official | 237:f3da66175598 | 1584 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
mbed_official | 237:f3da66175598 | 1585 | /* Select the Commutation event source */ |
mbed_official | 237:f3da66175598 | 1586 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
mbed_official | 237:f3da66175598 | 1587 | htim->Instance->CR2 |= CommutationSource; |
mbed_official | 237:f3da66175598 | 1588 | |
mbed_official | 237:f3da66175598 | 1589 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 1590 | |
mbed_official | 237:f3da66175598 | 1591 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1592 | } |
mbed_official | 237:f3da66175598 | 1593 | |
mbed_official | 237:f3da66175598 | 1594 | /** |
mbed_official | 237:f3da66175598 | 1595 | * @brief Configure the TIM commutation event sequence with interrupt. |
mbed_official | 237:f3da66175598 | 1596 | * @note: this function is mandatory to use the commutation event in order to |
mbed_official | 237:f3da66175598 | 1597 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
mbed_official | 237:f3da66175598 | 1598 | * the typical use of this feature is with the use of another Timer(interface Timer) |
mbed_official | 237:f3da66175598 | 1599 | * configured in Hall sensor interface, this interface Timer will generate the |
mbed_official | 237:f3da66175598 | 1600 | * commutation at its TRGO output (connected to Timer used in this function) each time |
mbed_official | 237:f3da66175598 | 1601 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
mbed_official | 237:f3da66175598 | 1602 | * @param htim: TIM handle |
mbed_official | 237:f3da66175598 | 1603 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
mbed_official | 237:f3da66175598 | 1604 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1605 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
mbed_official | 237:f3da66175598 | 1606 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
mbed_official | 237:f3da66175598 | 1607 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
mbed_official | 237:f3da66175598 | 1608 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
mbed_official | 237:f3da66175598 | 1609 | * @arg TIM_TS_NONE: No trigger is needed |
mbed_official | 237:f3da66175598 | 1610 | * @param CommutationSource : the Commutation Event source |
mbed_official | 237:f3da66175598 | 1611 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1612 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
mbed_official | 237:f3da66175598 | 1613 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
mbed_official | 237:f3da66175598 | 1614 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1615 | */ |
mbed_official | 237:f3da66175598 | 1616 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
mbed_official | 237:f3da66175598 | 1617 | { |
mbed_official | 237:f3da66175598 | 1618 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1619 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1620 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
mbed_official | 237:f3da66175598 | 1621 | |
mbed_official | 237:f3da66175598 | 1622 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 1623 | |
mbed_official | 237:f3da66175598 | 1624 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
mbed_official | 237:f3da66175598 | 1625 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
mbed_official | 237:f3da66175598 | 1626 | { |
mbed_official | 237:f3da66175598 | 1627 | /* Select the Input trigger */ |
mbed_official | 237:f3da66175598 | 1628 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
mbed_official | 237:f3da66175598 | 1629 | htim->Instance->SMCR |= InputTrigger; |
mbed_official | 237:f3da66175598 | 1630 | } |
mbed_official | 237:f3da66175598 | 1631 | |
mbed_official | 237:f3da66175598 | 1632 | /* Select the Capture Compare preload feature */ |
mbed_official | 237:f3da66175598 | 1633 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
mbed_official | 237:f3da66175598 | 1634 | /* Select the Commutation event source */ |
mbed_official | 237:f3da66175598 | 1635 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
mbed_official | 237:f3da66175598 | 1636 | htim->Instance->CR2 |= CommutationSource; |
mbed_official | 237:f3da66175598 | 1637 | |
mbed_official | 237:f3da66175598 | 1638 | /* Enable the Commutation Interrupt Request */ |
mbed_official | 237:f3da66175598 | 1639 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); |
mbed_official | 237:f3da66175598 | 1640 | |
mbed_official | 237:f3da66175598 | 1641 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 1642 | |
mbed_official | 237:f3da66175598 | 1643 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1644 | } |
mbed_official | 237:f3da66175598 | 1645 | |
mbed_official | 237:f3da66175598 | 1646 | /** |
mbed_official | 237:f3da66175598 | 1647 | * @brief Configure the TIM commutation event sequence with DMA. |
mbed_official | 237:f3da66175598 | 1648 | * @note: this function is mandatory to use the commutation event in order to |
mbed_official | 237:f3da66175598 | 1649 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
mbed_official | 237:f3da66175598 | 1650 | * the typical use of this feature is with the use of another Timer(interface Timer) |
mbed_official | 237:f3da66175598 | 1651 | * configured in Hall sensor interface, this interface Timer will generate the |
mbed_official | 237:f3da66175598 | 1652 | * commutation at its TRGO output (connected to Timer used in this function) each time |
mbed_official | 237:f3da66175598 | 1653 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
mbed_official | 237:f3da66175598 | 1654 | * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set |
mbed_official | 237:f3da66175598 | 1655 | * @param htim: TIM handle |
mbed_official | 237:f3da66175598 | 1656 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
mbed_official | 237:f3da66175598 | 1657 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1658 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
mbed_official | 237:f3da66175598 | 1659 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
mbed_official | 237:f3da66175598 | 1660 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
mbed_official | 237:f3da66175598 | 1661 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
mbed_official | 237:f3da66175598 | 1662 | * @arg TIM_TS_NONE: No trigger is needed |
mbed_official | 237:f3da66175598 | 1663 | * @param CommutationSource : the Commutation Event source |
mbed_official | 237:f3da66175598 | 1664 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1665 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
mbed_official | 237:f3da66175598 | 1666 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
mbed_official | 237:f3da66175598 | 1667 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1668 | */ |
mbed_official | 237:f3da66175598 | 1669 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
mbed_official | 237:f3da66175598 | 1670 | { |
mbed_official | 237:f3da66175598 | 1671 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1672 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1673 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
mbed_official | 237:f3da66175598 | 1674 | |
mbed_official | 237:f3da66175598 | 1675 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 1676 | |
mbed_official | 237:f3da66175598 | 1677 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
mbed_official | 237:f3da66175598 | 1678 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
mbed_official | 237:f3da66175598 | 1679 | { |
mbed_official | 237:f3da66175598 | 1680 | /* Select the Input trigger */ |
mbed_official | 237:f3da66175598 | 1681 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
mbed_official | 237:f3da66175598 | 1682 | htim->Instance->SMCR |= InputTrigger; |
mbed_official | 237:f3da66175598 | 1683 | } |
mbed_official | 237:f3da66175598 | 1684 | |
mbed_official | 237:f3da66175598 | 1685 | /* Select the Capture Compare preload feature */ |
mbed_official | 237:f3da66175598 | 1686 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
mbed_official | 237:f3da66175598 | 1687 | /* Select the Commutation event source */ |
mbed_official | 237:f3da66175598 | 1688 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
mbed_official | 237:f3da66175598 | 1689 | htim->Instance->CR2 |= CommutationSource; |
mbed_official | 237:f3da66175598 | 1690 | |
mbed_official | 237:f3da66175598 | 1691 | /* Enable the Commutation DMA Request */ |
mbed_official | 237:f3da66175598 | 1692 | /* Set the DMA Commutation Callback */ |
mbed_official | 237:f3da66175598 | 1693 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt; |
mbed_official | 237:f3da66175598 | 1694 | /* Set the DMA error callback */ |
mbed_official | 237:f3da66175598 | 1695 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError; |
mbed_official | 237:f3da66175598 | 1696 | |
mbed_official | 237:f3da66175598 | 1697 | /* Enable the Commutation DMA Request */ |
mbed_official | 237:f3da66175598 | 1698 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); |
mbed_official | 237:f3da66175598 | 1699 | |
mbed_official | 237:f3da66175598 | 1700 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 1701 | |
mbed_official | 237:f3da66175598 | 1702 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1703 | } |
mbed_official | 237:f3da66175598 | 1704 | |
mbed_official | 237:f3da66175598 | 1705 | /** |
mbed_official | 237:f3da66175598 | 1706 | * @brief Initializes the TIM Output Compare Channels according to the specified |
mbed_official | 237:f3da66175598 | 1707 | * parameters in the TIM_OC_InitTypeDef. |
mbed_official | 237:f3da66175598 | 1708 | * @param htim: TIM Output Compare handle |
mbed_official | 237:f3da66175598 | 1709 | * @param sConfig: TIM Output Compare configuration structure |
mbed_official | 237:f3da66175598 | 1710 | * @param Channel : TIM Channels to configure |
mbed_official | 237:f3da66175598 | 1711 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1712 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1713 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1714 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 1715 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 1716 | * @arg TIM_CHANNEL_5: TIM Channel 5 selected |
mbed_official | 237:f3da66175598 | 1717 | * @arg TIM_CHANNEL_6: TIM Channel 6 selected |
mbed_official | 237:f3da66175598 | 1718 | * @arg TIM_CHANNEL_ALL: all output channels supported by the timer instance selected |
mbed_official | 237:f3da66175598 | 1719 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1720 | */ |
mbed_official | 237:f3da66175598 | 1721 | HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, |
mbed_official | 237:f3da66175598 | 1722 | TIM_OC_InitTypeDef* sConfig, |
mbed_official | 237:f3da66175598 | 1723 | uint32_t Channel) |
mbed_official | 237:f3da66175598 | 1724 | { |
mbed_official | 237:f3da66175598 | 1725 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1726 | assert_param(IS_TIM_CHANNELS(Channel)); |
mbed_official | 237:f3da66175598 | 1727 | assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); |
mbed_official | 237:f3da66175598 | 1728 | assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); |
mbed_official | 237:f3da66175598 | 1729 | assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity)); |
mbed_official | 237:f3da66175598 | 1730 | assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState)); |
mbed_official | 237:f3da66175598 | 1731 | assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState)); |
mbed_official | 237:f3da66175598 | 1732 | |
mbed_official | 237:f3da66175598 | 1733 | /* Check input state */ |
mbed_official | 237:f3da66175598 | 1734 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 1735 | |
mbed_official | 237:f3da66175598 | 1736 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 1737 | |
mbed_official | 237:f3da66175598 | 1738 | switch (Channel) |
mbed_official | 237:f3da66175598 | 1739 | { |
mbed_official | 237:f3da66175598 | 1740 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 1741 | { |
mbed_official | 237:f3da66175598 | 1742 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1743 | assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1744 | |
mbed_official | 237:f3da66175598 | 1745 | /* Configure the TIM Channel 1 in Output Compare */ |
mbed_official | 237:f3da66175598 | 1746 | TIM_OC1_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1747 | } |
mbed_official | 237:f3da66175598 | 1748 | break; |
mbed_official | 237:f3da66175598 | 1749 | |
mbed_official | 237:f3da66175598 | 1750 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 1751 | { |
mbed_official | 237:f3da66175598 | 1752 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1753 | assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1754 | |
mbed_official | 237:f3da66175598 | 1755 | /* Configure the TIM Channel 2 in Output Compare */ |
mbed_official | 237:f3da66175598 | 1756 | TIM_OC2_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1757 | } |
mbed_official | 237:f3da66175598 | 1758 | break; |
mbed_official | 237:f3da66175598 | 1759 | |
mbed_official | 237:f3da66175598 | 1760 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 1761 | { |
mbed_official | 237:f3da66175598 | 1762 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1763 | assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1764 | |
mbed_official | 237:f3da66175598 | 1765 | /* Configure the TIM Channel 3 in Output Compare */ |
mbed_official | 237:f3da66175598 | 1766 | TIM_OC3_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1767 | } |
mbed_official | 237:f3da66175598 | 1768 | break; |
mbed_official | 237:f3da66175598 | 1769 | |
mbed_official | 237:f3da66175598 | 1770 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 1771 | { |
mbed_official | 237:f3da66175598 | 1772 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1773 | assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1774 | |
mbed_official | 237:f3da66175598 | 1775 | /* Configure the TIM Channel 4 in Output Compare */ |
mbed_official | 237:f3da66175598 | 1776 | TIM_OC4_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1777 | } |
mbed_official | 237:f3da66175598 | 1778 | break; |
mbed_official | 237:f3da66175598 | 1779 | |
mbed_official | 237:f3da66175598 | 1780 | case TIM_CHANNEL_5: |
mbed_official | 237:f3da66175598 | 1781 | { |
mbed_official | 237:f3da66175598 | 1782 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1783 | assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1784 | |
mbed_official | 237:f3da66175598 | 1785 | /* Configure the TIM Channel 5 in Output Compare */ |
mbed_official | 237:f3da66175598 | 1786 | TIM_OC5_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1787 | } |
mbed_official | 237:f3da66175598 | 1788 | break; |
mbed_official | 237:f3da66175598 | 1789 | |
mbed_official | 237:f3da66175598 | 1790 | case TIM_CHANNEL_6: |
mbed_official | 237:f3da66175598 | 1791 | { |
mbed_official | 237:f3da66175598 | 1792 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1793 | assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1794 | |
mbed_official | 237:f3da66175598 | 1795 | /* Configure the TIM Channel 6 in Output Compare */ |
mbed_official | 237:f3da66175598 | 1796 | TIM_OC6_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1797 | } |
mbed_official | 237:f3da66175598 | 1798 | break; |
mbed_official | 237:f3da66175598 | 1799 | |
mbed_official | 237:f3da66175598 | 1800 | default: |
mbed_official | 237:f3da66175598 | 1801 | break; |
mbed_official | 237:f3da66175598 | 1802 | } |
mbed_official | 237:f3da66175598 | 1803 | |
mbed_official | 237:f3da66175598 | 1804 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 1805 | |
mbed_official | 237:f3da66175598 | 1806 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 1807 | |
mbed_official | 237:f3da66175598 | 1808 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1809 | } |
mbed_official | 237:f3da66175598 | 1810 | |
mbed_official | 237:f3da66175598 | 1811 | /** |
mbed_official | 237:f3da66175598 | 1812 | * @brief Initializes the TIM PWM channels according to the specified |
mbed_official | 237:f3da66175598 | 1813 | * parameters in the TIM_OC_InitTypeDef. |
mbed_official | 237:f3da66175598 | 1814 | * @param htim: TIM PWM handle |
mbed_official | 237:f3da66175598 | 1815 | * @param sConfig: TIM PWM configuration structure |
mbed_official | 237:f3da66175598 | 1816 | * @param Channel : TIM Channels to be configured |
mbed_official | 237:f3da66175598 | 1817 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1818 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 237:f3da66175598 | 1819 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 237:f3da66175598 | 1820 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 237:f3da66175598 | 1821 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 237:f3da66175598 | 1822 | * @arg TIM_CHANNEL_5: TIM Channel 5 selected |
mbed_official | 237:f3da66175598 | 1823 | * @arg TIM_CHANNEL_6: TIM Channel 6 selected |
mbed_official | 237:f3da66175598 | 1824 | * @arg TIM_CHANNEL_ALL: all PWM channels supported by the timer instance selected |
mbed_official | 237:f3da66175598 | 1825 | * @note For STM32F302xC, STM32F303xC, STM32F358xx and STM32F303x8 up to 6 PWM channels can |
mbed_official | 237:f3da66175598 | 1826 | * be configured |
mbed_official | 237:f3da66175598 | 1827 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 1828 | */ |
mbed_official | 237:f3da66175598 | 1829 | HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, |
mbed_official | 237:f3da66175598 | 1830 | TIM_OC_InitTypeDef* sConfig, |
mbed_official | 237:f3da66175598 | 1831 | uint32_t Channel) |
mbed_official | 237:f3da66175598 | 1832 | { |
mbed_official | 237:f3da66175598 | 1833 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1834 | assert_param(IS_TIM_CHANNELS(Channel)); |
mbed_official | 237:f3da66175598 | 1835 | assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); |
mbed_official | 237:f3da66175598 | 1836 | assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); |
mbed_official | 237:f3da66175598 | 1837 | assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity)); |
mbed_official | 237:f3da66175598 | 1838 | assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); |
mbed_official | 237:f3da66175598 | 1839 | assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState)); |
mbed_official | 237:f3da66175598 | 1840 | assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState)); |
mbed_official | 237:f3da66175598 | 1841 | |
mbed_official | 237:f3da66175598 | 1842 | /* Check input state */ |
mbed_official | 237:f3da66175598 | 1843 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 1844 | |
mbed_official | 237:f3da66175598 | 1845 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 1846 | |
mbed_official | 237:f3da66175598 | 1847 | switch (Channel) |
mbed_official | 237:f3da66175598 | 1848 | { |
mbed_official | 237:f3da66175598 | 1849 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 1850 | { |
mbed_official | 237:f3da66175598 | 1851 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1852 | assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1853 | |
mbed_official | 237:f3da66175598 | 1854 | /* Configure the Channel 1 in PWM mode */ |
mbed_official | 237:f3da66175598 | 1855 | TIM_OC1_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1856 | |
mbed_official | 237:f3da66175598 | 1857 | /* Set the Preload enable bit for channel1 */ |
mbed_official | 237:f3da66175598 | 1858 | htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; |
mbed_official | 237:f3da66175598 | 1859 | |
mbed_official | 237:f3da66175598 | 1860 | /* Configure the Output Fast mode */ |
mbed_official | 237:f3da66175598 | 1861 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; |
mbed_official | 237:f3da66175598 | 1862 | htim->Instance->CCMR1 |= sConfig->OCFastMode; |
mbed_official | 237:f3da66175598 | 1863 | } |
mbed_official | 237:f3da66175598 | 1864 | break; |
mbed_official | 237:f3da66175598 | 1865 | |
mbed_official | 237:f3da66175598 | 1866 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 1867 | { |
mbed_official | 237:f3da66175598 | 1868 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1869 | assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1870 | |
mbed_official | 237:f3da66175598 | 1871 | /* Configure the Channel 2 in PWM mode */ |
mbed_official | 237:f3da66175598 | 1872 | TIM_OC2_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1873 | |
mbed_official | 237:f3da66175598 | 1874 | /* Set the Preload enable bit for channel2 */ |
mbed_official | 237:f3da66175598 | 1875 | htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; |
mbed_official | 237:f3da66175598 | 1876 | |
mbed_official | 237:f3da66175598 | 1877 | /* Configure the Output Fast mode */ |
mbed_official | 237:f3da66175598 | 1878 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; |
mbed_official | 237:f3da66175598 | 1879 | htim->Instance->CCMR1 |= sConfig->OCFastMode << 8; |
mbed_official | 237:f3da66175598 | 1880 | } |
mbed_official | 237:f3da66175598 | 1881 | break; |
mbed_official | 237:f3da66175598 | 1882 | |
mbed_official | 237:f3da66175598 | 1883 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 1884 | { |
mbed_official | 237:f3da66175598 | 1885 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1886 | assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1887 | |
mbed_official | 237:f3da66175598 | 1888 | /* Configure the Channel 3 in PWM mode */ |
mbed_official | 237:f3da66175598 | 1889 | TIM_OC3_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1890 | |
mbed_official | 237:f3da66175598 | 1891 | /* Set the Preload enable bit for channel3 */ |
mbed_official | 237:f3da66175598 | 1892 | htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; |
mbed_official | 237:f3da66175598 | 1893 | |
mbed_official | 237:f3da66175598 | 1894 | /* Configure the Output Fast mode */ |
mbed_official | 237:f3da66175598 | 1895 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; |
mbed_official | 237:f3da66175598 | 1896 | htim->Instance->CCMR2 |= sConfig->OCFastMode; |
mbed_official | 237:f3da66175598 | 1897 | } |
mbed_official | 237:f3da66175598 | 1898 | break; |
mbed_official | 237:f3da66175598 | 1899 | |
mbed_official | 237:f3da66175598 | 1900 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 1901 | { |
mbed_official | 237:f3da66175598 | 1902 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1903 | assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1904 | |
mbed_official | 237:f3da66175598 | 1905 | /* Configure the Channel 4 in PWM mode */ |
mbed_official | 237:f3da66175598 | 1906 | TIM_OC4_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1907 | |
mbed_official | 237:f3da66175598 | 1908 | /* Set the Preload enable bit for channel4 */ |
mbed_official | 237:f3da66175598 | 1909 | htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; |
mbed_official | 237:f3da66175598 | 1910 | |
mbed_official | 237:f3da66175598 | 1911 | /* Configure the Output Fast mode */ |
mbed_official | 237:f3da66175598 | 1912 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; |
mbed_official | 237:f3da66175598 | 1913 | htim->Instance->CCMR2 |= sConfig->OCFastMode << 8; |
mbed_official | 237:f3da66175598 | 1914 | } |
mbed_official | 237:f3da66175598 | 1915 | break; |
mbed_official | 237:f3da66175598 | 1916 | |
mbed_official | 237:f3da66175598 | 1917 | case TIM_CHANNEL_5: |
mbed_official | 237:f3da66175598 | 1918 | { |
mbed_official | 237:f3da66175598 | 1919 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1920 | assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1921 | |
mbed_official | 237:f3da66175598 | 1922 | /* Configure the Channel 5 in PWM mode */ |
mbed_official | 237:f3da66175598 | 1923 | TIM_OC5_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1924 | |
mbed_official | 237:f3da66175598 | 1925 | /* Set the Preload enable bit for channel5*/ |
mbed_official | 237:f3da66175598 | 1926 | htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; |
mbed_official | 237:f3da66175598 | 1927 | |
mbed_official | 237:f3da66175598 | 1928 | /* Configure the Output Fast mode */ |
mbed_official | 237:f3da66175598 | 1929 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; |
mbed_official | 237:f3da66175598 | 1930 | htim->Instance->CCMR3 |= sConfig->OCFastMode; |
mbed_official | 237:f3da66175598 | 1931 | } |
mbed_official | 237:f3da66175598 | 1932 | break; |
mbed_official | 237:f3da66175598 | 1933 | |
mbed_official | 237:f3da66175598 | 1934 | case TIM_CHANNEL_6: |
mbed_official | 237:f3da66175598 | 1935 | { |
mbed_official | 237:f3da66175598 | 1936 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1937 | assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1938 | |
mbed_official | 237:f3da66175598 | 1939 | /* Configure the Channel 5 in PWM mode */ |
mbed_official | 237:f3da66175598 | 1940 | TIM_OC6_SetConfig(htim->Instance, sConfig); |
mbed_official | 237:f3da66175598 | 1941 | |
mbed_official | 237:f3da66175598 | 1942 | /* Set the Preload enable bit for channel6 */ |
mbed_official | 237:f3da66175598 | 1943 | htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; |
mbed_official | 237:f3da66175598 | 1944 | |
mbed_official | 237:f3da66175598 | 1945 | /* Configure the Output Fast mode */ |
mbed_official | 237:f3da66175598 | 1946 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; |
mbed_official | 237:f3da66175598 | 1947 | htim->Instance->CCMR3 |= sConfig->OCFastMode << 8; |
mbed_official | 237:f3da66175598 | 1948 | } |
mbed_official | 237:f3da66175598 | 1949 | break; |
mbed_official | 237:f3da66175598 | 1950 | |
mbed_official | 237:f3da66175598 | 1951 | default: |
mbed_official | 237:f3da66175598 | 1952 | break; |
mbed_official | 237:f3da66175598 | 1953 | } |
mbed_official | 237:f3da66175598 | 1954 | |
mbed_official | 237:f3da66175598 | 1955 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 1956 | |
mbed_official | 237:f3da66175598 | 1957 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 1958 | |
mbed_official | 237:f3da66175598 | 1959 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 1960 | } |
mbed_official | 237:f3da66175598 | 1961 | |
mbed_official | 237:f3da66175598 | 1962 | /** |
mbed_official | 237:f3da66175598 | 1963 | * @brief Configures the OCRef clear feature |
mbed_official | 237:f3da66175598 | 1964 | * @param htim: TIM handle |
mbed_official | 237:f3da66175598 | 1965 | * @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that |
mbed_official | 237:f3da66175598 | 1966 | * contains the OCREF clear feature and parameters for the TIM peripheral. |
mbed_official | 237:f3da66175598 | 1967 | * @param Channel: specifies the TIM Channel |
mbed_official | 237:f3da66175598 | 1968 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 1969 | * @arg TIM_Channel_1: TIM Channel 1 |
mbed_official | 237:f3da66175598 | 1970 | * @arg TIM_Channel_2: TIM Channel 2 |
mbed_official | 237:f3da66175598 | 1971 | * @arg TIM_Channel_3: TIM Channel 3 |
mbed_official | 237:f3da66175598 | 1972 | * @arg TIM_Channel_4: TIM Channel 4 |
mbed_official | 237:f3da66175598 | 1973 | * @arg TIM_Channel_5: TIM Channel 5 |
mbed_official | 237:f3da66175598 | 1974 | * @arg TIM_Channel_6: TIM Channel 6 |
mbed_official | 237:f3da66175598 | 1975 | * @note For STM32F302xC, STM32F303xC, STM32F358xx and STM32F303x8 up to 6 OC channels can |
mbed_official | 237:f3da66175598 | 1976 | * be configured |
mbed_official | 237:f3da66175598 | 1977 | * @retval None |
mbed_official | 237:f3da66175598 | 1978 | */ |
mbed_official | 237:f3da66175598 | 1979 | HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, |
mbed_official | 237:f3da66175598 | 1980 | TIM_ClearInputConfigTypeDef *sClearInputConfig, |
mbed_official | 237:f3da66175598 | 1981 | uint32_t Channel) |
mbed_official | 237:f3da66175598 | 1982 | { |
mbed_official | 237:f3da66175598 | 1983 | uint32_t tmpsmcr = 0; |
mbed_official | 237:f3da66175598 | 1984 | |
mbed_official | 237:f3da66175598 | 1985 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 1986 | assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 1987 | assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); |
mbed_official | 237:f3da66175598 | 1988 | |
mbed_official | 237:f3da66175598 | 1989 | /* Check input state */ |
mbed_official | 237:f3da66175598 | 1990 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 1991 | |
mbed_official | 237:f3da66175598 | 1992 | switch (sClearInputConfig->ClearInputSource) |
mbed_official | 237:f3da66175598 | 1993 | { |
mbed_official | 237:f3da66175598 | 1994 | case TIM_CLEARINPUTSOURCE_NONE: |
mbed_official | 237:f3da66175598 | 1995 | { |
mbed_official | 237:f3da66175598 | 1996 | /* Clear the OCREF clear selection bit */ |
mbed_official | 237:f3da66175598 | 1997 | tmpsmcr &= ~TIM_SMCR_OCCS; |
mbed_official | 237:f3da66175598 | 1998 | |
mbed_official | 237:f3da66175598 | 1999 | /* Clear the ETR Bits */ |
mbed_official | 237:f3da66175598 | 2000 | tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); |
mbed_official | 237:f3da66175598 | 2001 | |
mbed_official | 237:f3da66175598 | 2002 | /* Set TIMx_SMCR */ |
mbed_official | 237:f3da66175598 | 2003 | htim->Instance->SMCR = tmpsmcr; |
mbed_official | 237:f3da66175598 | 2004 | } |
mbed_official | 237:f3da66175598 | 2005 | break; |
mbed_official | 237:f3da66175598 | 2006 | |
mbed_official | 237:f3da66175598 | 2007 | case TIM_CLEARINPUTSOURCE_OCREFCLR: |
mbed_official | 237:f3da66175598 | 2008 | { |
mbed_official | 237:f3da66175598 | 2009 | /* Clear the OCREF clear selection bit */ |
mbed_official | 237:f3da66175598 | 2010 | htim->Instance->SMCR &= ~TIM_SMCR_OCCS; |
mbed_official | 237:f3da66175598 | 2011 | } |
mbed_official | 237:f3da66175598 | 2012 | break; |
mbed_official | 237:f3da66175598 | 2013 | |
mbed_official | 237:f3da66175598 | 2014 | case TIM_CLEARINPUTSOURCE_ETR: |
mbed_official | 237:f3da66175598 | 2015 | { |
mbed_official | 237:f3da66175598 | 2016 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 2017 | assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); |
mbed_official | 237:f3da66175598 | 2018 | assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); |
mbed_official | 237:f3da66175598 | 2019 | assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); |
mbed_official | 237:f3da66175598 | 2020 | |
mbed_official | 237:f3da66175598 | 2021 | TIM_ETR_SetConfig(htim->Instance, |
mbed_official | 237:f3da66175598 | 2022 | sClearInputConfig->ClearInputPrescaler, |
mbed_official | 237:f3da66175598 | 2023 | sClearInputConfig->ClearInputPolarity, |
mbed_official | 237:f3da66175598 | 2024 | sClearInputConfig->ClearInputFilter); |
mbed_official | 237:f3da66175598 | 2025 | |
mbed_official | 237:f3da66175598 | 2026 | /* Set the OCREF clear selection bit */ |
mbed_official | 237:f3da66175598 | 2027 | htim->Instance->SMCR |= TIM_SMCR_OCCS; |
mbed_official | 237:f3da66175598 | 2028 | } |
mbed_official | 237:f3da66175598 | 2029 | break; |
mbed_official | 237:f3da66175598 | 2030 | } |
mbed_official | 237:f3da66175598 | 2031 | |
mbed_official | 237:f3da66175598 | 2032 | switch (Channel) |
mbed_official | 237:f3da66175598 | 2033 | { |
mbed_official | 237:f3da66175598 | 2034 | case TIM_CHANNEL_1: |
mbed_official | 237:f3da66175598 | 2035 | { |
mbed_official | 237:f3da66175598 | 2036 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 237:f3da66175598 | 2037 | { |
mbed_official | 237:f3da66175598 | 2038 | /* Enable the Ocref clear feature for Channel 1 */ |
mbed_official | 237:f3da66175598 | 2039 | htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE; |
mbed_official | 237:f3da66175598 | 2040 | } |
mbed_official | 237:f3da66175598 | 2041 | else |
mbed_official | 237:f3da66175598 | 2042 | { |
mbed_official | 237:f3da66175598 | 2043 | /* Disable the Ocref clear feature for Channel 1 */ |
mbed_official | 237:f3da66175598 | 2044 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE; |
mbed_official | 237:f3da66175598 | 2045 | } |
mbed_official | 237:f3da66175598 | 2046 | } |
mbed_official | 237:f3da66175598 | 2047 | break; |
mbed_official | 237:f3da66175598 | 2048 | case TIM_CHANNEL_2: |
mbed_official | 237:f3da66175598 | 2049 | { |
mbed_official | 237:f3da66175598 | 2050 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 237:f3da66175598 | 2051 | { |
mbed_official | 237:f3da66175598 | 2052 | /* Enable the Ocref clear feature for Channel 2 */ |
mbed_official | 237:f3da66175598 | 2053 | htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE; |
mbed_official | 237:f3da66175598 | 2054 | } |
mbed_official | 237:f3da66175598 | 2055 | else |
mbed_official | 237:f3da66175598 | 2056 | { |
mbed_official | 237:f3da66175598 | 2057 | /* Disable the Ocref clear feature for Channel 2 */ |
mbed_official | 237:f3da66175598 | 2058 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE; |
mbed_official | 237:f3da66175598 | 2059 | } |
mbed_official | 237:f3da66175598 | 2060 | } |
mbed_official | 237:f3da66175598 | 2061 | break; |
mbed_official | 237:f3da66175598 | 2062 | case TIM_CHANNEL_3: |
mbed_official | 237:f3da66175598 | 2063 | { |
mbed_official | 237:f3da66175598 | 2064 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 237:f3da66175598 | 2065 | { |
mbed_official | 237:f3da66175598 | 2066 | /* Enable the Ocref clear feature for Channel 3 */ |
mbed_official | 237:f3da66175598 | 2067 | htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE; |
mbed_official | 237:f3da66175598 | 2068 | } |
mbed_official | 237:f3da66175598 | 2069 | else |
mbed_official | 237:f3da66175598 | 2070 | { |
mbed_official | 237:f3da66175598 | 2071 | /* Disable the Ocref clear feature for Channel 3 */ |
mbed_official | 237:f3da66175598 | 2072 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE; |
mbed_official | 237:f3da66175598 | 2073 | } |
mbed_official | 237:f3da66175598 | 2074 | } |
mbed_official | 237:f3da66175598 | 2075 | break; |
mbed_official | 237:f3da66175598 | 2076 | case TIM_CHANNEL_4: |
mbed_official | 237:f3da66175598 | 2077 | { |
mbed_official | 237:f3da66175598 | 2078 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 237:f3da66175598 | 2079 | { |
mbed_official | 237:f3da66175598 | 2080 | /* Enable the Ocref clear feature for Channel 4 */ |
mbed_official | 237:f3da66175598 | 2081 | htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE; |
mbed_official | 237:f3da66175598 | 2082 | } |
mbed_official | 237:f3da66175598 | 2083 | else |
mbed_official | 237:f3da66175598 | 2084 | { |
mbed_official | 237:f3da66175598 | 2085 | /* Disable the Ocref clear feature for Channel 4 */ |
mbed_official | 237:f3da66175598 | 2086 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE; |
mbed_official | 237:f3da66175598 | 2087 | } |
mbed_official | 237:f3da66175598 | 2088 | } |
mbed_official | 237:f3da66175598 | 2089 | break; |
mbed_official | 237:f3da66175598 | 2090 | case TIM_CHANNEL_5: |
mbed_official | 237:f3da66175598 | 2091 | { |
mbed_official | 237:f3da66175598 | 2092 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 237:f3da66175598 | 2093 | { |
mbed_official | 237:f3da66175598 | 2094 | /* Enable the Ocref clear feature for Channel 1 */ |
mbed_official | 237:f3da66175598 | 2095 | htim->Instance->CCMR3 |= TIM_CCMR3_OC5CE; |
mbed_official | 237:f3da66175598 | 2096 | } |
mbed_official | 237:f3da66175598 | 2097 | else |
mbed_official | 237:f3da66175598 | 2098 | { |
mbed_official | 237:f3da66175598 | 2099 | /* Disable the Ocref clear feature for Channel 1 */ |
mbed_official | 237:f3da66175598 | 2100 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5CE; |
mbed_official | 237:f3da66175598 | 2101 | } |
mbed_official | 237:f3da66175598 | 2102 | } |
mbed_official | 237:f3da66175598 | 2103 | break; |
mbed_official | 237:f3da66175598 | 2104 | case TIM_CHANNEL_6: |
mbed_official | 237:f3da66175598 | 2105 | { |
mbed_official | 237:f3da66175598 | 2106 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 237:f3da66175598 | 2107 | { |
mbed_official | 237:f3da66175598 | 2108 | /* Enable the Ocref clear feature for Channel 1 */ |
mbed_official | 237:f3da66175598 | 2109 | htim->Instance->CCMR3 |= TIM_CCMR3_OC6CE; |
mbed_official | 237:f3da66175598 | 2110 | } |
mbed_official | 237:f3da66175598 | 2111 | else |
mbed_official | 237:f3da66175598 | 2112 | { |
mbed_official | 237:f3da66175598 | 2113 | /* Disable the Ocref clear feature for Channel 1 */ |
mbed_official | 237:f3da66175598 | 2114 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6CE; |
mbed_official | 237:f3da66175598 | 2115 | } |
mbed_official | 237:f3da66175598 | 2116 | } |
mbed_official | 237:f3da66175598 | 2117 | break; |
mbed_official | 237:f3da66175598 | 2118 | default: |
mbed_official | 237:f3da66175598 | 2119 | break; |
mbed_official | 237:f3da66175598 | 2120 | } |
mbed_official | 237:f3da66175598 | 2121 | |
mbed_official | 237:f3da66175598 | 2122 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 2123 | |
mbed_official | 237:f3da66175598 | 2124 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 2125 | } |
mbed_official | 237:f3da66175598 | 2126 | |
mbed_official | 237:f3da66175598 | 2127 | /** |
mbed_official | 237:f3da66175598 | 2128 | * @brief Configures the TIM in master mode. |
mbed_official | 237:f3da66175598 | 2129 | * @param htim: TIM handle. |
mbed_official | 237:f3da66175598 | 2130 | * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that |
mbed_official | 237:f3da66175598 | 2131 | * contains the selected trigger output (TRGO) and the Master/Slave |
mbed_official | 237:f3da66175598 | 2132 | * mode. |
mbed_official | 237:f3da66175598 | 2133 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 2134 | */ |
mbed_official | 237:f3da66175598 | 2135 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, |
mbed_official | 237:f3da66175598 | 2136 | TIM_MasterConfigTypeDef * sMasterConfig) |
mbed_official | 237:f3da66175598 | 2137 | { |
mbed_official | 237:f3da66175598 | 2138 | uint32_t tmpcr2; |
mbed_official | 237:f3da66175598 | 2139 | uint32_t tmpsmcr; |
mbed_official | 237:f3da66175598 | 2140 | |
mbed_official | 237:f3da66175598 | 2141 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 2142 | assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 2143 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
mbed_official | 237:f3da66175598 | 2144 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
mbed_official | 237:f3da66175598 | 2145 | |
mbed_official | 237:f3da66175598 | 2146 | /* Check input state */ |
mbed_official | 237:f3da66175598 | 2147 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 2148 | |
mbed_official | 237:f3da66175598 | 2149 | /* Get the TIMx CR2 register value */ |
mbed_official | 237:f3da66175598 | 2150 | tmpcr2 = htim->Instance->CR2; |
mbed_official | 237:f3da66175598 | 2151 | |
mbed_official | 237:f3da66175598 | 2152 | /* Get the TIMx SMCR register value */ |
mbed_official | 237:f3da66175598 | 2153 | tmpsmcr = htim->Instance->SMCR; |
mbed_official | 237:f3da66175598 | 2154 | |
mbed_official | 237:f3da66175598 | 2155 | /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ |
mbed_official | 237:f3da66175598 | 2156 | if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) |
mbed_official | 237:f3da66175598 | 2157 | { |
mbed_official | 237:f3da66175598 | 2158 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 2159 | assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); |
mbed_official | 237:f3da66175598 | 2160 | |
mbed_official | 237:f3da66175598 | 2161 | /* Clear the MMS2 bits */ |
mbed_official | 237:f3da66175598 | 2162 | tmpcr2 &= ~TIM_CR2_MMS2; |
mbed_official | 237:f3da66175598 | 2163 | /* Select the TRGO2 source*/ |
mbed_official | 237:f3da66175598 | 2164 | tmpcr2 |= sMasterConfig->MasterOutputTrigger2; |
mbed_official | 237:f3da66175598 | 2165 | } |
mbed_official | 237:f3da66175598 | 2166 | |
mbed_official | 237:f3da66175598 | 2167 | /* Reset the MMS Bits */ |
mbed_official | 237:f3da66175598 | 2168 | tmpcr2 &= ~TIM_CR2_MMS; |
mbed_official | 237:f3da66175598 | 2169 | /* Select the TRGO source */ |
mbed_official | 237:f3da66175598 | 2170 | tmpcr2 |= sMasterConfig->MasterOutputTrigger; |
mbed_official | 237:f3da66175598 | 2171 | |
mbed_official | 237:f3da66175598 | 2172 | /* Reset the MSM Bit */ |
mbed_official | 237:f3da66175598 | 2173 | tmpsmcr &= ~TIM_SMCR_MSM; |
mbed_official | 237:f3da66175598 | 2174 | /* Set master mode */ |
mbed_official | 237:f3da66175598 | 2175 | tmpsmcr |= sMasterConfig->MasterSlaveMode; |
mbed_official | 237:f3da66175598 | 2176 | |
mbed_official | 237:f3da66175598 | 2177 | /* Update TIMx CR2 */ |
mbed_official | 237:f3da66175598 | 2178 | htim->Instance->CR2 = tmpcr2; |
mbed_official | 237:f3da66175598 | 2179 | |
mbed_official | 237:f3da66175598 | 2180 | /* Update TIMx SMCR */ |
mbed_official | 237:f3da66175598 | 2181 | htim->Instance->SMCR = tmpsmcr; |
mbed_official | 237:f3da66175598 | 2182 | |
mbed_official | 237:f3da66175598 | 2183 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 2184 | |
mbed_official | 237:f3da66175598 | 2185 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 2186 | } |
mbed_official | 237:f3da66175598 | 2187 | #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
mbed_official | 237:f3da66175598 | 2188 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
mbed_official | 237:f3da66175598 | 2189 | /* STM32F303x8 || STM32F334x8 || STM32F328xx */ |
mbed_official | 237:f3da66175598 | 2190 | |
mbed_official | 237:f3da66175598 | 2191 | #if defined(STM32F373xC) || defined(STM32F378xx) |
mbed_official | 237:f3da66175598 | 2192 | /** |
mbed_official | 237:f3da66175598 | 2193 | * @brief Configures the TIM in master mode. |
mbed_official | 237:f3da66175598 | 2194 | * @param htim: TIM handle. |
mbed_official | 237:f3da66175598 | 2195 | * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that |
mbed_official | 237:f3da66175598 | 2196 | * contains the selected trigger output (TRGO) and the Master/Slave |
mbed_official | 237:f3da66175598 | 2197 | * mode. |
mbed_official | 237:f3da66175598 | 2198 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 2199 | */ |
mbed_official | 237:f3da66175598 | 2200 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig) |
mbed_official | 237:f3da66175598 | 2201 | { |
mbed_official | 237:f3da66175598 | 2202 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 2203 | assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 2204 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
mbed_official | 237:f3da66175598 | 2205 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
mbed_official | 237:f3da66175598 | 2206 | |
mbed_official | 237:f3da66175598 | 2207 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 2208 | |
mbed_official | 237:f3da66175598 | 2209 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 2210 | |
mbed_official | 237:f3da66175598 | 2211 | /* Reset the MMS Bits */ |
mbed_official | 237:f3da66175598 | 2212 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
mbed_official | 237:f3da66175598 | 2213 | /* Select the TRGO source */ |
mbed_official | 237:f3da66175598 | 2214 | htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; |
mbed_official | 237:f3da66175598 | 2215 | |
mbed_official | 237:f3da66175598 | 2216 | /* Reset the MSM Bit */ |
mbed_official | 237:f3da66175598 | 2217 | htim->Instance->SMCR &= ~TIM_SMCR_MSM; |
mbed_official | 237:f3da66175598 | 2218 | /* Set or Reset the MSM Bit */ |
mbed_official | 237:f3da66175598 | 2219 | htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; |
mbed_official | 237:f3da66175598 | 2220 | |
mbed_official | 237:f3da66175598 | 2221 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 2222 | |
mbed_official | 237:f3da66175598 | 2223 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 2224 | |
mbed_official | 237:f3da66175598 | 2225 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 2226 | } |
mbed_official | 237:f3da66175598 | 2227 | #endif /* STM32F373xC || STM32F378xx */ |
mbed_official | 237:f3da66175598 | 2228 | |
mbed_official | 237:f3da66175598 | 2229 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
mbed_official | 237:f3da66175598 | 2230 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
mbed_official | 237:f3da66175598 | 2231 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
mbed_official | 237:f3da66175598 | 2232 | /** |
mbed_official | 237:f3da66175598 | 2233 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
mbed_official | 237:f3da66175598 | 2234 | * and the AOE(automatic output enable). |
mbed_official | 237:f3da66175598 | 2235 | * @param htim: TIM handle |
mbed_official | 237:f3da66175598 | 2236 | * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that |
mbed_official | 237:f3da66175598 | 2237 | * contains the BDTR Register configuration information for the TIM peripheral. |
mbed_official | 237:f3da66175598 | 2238 | * @note For STM32F302xC, STM32F303xC, STM32F358xx and STM32F303x8 two break inputs can be configured. |
mbed_official | 237:f3da66175598 | 2239 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 2240 | */ |
mbed_official | 237:f3da66175598 | 2241 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
mbed_official | 237:f3da66175598 | 2242 | TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) |
mbed_official | 237:f3da66175598 | 2243 | { |
mbed_official | 237:f3da66175598 | 2244 | uint32_t tmpbdtr = 0; |
mbed_official | 237:f3da66175598 | 2245 | |
mbed_official | 237:f3da66175598 | 2246 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 2247 | assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 2248 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
mbed_official | 237:f3da66175598 | 2249 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
mbed_official | 237:f3da66175598 | 2250 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
mbed_official | 237:f3da66175598 | 2251 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
mbed_official | 237:f3da66175598 | 2252 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
mbed_official | 237:f3da66175598 | 2253 | assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); |
mbed_official | 237:f3da66175598 | 2254 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
mbed_official | 237:f3da66175598 | 2255 | |
mbed_official | 237:f3da66175598 | 2256 | /* Check input state */ |
mbed_official | 237:f3da66175598 | 2257 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 2258 | |
mbed_official | 237:f3da66175598 | 2259 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
mbed_official | 237:f3da66175598 | 2260 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
mbed_official | 237:f3da66175598 | 2261 | if (IS_TIM_BKIN2_INSTANCE(htim->Instance)) |
mbed_official | 237:f3da66175598 | 2262 | { |
mbed_official | 237:f3da66175598 | 2263 | assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State)); |
mbed_official | 237:f3da66175598 | 2264 | assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); |
mbed_official | 237:f3da66175598 | 2265 | assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); |
mbed_official | 237:f3da66175598 | 2266 | |
mbed_official | 237:f3da66175598 | 2267 | /* Clear the BDTR bits */ |
mbed_official | 237:f3da66175598 | 2268 | tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI | |
mbed_official | 237:f3da66175598 | 2269 | TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP | |
mbed_official | 237:f3da66175598 | 2270 | TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF | |
mbed_official | 237:f3da66175598 | 2271 | TIM_BDTR_BK2F | TIM_BDTR_BK2E | TIM_BDTR_BK2P); |
mbed_official | 237:f3da66175598 | 2272 | |
mbed_official | 237:f3da66175598 | 2273 | /* Set the BDTR bits */ |
mbed_official | 237:f3da66175598 | 2274 | tmpbdtr |= sBreakDeadTimeConfig->DeadTime; |
mbed_official | 237:f3da66175598 | 2275 | tmpbdtr |= sBreakDeadTimeConfig->LockLevel; |
mbed_official | 237:f3da66175598 | 2276 | tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode; |
mbed_official | 237:f3da66175598 | 2277 | tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode; |
mbed_official | 237:f3da66175598 | 2278 | tmpbdtr |= sBreakDeadTimeConfig->BreakState; |
mbed_official | 237:f3da66175598 | 2279 | tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity; |
mbed_official | 237:f3da66175598 | 2280 | tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput; |
mbed_official | 237:f3da66175598 | 2281 | tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT); |
mbed_official | 237:f3da66175598 | 2282 | tmpbdtr |= (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT); |
mbed_official | 237:f3da66175598 | 2283 | tmpbdtr |= sBreakDeadTimeConfig->Break2State; |
mbed_official | 237:f3da66175598 | 2284 | tmpbdtr |= sBreakDeadTimeConfig->Break2Polarity; |
mbed_official | 237:f3da66175598 | 2285 | } |
mbed_official | 237:f3da66175598 | 2286 | else |
mbed_official | 237:f3da66175598 | 2287 | { |
mbed_official | 237:f3da66175598 | 2288 | /* Clear the BDTR bits */ |
mbed_official | 237:f3da66175598 | 2289 | tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI | |
mbed_official | 237:f3da66175598 | 2290 | TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP | |
mbed_official | 237:f3da66175598 | 2291 | TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF); |
mbed_official | 237:f3da66175598 | 2292 | |
mbed_official | 237:f3da66175598 | 2293 | /* Set the BDTR bits */ |
mbed_official | 237:f3da66175598 | 2294 | tmpbdtr |= sBreakDeadTimeConfig->DeadTime; |
mbed_official | 237:f3da66175598 | 2295 | tmpbdtr |= sBreakDeadTimeConfig->LockLevel; |
mbed_official | 237:f3da66175598 | 2296 | tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode; |
mbed_official | 237:f3da66175598 | 2297 | tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode; |
mbed_official | 237:f3da66175598 | 2298 | tmpbdtr |= sBreakDeadTimeConfig->BreakState; |
mbed_official | 237:f3da66175598 | 2299 | tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity; |
mbed_official | 237:f3da66175598 | 2300 | tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput; |
mbed_official | 237:f3da66175598 | 2301 | tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT); |
mbed_official | 237:f3da66175598 | 2302 | } |
mbed_official | 237:f3da66175598 | 2303 | |
mbed_official | 237:f3da66175598 | 2304 | /* Set TIMx_BDTR */ |
mbed_official | 237:f3da66175598 | 2305 | htim->Instance->BDTR = tmpbdtr; |
mbed_official | 237:f3da66175598 | 2306 | |
mbed_official | 237:f3da66175598 | 2307 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 2308 | |
mbed_official | 237:f3da66175598 | 2309 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 2310 | } |
mbed_official | 237:f3da66175598 | 2311 | #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
mbed_official | 237:f3da66175598 | 2312 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
mbed_official | 237:f3da66175598 | 2313 | /* STM32F303x8 || STM32F334x8 || STM32F328xx */ |
mbed_official | 237:f3da66175598 | 2314 | |
mbed_official | 237:f3da66175598 | 2315 | #if defined(STM32F373xC) || defined(STM32F378xx) |
mbed_official | 237:f3da66175598 | 2316 | /** |
mbed_official | 237:f3da66175598 | 2317 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
mbed_official | 237:f3da66175598 | 2318 | * and the AOE(automatic output enable). |
mbed_official | 237:f3da66175598 | 2319 | * @param htim: TIM handle |
mbed_official | 237:f3da66175598 | 2320 | * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that |
mbed_official | 237:f3da66175598 | 2321 | * contains the BDTR Register configuration information for the TIM peripheral. |
mbed_official | 237:f3da66175598 | 2322 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 2323 | */ |
mbed_official | 237:f3da66175598 | 2324 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
mbed_official | 237:f3da66175598 | 2325 | TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) |
mbed_official | 237:f3da66175598 | 2326 | { |
mbed_official | 237:f3da66175598 | 2327 | /* Check the parameters */ |
mbed_official | 237:f3da66175598 | 2328 | assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 2329 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
mbed_official | 237:f3da66175598 | 2330 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
mbed_official | 237:f3da66175598 | 2331 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
mbed_official | 237:f3da66175598 | 2332 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
mbed_official | 237:f3da66175598 | 2333 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
mbed_official | 237:f3da66175598 | 2334 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
mbed_official | 237:f3da66175598 | 2335 | |
mbed_official | 237:f3da66175598 | 2336 | /* Process Locked */ |
mbed_official | 237:f3da66175598 | 2337 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 2338 | |
mbed_official | 237:f3da66175598 | 2339 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 2340 | |
mbed_official | 237:f3da66175598 | 2341 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
mbed_official | 237:f3da66175598 | 2342 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
mbed_official | 237:f3da66175598 | 2343 | htim->Instance->BDTR = (uint32_t)sBreakDeadTimeConfig->OffStateRunMode | |
mbed_official | 237:f3da66175598 | 2344 | sBreakDeadTimeConfig->OffStateIDLEMode | |
mbed_official | 237:f3da66175598 | 2345 | sBreakDeadTimeConfig->LockLevel | |
mbed_official | 237:f3da66175598 | 2346 | sBreakDeadTimeConfig->DeadTime | |
mbed_official | 237:f3da66175598 | 2347 | sBreakDeadTimeConfig->BreakState | |
mbed_official | 237:f3da66175598 | 2348 | sBreakDeadTimeConfig->BreakPolarity | |
mbed_official | 237:f3da66175598 | 2349 | sBreakDeadTimeConfig->AutomaticOutput; |
mbed_official | 237:f3da66175598 | 2350 | |
mbed_official | 237:f3da66175598 | 2351 | |
mbed_official | 237:f3da66175598 | 2352 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 2353 | |
mbed_official | 237:f3da66175598 | 2354 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 2355 | |
mbed_official | 237:f3da66175598 | 2356 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 2357 | } |
mbed_official | 237:f3da66175598 | 2358 | #endif /* STM32F373xC || STM32F378xx */ |
mbed_official | 237:f3da66175598 | 2359 | |
mbed_official | 237:f3da66175598 | 2360 | #if defined(STM32F303xC) || defined(STM32F358xx) |
mbed_official | 237:f3da66175598 | 2361 | /** |
mbed_official | 237:f3da66175598 | 2362 | * @brief Configures the TIM1, TIM8 and TIM16 Remapping input capabilities. |
mbed_official | 237:f3da66175598 | 2363 | * @param htim: TIM handle. |
mbed_official | 237:f3da66175598 | 2364 | * @param Remap1: specifies the first TIM remapping source. |
mbed_official | 237:f3da66175598 | 2365 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 2366 | * @arg TIM_TIM1_ADC1_NONE: TIM1_ETR is not connected to any AWD (analog watchdog) |
mbed_official | 237:f3da66175598 | 2367 | * @arg TIM_TIM1_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 |
mbed_official | 237:f3da66175598 | 2368 | * @arg TIM_TIM1_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 |
mbed_official | 237:f3da66175598 | 2369 | * @arg TIM_TIM1_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3 |
mbed_official | 237:f3da66175598 | 2370 | * @arg TIM_TIM8_ADC2_NONE: TIM8_ETR is not connected to any AWD |
mbed_official | 237:f3da66175598 | 2371 | * @arg TIM_TIM8_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1 |
mbed_official | 237:f3da66175598 | 2372 | * @arg TIM_TIM8_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2 |
mbed_official | 237:f3da66175598 | 2373 | * @arg TIM_TIM8_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3 |
mbed_official | 237:f3da66175598 | 2374 | * @arg TIM_TIM16_GPIO: TIM16 TI1 is connected to GPIO |
mbed_official | 237:f3da66175598 | 2375 | * @arg TIM_TIM16_RTC: TIM16 TI1 is connected to RTC clock |
mbed_official | 237:f3da66175598 | 2376 | * @arg TIM_TIM16_HSE: TIM16 TI1 is connected to HSE/32 |
mbed_official | 237:f3da66175598 | 2377 | * @arg TIM_TIM16_MCO: TIM16 TI1 is connected to MCO |
mbed_official | 237:f3da66175598 | 2378 | * @param Remap2: specifies the second TIMremapping source (if any). |
mbed_official | 237:f3da66175598 | 2379 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 2380 | * @arg TIM_TIM1_ADC4_NONE: TIM1_ETR is not connected to any AWD (analog watchdog) |
mbed_official | 237:f3da66175598 | 2381 | * @arg TIM_TIM1_ADC4_AWD1: TIM1_ETR is connected to ADC4 AWD1 |
mbed_official | 237:f3da66175598 | 2382 | * @arg TIM_TIM1_ADC4_AWD2: TIM1_ETR is connected to ADC4 AWD2 |
mbed_official | 237:f3da66175598 | 2383 | * @arg TIM_TIM1_ADC4_AWD3: TIM1_ETR is connected to ADC4 AWD3 |
mbed_official | 237:f3da66175598 | 2384 | * @arg TIM_TIM8_ADC3_NONE: TIM8_ETR is not connected to any AWD |
mbed_official | 237:f3da66175598 | 2385 | * @arg TIM_TIM8_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1 |
mbed_official | 237:f3da66175598 | 2386 | * @arg TIM_TIM8_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2 |
mbed_official | 237:f3da66175598 | 2387 | * @arg TIM_TIM8_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3 |
mbed_official | 237:f3da66175598 | 2388 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 2389 | */ |
mbed_official | 237:f3da66175598 | 2390 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap1, uint32_t Remap2) |
mbed_official | 237:f3da66175598 | 2391 | { |
mbed_official | 237:f3da66175598 | 2392 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 2393 | |
mbed_official | 237:f3da66175598 | 2394 | /* Check parameters */ |
mbed_official | 237:f3da66175598 | 2395 | assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 2396 | assert_param(IS_TIM_REMAP(Remap1)); |
mbed_official | 237:f3da66175598 | 2397 | assert_param(IS_TIM_REMAP2(Remap2)); |
mbed_official | 237:f3da66175598 | 2398 | |
mbed_official | 237:f3da66175598 | 2399 | /* Set the Timer remapping configuration */ |
mbed_official | 237:f3da66175598 | 2400 | htim->Instance->OR = Remap1 | Remap2; |
mbed_official | 237:f3da66175598 | 2401 | |
mbed_official | 237:f3da66175598 | 2402 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 2403 | |
mbed_official | 237:f3da66175598 | 2404 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 2405 | |
mbed_official | 237:f3da66175598 | 2406 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 2407 | } |
mbed_official | 237:f3da66175598 | 2408 | #endif /* STM32F303xC || STM32F358xx */ |
mbed_official | 237:f3da66175598 | 2409 | |
mbed_official | 237:f3da66175598 | 2410 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
mbed_official | 237:f3da66175598 | 2411 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
mbed_official | 237:f3da66175598 | 2412 | defined(STM32F373xC) || defined(STM32F378xx) |
mbed_official | 237:f3da66175598 | 2413 | /** |
mbed_official | 237:f3da66175598 | 2414 | * @brief Configures the TIM2 and TIM14 Remapping input capabilities. |
mbed_official | 237:f3da66175598 | 2415 | * @param htim: TIM handle. |
mbed_official | 237:f3da66175598 | 2416 | * @param Remap: specifies the TIM remapping source. |
mbed_official | 237:f3da66175598 | 2417 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 2418 | * STM32F373xC, STM32F378xx: |
mbed_official | 237:f3da66175598 | 2419 | * @arg TIM_TIM2_TIM8_TRGO: TIM8 TRGOUT is connected to TIM2_ITR1 |
mbed_official | 237:f3da66175598 | 2420 | * @arg TIM_TIM2_ETH_PTP: PTP trigger output is connected to TIM2_ITR1 |
mbed_official | 237:f3da66175598 | 2421 | * @arg TIM_TIM2_USBFS_SOF: OTG FS SOF is connected to the TIM2_ITR1 input |
mbed_official | 237:f3da66175598 | 2422 | * @arg TIM_TIM2_USBHS_SOF: OTG HS SOF is connected to the TIM2_ITR1 input |
mbed_official | 237:f3da66175598 | 2423 | * @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO |
mbed_official | 237:f3da66175598 | 2424 | * @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock |
mbed_official | 237:f3da66175598 | 2425 | * @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32 |
mbed_official | 237:f3da66175598 | 2426 | * @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO |
mbed_official | 237:f3da66175598 | 2427 | * STM32F303x8,STM32F334x8, STM32F328xx, STM32F301x8, STM32F302x8, STM32F318xx: |
mbed_official | 237:f3da66175598 | 2428 | * @arg TIM_TIM1_ADC1_NONE: TIM1_ETR is not connected to any AWD (analog watchdog) |
mbed_official | 237:f3da66175598 | 2429 | * @arg TIM_TIM1_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 |
mbed_official | 237:f3da66175598 | 2430 | * @arg TIM_TIM1_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 |
mbed_official | 237:f3da66175598 | 2431 | * @arg TIM_TIM1_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3 |
mbed_official | 237:f3da66175598 | 2432 | * @arg TIM_TIM16_GPIO: TIM16 TI1 is connected to GPIO |
mbed_official | 237:f3da66175598 | 2433 | * @arg TIM_TIM16_RTC: TIM16 TI1 is connected to RTC_clock |
mbed_official | 237:f3da66175598 | 2434 | * @arg TIM_TIM16_HSE: TIM16 TI1 is connected to HSE/32 |
mbed_official | 237:f3da66175598 | 2435 | * @arg TIM_TIM16_MCO: TIM16 TI1 is connected to MCO |
mbed_official | 237:f3da66175598 | 2436 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 2437 | */ |
mbed_official | 237:f3da66175598 | 2438 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) |
mbed_official | 237:f3da66175598 | 2439 | { |
mbed_official | 237:f3da66175598 | 2440 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 2441 | |
mbed_official | 237:f3da66175598 | 2442 | /* Check parameters */ |
mbed_official | 237:f3da66175598 | 2443 | assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 2444 | assert_param(IS_TIM_REMAP(Remap)); |
mbed_official | 237:f3da66175598 | 2445 | |
mbed_official | 237:f3da66175598 | 2446 | /* Set the Timer remapping configuration */ |
mbed_official | 237:f3da66175598 | 2447 | htim->Instance->OR = Remap; |
mbed_official | 237:f3da66175598 | 2448 | |
mbed_official | 237:f3da66175598 | 2449 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 2450 | |
mbed_official | 237:f3da66175598 | 2451 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 2452 | |
mbed_official | 237:f3da66175598 | 2453 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 2454 | } |
mbed_official | 237:f3da66175598 | 2455 | #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
mbed_official | 237:f3da66175598 | 2456 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
mbed_official | 237:f3da66175598 | 2457 | /* STM32F373xC || STM32F378xx */ |
mbed_official | 237:f3da66175598 | 2458 | |
mbed_official | 237:f3da66175598 | 2459 | |
mbed_official | 237:f3da66175598 | 2460 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
mbed_official | 237:f3da66175598 | 2461 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
mbed_official | 237:f3da66175598 | 2462 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
mbed_official | 237:f3da66175598 | 2463 | /** |
mbed_official | 237:f3da66175598 | 2464 | * @brief Group channel 5 and channel 1, 2 or 3 |
mbed_official | 237:f3da66175598 | 2465 | * @param htim: TIM handle. |
mbed_official | 237:f3da66175598 | 2466 | * @param OCRef: specifies the reference signal(s) the OC5REF is combined with. |
mbed_official | 237:f3da66175598 | 2467 | * This parameter can be any combination of the following values: |
mbed_official | 237:f3da66175598 | 2468 | * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC |
mbed_official | 237:f3da66175598 | 2469 | * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF |
mbed_official | 237:f3da66175598 | 2470 | * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF |
mbed_official | 237:f3da66175598 | 2471 | * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF |
mbed_official | 237:f3da66175598 | 2472 | * @retval HAL status |
mbed_official | 237:f3da66175598 | 2473 | */ |
mbed_official | 237:f3da66175598 | 2474 | HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t OCRef) |
mbed_official | 237:f3da66175598 | 2475 | { |
mbed_official | 237:f3da66175598 | 2476 | /* Check parameters */ |
mbed_official | 237:f3da66175598 | 2477 | assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance)); |
mbed_official | 237:f3da66175598 | 2478 | assert_param(IS_TIM_GROUPCH5(OCRef)); |
mbed_official | 237:f3da66175598 | 2479 | |
mbed_official | 237:f3da66175598 | 2480 | /* Process Locked */ |
mbed_official | 237:f3da66175598 | 2481 | __HAL_LOCK(htim); |
mbed_official | 237:f3da66175598 | 2482 | |
mbed_official | 237:f3da66175598 | 2483 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 237:f3da66175598 | 2484 | |
mbed_official | 237:f3da66175598 | 2485 | /* Clear GC5Cx bit fields */ |
mbed_official | 237:f3da66175598 | 2486 | htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1); |
mbed_official | 237:f3da66175598 | 2487 | |
mbed_official | 237:f3da66175598 | 2488 | /* Set GC5Cx bit fields */ |
mbed_official | 237:f3da66175598 | 2489 | htim->Instance->CCR5 |= OCRef; |
mbed_official | 237:f3da66175598 | 2490 | |
mbed_official | 237:f3da66175598 | 2491 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 2492 | |
mbed_official | 237:f3da66175598 | 2493 | __HAL_UNLOCK(htim); |
mbed_official | 237:f3da66175598 | 2494 | |
mbed_official | 237:f3da66175598 | 2495 | return HAL_OK; |
mbed_official | 237:f3da66175598 | 2496 | } |
mbed_official | 237:f3da66175598 | 2497 | #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
mbed_official | 237:f3da66175598 | 2498 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
mbed_official | 237:f3da66175598 | 2499 | /* STM32F303x8 || STM32F334x8 || STM32F328xx */ |
mbed_official | 237:f3da66175598 | 2500 | |
mbed_official | 237:f3da66175598 | 2501 | |
mbed_official | 237:f3da66175598 | 2502 | /** |
mbed_official | 237:f3da66175598 | 2503 | * @} |
mbed_official | 237:f3da66175598 | 2504 | */ |
mbed_official | 237:f3da66175598 | 2505 | |
mbed_official | 237:f3da66175598 | 2506 | /** @defgroup TIMEx_Group6 Extension Callbacks functions |
mbed_official | 237:f3da66175598 | 2507 | * @brief Extension Callbacks functions |
mbed_official | 237:f3da66175598 | 2508 | * |
mbed_official | 237:f3da66175598 | 2509 | @verbatim |
mbed_official | 237:f3da66175598 | 2510 | ============================================================================== |
mbed_official | 237:f3da66175598 | 2511 | ##### Extension Callbacks functions ##### |
mbed_official | 237:f3da66175598 | 2512 | ============================================================================== |
mbed_official | 237:f3da66175598 | 2513 | [..] |
mbed_official | 237:f3da66175598 | 2514 | This section provides Extension TIM callback functions: |
mbed_official | 237:f3da66175598 | 2515 | (+) Timer Commutation callback |
mbed_official | 237:f3da66175598 | 2516 | (+) Timer Break callback |
mbed_official | 237:f3da66175598 | 2517 | |
mbed_official | 237:f3da66175598 | 2518 | @endverbatim |
mbed_official | 237:f3da66175598 | 2519 | * @{ |
mbed_official | 237:f3da66175598 | 2520 | */ |
mbed_official | 237:f3da66175598 | 2521 | |
mbed_official | 237:f3da66175598 | 2522 | /** |
mbed_official | 237:f3da66175598 | 2523 | * @brief Hall commutation changed callback in non blocking mode |
mbed_official | 237:f3da66175598 | 2524 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 2525 | * @retval None |
mbed_official | 237:f3da66175598 | 2526 | */ |
mbed_official | 237:f3da66175598 | 2527 | __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 2528 | { |
mbed_official | 237:f3da66175598 | 2529 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 237:f3da66175598 | 2530 | the HAL_TIMEx_CommutationCallback could be implemented in the user file |
mbed_official | 237:f3da66175598 | 2531 | */ |
mbed_official | 237:f3da66175598 | 2532 | } |
mbed_official | 237:f3da66175598 | 2533 | |
mbed_official | 237:f3da66175598 | 2534 | /** |
mbed_official | 237:f3da66175598 | 2535 | * @brief Hall Break detection callback in non blocking mode |
mbed_official | 237:f3da66175598 | 2536 | * @param htim : TIM handle |
mbed_official | 237:f3da66175598 | 2537 | * @retval None |
mbed_official | 237:f3da66175598 | 2538 | */ |
mbed_official | 237:f3da66175598 | 2539 | __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 2540 | { |
mbed_official | 237:f3da66175598 | 2541 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 237:f3da66175598 | 2542 | the HAL_TIMEx_BreakCallback could be implemented in the user file |
mbed_official | 237:f3da66175598 | 2543 | */ |
mbed_official | 237:f3da66175598 | 2544 | } |
mbed_official | 237:f3da66175598 | 2545 | |
mbed_official | 237:f3da66175598 | 2546 | /** |
mbed_official | 237:f3da66175598 | 2547 | * @} |
mbed_official | 237:f3da66175598 | 2548 | */ |
mbed_official | 237:f3da66175598 | 2549 | |
mbed_official | 237:f3da66175598 | 2550 | /** @defgroup TIMEx_Group7 Extension Peripheral State functions |
mbed_official | 237:f3da66175598 | 2551 | * @brief Extension Peripheral State functions |
mbed_official | 237:f3da66175598 | 2552 | * |
mbed_official | 237:f3da66175598 | 2553 | @verbatim |
mbed_official | 237:f3da66175598 | 2554 | ============================================================================== |
mbed_official | 237:f3da66175598 | 2555 | ##### Extension Peripheral State functions ##### |
mbed_official | 237:f3da66175598 | 2556 | ============================================================================== |
mbed_official | 237:f3da66175598 | 2557 | [..] |
mbed_official | 237:f3da66175598 | 2558 | This subsection permit to get in run-time the status of the peripheral |
mbed_official | 237:f3da66175598 | 2559 | and the data flow. |
mbed_official | 237:f3da66175598 | 2560 | |
mbed_official | 237:f3da66175598 | 2561 | @endverbatim |
mbed_official | 237:f3da66175598 | 2562 | * @{ |
mbed_official | 237:f3da66175598 | 2563 | */ |
mbed_official | 237:f3da66175598 | 2564 | |
mbed_official | 237:f3da66175598 | 2565 | /** |
mbed_official | 237:f3da66175598 | 2566 | * @brief Return the TIM Hall Sensor interface state |
mbed_official | 237:f3da66175598 | 2567 | * @param htim: TIM Hall Sensor handle |
mbed_official | 237:f3da66175598 | 2568 | * @retval HAL state |
mbed_official | 237:f3da66175598 | 2569 | */ |
mbed_official | 237:f3da66175598 | 2570 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) |
mbed_official | 237:f3da66175598 | 2571 | { |
mbed_official | 237:f3da66175598 | 2572 | return htim->State; |
mbed_official | 237:f3da66175598 | 2573 | } |
mbed_official | 237:f3da66175598 | 2574 | |
mbed_official | 237:f3da66175598 | 2575 | /** |
mbed_official | 237:f3da66175598 | 2576 | * @} |
mbed_official | 237:f3da66175598 | 2577 | */ |
mbed_official | 237:f3da66175598 | 2578 | |
mbed_official | 237:f3da66175598 | 2579 | /** |
mbed_official | 237:f3da66175598 | 2580 | * @brief TIM DMA Commutation callback. |
mbed_official | 237:f3da66175598 | 2581 | * @param hdma : pointer to DMA handle. |
mbed_official | 237:f3da66175598 | 2582 | * @retval None |
mbed_official | 237:f3da66175598 | 2583 | */ |
mbed_official | 237:f3da66175598 | 2584 | void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 237:f3da66175598 | 2585 | { |
mbed_official | 237:f3da66175598 | 2586 | TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 237:f3da66175598 | 2587 | |
mbed_official | 237:f3da66175598 | 2588 | htim->State= HAL_TIM_STATE_READY; |
mbed_official | 237:f3da66175598 | 2589 | |
mbed_official | 237:f3da66175598 | 2590 | HAL_TIMEx_CommutationCallback(htim); |
mbed_official | 237:f3da66175598 | 2591 | } |
mbed_official | 237:f3da66175598 | 2592 | |
mbed_official | 237:f3da66175598 | 2593 | /** |
mbed_official | 237:f3da66175598 | 2594 | * @brief Enables or disables the TIM Capture Compare Channel xN. |
mbed_official | 237:f3da66175598 | 2595 | * @param TIMx to select the TIM peripheral |
mbed_official | 237:f3da66175598 | 2596 | * @param Channel: specifies the TIM Channel |
mbed_official | 237:f3da66175598 | 2597 | * This parameter can be one of the following values: |
mbed_official | 237:f3da66175598 | 2598 | * @arg TIM_Channel_1: TIM Channel 1 |
mbed_official | 237:f3da66175598 | 2599 | * @arg TIM_Channel_2: TIM Channel 2 |
mbed_official | 237:f3da66175598 | 2600 | * @arg TIM_Channel_3: TIM Channel 3 |
mbed_official | 237:f3da66175598 | 2601 | * @param ChannelNState: specifies the TIM Channel CCxNE bit new state. |
mbed_official | 237:f3da66175598 | 2602 | * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. |
mbed_official | 237:f3da66175598 | 2603 | * @retval None |
mbed_official | 237:f3da66175598 | 2604 | */ |
mbed_official | 237:f3da66175598 | 2605 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) |
mbed_official | 237:f3da66175598 | 2606 | { |
mbed_official | 237:f3da66175598 | 2607 | uint32_t tmp = 0; |
mbed_official | 237:f3da66175598 | 2608 | |
mbed_official | 237:f3da66175598 | 2609 | tmp = TIM_CCER_CC1NE << Channel; |
mbed_official | 237:f3da66175598 | 2610 | |
mbed_official | 237:f3da66175598 | 2611 | /* Reset the CCxNE Bit */ |
mbed_official | 237:f3da66175598 | 2612 | TIMx->CCER &= ~tmp; |
mbed_official | 237:f3da66175598 | 2613 | |
mbed_official | 237:f3da66175598 | 2614 | /* Set or reset the CCxNE Bit */ |
mbed_official | 237:f3da66175598 | 2615 | TIMx->CCER |= (uint32_t)(ChannelNState << Channel); |
mbed_official | 237:f3da66175598 | 2616 | } |
mbed_official | 237:f3da66175598 | 2617 | |
mbed_official | 237:f3da66175598 | 2618 | /** |
mbed_official | 237:f3da66175598 | 2619 | * @} |
mbed_official | 237:f3da66175598 | 2620 | */ |
mbed_official | 237:f3da66175598 | 2621 | |
mbed_official | 237:f3da66175598 | 2622 | #endif /* HAL_TIM_MODULE_ENABLED */ |
mbed_official | 237:f3da66175598 | 2623 | /** |
mbed_official | 237:f3da66175598 | 2624 | * @} |
mbed_official | 237:f3da66175598 | 2625 | */ |
mbed_official | 237:f3da66175598 | 2626 | |
mbed_official | 237:f3da66175598 | 2627 | /** |
mbed_official | 237:f3da66175598 | 2628 | * @} |
mbed_official | 237:f3da66175598 | 2629 | */ |
mbed_official | 237:f3da66175598 | 2630 | |
mbed_official | 237:f3da66175598 | 2631 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |