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targets/cmsis/TARGET_NXP/TARGET_LPC81X/system_LPC8xx.h
- Committer:
- mbed_official
- Date:
- 2013-11-11
- Revision:
- 46:bebbbd80dd87
File content as of revision 46:bebbbd80dd87:
/****************************************************************************** * @file: system_LPC8xx.h * @purpose: CMSIS Cortex-M0+ Device Peripheral Access Layer Header File * for the NXP LPC8xx Device Series * @version: V1.0 * @date: 16. Aug. 2012 *---------------------------------------------------------------------------- * * Copyright (C) 2012 ARM Limited. All rights reserved. * * ARM Limited (ARM) is supplying this software for use with Cortex-M0+ * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #ifndef __SYSTEM_LPC8xx_H #define __SYSTEM_LPC8xx_H #ifdef __cplusplus extern "C" { #endif #include <stdint.h> extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System and update the SystemCoreClock variable. */ extern void SystemInit (void); /** * Update SystemCoreClock variable * * @param none * @return none * * @brief Updates the SystemCoreClock with current core Clock * retrieved from cpu registers. */ extern void SystemCoreClockUpdate (void); #ifdef __cplusplus } #endif #endif /* __SYSTEM_LPC8xx_H */