mbed library sources
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_tim.h@52:a51c77007319, 2013-12-02 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Dec 02 11:30:05 2013 +0000
- Revision:
- 52:a51c77007319
- Child:
- 70:c1fbde68b492
Synchronized with git revision 49df530ae72ce97ccc773d1f2c13b38e868e6abd
Full URL: https://github.com/mbedmicro/mbed/commit/49df530ae72ce97ccc773d1f2c13b38e868e6abd/
Add STMicroelectronics NUCLEO_F103RB target
Who changed what in which revision?
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mbed_official | 52:a51c77007319 | 1 | /** |
mbed_official | 52:a51c77007319 | 2 | ****************************************************************************** |
mbed_official | 52:a51c77007319 | 3 | * @file stm32f10x_tim.h |
mbed_official | 52:a51c77007319 | 4 | * @author MCD Application Team |
mbed_official | 52:a51c77007319 | 5 | * @version V3.5.0 |
mbed_official | 52:a51c77007319 | 6 | * @date 11-March-2011 |
mbed_official | 52:a51c77007319 | 7 | * @brief This file contains all the functions prototypes for the TIM firmware |
mbed_official | 52:a51c77007319 | 8 | * library. |
mbed_official | 52:a51c77007319 | 9 | ****************************************************************************** |
mbed_official | 52:a51c77007319 | 10 | * @attention |
mbed_official | 52:a51c77007319 | 11 | * |
mbed_official | 52:a51c77007319 | 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
mbed_official | 52:a51c77007319 | 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
mbed_official | 52:a51c77007319 | 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
mbed_official | 52:a51c77007319 | 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
mbed_official | 52:a51c77007319 | 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
mbed_official | 52:a51c77007319 | 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
mbed_official | 52:a51c77007319 | 18 | * |
mbed_official | 52:a51c77007319 | 19 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
mbed_official | 52:a51c77007319 | 20 | ****************************************************************************** |
mbed_official | 52:a51c77007319 | 21 | */ |
mbed_official | 52:a51c77007319 | 22 | |
mbed_official | 52:a51c77007319 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ |
mbed_official | 52:a51c77007319 | 24 | #ifndef __STM32F10x_TIM_H |
mbed_official | 52:a51c77007319 | 25 | #define __STM32F10x_TIM_H |
mbed_official | 52:a51c77007319 | 26 | |
mbed_official | 52:a51c77007319 | 27 | #ifdef __cplusplus |
mbed_official | 52:a51c77007319 | 28 | extern "C" { |
mbed_official | 52:a51c77007319 | 29 | #endif |
mbed_official | 52:a51c77007319 | 30 | |
mbed_official | 52:a51c77007319 | 31 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 52:a51c77007319 | 32 | #include "stm32f10x.h" |
mbed_official | 52:a51c77007319 | 33 | |
mbed_official | 52:a51c77007319 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver |
mbed_official | 52:a51c77007319 | 35 | * @{ |
mbed_official | 52:a51c77007319 | 36 | */ |
mbed_official | 52:a51c77007319 | 37 | |
mbed_official | 52:a51c77007319 | 38 | /** @addtogroup TIM |
mbed_official | 52:a51c77007319 | 39 | * @{ |
mbed_official | 52:a51c77007319 | 40 | */ |
mbed_official | 52:a51c77007319 | 41 | |
mbed_official | 52:a51c77007319 | 42 | /** @defgroup TIM_Exported_Types |
mbed_official | 52:a51c77007319 | 43 | * @{ |
mbed_official | 52:a51c77007319 | 44 | */ |
mbed_official | 52:a51c77007319 | 45 | |
mbed_official | 52:a51c77007319 | 46 | /** |
mbed_official | 52:a51c77007319 | 47 | * @brief TIM Time Base Init structure definition |
mbed_official | 52:a51c77007319 | 48 | * @note This structure is used with all TIMx except for TIM6 and TIM7. |
mbed_official | 52:a51c77007319 | 49 | */ |
mbed_official | 52:a51c77007319 | 50 | |
mbed_official | 52:a51c77007319 | 51 | typedef struct |
mbed_official | 52:a51c77007319 | 52 | { |
mbed_official | 52:a51c77007319 | 53 | uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. |
mbed_official | 52:a51c77007319 | 54 | This parameter can be a number between 0x0000 and 0xFFFF */ |
mbed_official | 52:a51c77007319 | 55 | |
mbed_official | 52:a51c77007319 | 56 | uint16_t TIM_CounterMode; /*!< Specifies the counter mode. |
mbed_official | 52:a51c77007319 | 57 | This parameter can be a value of @ref TIM_Counter_Mode */ |
mbed_official | 52:a51c77007319 | 58 | |
mbed_official | 52:a51c77007319 | 59 | uint16_t TIM_Period; /*!< Specifies the period value to be loaded into the active |
mbed_official | 52:a51c77007319 | 60 | Auto-Reload Register at the next update event. |
mbed_official | 52:a51c77007319 | 61 | This parameter must be a number between 0x0000 and 0xFFFF. */ |
mbed_official | 52:a51c77007319 | 62 | |
mbed_official | 52:a51c77007319 | 63 | uint16_t TIM_ClockDivision; /*!< Specifies the clock division. |
mbed_official | 52:a51c77007319 | 64 | This parameter can be a value of @ref TIM_Clock_Division_CKD */ |
mbed_official | 52:a51c77007319 | 65 | |
mbed_official | 52:a51c77007319 | 66 | uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter |
mbed_official | 52:a51c77007319 | 67 | reaches zero, an update event is generated and counting restarts |
mbed_official | 52:a51c77007319 | 68 | from the RCR value (N). |
mbed_official | 52:a51c77007319 | 69 | This means in PWM mode that (N+1) corresponds to: |
mbed_official | 52:a51c77007319 | 70 | - the number of PWM periods in edge-aligned mode |
mbed_official | 52:a51c77007319 | 71 | - the number of half PWM period in center-aligned mode |
mbed_official | 52:a51c77007319 | 72 | This parameter must be a number between 0x00 and 0xFF. |
mbed_official | 52:a51c77007319 | 73 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 52:a51c77007319 | 74 | } TIM_TimeBaseInitTypeDef; |
mbed_official | 52:a51c77007319 | 75 | |
mbed_official | 52:a51c77007319 | 76 | /** |
mbed_official | 52:a51c77007319 | 77 | * @brief TIM Output Compare Init structure definition |
mbed_official | 52:a51c77007319 | 78 | */ |
mbed_official | 52:a51c77007319 | 79 | |
mbed_official | 52:a51c77007319 | 80 | typedef struct |
mbed_official | 52:a51c77007319 | 81 | { |
mbed_official | 52:a51c77007319 | 82 | uint16_t TIM_OCMode; /*!< Specifies the TIM mode. |
mbed_official | 52:a51c77007319 | 83 | This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ |
mbed_official | 52:a51c77007319 | 84 | |
mbed_official | 52:a51c77007319 | 85 | uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state. |
mbed_official | 52:a51c77007319 | 86 | This parameter can be a value of @ref TIM_Output_Compare_state */ |
mbed_official | 52:a51c77007319 | 87 | |
mbed_official | 52:a51c77007319 | 88 | uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state. |
mbed_official | 52:a51c77007319 | 89 | This parameter can be a value of @ref TIM_Output_Compare_N_state |
mbed_official | 52:a51c77007319 | 90 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 52:a51c77007319 | 91 | |
mbed_official | 52:a51c77007319 | 92 | uint16_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. |
mbed_official | 52:a51c77007319 | 93 | This parameter can be a number between 0x0000 and 0xFFFF */ |
mbed_official | 52:a51c77007319 | 94 | |
mbed_official | 52:a51c77007319 | 95 | uint16_t TIM_OCPolarity; /*!< Specifies the output polarity. |
mbed_official | 52:a51c77007319 | 96 | This parameter can be a value of @ref TIM_Output_Compare_Polarity */ |
mbed_official | 52:a51c77007319 | 97 | |
mbed_official | 52:a51c77007319 | 98 | uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity. |
mbed_official | 52:a51c77007319 | 99 | This parameter can be a value of @ref TIM_Output_Compare_N_Polarity |
mbed_official | 52:a51c77007319 | 100 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 52:a51c77007319 | 101 | |
mbed_official | 52:a51c77007319 | 102 | uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
mbed_official | 52:a51c77007319 | 103 | This parameter can be a value of @ref TIM_Output_Compare_Idle_State |
mbed_official | 52:a51c77007319 | 104 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 52:a51c77007319 | 105 | |
mbed_official | 52:a51c77007319 | 106 | uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
mbed_official | 52:a51c77007319 | 107 | This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State |
mbed_official | 52:a51c77007319 | 108 | @note This parameter is valid only for TIM1 and TIM8. */ |
mbed_official | 52:a51c77007319 | 109 | } TIM_OCInitTypeDef; |
mbed_official | 52:a51c77007319 | 110 | |
mbed_official | 52:a51c77007319 | 111 | /** |
mbed_official | 52:a51c77007319 | 112 | * @brief TIM Input Capture Init structure definition |
mbed_official | 52:a51c77007319 | 113 | */ |
mbed_official | 52:a51c77007319 | 114 | |
mbed_official | 52:a51c77007319 | 115 | typedef struct |
mbed_official | 52:a51c77007319 | 116 | { |
mbed_official | 52:a51c77007319 | 117 | |
mbed_official | 52:a51c77007319 | 118 | uint16_t TIM_Channel; /*!< Specifies the TIM channel. |
mbed_official | 52:a51c77007319 | 119 | This parameter can be a value of @ref TIM_Channel */ |
mbed_official | 52:a51c77007319 | 120 | |
mbed_official | 52:a51c77007319 | 121 | uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal. |
mbed_official | 52:a51c77007319 | 122 | This parameter can be a value of @ref TIM_Input_Capture_Polarity */ |
mbed_official | 52:a51c77007319 | 123 | |
mbed_official | 52:a51c77007319 | 124 | uint16_t TIM_ICSelection; /*!< Specifies the input. |
mbed_official | 52:a51c77007319 | 125 | This parameter can be a value of @ref TIM_Input_Capture_Selection */ |
mbed_official | 52:a51c77007319 | 126 | |
mbed_official | 52:a51c77007319 | 127 | uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler. |
mbed_official | 52:a51c77007319 | 128 | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ |
mbed_official | 52:a51c77007319 | 129 | |
mbed_official | 52:a51c77007319 | 130 | uint16_t TIM_ICFilter; /*!< Specifies the input capture filter. |
mbed_official | 52:a51c77007319 | 131 | This parameter can be a number between 0x0 and 0xF */ |
mbed_official | 52:a51c77007319 | 132 | } TIM_ICInitTypeDef; |
mbed_official | 52:a51c77007319 | 133 | |
mbed_official | 52:a51c77007319 | 134 | /** |
mbed_official | 52:a51c77007319 | 135 | * @brief BDTR structure definition |
mbed_official | 52:a51c77007319 | 136 | * @note This structure is used only with TIM1 and TIM8. |
mbed_official | 52:a51c77007319 | 137 | */ |
mbed_official | 52:a51c77007319 | 138 | |
mbed_official | 52:a51c77007319 | 139 | typedef struct |
mbed_official | 52:a51c77007319 | 140 | { |
mbed_official | 52:a51c77007319 | 141 | |
mbed_official | 52:a51c77007319 | 142 | uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode. |
mbed_official | 52:a51c77007319 | 143 | This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */ |
mbed_official | 52:a51c77007319 | 144 | |
mbed_official | 52:a51c77007319 | 145 | uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state. |
mbed_official | 52:a51c77007319 | 146 | This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */ |
mbed_official | 52:a51c77007319 | 147 | |
mbed_official | 52:a51c77007319 | 148 | uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters. |
mbed_official | 52:a51c77007319 | 149 | This parameter can be a value of @ref Lock_level */ |
mbed_official | 52:a51c77007319 | 150 | |
mbed_official | 52:a51c77007319 | 151 | uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the |
mbed_official | 52:a51c77007319 | 152 | switching-on of the outputs. |
mbed_official | 52:a51c77007319 | 153 | This parameter can be a number between 0x00 and 0xFF */ |
mbed_official | 52:a51c77007319 | 154 | |
mbed_official | 52:a51c77007319 | 155 | uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not. |
mbed_official | 52:a51c77007319 | 156 | This parameter can be a value of @ref Break_Input_enable_disable */ |
mbed_official | 52:a51c77007319 | 157 | |
mbed_official | 52:a51c77007319 | 158 | uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. |
mbed_official | 52:a51c77007319 | 159 | This parameter can be a value of @ref Break_Polarity */ |
mbed_official | 52:a51c77007319 | 160 | |
mbed_official | 52:a51c77007319 | 161 | uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. |
mbed_official | 52:a51c77007319 | 162 | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ |
mbed_official | 52:a51c77007319 | 163 | } TIM_BDTRInitTypeDef; |
mbed_official | 52:a51c77007319 | 164 | |
mbed_official | 52:a51c77007319 | 165 | /** @defgroup TIM_Exported_constants |
mbed_official | 52:a51c77007319 | 166 | * @{ |
mbed_official | 52:a51c77007319 | 167 | */ |
mbed_official | 52:a51c77007319 | 168 | |
mbed_official | 52:a51c77007319 | 169 | #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 170 | ((PERIPH) == TIM2) || \ |
mbed_official | 52:a51c77007319 | 171 | ((PERIPH) == TIM3) || \ |
mbed_official | 52:a51c77007319 | 172 | ((PERIPH) == TIM4) || \ |
mbed_official | 52:a51c77007319 | 173 | ((PERIPH) == TIM5) || \ |
mbed_official | 52:a51c77007319 | 174 | ((PERIPH) == TIM6) || \ |
mbed_official | 52:a51c77007319 | 175 | ((PERIPH) == TIM7) || \ |
mbed_official | 52:a51c77007319 | 176 | ((PERIPH) == TIM8) || \ |
mbed_official | 52:a51c77007319 | 177 | ((PERIPH) == TIM9) || \ |
mbed_official | 52:a51c77007319 | 178 | ((PERIPH) == TIM10)|| \ |
mbed_official | 52:a51c77007319 | 179 | ((PERIPH) == TIM11)|| \ |
mbed_official | 52:a51c77007319 | 180 | ((PERIPH) == TIM12)|| \ |
mbed_official | 52:a51c77007319 | 181 | ((PERIPH) == TIM13)|| \ |
mbed_official | 52:a51c77007319 | 182 | ((PERIPH) == TIM14)|| \ |
mbed_official | 52:a51c77007319 | 183 | ((PERIPH) == TIM15)|| \ |
mbed_official | 52:a51c77007319 | 184 | ((PERIPH) == TIM16)|| \ |
mbed_official | 52:a51c77007319 | 185 | ((PERIPH) == TIM17)) |
mbed_official | 52:a51c77007319 | 186 | |
mbed_official | 52:a51c77007319 | 187 | /* LIST1: TIM 1 and 8 */ |
mbed_official | 52:a51c77007319 | 188 | #define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 189 | ((PERIPH) == TIM8)) |
mbed_official | 52:a51c77007319 | 190 | |
mbed_official | 52:a51c77007319 | 191 | /* LIST2: TIM 1, 8, 15 16 and 17 */ |
mbed_official | 52:a51c77007319 | 192 | #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 193 | ((PERIPH) == TIM8) || \ |
mbed_official | 52:a51c77007319 | 194 | ((PERIPH) == TIM15)|| \ |
mbed_official | 52:a51c77007319 | 195 | ((PERIPH) == TIM16)|| \ |
mbed_official | 52:a51c77007319 | 196 | ((PERIPH) == TIM17)) |
mbed_official | 52:a51c77007319 | 197 | |
mbed_official | 52:a51c77007319 | 198 | /* LIST3: TIM 1, 2, 3, 4, 5 and 8 */ |
mbed_official | 52:a51c77007319 | 199 | #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 200 | ((PERIPH) == TIM2) || \ |
mbed_official | 52:a51c77007319 | 201 | ((PERIPH) == TIM3) || \ |
mbed_official | 52:a51c77007319 | 202 | ((PERIPH) == TIM4) || \ |
mbed_official | 52:a51c77007319 | 203 | ((PERIPH) == TIM5) || \ |
mbed_official | 52:a51c77007319 | 204 | ((PERIPH) == TIM8)) |
mbed_official | 52:a51c77007319 | 205 | |
mbed_official | 52:a51c77007319 | 206 | /* LIST4: TIM 1, 2, 3, 4, 5, 8, 15, 16 and 17 */ |
mbed_official | 52:a51c77007319 | 207 | #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 208 | ((PERIPH) == TIM2) || \ |
mbed_official | 52:a51c77007319 | 209 | ((PERIPH) == TIM3) || \ |
mbed_official | 52:a51c77007319 | 210 | ((PERIPH) == TIM4) || \ |
mbed_official | 52:a51c77007319 | 211 | ((PERIPH) == TIM5) || \ |
mbed_official | 52:a51c77007319 | 212 | ((PERIPH) == TIM8) || \ |
mbed_official | 52:a51c77007319 | 213 | ((PERIPH) == TIM15)|| \ |
mbed_official | 52:a51c77007319 | 214 | ((PERIPH) == TIM16)|| \ |
mbed_official | 52:a51c77007319 | 215 | ((PERIPH) == TIM17)) |
mbed_official | 52:a51c77007319 | 216 | |
mbed_official | 52:a51c77007319 | 217 | /* LIST5: TIM 1, 2, 3, 4, 5, 8 and 15 */ |
mbed_official | 52:a51c77007319 | 218 | #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 219 | ((PERIPH) == TIM2) || \ |
mbed_official | 52:a51c77007319 | 220 | ((PERIPH) == TIM3) || \ |
mbed_official | 52:a51c77007319 | 221 | ((PERIPH) == TIM4) || \ |
mbed_official | 52:a51c77007319 | 222 | ((PERIPH) == TIM5) || \ |
mbed_official | 52:a51c77007319 | 223 | ((PERIPH) == TIM8) || \ |
mbed_official | 52:a51c77007319 | 224 | ((PERIPH) == TIM15)) |
mbed_official | 52:a51c77007319 | 225 | |
mbed_official | 52:a51c77007319 | 226 | /* LIST6: TIM 1, 2, 3, 4, 5, 8, 9, 12 and 15 */ |
mbed_official | 52:a51c77007319 | 227 | #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 228 | ((PERIPH) == TIM2) || \ |
mbed_official | 52:a51c77007319 | 229 | ((PERIPH) == TIM3) || \ |
mbed_official | 52:a51c77007319 | 230 | ((PERIPH) == TIM4) || \ |
mbed_official | 52:a51c77007319 | 231 | ((PERIPH) == TIM5) || \ |
mbed_official | 52:a51c77007319 | 232 | ((PERIPH) == TIM8) || \ |
mbed_official | 52:a51c77007319 | 233 | ((PERIPH) == TIM9) || \ |
mbed_official | 52:a51c77007319 | 234 | ((PERIPH) == TIM12)|| \ |
mbed_official | 52:a51c77007319 | 235 | ((PERIPH) == TIM15)) |
mbed_official | 52:a51c77007319 | 236 | |
mbed_official | 52:a51c77007319 | 237 | /* LIST7: TIM 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 and 15 */ |
mbed_official | 52:a51c77007319 | 238 | #define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 239 | ((PERIPH) == TIM2) || \ |
mbed_official | 52:a51c77007319 | 240 | ((PERIPH) == TIM3) || \ |
mbed_official | 52:a51c77007319 | 241 | ((PERIPH) == TIM4) || \ |
mbed_official | 52:a51c77007319 | 242 | ((PERIPH) == TIM5) || \ |
mbed_official | 52:a51c77007319 | 243 | ((PERIPH) == TIM6) || \ |
mbed_official | 52:a51c77007319 | 244 | ((PERIPH) == TIM7) || \ |
mbed_official | 52:a51c77007319 | 245 | ((PERIPH) == TIM8) || \ |
mbed_official | 52:a51c77007319 | 246 | ((PERIPH) == TIM9) || \ |
mbed_official | 52:a51c77007319 | 247 | ((PERIPH) == TIM12)|| \ |
mbed_official | 52:a51c77007319 | 248 | ((PERIPH) == TIM15)) |
mbed_official | 52:a51c77007319 | 249 | |
mbed_official | 52:a51c77007319 | 250 | /* LIST8: TIM 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15, 16 and 17 */ |
mbed_official | 52:a51c77007319 | 251 | #define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 252 | ((PERIPH) == TIM2) || \ |
mbed_official | 52:a51c77007319 | 253 | ((PERIPH) == TIM3) || \ |
mbed_official | 52:a51c77007319 | 254 | ((PERIPH) == TIM4) || \ |
mbed_official | 52:a51c77007319 | 255 | ((PERIPH) == TIM5) || \ |
mbed_official | 52:a51c77007319 | 256 | ((PERIPH) == TIM8) || \ |
mbed_official | 52:a51c77007319 | 257 | ((PERIPH) == TIM9) || \ |
mbed_official | 52:a51c77007319 | 258 | ((PERIPH) == TIM10)|| \ |
mbed_official | 52:a51c77007319 | 259 | ((PERIPH) == TIM11)|| \ |
mbed_official | 52:a51c77007319 | 260 | ((PERIPH) == TIM12)|| \ |
mbed_official | 52:a51c77007319 | 261 | ((PERIPH) == TIM13)|| \ |
mbed_official | 52:a51c77007319 | 262 | ((PERIPH) == TIM14)|| \ |
mbed_official | 52:a51c77007319 | 263 | ((PERIPH) == TIM15)|| \ |
mbed_official | 52:a51c77007319 | 264 | ((PERIPH) == TIM16)|| \ |
mbed_official | 52:a51c77007319 | 265 | ((PERIPH) == TIM17)) |
mbed_official | 52:a51c77007319 | 266 | |
mbed_official | 52:a51c77007319 | 267 | /* LIST9: TIM 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, and 17 */ |
mbed_official | 52:a51c77007319 | 268 | #define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 52:a51c77007319 | 269 | ((PERIPH) == TIM2) || \ |
mbed_official | 52:a51c77007319 | 270 | ((PERIPH) == TIM3) || \ |
mbed_official | 52:a51c77007319 | 271 | ((PERIPH) == TIM4) || \ |
mbed_official | 52:a51c77007319 | 272 | ((PERIPH) == TIM5) || \ |
mbed_official | 52:a51c77007319 | 273 | ((PERIPH) == TIM6) || \ |
mbed_official | 52:a51c77007319 | 274 | ((PERIPH) == TIM7) || \ |
mbed_official | 52:a51c77007319 | 275 | ((PERIPH) == TIM8) || \ |
mbed_official | 52:a51c77007319 | 276 | ((PERIPH) == TIM15)|| \ |
mbed_official | 52:a51c77007319 | 277 | ((PERIPH) == TIM16)|| \ |
mbed_official | 52:a51c77007319 | 278 | ((PERIPH) == TIM17)) |
mbed_official | 52:a51c77007319 | 279 | |
mbed_official | 52:a51c77007319 | 280 | /** |
mbed_official | 52:a51c77007319 | 281 | * @} |
mbed_official | 52:a51c77007319 | 282 | */ |
mbed_official | 52:a51c77007319 | 283 | |
mbed_official | 52:a51c77007319 | 284 | /** @defgroup TIM_Output_Compare_and_PWM_modes |
mbed_official | 52:a51c77007319 | 285 | * @{ |
mbed_official | 52:a51c77007319 | 286 | */ |
mbed_official | 52:a51c77007319 | 287 | |
mbed_official | 52:a51c77007319 | 288 | #define TIM_OCMode_Timing ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 289 | #define TIM_OCMode_Active ((uint16_t)0x0010) |
mbed_official | 52:a51c77007319 | 290 | #define TIM_OCMode_Inactive ((uint16_t)0x0020) |
mbed_official | 52:a51c77007319 | 291 | #define TIM_OCMode_Toggle ((uint16_t)0x0030) |
mbed_official | 52:a51c77007319 | 292 | #define TIM_OCMode_PWM1 ((uint16_t)0x0060) |
mbed_official | 52:a51c77007319 | 293 | #define TIM_OCMode_PWM2 ((uint16_t)0x0070) |
mbed_official | 52:a51c77007319 | 294 | #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ |
mbed_official | 52:a51c77007319 | 295 | ((MODE) == TIM_OCMode_Active) || \ |
mbed_official | 52:a51c77007319 | 296 | ((MODE) == TIM_OCMode_Inactive) || \ |
mbed_official | 52:a51c77007319 | 297 | ((MODE) == TIM_OCMode_Toggle)|| \ |
mbed_official | 52:a51c77007319 | 298 | ((MODE) == TIM_OCMode_PWM1) || \ |
mbed_official | 52:a51c77007319 | 299 | ((MODE) == TIM_OCMode_PWM2)) |
mbed_official | 52:a51c77007319 | 300 | #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ |
mbed_official | 52:a51c77007319 | 301 | ((MODE) == TIM_OCMode_Active) || \ |
mbed_official | 52:a51c77007319 | 302 | ((MODE) == TIM_OCMode_Inactive) || \ |
mbed_official | 52:a51c77007319 | 303 | ((MODE) == TIM_OCMode_Toggle)|| \ |
mbed_official | 52:a51c77007319 | 304 | ((MODE) == TIM_OCMode_PWM1) || \ |
mbed_official | 52:a51c77007319 | 305 | ((MODE) == TIM_OCMode_PWM2) || \ |
mbed_official | 52:a51c77007319 | 306 | ((MODE) == TIM_ForcedAction_Active) || \ |
mbed_official | 52:a51c77007319 | 307 | ((MODE) == TIM_ForcedAction_InActive)) |
mbed_official | 52:a51c77007319 | 308 | /** |
mbed_official | 52:a51c77007319 | 309 | * @} |
mbed_official | 52:a51c77007319 | 310 | */ |
mbed_official | 52:a51c77007319 | 311 | |
mbed_official | 52:a51c77007319 | 312 | /** @defgroup TIM_One_Pulse_Mode |
mbed_official | 52:a51c77007319 | 313 | * @{ |
mbed_official | 52:a51c77007319 | 314 | */ |
mbed_official | 52:a51c77007319 | 315 | |
mbed_official | 52:a51c77007319 | 316 | #define TIM_OPMode_Single ((uint16_t)0x0008) |
mbed_official | 52:a51c77007319 | 317 | #define TIM_OPMode_Repetitive ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 318 | #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ |
mbed_official | 52:a51c77007319 | 319 | ((MODE) == TIM_OPMode_Repetitive)) |
mbed_official | 52:a51c77007319 | 320 | /** |
mbed_official | 52:a51c77007319 | 321 | * @} |
mbed_official | 52:a51c77007319 | 322 | */ |
mbed_official | 52:a51c77007319 | 323 | |
mbed_official | 52:a51c77007319 | 324 | /** @defgroup TIM_Channel |
mbed_official | 52:a51c77007319 | 325 | * @{ |
mbed_official | 52:a51c77007319 | 326 | */ |
mbed_official | 52:a51c77007319 | 327 | |
mbed_official | 52:a51c77007319 | 328 | #define TIM_Channel_1 ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 329 | #define TIM_Channel_2 ((uint16_t)0x0004) |
mbed_official | 52:a51c77007319 | 330 | #define TIM_Channel_3 ((uint16_t)0x0008) |
mbed_official | 52:a51c77007319 | 331 | #define TIM_Channel_4 ((uint16_t)0x000C) |
mbed_official | 52:a51c77007319 | 332 | #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ |
mbed_official | 52:a51c77007319 | 333 | ((CHANNEL) == TIM_Channel_2) || \ |
mbed_official | 52:a51c77007319 | 334 | ((CHANNEL) == TIM_Channel_3) || \ |
mbed_official | 52:a51c77007319 | 335 | ((CHANNEL) == TIM_Channel_4)) |
mbed_official | 52:a51c77007319 | 336 | #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ |
mbed_official | 52:a51c77007319 | 337 | ((CHANNEL) == TIM_Channel_2)) |
mbed_official | 52:a51c77007319 | 338 | #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ |
mbed_official | 52:a51c77007319 | 339 | ((CHANNEL) == TIM_Channel_2) || \ |
mbed_official | 52:a51c77007319 | 340 | ((CHANNEL) == TIM_Channel_3)) |
mbed_official | 52:a51c77007319 | 341 | /** |
mbed_official | 52:a51c77007319 | 342 | * @} |
mbed_official | 52:a51c77007319 | 343 | */ |
mbed_official | 52:a51c77007319 | 344 | |
mbed_official | 52:a51c77007319 | 345 | /** @defgroup TIM_Clock_Division_CKD |
mbed_official | 52:a51c77007319 | 346 | * @{ |
mbed_official | 52:a51c77007319 | 347 | */ |
mbed_official | 52:a51c77007319 | 348 | |
mbed_official | 52:a51c77007319 | 349 | #define TIM_CKD_DIV1 ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 350 | #define TIM_CKD_DIV2 ((uint16_t)0x0100) |
mbed_official | 52:a51c77007319 | 351 | #define TIM_CKD_DIV4 ((uint16_t)0x0200) |
mbed_official | 52:a51c77007319 | 352 | #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \ |
mbed_official | 52:a51c77007319 | 353 | ((DIV) == TIM_CKD_DIV2) || \ |
mbed_official | 52:a51c77007319 | 354 | ((DIV) == TIM_CKD_DIV4)) |
mbed_official | 52:a51c77007319 | 355 | /** |
mbed_official | 52:a51c77007319 | 356 | * @} |
mbed_official | 52:a51c77007319 | 357 | */ |
mbed_official | 52:a51c77007319 | 358 | |
mbed_official | 52:a51c77007319 | 359 | /** @defgroup TIM_Counter_Mode |
mbed_official | 52:a51c77007319 | 360 | * @{ |
mbed_official | 52:a51c77007319 | 361 | */ |
mbed_official | 52:a51c77007319 | 362 | |
mbed_official | 52:a51c77007319 | 363 | #define TIM_CounterMode_Up ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 364 | #define TIM_CounterMode_Down ((uint16_t)0x0010) |
mbed_official | 52:a51c77007319 | 365 | #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) |
mbed_official | 52:a51c77007319 | 366 | #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) |
mbed_official | 52:a51c77007319 | 367 | #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) |
mbed_official | 52:a51c77007319 | 368 | #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ |
mbed_official | 52:a51c77007319 | 369 | ((MODE) == TIM_CounterMode_Down) || \ |
mbed_official | 52:a51c77007319 | 370 | ((MODE) == TIM_CounterMode_CenterAligned1) || \ |
mbed_official | 52:a51c77007319 | 371 | ((MODE) == TIM_CounterMode_CenterAligned2) || \ |
mbed_official | 52:a51c77007319 | 372 | ((MODE) == TIM_CounterMode_CenterAligned3)) |
mbed_official | 52:a51c77007319 | 373 | /** |
mbed_official | 52:a51c77007319 | 374 | * @} |
mbed_official | 52:a51c77007319 | 375 | */ |
mbed_official | 52:a51c77007319 | 376 | |
mbed_official | 52:a51c77007319 | 377 | /** @defgroup TIM_Output_Compare_Polarity |
mbed_official | 52:a51c77007319 | 378 | * @{ |
mbed_official | 52:a51c77007319 | 379 | */ |
mbed_official | 52:a51c77007319 | 380 | |
mbed_official | 52:a51c77007319 | 381 | #define TIM_OCPolarity_High ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 382 | #define TIM_OCPolarity_Low ((uint16_t)0x0002) |
mbed_official | 52:a51c77007319 | 383 | #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \ |
mbed_official | 52:a51c77007319 | 384 | ((POLARITY) == TIM_OCPolarity_Low)) |
mbed_official | 52:a51c77007319 | 385 | /** |
mbed_official | 52:a51c77007319 | 386 | * @} |
mbed_official | 52:a51c77007319 | 387 | */ |
mbed_official | 52:a51c77007319 | 388 | |
mbed_official | 52:a51c77007319 | 389 | /** @defgroup TIM_Output_Compare_N_Polarity |
mbed_official | 52:a51c77007319 | 390 | * @{ |
mbed_official | 52:a51c77007319 | 391 | */ |
mbed_official | 52:a51c77007319 | 392 | |
mbed_official | 52:a51c77007319 | 393 | #define TIM_OCNPolarity_High ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 394 | #define TIM_OCNPolarity_Low ((uint16_t)0x0008) |
mbed_official | 52:a51c77007319 | 395 | #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \ |
mbed_official | 52:a51c77007319 | 396 | ((POLARITY) == TIM_OCNPolarity_Low)) |
mbed_official | 52:a51c77007319 | 397 | /** |
mbed_official | 52:a51c77007319 | 398 | * @} |
mbed_official | 52:a51c77007319 | 399 | */ |
mbed_official | 52:a51c77007319 | 400 | |
mbed_official | 52:a51c77007319 | 401 | /** @defgroup TIM_Output_Compare_state |
mbed_official | 52:a51c77007319 | 402 | * @{ |
mbed_official | 52:a51c77007319 | 403 | */ |
mbed_official | 52:a51c77007319 | 404 | |
mbed_official | 52:a51c77007319 | 405 | #define TIM_OutputState_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 406 | #define TIM_OutputState_Enable ((uint16_t)0x0001) |
mbed_official | 52:a51c77007319 | 407 | #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ |
mbed_official | 52:a51c77007319 | 408 | ((STATE) == TIM_OutputState_Enable)) |
mbed_official | 52:a51c77007319 | 409 | /** |
mbed_official | 52:a51c77007319 | 410 | * @} |
mbed_official | 52:a51c77007319 | 411 | */ |
mbed_official | 52:a51c77007319 | 412 | |
mbed_official | 52:a51c77007319 | 413 | /** @defgroup TIM_Output_Compare_N_state |
mbed_official | 52:a51c77007319 | 414 | * @{ |
mbed_official | 52:a51c77007319 | 415 | */ |
mbed_official | 52:a51c77007319 | 416 | |
mbed_official | 52:a51c77007319 | 417 | #define TIM_OutputNState_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 418 | #define TIM_OutputNState_Enable ((uint16_t)0x0004) |
mbed_official | 52:a51c77007319 | 419 | #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ |
mbed_official | 52:a51c77007319 | 420 | ((STATE) == TIM_OutputNState_Enable)) |
mbed_official | 52:a51c77007319 | 421 | /** |
mbed_official | 52:a51c77007319 | 422 | * @} |
mbed_official | 52:a51c77007319 | 423 | */ |
mbed_official | 52:a51c77007319 | 424 | |
mbed_official | 52:a51c77007319 | 425 | /** @defgroup TIM_Capture_Compare_state |
mbed_official | 52:a51c77007319 | 426 | * @{ |
mbed_official | 52:a51c77007319 | 427 | */ |
mbed_official | 52:a51c77007319 | 428 | |
mbed_official | 52:a51c77007319 | 429 | #define TIM_CCx_Enable ((uint16_t)0x0001) |
mbed_official | 52:a51c77007319 | 430 | #define TIM_CCx_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 431 | #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \ |
mbed_official | 52:a51c77007319 | 432 | ((CCX) == TIM_CCx_Disable)) |
mbed_official | 52:a51c77007319 | 433 | /** |
mbed_official | 52:a51c77007319 | 434 | * @} |
mbed_official | 52:a51c77007319 | 435 | */ |
mbed_official | 52:a51c77007319 | 436 | |
mbed_official | 52:a51c77007319 | 437 | /** @defgroup TIM_Capture_Compare_N_state |
mbed_official | 52:a51c77007319 | 438 | * @{ |
mbed_official | 52:a51c77007319 | 439 | */ |
mbed_official | 52:a51c77007319 | 440 | |
mbed_official | 52:a51c77007319 | 441 | #define TIM_CCxN_Enable ((uint16_t)0x0004) |
mbed_official | 52:a51c77007319 | 442 | #define TIM_CCxN_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 443 | #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \ |
mbed_official | 52:a51c77007319 | 444 | ((CCXN) == TIM_CCxN_Disable)) |
mbed_official | 52:a51c77007319 | 445 | /** |
mbed_official | 52:a51c77007319 | 446 | * @} |
mbed_official | 52:a51c77007319 | 447 | */ |
mbed_official | 52:a51c77007319 | 448 | |
mbed_official | 52:a51c77007319 | 449 | /** @defgroup Break_Input_enable_disable |
mbed_official | 52:a51c77007319 | 450 | * @{ |
mbed_official | 52:a51c77007319 | 451 | */ |
mbed_official | 52:a51c77007319 | 452 | |
mbed_official | 52:a51c77007319 | 453 | #define TIM_Break_Enable ((uint16_t)0x1000) |
mbed_official | 52:a51c77007319 | 454 | #define TIM_Break_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 455 | #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ |
mbed_official | 52:a51c77007319 | 456 | ((STATE) == TIM_Break_Disable)) |
mbed_official | 52:a51c77007319 | 457 | /** |
mbed_official | 52:a51c77007319 | 458 | * @} |
mbed_official | 52:a51c77007319 | 459 | */ |
mbed_official | 52:a51c77007319 | 460 | |
mbed_official | 52:a51c77007319 | 461 | /** @defgroup Break_Polarity |
mbed_official | 52:a51c77007319 | 462 | * @{ |
mbed_official | 52:a51c77007319 | 463 | */ |
mbed_official | 52:a51c77007319 | 464 | |
mbed_official | 52:a51c77007319 | 465 | #define TIM_BreakPolarity_Low ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 466 | #define TIM_BreakPolarity_High ((uint16_t)0x2000) |
mbed_official | 52:a51c77007319 | 467 | #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \ |
mbed_official | 52:a51c77007319 | 468 | ((POLARITY) == TIM_BreakPolarity_High)) |
mbed_official | 52:a51c77007319 | 469 | /** |
mbed_official | 52:a51c77007319 | 470 | * @} |
mbed_official | 52:a51c77007319 | 471 | */ |
mbed_official | 52:a51c77007319 | 472 | |
mbed_official | 52:a51c77007319 | 473 | /** @defgroup TIM_AOE_Bit_Set_Reset |
mbed_official | 52:a51c77007319 | 474 | * @{ |
mbed_official | 52:a51c77007319 | 475 | */ |
mbed_official | 52:a51c77007319 | 476 | |
mbed_official | 52:a51c77007319 | 477 | #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) |
mbed_official | 52:a51c77007319 | 478 | #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 479 | #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \ |
mbed_official | 52:a51c77007319 | 480 | ((STATE) == TIM_AutomaticOutput_Disable)) |
mbed_official | 52:a51c77007319 | 481 | /** |
mbed_official | 52:a51c77007319 | 482 | * @} |
mbed_official | 52:a51c77007319 | 483 | */ |
mbed_official | 52:a51c77007319 | 484 | |
mbed_official | 52:a51c77007319 | 485 | /** @defgroup Lock_level |
mbed_official | 52:a51c77007319 | 486 | * @{ |
mbed_official | 52:a51c77007319 | 487 | */ |
mbed_official | 52:a51c77007319 | 488 | |
mbed_official | 52:a51c77007319 | 489 | #define TIM_LOCKLevel_OFF ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 490 | #define TIM_LOCKLevel_1 ((uint16_t)0x0100) |
mbed_official | 52:a51c77007319 | 491 | #define TIM_LOCKLevel_2 ((uint16_t)0x0200) |
mbed_official | 52:a51c77007319 | 492 | #define TIM_LOCKLevel_3 ((uint16_t)0x0300) |
mbed_official | 52:a51c77007319 | 493 | #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ |
mbed_official | 52:a51c77007319 | 494 | ((LEVEL) == TIM_LOCKLevel_1) || \ |
mbed_official | 52:a51c77007319 | 495 | ((LEVEL) == TIM_LOCKLevel_2) || \ |
mbed_official | 52:a51c77007319 | 496 | ((LEVEL) == TIM_LOCKLevel_3)) |
mbed_official | 52:a51c77007319 | 497 | /** |
mbed_official | 52:a51c77007319 | 498 | * @} |
mbed_official | 52:a51c77007319 | 499 | */ |
mbed_official | 52:a51c77007319 | 500 | |
mbed_official | 52:a51c77007319 | 501 | /** @defgroup OSSI_Off_State_Selection_for_Idle_mode_state |
mbed_official | 52:a51c77007319 | 502 | * @{ |
mbed_official | 52:a51c77007319 | 503 | */ |
mbed_official | 52:a51c77007319 | 504 | |
mbed_official | 52:a51c77007319 | 505 | #define TIM_OSSIState_Enable ((uint16_t)0x0400) |
mbed_official | 52:a51c77007319 | 506 | #define TIM_OSSIState_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 507 | #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ |
mbed_official | 52:a51c77007319 | 508 | ((STATE) == TIM_OSSIState_Disable)) |
mbed_official | 52:a51c77007319 | 509 | /** |
mbed_official | 52:a51c77007319 | 510 | * @} |
mbed_official | 52:a51c77007319 | 511 | */ |
mbed_official | 52:a51c77007319 | 512 | |
mbed_official | 52:a51c77007319 | 513 | /** @defgroup OSSR_Off_State_Selection_for_Run_mode_state |
mbed_official | 52:a51c77007319 | 514 | * @{ |
mbed_official | 52:a51c77007319 | 515 | */ |
mbed_official | 52:a51c77007319 | 516 | |
mbed_official | 52:a51c77007319 | 517 | #define TIM_OSSRState_Enable ((uint16_t)0x0800) |
mbed_official | 52:a51c77007319 | 518 | #define TIM_OSSRState_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 519 | #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ |
mbed_official | 52:a51c77007319 | 520 | ((STATE) == TIM_OSSRState_Disable)) |
mbed_official | 52:a51c77007319 | 521 | /** |
mbed_official | 52:a51c77007319 | 522 | * @} |
mbed_official | 52:a51c77007319 | 523 | */ |
mbed_official | 52:a51c77007319 | 524 | |
mbed_official | 52:a51c77007319 | 525 | /** @defgroup TIM_Output_Compare_Idle_State |
mbed_official | 52:a51c77007319 | 526 | * @{ |
mbed_official | 52:a51c77007319 | 527 | */ |
mbed_official | 52:a51c77007319 | 528 | |
mbed_official | 52:a51c77007319 | 529 | #define TIM_OCIdleState_Set ((uint16_t)0x0100) |
mbed_official | 52:a51c77007319 | 530 | #define TIM_OCIdleState_Reset ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 531 | #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ |
mbed_official | 52:a51c77007319 | 532 | ((STATE) == TIM_OCIdleState_Reset)) |
mbed_official | 52:a51c77007319 | 533 | /** |
mbed_official | 52:a51c77007319 | 534 | * @} |
mbed_official | 52:a51c77007319 | 535 | */ |
mbed_official | 52:a51c77007319 | 536 | |
mbed_official | 52:a51c77007319 | 537 | /** @defgroup TIM_Output_Compare_N_Idle_State |
mbed_official | 52:a51c77007319 | 538 | * @{ |
mbed_official | 52:a51c77007319 | 539 | */ |
mbed_official | 52:a51c77007319 | 540 | |
mbed_official | 52:a51c77007319 | 541 | #define TIM_OCNIdleState_Set ((uint16_t)0x0200) |
mbed_official | 52:a51c77007319 | 542 | #define TIM_OCNIdleState_Reset ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 543 | #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ |
mbed_official | 52:a51c77007319 | 544 | ((STATE) == TIM_OCNIdleState_Reset)) |
mbed_official | 52:a51c77007319 | 545 | /** |
mbed_official | 52:a51c77007319 | 546 | * @} |
mbed_official | 52:a51c77007319 | 547 | */ |
mbed_official | 52:a51c77007319 | 548 | |
mbed_official | 52:a51c77007319 | 549 | /** @defgroup TIM_Input_Capture_Polarity |
mbed_official | 52:a51c77007319 | 550 | * @{ |
mbed_official | 52:a51c77007319 | 551 | */ |
mbed_official | 52:a51c77007319 | 552 | |
mbed_official | 52:a51c77007319 | 553 | #define TIM_ICPolarity_Rising ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 554 | #define TIM_ICPolarity_Falling ((uint16_t)0x0002) |
mbed_official | 52:a51c77007319 | 555 | #define TIM_ICPolarity_BothEdge ((uint16_t)0x000A) |
mbed_official | 52:a51c77007319 | 556 | #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ |
mbed_official | 52:a51c77007319 | 557 | ((POLARITY) == TIM_ICPolarity_Falling)) |
mbed_official | 52:a51c77007319 | 558 | #define IS_TIM_IC_POLARITY_LITE(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ |
mbed_official | 52:a51c77007319 | 559 | ((POLARITY) == TIM_ICPolarity_Falling)|| \ |
mbed_official | 52:a51c77007319 | 560 | ((POLARITY) == TIM_ICPolarity_BothEdge)) |
mbed_official | 52:a51c77007319 | 561 | /** |
mbed_official | 52:a51c77007319 | 562 | * @} |
mbed_official | 52:a51c77007319 | 563 | */ |
mbed_official | 52:a51c77007319 | 564 | |
mbed_official | 52:a51c77007319 | 565 | /** @defgroup TIM_Input_Capture_Selection |
mbed_official | 52:a51c77007319 | 566 | * @{ |
mbed_official | 52:a51c77007319 | 567 | */ |
mbed_official | 52:a51c77007319 | 568 | |
mbed_official | 52:a51c77007319 | 569 | #define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be |
mbed_official | 52:a51c77007319 | 570 | connected to IC1, IC2, IC3 or IC4, respectively */ |
mbed_official | 52:a51c77007319 | 571 | #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be |
mbed_official | 52:a51c77007319 | 572 | connected to IC2, IC1, IC4 or IC3, respectively. */ |
mbed_official | 52:a51c77007319 | 573 | #define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */ |
mbed_official | 52:a51c77007319 | 574 | #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \ |
mbed_official | 52:a51c77007319 | 575 | ((SELECTION) == TIM_ICSelection_IndirectTI) || \ |
mbed_official | 52:a51c77007319 | 576 | ((SELECTION) == TIM_ICSelection_TRC)) |
mbed_official | 52:a51c77007319 | 577 | /** |
mbed_official | 52:a51c77007319 | 578 | * @} |
mbed_official | 52:a51c77007319 | 579 | */ |
mbed_official | 52:a51c77007319 | 580 | |
mbed_official | 52:a51c77007319 | 581 | /** @defgroup TIM_Input_Capture_Prescaler |
mbed_official | 52:a51c77007319 | 582 | * @{ |
mbed_official | 52:a51c77007319 | 583 | */ |
mbed_official | 52:a51c77007319 | 584 | |
mbed_official | 52:a51c77007319 | 585 | #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */ |
mbed_official | 52:a51c77007319 | 586 | #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */ |
mbed_official | 52:a51c77007319 | 587 | #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */ |
mbed_official | 52:a51c77007319 | 588 | #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */ |
mbed_official | 52:a51c77007319 | 589 | #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \ |
mbed_official | 52:a51c77007319 | 590 | ((PRESCALER) == TIM_ICPSC_DIV2) || \ |
mbed_official | 52:a51c77007319 | 591 | ((PRESCALER) == TIM_ICPSC_DIV4) || \ |
mbed_official | 52:a51c77007319 | 592 | ((PRESCALER) == TIM_ICPSC_DIV8)) |
mbed_official | 52:a51c77007319 | 593 | /** |
mbed_official | 52:a51c77007319 | 594 | * @} |
mbed_official | 52:a51c77007319 | 595 | */ |
mbed_official | 52:a51c77007319 | 596 | |
mbed_official | 52:a51c77007319 | 597 | /** @defgroup TIM_interrupt_sources |
mbed_official | 52:a51c77007319 | 598 | * @{ |
mbed_official | 52:a51c77007319 | 599 | */ |
mbed_official | 52:a51c77007319 | 600 | |
mbed_official | 52:a51c77007319 | 601 | #define TIM_IT_Update ((uint16_t)0x0001) |
mbed_official | 52:a51c77007319 | 602 | #define TIM_IT_CC1 ((uint16_t)0x0002) |
mbed_official | 52:a51c77007319 | 603 | #define TIM_IT_CC2 ((uint16_t)0x0004) |
mbed_official | 52:a51c77007319 | 604 | #define TIM_IT_CC3 ((uint16_t)0x0008) |
mbed_official | 52:a51c77007319 | 605 | #define TIM_IT_CC4 ((uint16_t)0x0010) |
mbed_official | 52:a51c77007319 | 606 | #define TIM_IT_COM ((uint16_t)0x0020) |
mbed_official | 52:a51c77007319 | 607 | #define TIM_IT_Trigger ((uint16_t)0x0040) |
mbed_official | 52:a51c77007319 | 608 | #define TIM_IT_Break ((uint16_t)0x0080) |
mbed_official | 52:a51c77007319 | 609 | #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) |
mbed_official | 52:a51c77007319 | 610 | |
mbed_official | 52:a51c77007319 | 611 | #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \ |
mbed_official | 52:a51c77007319 | 612 | ((IT) == TIM_IT_CC1) || \ |
mbed_official | 52:a51c77007319 | 613 | ((IT) == TIM_IT_CC2) || \ |
mbed_official | 52:a51c77007319 | 614 | ((IT) == TIM_IT_CC3) || \ |
mbed_official | 52:a51c77007319 | 615 | ((IT) == TIM_IT_CC4) || \ |
mbed_official | 52:a51c77007319 | 616 | ((IT) == TIM_IT_COM) || \ |
mbed_official | 52:a51c77007319 | 617 | ((IT) == TIM_IT_Trigger) || \ |
mbed_official | 52:a51c77007319 | 618 | ((IT) == TIM_IT_Break)) |
mbed_official | 52:a51c77007319 | 619 | /** |
mbed_official | 52:a51c77007319 | 620 | * @} |
mbed_official | 52:a51c77007319 | 621 | */ |
mbed_official | 52:a51c77007319 | 622 | |
mbed_official | 52:a51c77007319 | 623 | /** @defgroup TIM_DMA_Base_address |
mbed_official | 52:a51c77007319 | 624 | * @{ |
mbed_official | 52:a51c77007319 | 625 | */ |
mbed_official | 52:a51c77007319 | 626 | |
mbed_official | 52:a51c77007319 | 627 | #define TIM_DMABase_CR1 ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 628 | #define TIM_DMABase_CR2 ((uint16_t)0x0001) |
mbed_official | 52:a51c77007319 | 629 | #define TIM_DMABase_SMCR ((uint16_t)0x0002) |
mbed_official | 52:a51c77007319 | 630 | #define TIM_DMABase_DIER ((uint16_t)0x0003) |
mbed_official | 52:a51c77007319 | 631 | #define TIM_DMABase_SR ((uint16_t)0x0004) |
mbed_official | 52:a51c77007319 | 632 | #define TIM_DMABase_EGR ((uint16_t)0x0005) |
mbed_official | 52:a51c77007319 | 633 | #define TIM_DMABase_CCMR1 ((uint16_t)0x0006) |
mbed_official | 52:a51c77007319 | 634 | #define TIM_DMABase_CCMR2 ((uint16_t)0x0007) |
mbed_official | 52:a51c77007319 | 635 | #define TIM_DMABase_CCER ((uint16_t)0x0008) |
mbed_official | 52:a51c77007319 | 636 | #define TIM_DMABase_CNT ((uint16_t)0x0009) |
mbed_official | 52:a51c77007319 | 637 | #define TIM_DMABase_PSC ((uint16_t)0x000A) |
mbed_official | 52:a51c77007319 | 638 | #define TIM_DMABase_ARR ((uint16_t)0x000B) |
mbed_official | 52:a51c77007319 | 639 | #define TIM_DMABase_RCR ((uint16_t)0x000C) |
mbed_official | 52:a51c77007319 | 640 | #define TIM_DMABase_CCR1 ((uint16_t)0x000D) |
mbed_official | 52:a51c77007319 | 641 | #define TIM_DMABase_CCR2 ((uint16_t)0x000E) |
mbed_official | 52:a51c77007319 | 642 | #define TIM_DMABase_CCR3 ((uint16_t)0x000F) |
mbed_official | 52:a51c77007319 | 643 | #define TIM_DMABase_CCR4 ((uint16_t)0x0010) |
mbed_official | 52:a51c77007319 | 644 | #define TIM_DMABase_BDTR ((uint16_t)0x0011) |
mbed_official | 52:a51c77007319 | 645 | #define TIM_DMABase_DCR ((uint16_t)0x0012) |
mbed_official | 52:a51c77007319 | 646 | #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \ |
mbed_official | 52:a51c77007319 | 647 | ((BASE) == TIM_DMABase_CR2) || \ |
mbed_official | 52:a51c77007319 | 648 | ((BASE) == TIM_DMABase_SMCR) || \ |
mbed_official | 52:a51c77007319 | 649 | ((BASE) == TIM_DMABase_DIER) || \ |
mbed_official | 52:a51c77007319 | 650 | ((BASE) == TIM_DMABase_SR) || \ |
mbed_official | 52:a51c77007319 | 651 | ((BASE) == TIM_DMABase_EGR) || \ |
mbed_official | 52:a51c77007319 | 652 | ((BASE) == TIM_DMABase_CCMR1) || \ |
mbed_official | 52:a51c77007319 | 653 | ((BASE) == TIM_DMABase_CCMR2) || \ |
mbed_official | 52:a51c77007319 | 654 | ((BASE) == TIM_DMABase_CCER) || \ |
mbed_official | 52:a51c77007319 | 655 | ((BASE) == TIM_DMABase_CNT) || \ |
mbed_official | 52:a51c77007319 | 656 | ((BASE) == TIM_DMABase_PSC) || \ |
mbed_official | 52:a51c77007319 | 657 | ((BASE) == TIM_DMABase_ARR) || \ |
mbed_official | 52:a51c77007319 | 658 | ((BASE) == TIM_DMABase_RCR) || \ |
mbed_official | 52:a51c77007319 | 659 | ((BASE) == TIM_DMABase_CCR1) || \ |
mbed_official | 52:a51c77007319 | 660 | ((BASE) == TIM_DMABase_CCR2) || \ |
mbed_official | 52:a51c77007319 | 661 | ((BASE) == TIM_DMABase_CCR3) || \ |
mbed_official | 52:a51c77007319 | 662 | ((BASE) == TIM_DMABase_CCR4) || \ |
mbed_official | 52:a51c77007319 | 663 | ((BASE) == TIM_DMABase_BDTR) || \ |
mbed_official | 52:a51c77007319 | 664 | ((BASE) == TIM_DMABase_DCR)) |
mbed_official | 52:a51c77007319 | 665 | /** |
mbed_official | 52:a51c77007319 | 666 | * @} |
mbed_official | 52:a51c77007319 | 667 | */ |
mbed_official | 52:a51c77007319 | 668 | |
mbed_official | 52:a51c77007319 | 669 | /** @defgroup TIM_DMA_Burst_Length |
mbed_official | 52:a51c77007319 | 670 | * @{ |
mbed_official | 52:a51c77007319 | 671 | */ |
mbed_official | 52:a51c77007319 | 672 | |
mbed_official | 52:a51c77007319 | 673 | #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 674 | #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100) |
mbed_official | 52:a51c77007319 | 675 | #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200) |
mbed_official | 52:a51c77007319 | 676 | #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300) |
mbed_official | 52:a51c77007319 | 677 | #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400) |
mbed_official | 52:a51c77007319 | 678 | #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) |
mbed_official | 52:a51c77007319 | 679 | #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600) |
mbed_official | 52:a51c77007319 | 680 | #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700) |
mbed_official | 52:a51c77007319 | 681 | #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800) |
mbed_official | 52:a51c77007319 | 682 | #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900) |
mbed_official | 52:a51c77007319 | 683 | #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00) |
mbed_official | 52:a51c77007319 | 684 | #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00) |
mbed_official | 52:a51c77007319 | 685 | #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00) |
mbed_official | 52:a51c77007319 | 686 | #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00) |
mbed_official | 52:a51c77007319 | 687 | #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00) |
mbed_official | 52:a51c77007319 | 688 | #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00) |
mbed_official | 52:a51c77007319 | 689 | #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000) |
mbed_official | 52:a51c77007319 | 690 | #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100) |
mbed_official | 52:a51c77007319 | 691 | #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \ |
mbed_official | 52:a51c77007319 | 692 | ((LENGTH) == TIM_DMABurstLength_2Transfers) || \ |
mbed_official | 52:a51c77007319 | 693 | ((LENGTH) == TIM_DMABurstLength_3Transfers) || \ |
mbed_official | 52:a51c77007319 | 694 | ((LENGTH) == TIM_DMABurstLength_4Transfers) || \ |
mbed_official | 52:a51c77007319 | 695 | ((LENGTH) == TIM_DMABurstLength_5Transfers) || \ |
mbed_official | 52:a51c77007319 | 696 | ((LENGTH) == TIM_DMABurstLength_6Transfers) || \ |
mbed_official | 52:a51c77007319 | 697 | ((LENGTH) == TIM_DMABurstLength_7Transfers) || \ |
mbed_official | 52:a51c77007319 | 698 | ((LENGTH) == TIM_DMABurstLength_8Transfers) || \ |
mbed_official | 52:a51c77007319 | 699 | ((LENGTH) == TIM_DMABurstLength_9Transfers) || \ |
mbed_official | 52:a51c77007319 | 700 | ((LENGTH) == TIM_DMABurstLength_10Transfers) || \ |
mbed_official | 52:a51c77007319 | 701 | ((LENGTH) == TIM_DMABurstLength_11Transfers) || \ |
mbed_official | 52:a51c77007319 | 702 | ((LENGTH) == TIM_DMABurstLength_12Transfers) || \ |
mbed_official | 52:a51c77007319 | 703 | ((LENGTH) == TIM_DMABurstLength_13Transfers) || \ |
mbed_official | 52:a51c77007319 | 704 | ((LENGTH) == TIM_DMABurstLength_14Transfers) || \ |
mbed_official | 52:a51c77007319 | 705 | ((LENGTH) == TIM_DMABurstLength_15Transfers) || \ |
mbed_official | 52:a51c77007319 | 706 | ((LENGTH) == TIM_DMABurstLength_16Transfers) || \ |
mbed_official | 52:a51c77007319 | 707 | ((LENGTH) == TIM_DMABurstLength_17Transfers) || \ |
mbed_official | 52:a51c77007319 | 708 | ((LENGTH) == TIM_DMABurstLength_18Transfers)) |
mbed_official | 52:a51c77007319 | 709 | /** |
mbed_official | 52:a51c77007319 | 710 | * @} |
mbed_official | 52:a51c77007319 | 711 | */ |
mbed_official | 52:a51c77007319 | 712 | |
mbed_official | 52:a51c77007319 | 713 | /** @defgroup TIM_DMA_sources |
mbed_official | 52:a51c77007319 | 714 | * @{ |
mbed_official | 52:a51c77007319 | 715 | */ |
mbed_official | 52:a51c77007319 | 716 | |
mbed_official | 52:a51c77007319 | 717 | #define TIM_DMA_Update ((uint16_t)0x0100) |
mbed_official | 52:a51c77007319 | 718 | #define TIM_DMA_CC1 ((uint16_t)0x0200) |
mbed_official | 52:a51c77007319 | 719 | #define TIM_DMA_CC2 ((uint16_t)0x0400) |
mbed_official | 52:a51c77007319 | 720 | #define TIM_DMA_CC3 ((uint16_t)0x0800) |
mbed_official | 52:a51c77007319 | 721 | #define TIM_DMA_CC4 ((uint16_t)0x1000) |
mbed_official | 52:a51c77007319 | 722 | #define TIM_DMA_COM ((uint16_t)0x2000) |
mbed_official | 52:a51c77007319 | 723 | #define TIM_DMA_Trigger ((uint16_t)0x4000) |
mbed_official | 52:a51c77007319 | 724 | #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) |
mbed_official | 52:a51c77007319 | 725 | |
mbed_official | 52:a51c77007319 | 726 | /** |
mbed_official | 52:a51c77007319 | 727 | * @} |
mbed_official | 52:a51c77007319 | 728 | */ |
mbed_official | 52:a51c77007319 | 729 | |
mbed_official | 52:a51c77007319 | 730 | /** @defgroup TIM_External_Trigger_Prescaler |
mbed_official | 52:a51c77007319 | 731 | * @{ |
mbed_official | 52:a51c77007319 | 732 | */ |
mbed_official | 52:a51c77007319 | 733 | |
mbed_official | 52:a51c77007319 | 734 | #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 735 | #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) |
mbed_official | 52:a51c77007319 | 736 | #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) |
mbed_official | 52:a51c77007319 | 737 | #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) |
mbed_official | 52:a51c77007319 | 738 | #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \ |
mbed_official | 52:a51c77007319 | 739 | ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \ |
mbed_official | 52:a51c77007319 | 740 | ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \ |
mbed_official | 52:a51c77007319 | 741 | ((PRESCALER) == TIM_ExtTRGPSC_DIV8)) |
mbed_official | 52:a51c77007319 | 742 | /** |
mbed_official | 52:a51c77007319 | 743 | * @} |
mbed_official | 52:a51c77007319 | 744 | */ |
mbed_official | 52:a51c77007319 | 745 | |
mbed_official | 52:a51c77007319 | 746 | /** @defgroup TIM_Internal_Trigger_Selection |
mbed_official | 52:a51c77007319 | 747 | * @{ |
mbed_official | 52:a51c77007319 | 748 | */ |
mbed_official | 52:a51c77007319 | 749 | |
mbed_official | 52:a51c77007319 | 750 | #define TIM_TS_ITR0 ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 751 | #define TIM_TS_ITR1 ((uint16_t)0x0010) |
mbed_official | 52:a51c77007319 | 752 | #define TIM_TS_ITR2 ((uint16_t)0x0020) |
mbed_official | 52:a51c77007319 | 753 | #define TIM_TS_ITR3 ((uint16_t)0x0030) |
mbed_official | 52:a51c77007319 | 754 | #define TIM_TS_TI1F_ED ((uint16_t)0x0040) |
mbed_official | 52:a51c77007319 | 755 | #define TIM_TS_TI1FP1 ((uint16_t)0x0050) |
mbed_official | 52:a51c77007319 | 756 | #define TIM_TS_TI2FP2 ((uint16_t)0x0060) |
mbed_official | 52:a51c77007319 | 757 | #define TIM_TS_ETRF ((uint16_t)0x0070) |
mbed_official | 52:a51c77007319 | 758 | #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ |
mbed_official | 52:a51c77007319 | 759 | ((SELECTION) == TIM_TS_ITR1) || \ |
mbed_official | 52:a51c77007319 | 760 | ((SELECTION) == TIM_TS_ITR2) || \ |
mbed_official | 52:a51c77007319 | 761 | ((SELECTION) == TIM_TS_ITR3) || \ |
mbed_official | 52:a51c77007319 | 762 | ((SELECTION) == TIM_TS_TI1F_ED) || \ |
mbed_official | 52:a51c77007319 | 763 | ((SELECTION) == TIM_TS_TI1FP1) || \ |
mbed_official | 52:a51c77007319 | 764 | ((SELECTION) == TIM_TS_TI2FP2) || \ |
mbed_official | 52:a51c77007319 | 765 | ((SELECTION) == TIM_TS_ETRF)) |
mbed_official | 52:a51c77007319 | 766 | #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ |
mbed_official | 52:a51c77007319 | 767 | ((SELECTION) == TIM_TS_ITR1) || \ |
mbed_official | 52:a51c77007319 | 768 | ((SELECTION) == TIM_TS_ITR2) || \ |
mbed_official | 52:a51c77007319 | 769 | ((SELECTION) == TIM_TS_ITR3)) |
mbed_official | 52:a51c77007319 | 770 | /** |
mbed_official | 52:a51c77007319 | 771 | * @} |
mbed_official | 52:a51c77007319 | 772 | */ |
mbed_official | 52:a51c77007319 | 773 | |
mbed_official | 52:a51c77007319 | 774 | /** @defgroup TIM_TIx_External_Clock_Source |
mbed_official | 52:a51c77007319 | 775 | * @{ |
mbed_official | 52:a51c77007319 | 776 | */ |
mbed_official | 52:a51c77007319 | 777 | |
mbed_official | 52:a51c77007319 | 778 | #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) |
mbed_official | 52:a51c77007319 | 779 | #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) |
mbed_official | 52:a51c77007319 | 780 | #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) |
mbed_official | 52:a51c77007319 | 781 | #define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \ |
mbed_official | 52:a51c77007319 | 782 | ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \ |
mbed_official | 52:a51c77007319 | 783 | ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED)) |
mbed_official | 52:a51c77007319 | 784 | /** |
mbed_official | 52:a51c77007319 | 785 | * @} |
mbed_official | 52:a51c77007319 | 786 | */ |
mbed_official | 52:a51c77007319 | 787 | |
mbed_official | 52:a51c77007319 | 788 | /** @defgroup TIM_External_Trigger_Polarity |
mbed_official | 52:a51c77007319 | 789 | * @{ |
mbed_official | 52:a51c77007319 | 790 | */ |
mbed_official | 52:a51c77007319 | 791 | #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) |
mbed_official | 52:a51c77007319 | 792 | #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 793 | #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \ |
mbed_official | 52:a51c77007319 | 794 | ((POLARITY) == TIM_ExtTRGPolarity_NonInverted)) |
mbed_official | 52:a51c77007319 | 795 | /** |
mbed_official | 52:a51c77007319 | 796 | * @} |
mbed_official | 52:a51c77007319 | 797 | */ |
mbed_official | 52:a51c77007319 | 798 | |
mbed_official | 52:a51c77007319 | 799 | /** @defgroup TIM_Prescaler_Reload_Mode |
mbed_official | 52:a51c77007319 | 800 | * @{ |
mbed_official | 52:a51c77007319 | 801 | */ |
mbed_official | 52:a51c77007319 | 802 | |
mbed_official | 52:a51c77007319 | 803 | #define TIM_PSCReloadMode_Update ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 804 | #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) |
mbed_official | 52:a51c77007319 | 805 | #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \ |
mbed_official | 52:a51c77007319 | 806 | ((RELOAD) == TIM_PSCReloadMode_Immediate)) |
mbed_official | 52:a51c77007319 | 807 | /** |
mbed_official | 52:a51c77007319 | 808 | * @} |
mbed_official | 52:a51c77007319 | 809 | */ |
mbed_official | 52:a51c77007319 | 810 | |
mbed_official | 52:a51c77007319 | 811 | /** @defgroup TIM_Forced_Action |
mbed_official | 52:a51c77007319 | 812 | * @{ |
mbed_official | 52:a51c77007319 | 813 | */ |
mbed_official | 52:a51c77007319 | 814 | |
mbed_official | 52:a51c77007319 | 815 | #define TIM_ForcedAction_Active ((uint16_t)0x0050) |
mbed_official | 52:a51c77007319 | 816 | #define TIM_ForcedAction_InActive ((uint16_t)0x0040) |
mbed_official | 52:a51c77007319 | 817 | #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \ |
mbed_official | 52:a51c77007319 | 818 | ((ACTION) == TIM_ForcedAction_InActive)) |
mbed_official | 52:a51c77007319 | 819 | /** |
mbed_official | 52:a51c77007319 | 820 | * @} |
mbed_official | 52:a51c77007319 | 821 | */ |
mbed_official | 52:a51c77007319 | 822 | |
mbed_official | 52:a51c77007319 | 823 | /** @defgroup TIM_Encoder_Mode |
mbed_official | 52:a51c77007319 | 824 | * @{ |
mbed_official | 52:a51c77007319 | 825 | */ |
mbed_official | 52:a51c77007319 | 826 | |
mbed_official | 52:a51c77007319 | 827 | #define TIM_EncoderMode_TI1 ((uint16_t)0x0001) |
mbed_official | 52:a51c77007319 | 828 | #define TIM_EncoderMode_TI2 ((uint16_t)0x0002) |
mbed_official | 52:a51c77007319 | 829 | #define TIM_EncoderMode_TI12 ((uint16_t)0x0003) |
mbed_official | 52:a51c77007319 | 830 | #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ |
mbed_official | 52:a51c77007319 | 831 | ((MODE) == TIM_EncoderMode_TI2) || \ |
mbed_official | 52:a51c77007319 | 832 | ((MODE) == TIM_EncoderMode_TI12)) |
mbed_official | 52:a51c77007319 | 833 | /** |
mbed_official | 52:a51c77007319 | 834 | * @} |
mbed_official | 52:a51c77007319 | 835 | */ |
mbed_official | 52:a51c77007319 | 836 | |
mbed_official | 52:a51c77007319 | 837 | |
mbed_official | 52:a51c77007319 | 838 | /** @defgroup TIM_Event_Source |
mbed_official | 52:a51c77007319 | 839 | * @{ |
mbed_official | 52:a51c77007319 | 840 | */ |
mbed_official | 52:a51c77007319 | 841 | |
mbed_official | 52:a51c77007319 | 842 | #define TIM_EventSource_Update ((uint16_t)0x0001) |
mbed_official | 52:a51c77007319 | 843 | #define TIM_EventSource_CC1 ((uint16_t)0x0002) |
mbed_official | 52:a51c77007319 | 844 | #define TIM_EventSource_CC2 ((uint16_t)0x0004) |
mbed_official | 52:a51c77007319 | 845 | #define TIM_EventSource_CC3 ((uint16_t)0x0008) |
mbed_official | 52:a51c77007319 | 846 | #define TIM_EventSource_CC4 ((uint16_t)0x0010) |
mbed_official | 52:a51c77007319 | 847 | #define TIM_EventSource_COM ((uint16_t)0x0020) |
mbed_official | 52:a51c77007319 | 848 | #define TIM_EventSource_Trigger ((uint16_t)0x0040) |
mbed_official | 52:a51c77007319 | 849 | #define TIM_EventSource_Break ((uint16_t)0x0080) |
mbed_official | 52:a51c77007319 | 850 | #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000)) |
mbed_official | 52:a51c77007319 | 851 | |
mbed_official | 52:a51c77007319 | 852 | /** |
mbed_official | 52:a51c77007319 | 853 | * @} |
mbed_official | 52:a51c77007319 | 854 | */ |
mbed_official | 52:a51c77007319 | 855 | |
mbed_official | 52:a51c77007319 | 856 | /** @defgroup TIM_Update_Source |
mbed_official | 52:a51c77007319 | 857 | * @{ |
mbed_official | 52:a51c77007319 | 858 | */ |
mbed_official | 52:a51c77007319 | 859 | |
mbed_official | 52:a51c77007319 | 860 | #define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow |
mbed_official | 52:a51c77007319 | 861 | or the setting of UG bit, or an update generation |
mbed_official | 52:a51c77007319 | 862 | through the slave mode controller. */ |
mbed_official | 52:a51c77007319 | 863 | #define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */ |
mbed_official | 52:a51c77007319 | 864 | #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ |
mbed_official | 52:a51c77007319 | 865 | ((SOURCE) == TIM_UpdateSource_Regular)) |
mbed_official | 52:a51c77007319 | 866 | /** |
mbed_official | 52:a51c77007319 | 867 | * @} |
mbed_official | 52:a51c77007319 | 868 | */ |
mbed_official | 52:a51c77007319 | 869 | |
mbed_official | 52:a51c77007319 | 870 | /** @defgroup TIM_Output_Compare_Preload_State |
mbed_official | 52:a51c77007319 | 871 | * @{ |
mbed_official | 52:a51c77007319 | 872 | */ |
mbed_official | 52:a51c77007319 | 873 | |
mbed_official | 52:a51c77007319 | 874 | #define TIM_OCPreload_Enable ((uint16_t)0x0008) |
mbed_official | 52:a51c77007319 | 875 | #define TIM_OCPreload_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 876 | #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ |
mbed_official | 52:a51c77007319 | 877 | ((STATE) == TIM_OCPreload_Disable)) |
mbed_official | 52:a51c77007319 | 878 | /** |
mbed_official | 52:a51c77007319 | 879 | * @} |
mbed_official | 52:a51c77007319 | 880 | */ |
mbed_official | 52:a51c77007319 | 881 | |
mbed_official | 52:a51c77007319 | 882 | /** @defgroup TIM_Output_Compare_Fast_State |
mbed_official | 52:a51c77007319 | 883 | * @{ |
mbed_official | 52:a51c77007319 | 884 | */ |
mbed_official | 52:a51c77007319 | 885 | |
mbed_official | 52:a51c77007319 | 886 | #define TIM_OCFast_Enable ((uint16_t)0x0004) |
mbed_official | 52:a51c77007319 | 887 | #define TIM_OCFast_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 888 | #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ |
mbed_official | 52:a51c77007319 | 889 | ((STATE) == TIM_OCFast_Disable)) |
mbed_official | 52:a51c77007319 | 890 | |
mbed_official | 52:a51c77007319 | 891 | /** |
mbed_official | 52:a51c77007319 | 892 | * @} |
mbed_official | 52:a51c77007319 | 893 | */ |
mbed_official | 52:a51c77007319 | 894 | |
mbed_official | 52:a51c77007319 | 895 | /** @defgroup TIM_Output_Compare_Clear_State |
mbed_official | 52:a51c77007319 | 896 | * @{ |
mbed_official | 52:a51c77007319 | 897 | */ |
mbed_official | 52:a51c77007319 | 898 | |
mbed_official | 52:a51c77007319 | 899 | #define TIM_OCClear_Enable ((uint16_t)0x0080) |
mbed_official | 52:a51c77007319 | 900 | #define TIM_OCClear_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 901 | #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ |
mbed_official | 52:a51c77007319 | 902 | ((STATE) == TIM_OCClear_Disable)) |
mbed_official | 52:a51c77007319 | 903 | /** |
mbed_official | 52:a51c77007319 | 904 | * @} |
mbed_official | 52:a51c77007319 | 905 | */ |
mbed_official | 52:a51c77007319 | 906 | |
mbed_official | 52:a51c77007319 | 907 | /** @defgroup TIM_Trigger_Output_Source |
mbed_official | 52:a51c77007319 | 908 | * @{ |
mbed_official | 52:a51c77007319 | 909 | */ |
mbed_official | 52:a51c77007319 | 910 | |
mbed_official | 52:a51c77007319 | 911 | #define TIM_TRGOSource_Reset ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 912 | #define TIM_TRGOSource_Enable ((uint16_t)0x0010) |
mbed_official | 52:a51c77007319 | 913 | #define TIM_TRGOSource_Update ((uint16_t)0x0020) |
mbed_official | 52:a51c77007319 | 914 | #define TIM_TRGOSource_OC1 ((uint16_t)0x0030) |
mbed_official | 52:a51c77007319 | 915 | #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) |
mbed_official | 52:a51c77007319 | 916 | #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) |
mbed_official | 52:a51c77007319 | 917 | #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) |
mbed_official | 52:a51c77007319 | 918 | #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) |
mbed_official | 52:a51c77007319 | 919 | #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ |
mbed_official | 52:a51c77007319 | 920 | ((SOURCE) == TIM_TRGOSource_Enable) || \ |
mbed_official | 52:a51c77007319 | 921 | ((SOURCE) == TIM_TRGOSource_Update) || \ |
mbed_official | 52:a51c77007319 | 922 | ((SOURCE) == TIM_TRGOSource_OC1) || \ |
mbed_official | 52:a51c77007319 | 923 | ((SOURCE) == TIM_TRGOSource_OC1Ref) || \ |
mbed_official | 52:a51c77007319 | 924 | ((SOURCE) == TIM_TRGOSource_OC2Ref) || \ |
mbed_official | 52:a51c77007319 | 925 | ((SOURCE) == TIM_TRGOSource_OC3Ref) || \ |
mbed_official | 52:a51c77007319 | 926 | ((SOURCE) == TIM_TRGOSource_OC4Ref)) |
mbed_official | 52:a51c77007319 | 927 | /** |
mbed_official | 52:a51c77007319 | 928 | * @} |
mbed_official | 52:a51c77007319 | 929 | */ |
mbed_official | 52:a51c77007319 | 930 | |
mbed_official | 52:a51c77007319 | 931 | /** @defgroup TIM_Slave_Mode |
mbed_official | 52:a51c77007319 | 932 | * @{ |
mbed_official | 52:a51c77007319 | 933 | */ |
mbed_official | 52:a51c77007319 | 934 | |
mbed_official | 52:a51c77007319 | 935 | #define TIM_SlaveMode_Reset ((uint16_t)0x0004) |
mbed_official | 52:a51c77007319 | 936 | #define TIM_SlaveMode_Gated ((uint16_t)0x0005) |
mbed_official | 52:a51c77007319 | 937 | #define TIM_SlaveMode_Trigger ((uint16_t)0x0006) |
mbed_official | 52:a51c77007319 | 938 | #define TIM_SlaveMode_External1 ((uint16_t)0x0007) |
mbed_official | 52:a51c77007319 | 939 | #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \ |
mbed_official | 52:a51c77007319 | 940 | ((MODE) == TIM_SlaveMode_Gated) || \ |
mbed_official | 52:a51c77007319 | 941 | ((MODE) == TIM_SlaveMode_Trigger) || \ |
mbed_official | 52:a51c77007319 | 942 | ((MODE) == TIM_SlaveMode_External1)) |
mbed_official | 52:a51c77007319 | 943 | /** |
mbed_official | 52:a51c77007319 | 944 | * @} |
mbed_official | 52:a51c77007319 | 945 | */ |
mbed_official | 52:a51c77007319 | 946 | |
mbed_official | 52:a51c77007319 | 947 | /** @defgroup TIM_Master_Slave_Mode |
mbed_official | 52:a51c77007319 | 948 | * @{ |
mbed_official | 52:a51c77007319 | 949 | */ |
mbed_official | 52:a51c77007319 | 950 | |
mbed_official | 52:a51c77007319 | 951 | #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) |
mbed_official | 52:a51c77007319 | 952 | #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) |
mbed_official | 52:a51c77007319 | 953 | #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ |
mbed_official | 52:a51c77007319 | 954 | ((STATE) == TIM_MasterSlaveMode_Disable)) |
mbed_official | 52:a51c77007319 | 955 | /** |
mbed_official | 52:a51c77007319 | 956 | * @} |
mbed_official | 52:a51c77007319 | 957 | */ |
mbed_official | 52:a51c77007319 | 958 | |
mbed_official | 52:a51c77007319 | 959 | /** @defgroup TIM_Flags |
mbed_official | 52:a51c77007319 | 960 | * @{ |
mbed_official | 52:a51c77007319 | 961 | */ |
mbed_official | 52:a51c77007319 | 962 | |
mbed_official | 52:a51c77007319 | 963 | #define TIM_FLAG_Update ((uint16_t)0x0001) |
mbed_official | 52:a51c77007319 | 964 | #define TIM_FLAG_CC1 ((uint16_t)0x0002) |
mbed_official | 52:a51c77007319 | 965 | #define TIM_FLAG_CC2 ((uint16_t)0x0004) |
mbed_official | 52:a51c77007319 | 966 | #define TIM_FLAG_CC3 ((uint16_t)0x0008) |
mbed_official | 52:a51c77007319 | 967 | #define TIM_FLAG_CC4 ((uint16_t)0x0010) |
mbed_official | 52:a51c77007319 | 968 | #define TIM_FLAG_COM ((uint16_t)0x0020) |
mbed_official | 52:a51c77007319 | 969 | #define TIM_FLAG_Trigger ((uint16_t)0x0040) |
mbed_official | 52:a51c77007319 | 970 | #define TIM_FLAG_Break ((uint16_t)0x0080) |
mbed_official | 52:a51c77007319 | 971 | #define TIM_FLAG_CC1OF ((uint16_t)0x0200) |
mbed_official | 52:a51c77007319 | 972 | #define TIM_FLAG_CC2OF ((uint16_t)0x0400) |
mbed_official | 52:a51c77007319 | 973 | #define TIM_FLAG_CC3OF ((uint16_t)0x0800) |
mbed_official | 52:a51c77007319 | 974 | #define TIM_FLAG_CC4OF ((uint16_t)0x1000) |
mbed_official | 52:a51c77007319 | 975 | #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \ |
mbed_official | 52:a51c77007319 | 976 | ((FLAG) == TIM_FLAG_CC1) || \ |
mbed_official | 52:a51c77007319 | 977 | ((FLAG) == TIM_FLAG_CC2) || \ |
mbed_official | 52:a51c77007319 | 978 | ((FLAG) == TIM_FLAG_CC3) || \ |
mbed_official | 52:a51c77007319 | 979 | ((FLAG) == TIM_FLAG_CC4) || \ |
mbed_official | 52:a51c77007319 | 980 | ((FLAG) == TIM_FLAG_COM) || \ |
mbed_official | 52:a51c77007319 | 981 | ((FLAG) == TIM_FLAG_Trigger) || \ |
mbed_official | 52:a51c77007319 | 982 | ((FLAG) == TIM_FLAG_Break) || \ |
mbed_official | 52:a51c77007319 | 983 | ((FLAG) == TIM_FLAG_CC1OF) || \ |
mbed_official | 52:a51c77007319 | 984 | ((FLAG) == TIM_FLAG_CC2OF) || \ |
mbed_official | 52:a51c77007319 | 985 | ((FLAG) == TIM_FLAG_CC3OF) || \ |
mbed_official | 52:a51c77007319 | 986 | ((FLAG) == TIM_FLAG_CC4OF)) |
mbed_official | 52:a51c77007319 | 987 | |
mbed_official | 52:a51c77007319 | 988 | |
mbed_official | 52:a51c77007319 | 989 | #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000)) |
mbed_official | 52:a51c77007319 | 990 | /** |
mbed_official | 52:a51c77007319 | 991 | * @} |
mbed_official | 52:a51c77007319 | 992 | */ |
mbed_official | 52:a51c77007319 | 993 | |
mbed_official | 52:a51c77007319 | 994 | /** @defgroup TIM_Input_Capture_Filer_Value |
mbed_official | 52:a51c77007319 | 995 | * @{ |
mbed_official | 52:a51c77007319 | 996 | */ |
mbed_official | 52:a51c77007319 | 997 | |
mbed_official | 52:a51c77007319 | 998 | #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) |
mbed_official | 52:a51c77007319 | 999 | /** |
mbed_official | 52:a51c77007319 | 1000 | * @} |
mbed_official | 52:a51c77007319 | 1001 | */ |
mbed_official | 52:a51c77007319 | 1002 | |
mbed_official | 52:a51c77007319 | 1003 | /** @defgroup TIM_External_Trigger_Filter |
mbed_official | 52:a51c77007319 | 1004 | * @{ |
mbed_official | 52:a51c77007319 | 1005 | */ |
mbed_official | 52:a51c77007319 | 1006 | |
mbed_official | 52:a51c77007319 | 1007 | #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) |
mbed_official | 52:a51c77007319 | 1008 | /** |
mbed_official | 52:a51c77007319 | 1009 | * @} |
mbed_official | 52:a51c77007319 | 1010 | */ |
mbed_official | 52:a51c77007319 | 1011 | |
mbed_official | 52:a51c77007319 | 1012 | /** @defgroup TIM_Legacy |
mbed_official | 52:a51c77007319 | 1013 | * @{ |
mbed_official | 52:a51c77007319 | 1014 | */ |
mbed_official | 52:a51c77007319 | 1015 | |
mbed_official | 52:a51c77007319 | 1016 | #define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer |
mbed_official | 52:a51c77007319 | 1017 | #define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers |
mbed_official | 52:a51c77007319 | 1018 | #define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers |
mbed_official | 52:a51c77007319 | 1019 | #define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers |
mbed_official | 52:a51c77007319 | 1020 | #define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers |
mbed_official | 52:a51c77007319 | 1021 | #define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers |
mbed_official | 52:a51c77007319 | 1022 | #define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers |
mbed_official | 52:a51c77007319 | 1023 | #define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers |
mbed_official | 52:a51c77007319 | 1024 | #define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers |
mbed_official | 52:a51c77007319 | 1025 | #define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers |
mbed_official | 52:a51c77007319 | 1026 | #define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers |
mbed_official | 52:a51c77007319 | 1027 | #define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers |
mbed_official | 52:a51c77007319 | 1028 | #define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers |
mbed_official | 52:a51c77007319 | 1029 | #define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers |
mbed_official | 52:a51c77007319 | 1030 | #define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers |
mbed_official | 52:a51c77007319 | 1031 | #define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers |
mbed_official | 52:a51c77007319 | 1032 | #define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers |
mbed_official | 52:a51c77007319 | 1033 | #define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers |
mbed_official | 52:a51c77007319 | 1034 | /** |
mbed_official | 52:a51c77007319 | 1035 | * @} |
mbed_official | 52:a51c77007319 | 1036 | */ |
mbed_official | 52:a51c77007319 | 1037 | |
mbed_official | 52:a51c77007319 | 1038 | /** |
mbed_official | 52:a51c77007319 | 1039 | * @} |
mbed_official | 52:a51c77007319 | 1040 | */ |
mbed_official | 52:a51c77007319 | 1041 | |
mbed_official | 52:a51c77007319 | 1042 | /** @defgroup TIM_Exported_Macros |
mbed_official | 52:a51c77007319 | 1043 | * @{ |
mbed_official | 52:a51c77007319 | 1044 | */ |
mbed_official | 52:a51c77007319 | 1045 | |
mbed_official | 52:a51c77007319 | 1046 | /** |
mbed_official | 52:a51c77007319 | 1047 | * @} |
mbed_official | 52:a51c77007319 | 1048 | */ |
mbed_official | 52:a51c77007319 | 1049 | |
mbed_official | 52:a51c77007319 | 1050 | /** @defgroup TIM_Exported_Functions |
mbed_official | 52:a51c77007319 | 1051 | * @{ |
mbed_official | 52:a51c77007319 | 1052 | */ |
mbed_official | 52:a51c77007319 | 1053 | |
mbed_official | 52:a51c77007319 | 1054 | void TIM_DeInit(TIM_TypeDef* TIMx); |
mbed_official | 52:a51c77007319 | 1055 | void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); |
mbed_official | 52:a51c77007319 | 1056 | void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 52:a51c77007319 | 1057 | void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 52:a51c77007319 | 1058 | void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 52:a51c77007319 | 1059 | void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 52:a51c77007319 | 1060 | void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); |
mbed_official | 52:a51c77007319 | 1061 | void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); |
mbed_official | 52:a51c77007319 | 1062 | void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); |
mbed_official | 52:a51c77007319 | 1063 | void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); |
mbed_official | 52:a51c77007319 | 1064 | void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 52:a51c77007319 | 1065 | void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); |
mbed_official | 52:a51c77007319 | 1066 | void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct); |
mbed_official | 52:a51c77007319 | 1067 | void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1068 | void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1069 | void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1070 | void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); |
mbed_official | 52:a51c77007319 | 1071 | void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength); |
mbed_official | 52:a51c77007319 | 1072 | void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1073 | void TIM_InternalClockConfig(TIM_TypeDef* TIMx); |
mbed_official | 52:a51c77007319 | 1074 | void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); |
mbed_official | 52:a51c77007319 | 1075 | void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, |
mbed_official | 52:a51c77007319 | 1076 | uint16_t TIM_ICPolarity, uint16_t ICFilter); |
mbed_official | 52:a51c77007319 | 1077 | void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, |
mbed_official | 52:a51c77007319 | 1078 | uint16_t ExtTRGFilter); |
mbed_official | 52:a51c77007319 | 1079 | void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, |
mbed_official | 52:a51c77007319 | 1080 | uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); |
mbed_official | 52:a51c77007319 | 1081 | void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, |
mbed_official | 52:a51c77007319 | 1082 | uint16_t ExtTRGFilter); |
mbed_official | 52:a51c77007319 | 1083 | void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); |
mbed_official | 52:a51c77007319 | 1084 | void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); |
mbed_official | 52:a51c77007319 | 1085 | void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); |
mbed_official | 52:a51c77007319 | 1086 | void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, |
mbed_official | 52:a51c77007319 | 1087 | uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); |
mbed_official | 52:a51c77007319 | 1088 | void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 52:a51c77007319 | 1089 | void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 52:a51c77007319 | 1090 | void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 52:a51c77007319 | 1091 | void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 52:a51c77007319 | 1092 | void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1093 | void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1094 | void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1095 | void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1096 | void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 52:a51c77007319 | 1097 | void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 52:a51c77007319 | 1098 | void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 52:a51c77007319 | 1099 | void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 52:a51c77007319 | 1100 | void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 52:a51c77007319 | 1101 | void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 52:a51c77007319 | 1102 | void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 52:a51c77007319 | 1103 | void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 52:a51c77007319 | 1104 | void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 52:a51c77007319 | 1105 | void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 52:a51c77007319 | 1106 | void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 52:a51c77007319 | 1107 | void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 52:a51c77007319 | 1108 | void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 52:a51c77007319 | 1109 | void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); |
mbed_official | 52:a51c77007319 | 1110 | void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 52:a51c77007319 | 1111 | void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); |
mbed_official | 52:a51c77007319 | 1112 | void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 52:a51c77007319 | 1113 | void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); |
mbed_official | 52:a51c77007319 | 1114 | void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 52:a51c77007319 | 1115 | void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); |
mbed_official | 52:a51c77007319 | 1116 | void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); |
mbed_official | 52:a51c77007319 | 1117 | void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode); |
mbed_official | 52:a51c77007319 | 1118 | void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1119 | void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); |
mbed_official | 52:a51c77007319 | 1120 | void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 52:a51c77007319 | 1121 | void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode); |
mbed_official | 52:a51c77007319 | 1122 | void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); |
mbed_official | 52:a51c77007319 | 1123 | void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode); |
mbed_official | 52:a51c77007319 | 1124 | void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); |
mbed_official | 52:a51c77007319 | 1125 | void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter); |
mbed_official | 52:a51c77007319 | 1126 | void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload); |
mbed_official | 52:a51c77007319 | 1127 | void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1); |
mbed_official | 52:a51c77007319 | 1128 | void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2); |
mbed_official | 52:a51c77007319 | 1129 | void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3); |
mbed_official | 52:a51c77007319 | 1130 | void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4); |
mbed_official | 52:a51c77007319 | 1131 | void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 52:a51c77007319 | 1132 | void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 52:a51c77007319 | 1133 | void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 52:a51c77007319 | 1134 | void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 52:a51c77007319 | 1135 | void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD); |
mbed_official | 52:a51c77007319 | 1136 | uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx); |
mbed_official | 52:a51c77007319 | 1137 | uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx); |
mbed_official | 52:a51c77007319 | 1138 | uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx); |
mbed_official | 52:a51c77007319 | 1139 | uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx); |
mbed_official | 52:a51c77007319 | 1140 | uint16_t TIM_GetCounter(TIM_TypeDef* TIMx); |
mbed_official | 52:a51c77007319 | 1141 | uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); |
mbed_official | 52:a51c77007319 | 1142 | FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); |
mbed_official | 52:a51c77007319 | 1143 | void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); |
mbed_official | 52:a51c77007319 | 1144 | ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); |
mbed_official | 52:a51c77007319 | 1145 | void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); |
mbed_official | 52:a51c77007319 | 1146 | |
mbed_official | 52:a51c77007319 | 1147 | #ifdef __cplusplus |
mbed_official | 52:a51c77007319 | 1148 | } |
mbed_official | 52:a51c77007319 | 1149 | #endif |
mbed_official | 52:a51c77007319 | 1150 | |
mbed_official | 52:a51c77007319 | 1151 | #endif /*__STM32F10x_TIM_H */ |
mbed_official | 52:a51c77007319 | 1152 | /** |
mbed_official | 52:a51c77007319 | 1153 | * @} |
mbed_official | 52:a51c77007319 | 1154 | */ |
mbed_official | 52:a51c77007319 | 1155 | |
mbed_official | 52:a51c77007319 | 1156 | /** |
mbed_official | 52:a51c77007319 | 1157 | * @} |
mbed_official | 52:a51c77007319 | 1158 | */ |
mbed_official | 52:a51c77007319 | 1159 | |
mbed_official | 52:a51c77007319 | 1160 | /** |
mbed_official | 52:a51c77007319 | 1161 | * @} |
mbed_official | 52:a51c77007319 | 1162 | */ |
mbed_official | 52:a51c77007319 | 1163 | |
mbed_official | 52:a51c77007319 | 1164 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |