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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_pwr_ex.c@235:685d5f11838f, 2014-06-23 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Jun 23 14:00:09 2014 +0100
- Revision:
- 235:685d5f11838f
Synchronized with git revision 9728c76667962b289ee9c4c687ef9f115db48cd3
Full URL: https://github.com/mbedmicro/mbed/commit/9728c76667962b289ee9c4c687ef9f115db48cd3/
[NUCLEO_F411RE] Add all target files
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 235:685d5f11838f | 1 | /** |
mbed_official | 235:685d5f11838f | 2 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 3 | * @file stm32f4xx_hal_pwr_ex.c |
mbed_official | 235:685d5f11838f | 4 | * @author MCD Application Team |
mbed_official | 235:685d5f11838f | 5 | * @version V1.1.0 |
mbed_official | 235:685d5f11838f | 6 | * @date 19-June-2014 |
mbed_official | 235:685d5f11838f | 7 | * @brief Extended PWR HAL module driver. |
mbed_official | 235:685d5f11838f | 8 | * This file provides firmware functions to manage the following |
mbed_official | 235:685d5f11838f | 9 | * functionalities of PWR extension peripheral: |
mbed_official | 235:685d5f11838f | 10 | * + Peripheral Extended features functions |
mbed_official | 235:685d5f11838f | 11 | * |
mbed_official | 235:685d5f11838f | 12 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 13 | * @attention |
mbed_official | 235:685d5f11838f | 14 | * |
mbed_official | 235:685d5f11838f | 15 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 235:685d5f11838f | 16 | * |
mbed_official | 235:685d5f11838f | 17 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 235:685d5f11838f | 18 | * are permitted provided that the following conditions are met: |
mbed_official | 235:685d5f11838f | 19 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 235:685d5f11838f | 20 | * this list of conditions and the following disclaimer. |
mbed_official | 235:685d5f11838f | 21 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 235:685d5f11838f | 22 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 235:685d5f11838f | 23 | * and/or other materials provided with the distribution. |
mbed_official | 235:685d5f11838f | 24 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 235:685d5f11838f | 25 | * may be used to endorse or promote products derived from this software |
mbed_official | 235:685d5f11838f | 26 | * without specific prior written permission. |
mbed_official | 235:685d5f11838f | 27 | * |
mbed_official | 235:685d5f11838f | 28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 235:685d5f11838f | 29 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 235:685d5f11838f | 30 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 235:685d5f11838f | 31 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 235:685d5f11838f | 32 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 235:685d5f11838f | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 235:685d5f11838f | 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 235:685d5f11838f | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 235:685d5f11838f | 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 235:685d5f11838f | 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 235:685d5f11838f | 38 | * |
mbed_official | 235:685d5f11838f | 39 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 40 | */ |
mbed_official | 235:685d5f11838f | 41 | |
mbed_official | 235:685d5f11838f | 42 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 43 | #include "stm32f4xx_hal.h" |
mbed_official | 235:685d5f11838f | 44 | |
mbed_official | 235:685d5f11838f | 45 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 235:685d5f11838f | 46 | * @{ |
mbed_official | 235:685d5f11838f | 47 | */ |
mbed_official | 235:685d5f11838f | 48 | |
mbed_official | 235:685d5f11838f | 49 | /** @defgroup PWREx |
mbed_official | 235:685d5f11838f | 50 | * @brief PWR HAL module driver |
mbed_official | 235:685d5f11838f | 51 | * @{ |
mbed_official | 235:685d5f11838f | 52 | */ |
mbed_official | 235:685d5f11838f | 53 | |
mbed_official | 235:685d5f11838f | 54 | #ifdef HAL_PWR_MODULE_ENABLED |
mbed_official | 235:685d5f11838f | 55 | |
mbed_official | 235:685d5f11838f | 56 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 57 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 58 | #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000 |
mbed_official | 235:685d5f11838f | 59 | #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000 |
mbed_official | 235:685d5f11838f | 60 | #define PWR_BKPREG_TIMEOUT_VALUE 1000 |
mbed_official | 235:685d5f11838f | 61 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 62 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 63 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 64 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 65 | |
mbed_official | 235:685d5f11838f | 66 | /** @defgroup PWREx_Private_Functions |
mbed_official | 235:685d5f11838f | 67 | * @{ |
mbed_official | 235:685d5f11838f | 68 | */ |
mbed_official | 235:685d5f11838f | 69 | |
mbed_official | 235:685d5f11838f | 70 | /** @defgroup PWREx_Group1 Peripheral Extended features functions |
mbed_official | 235:685d5f11838f | 71 | * @brief Peripheral Extended features functions |
mbed_official | 235:685d5f11838f | 72 | * |
mbed_official | 235:685d5f11838f | 73 | @verbatim |
mbed_official | 235:685d5f11838f | 74 | |
mbed_official | 235:685d5f11838f | 75 | =============================================================================== |
mbed_official | 235:685d5f11838f | 76 | ##### Peripheral extended features functions ##### |
mbed_official | 235:685d5f11838f | 77 | =============================================================================== |
mbed_official | 235:685d5f11838f | 78 | |
mbed_official | 235:685d5f11838f | 79 | *** Main and Backup Regulators configuration *** |
mbed_official | 235:685d5f11838f | 80 | ================================================ |
mbed_official | 235:685d5f11838f | 81 | [..] |
mbed_official | 235:685d5f11838f | 82 | (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from |
mbed_official | 235:685d5f11838f | 83 | the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is |
mbed_official | 235:685d5f11838f | 84 | retained even in Standby or VBAT mode when the low power backup regulator |
mbed_official | 235:685d5f11838f | 85 | is enabled. It can be considered as an internal EEPROM when VBAT is |
mbed_official | 235:685d5f11838f | 86 | always present. You can use the HAL_PWR_EnableBkUpReg() function to |
mbed_official | 235:685d5f11838f | 87 | enable the low power backup regulator. |
mbed_official | 235:685d5f11838f | 88 | |
mbed_official | 235:685d5f11838f | 89 | (+) When the backup domain is supplied by VDD (analog switch connected to VDD) |
mbed_official | 235:685d5f11838f | 90 | the backup SRAM is powered from VDD which replaces the VBAT power supply to |
mbed_official | 235:685d5f11838f | 91 | save battery life. |
mbed_official | 235:685d5f11838f | 92 | |
mbed_official | 235:685d5f11838f | 93 | (+) The backup SRAM is not mass erased by a tamper event. It is read |
mbed_official | 235:685d5f11838f | 94 | protected to prevent confidential data, such as cryptographic private |
mbed_official | 235:685d5f11838f | 95 | key, from being accessed. The backup SRAM can be erased only through |
mbed_official | 235:685d5f11838f | 96 | the Flash interface when a protection level change from level 1 to |
mbed_official | 235:685d5f11838f | 97 | level 0 is requested. |
mbed_official | 235:685d5f11838f | 98 | -@- Refer to the description of Read protection (RDP) in the Flash |
mbed_official | 235:685d5f11838f | 99 | programming manual. |
mbed_official | 235:685d5f11838f | 100 | |
mbed_official | 235:685d5f11838f | 101 | (+) The main internal regulator can be configured to have a tradeoff between |
mbed_official | 235:685d5f11838f | 102 | performance and power consumption when the device does not operate at |
mbed_official | 235:685d5f11838f | 103 | the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG() |
mbed_official | 235:685d5f11838f | 104 | macro which configure VOS bit in PWR_CR register |
mbed_official | 235:685d5f11838f | 105 | |
mbed_official | 235:685d5f11838f | 106 | Refer to the product datasheets for more details. |
mbed_official | 235:685d5f11838f | 107 | |
mbed_official | 235:685d5f11838f | 108 | *** FLASH Power Down configuration **** |
mbed_official | 235:685d5f11838f | 109 | ======================================= |
mbed_official | 235:685d5f11838f | 110 | [..] |
mbed_official | 235:685d5f11838f | 111 | (+) By setting the FPDS bit in the PWR_CR register by using the |
mbed_official | 235:685d5f11838f | 112 | HAL_PWR_EnableFlashPowerDown() function, the Flash memory also enters power |
mbed_official | 235:685d5f11838f | 113 | down mode when the device enters Stop mode. When the Flash memory |
mbed_official | 235:685d5f11838f | 114 | is in power down mode, an additional startup delay is incurred when |
mbed_official | 235:685d5f11838f | 115 | waking up from Stop mode. |
mbed_official | 235:685d5f11838f | 116 | |
mbed_official | 235:685d5f11838f | 117 | (+) For STM32F42xxx/43xxx Devices, the scale can be modified only when the PLL |
mbed_official | 235:685d5f11838f | 118 | is OFF and the HSI or HSE clock source is selected as system clock. |
mbed_official | 235:685d5f11838f | 119 | The new value programmed is active only when the PLL is ON. |
mbed_official | 235:685d5f11838f | 120 | When the PLL is OFF, the voltage scale 3 is automatically selected. |
mbed_official | 235:685d5f11838f | 121 | Refer to the datasheets for more details. |
mbed_official | 235:685d5f11838f | 122 | |
mbed_official | 235:685d5f11838f | 123 | *** Over-Drive and Under-Drive configuration **** |
mbed_official | 235:685d5f11838f | 124 | ================================================= |
mbed_official | 235:685d5f11838f | 125 | [..] |
mbed_official | 235:685d5f11838f | 126 | (+) For STM32F42xxx/43xxx Devices, in Run mode: the main regulator has |
mbed_official | 235:685d5f11838f | 127 | 2 operating modes available: |
mbed_official | 235:685d5f11838f | 128 | (++) Normal mode: The CPU and core logic operate at maximum frequency at a given |
mbed_official | 235:685d5f11838f | 129 | voltage scaling (scale 1, scale 2 or scale 3) |
mbed_official | 235:685d5f11838f | 130 | (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a |
mbed_official | 235:685d5f11838f | 131 | higher frequency than the normal mode for a given voltage scaling (scale 1, |
mbed_official | 235:685d5f11838f | 132 | scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and |
mbed_official | 235:685d5f11838f | 133 | disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow |
mbed_official | 235:685d5f11838f | 134 | the sequence described in Reference manual. |
mbed_official | 235:685d5f11838f | 135 | |
mbed_official | 235:685d5f11838f | 136 | (+) For STM32F42xxx/43xxx Devices, in Stop mode: the main regulator or low power regulator |
mbed_official | 235:685d5f11838f | 137 | supplies a low power voltage to the 1.2V domain, thus preserving the content of registers |
mbed_official | 235:685d5f11838f | 138 | and internal SRAM. 2 operating modes are available: |
mbed_official | 235:685d5f11838f | 139 | (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only |
mbed_official | 235:685d5f11838f | 140 | available when the main regulator or the low power regulator is used in Scale 3 or |
mbed_official | 235:685d5f11838f | 141 | low voltage mode. |
mbed_official | 235:685d5f11838f | 142 | (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only |
mbed_official | 235:685d5f11838f | 143 | available when the main regulator or the low power regulator is in low voltage mode. |
mbed_official | 235:685d5f11838f | 144 | |
mbed_official | 235:685d5f11838f | 145 | @endverbatim |
mbed_official | 235:685d5f11838f | 146 | * @{ |
mbed_official | 235:685d5f11838f | 147 | */ |
mbed_official | 235:685d5f11838f | 148 | |
mbed_official | 235:685d5f11838f | 149 | /** |
mbed_official | 235:685d5f11838f | 150 | * @brief Enables the Backup Regulator. |
mbed_official | 235:685d5f11838f | 151 | * @param None |
mbed_official | 235:685d5f11838f | 152 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 153 | */ |
mbed_official | 235:685d5f11838f | 154 | HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void) |
mbed_official | 235:685d5f11838f | 155 | { |
mbed_official | 235:685d5f11838f | 156 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 157 | |
mbed_official | 235:685d5f11838f | 158 | *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE; |
mbed_official | 235:685d5f11838f | 159 | |
mbed_official | 235:685d5f11838f | 160 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 161 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 162 | |
mbed_official | 235:685d5f11838f | 163 | /* Wait till Backup regulator ready flag is set */ |
mbed_official | 235:685d5f11838f | 164 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET) |
mbed_official | 235:685d5f11838f | 165 | { |
mbed_official | 235:685d5f11838f | 166 | if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 167 | { |
mbed_official | 235:685d5f11838f | 168 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 169 | } |
mbed_official | 235:685d5f11838f | 170 | } |
mbed_official | 235:685d5f11838f | 171 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 172 | } |
mbed_official | 235:685d5f11838f | 173 | |
mbed_official | 235:685d5f11838f | 174 | /** |
mbed_official | 235:685d5f11838f | 175 | * @brief Disables the Backup Regulator. |
mbed_official | 235:685d5f11838f | 176 | * @param None |
mbed_official | 235:685d5f11838f | 177 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 178 | */ |
mbed_official | 235:685d5f11838f | 179 | HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void) |
mbed_official | 235:685d5f11838f | 180 | { |
mbed_official | 235:685d5f11838f | 181 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 182 | |
mbed_official | 235:685d5f11838f | 183 | *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE; |
mbed_official | 235:685d5f11838f | 184 | |
mbed_official | 235:685d5f11838f | 185 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 186 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 187 | |
mbed_official | 235:685d5f11838f | 188 | /* Wait till Backup regulator ready flag is set */ |
mbed_official | 235:685d5f11838f | 189 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET) |
mbed_official | 235:685d5f11838f | 190 | { |
mbed_official | 235:685d5f11838f | 191 | if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 192 | { |
mbed_official | 235:685d5f11838f | 193 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 194 | } |
mbed_official | 235:685d5f11838f | 195 | } |
mbed_official | 235:685d5f11838f | 196 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 197 | } |
mbed_official | 235:685d5f11838f | 198 | |
mbed_official | 235:685d5f11838f | 199 | /** |
mbed_official | 235:685d5f11838f | 200 | * @brief Enables the Flash Power Down in Stop mode. |
mbed_official | 235:685d5f11838f | 201 | * @param None |
mbed_official | 235:685d5f11838f | 202 | * @retval None |
mbed_official | 235:685d5f11838f | 203 | */ |
mbed_official | 235:685d5f11838f | 204 | void HAL_PWREx_EnableFlashPowerDown(void) |
mbed_official | 235:685d5f11838f | 205 | { |
mbed_official | 235:685d5f11838f | 206 | *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE; |
mbed_official | 235:685d5f11838f | 207 | } |
mbed_official | 235:685d5f11838f | 208 | |
mbed_official | 235:685d5f11838f | 209 | /** |
mbed_official | 235:685d5f11838f | 210 | * @brief Disables the Flash Power Down in Stop mode. |
mbed_official | 235:685d5f11838f | 211 | * @param None |
mbed_official | 235:685d5f11838f | 212 | * @retval None |
mbed_official | 235:685d5f11838f | 213 | */ |
mbed_official | 235:685d5f11838f | 214 | void HAL_PWREx_DisableFlashPowerDown(void) |
mbed_official | 235:685d5f11838f | 215 | { |
mbed_official | 235:685d5f11838f | 216 | *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE; |
mbed_official | 235:685d5f11838f | 217 | } |
mbed_official | 235:685d5f11838f | 218 | |
mbed_official | 235:685d5f11838f | 219 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) |
mbed_official | 235:685d5f11838f | 220 | /** |
mbed_official | 235:685d5f11838f | 221 | * @brief Enables Main Regulator low voltage mode. |
mbed_official | 235:685d5f11838f | 222 | * @note This mode is only available for STM32F401xx/STM32F411xx devices. |
mbed_official | 235:685d5f11838f | 223 | * @param None |
mbed_official | 235:685d5f11838f | 224 | * @retval None |
mbed_official | 235:685d5f11838f | 225 | */ |
mbed_official | 235:685d5f11838f | 226 | void HAL_PWREx_EnableMainRegulatorLowVoltage(void) |
mbed_official | 235:685d5f11838f | 227 | { |
mbed_official | 235:685d5f11838f | 228 | *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)ENABLE; |
mbed_official | 235:685d5f11838f | 229 | } |
mbed_official | 235:685d5f11838f | 230 | |
mbed_official | 235:685d5f11838f | 231 | /** |
mbed_official | 235:685d5f11838f | 232 | * @brief Disables Main Regulator low voltage mode. |
mbed_official | 235:685d5f11838f | 233 | * @note This mode is only available for STM32F401xx/STM32F411xx devices. |
mbed_official | 235:685d5f11838f | 234 | * @param None |
mbed_official | 235:685d5f11838f | 235 | * @retval None |
mbed_official | 235:685d5f11838f | 236 | */ |
mbed_official | 235:685d5f11838f | 237 | void HAL_PWREx_DisableMainRegulatorLowVoltage(void) |
mbed_official | 235:685d5f11838f | 238 | { |
mbed_official | 235:685d5f11838f | 239 | *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)DISABLE; |
mbed_official | 235:685d5f11838f | 240 | } |
mbed_official | 235:685d5f11838f | 241 | |
mbed_official | 235:685d5f11838f | 242 | /** |
mbed_official | 235:685d5f11838f | 243 | * @brief Enables Low Power Regulator low voltage mode. |
mbed_official | 235:685d5f11838f | 244 | * @note This mode is only available for STM32F401xx/STM32F411xx devices. |
mbed_official | 235:685d5f11838f | 245 | * @param None |
mbed_official | 235:685d5f11838f | 246 | * @retval None |
mbed_official | 235:685d5f11838f | 247 | */ |
mbed_official | 235:685d5f11838f | 248 | void HAL_PWREx_EnableLowRegulatorLowVoltage(void) |
mbed_official | 235:685d5f11838f | 249 | { |
mbed_official | 235:685d5f11838f | 250 | *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)ENABLE; |
mbed_official | 235:685d5f11838f | 251 | } |
mbed_official | 235:685d5f11838f | 252 | |
mbed_official | 235:685d5f11838f | 253 | /** |
mbed_official | 235:685d5f11838f | 254 | * @brief Disables Low Power Regulator low voltage mode. |
mbed_official | 235:685d5f11838f | 255 | * @note This mode is only available for STM32F401xx/STM32F411xx devices. |
mbed_official | 235:685d5f11838f | 256 | * @param None |
mbed_official | 235:685d5f11838f | 257 | * @retval None |
mbed_official | 235:685d5f11838f | 258 | */ |
mbed_official | 235:685d5f11838f | 259 | void HAL_PWREx_DisableLowRegulatorLowVoltage(void) |
mbed_official | 235:685d5f11838f | 260 | { |
mbed_official | 235:685d5f11838f | 261 | *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)DISABLE; |
mbed_official | 235:685d5f11838f | 262 | } |
mbed_official | 235:685d5f11838f | 263 | |
mbed_official | 235:685d5f11838f | 264 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE */ |
mbed_official | 235:685d5f11838f | 265 | |
mbed_official | 235:685d5f11838f | 266 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
mbed_official | 235:685d5f11838f | 267 | /** |
mbed_official | 235:685d5f11838f | 268 | * @brief Activates the Over-Drive mode. |
mbed_official | 235:685d5f11838f | 269 | * @note This function can be used only for STM32F42xx/STM32F43xx devices. |
mbed_official | 235:685d5f11838f | 270 | * This mode allows the CPU and the core logic to operate at a higher frequency |
mbed_official | 235:685d5f11838f | 271 | * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). |
mbed_official | 235:685d5f11838f | 272 | * @note It is recommended to enter or exit Over-drive mode when the application is not running |
mbed_official | 235:685d5f11838f | 273 | * critical tasks and when the system clock source is either HSI or HSE. |
mbed_official | 235:685d5f11838f | 274 | * During the Over-drive switch activation, no peripheral clocks should be enabled. |
mbed_official | 235:685d5f11838f | 275 | * The peripheral clocks must be enabled once the Over-drive mode is activated. |
mbed_official | 235:685d5f11838f | 276 | * @param None |
mbed_official | 235:685d5f11838f | 277 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 278 | */ |
mbed_official | 235:685d5f11838f | 279 | HAL_StatusTypeDef HAL_PWREx_ActivateOverDrive(void) |
mbed_official | 235:685d5f11838f | 280 | { |
mbed_official | 235:685d5f11838f | 281 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 282 | |
mbed_official | 235:685d5f11838f | 283 | __PWR_CLK_ENABLE(); |
mbed_official | 235:685d5f11838f | 284 | |
mbed_official | 235:685d5f11838f | 285 | /* Enable the Over-drive to extend the clock frequency to 180 Mhz */ |
mbed_official | 235:685d5f11838f | 286 | __HAL_PWR_OVERDRIVE_ENABLE(); |
mbed_official | 235:685d5f11838f | 287 | |
mbed_official | 235:685d5f11838f | 288 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 289 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 290 | |
mbed_official | 235:685d5f11838f | 291 | while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) |
mbed_official | 235:685d5f11838f | 292 | { |
mbed_official | 235:685d5f11838f | 293 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 294 | { |
mbed_official | 235:685d5f11838f | 295 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 296 | } |
mbed_official | 235:685d5f11838f | 297 | } |
mbed_official | 235:685d5f11838f | 298 | |
mbed_official | 235:685d5f11838f | 299 | /* Enable the Over-drive switch */ |
mbed_official | 235:685d5f11838f | 300 | __HAL_PWR_OVERDRIVESWITCHING_ENABLE(); |
mbed_official | 235:685d5f11838f | 301 | |
mbed_official | 235:685d5f11838f | 302 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 303 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 304 | |
mbed_official | 235:685d5f11838f | 305 | while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) |
mbed_official | 235:685d5f11838f | 306 | { |
mbed_official | 235:685d5f11838f | 307 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 308 | { |
mbed_official | 235:685d5f11838f | 309 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 310 | } |
mbed_official | 235:685d5f11838f | 311 | } |
mbed_official | 235:685d5f11838f | 312 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 313 | } |
mbed_official | 235:685d5f11838f | 314 | |
mbed_official | 235:685d5f11838f | 315 | /** |
mbed_official | 235:685d5f11838f | 316 | * @brief Deactivates the Over-Drive mode. |
mbed_official | 235:685d5f11838f | 317 | * @note This function can be used only for STM32F42xx/STM32F43xx devices. |
mbed_official | 235:685d5f11838f | 318 | * This mode allows the CPU and the core logic to operate at a higher frequency |
mbed_official | 235:685d5f11838f | 319 | * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). |
mbed_official | 235:685d5f11838f | 320 | * @note It is recommended to enter or exit Over-drive mode when the application is not running |
mbed_official | 235:685d5f11838f | 321 | * critical tasks and when the system clock source is either HSI or HSE. |
mbed_official | 235:685d5f11838f | 322 | * During the Over-drive switch activation, no peripheral clocks should be enabled. |
mbed_official | 235:685d5f11838f | 323 | * The peripheral clocks must be enabled once the Over-drive mode is activated. |
mbed_official | 235:685d5f11838f | 324 | * @param None |
mbed_official | 235:685d5f11838f | 325 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 326 | */ |
mbed_official | 235:685d5f11838f | 327 | HAL_StatusTypeDef HAL_PWREx_DeactivateOverDrive(void) |
mbed_official | 235:685d5f11838f | 328 | { |
mbed_official | 235:685d5f11838f | 329 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 330 | |
mbed_official | 235:685d5f11838f | 331 | __PWR_CLK_ENABLE(); |
mbed_official | 235:685d5f11838f | 332 | |
mbed_official | 235:685d5f11838f | 333 | /* Disable the Over-drive switch */ |
mbed_official | 235:685d5f11838f | 334 | __HAL_PWR_OVERDRIVESWITCHING_DISABLE(); |
mbed_official | 235:685d5f11838f | 335 | |
mbed_official | 235:685d5f11838f | 336 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 337 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 338 | |
mbed_official | 235:685d5f11838f | 339 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) |
mbed_official | 235:685d5f11838f | 340 | { |
mbed_official | 235:685d5f11838f | 341 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 342 | { |
mbed_official | 235:685d5f11838f | 343 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 344 | } |
mbed_official | 235:685d5f11838f | 345 | } |
mbed_official | 235:685d5f11838f | 346 | |
mbed_official | 235:685d5f11838f | 347 | /* Disable the Over-drive */ |
mbed_official | 235:685d5f11838f | 348 | __HAL_PWR_OVERDRIVE_DISABLE(); |
mbed_official | 235:685d5f11838f | 349 | |
mbed_official | 235:685d5f11838f | 350 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 351 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 352 | |
mbed_official | 235:685d5f11838f | 353 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) |
mbed_official | 235:685d5f11838f | 354 | { |
mbed_official | 235:685d5f11838f | 355 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 356 | { |
mbed_official | 235:685d5f11838f | 357 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 358 | } |
mbed_official | 235:685d5f11838f | 359 | } |
mbed_official | 235:685d5f11838f | 360 | |
mbed_official | 235:685d5f11838f | 361 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 362 | } |
mbed_official | 235:685d5f11838f | 363 | |
mbed_official | 235:685d5f11838f | 364 | /** |
mbed_official | 235:685d5f11838f | 365 | * @brief Enters in Under-Drive STOP mode. |
mbed_official | 235:685d5f11838f | 366 | * |
mbed_official | 235:685d5f11838f | 367 | * @note This mode is only available for STM32F42xxx/STM324F3xxx devices. |
mbed_official | 235:685d5f11838f | 368 | * |
mbed_official | 235:685d5f11838f | 369 | * @note This mode can be selected only when the Under-Drive is already active |
mbed_official | 235:685d5f11838f | 370 | * |
mbed_official | 235:685d5f11838f | 371 | * @note This mode is enabled only with STOP low power mode. |
mbed_official | 235:685d5f11838f | 372 | * In this mode, the 1.2V domain is preserved in reduced leakage mode. This |
mbed_official | 235:685d5f11838f | 373 | * mode is only available when the main regulator or the low power regulator |
mbed_official | 235:685d5f11838f | 374 | * is in low voltage mode |
mbed_official | 235:685d5f11838f | 375 | * |
mbed_official | 235:685d5f11838f | 376 | * @note If the Under-drive mode was enabled, it is automatically disabled after |
mbed_official | 235:685d5f11838f | 377 | * exiting Stop mode. |
mbed_official | 235:685d5f11838f | 378 | * When the voltage regulator operates in Under-drive mode, an additional |
mbed_official | 235:685d5f11838f | 379 | * startup delay is induced when waking up from Stop mode. |
mbed_official | 235:685d5f11838f | 380 | * |
mbed_official | 235:685d5f11838f | 381 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 235:685d5f11838f | 382 | * |
mbed_official | 235:685d5f11838f | 383 | * @note When exiting Stop mode by issuing an interrupt or a wakeup event, |
mbed_official | 235:685d5f11838f | 384 | * the HSI RC oscillator is selected as system clock. |
mbed_official | 235:685d5f11838f | 385 | * |
mbed_official | 235:685d5f11838f | 386 | * @note When the voltage regulator operates in low power mode, an additional |
mbed_official | 235:685d5f11838f | 387 | * startup delay is incurred when waking up from Stop mode. |
mbed_official | 235:685d5f11838f | 388 | * By keeping the internal regulator ON during Stop mode, the consumption |
mbed_official | 235:685d5f11838f | 389 | * is higher although the startup time is reduced. |
mbed_official | 235:685d5f11838f | 390 | * |
mbed_official | 235:685d5f11838f | 391 | * @param Regulator: specifies the regulator state in STOP mode. |
mbed_official | 235:685d5f11838f | 392 | * This parameter can be one of the following values: |
mbed_official | 235:685d5f11838f | 393 | * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode |
mbed_official | 235:685d5f11838f | 394 | * and Flash memory in power-down when the device is in Stop under-drive mode |
mbed_official | 235:685d5f11838f | 395 | * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode |
mbed_official | 235:685d5f11838f | 396 | * and Flash memory in power-down when the device is in Stop under-drive mode |
mbed_official | 235:685d5f11838f | 397 | * @param STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. |
mbed_official | 235:685d5f11838f | 398 | * This parameter can be one of the following values: |
mbed_official | 235:685d5f11838f | 399 | * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction |
mbed_official | 235:685d5f11838f | 400 | * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction |
mbed_official | 235:685d5f11838f | 401 | * @retval None |
mbed_official | 235:685d5f11838f | 402 | */ |
mbed_official | 235:685d5f11838f | 403 | HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry) |
mbed_official | 235:685d5f11838f | 404 | { |
mbed_official | 235:685d5f11838f | 405 | uint32_t tmpreg = 0; |
mbed_official | 235:685d5f11838f | 406 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 407 | |
mbed_official | 235:685d5f11838f | 408 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 409 | assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator)); |
mbed_official | 235:685d5f11838f | 410 | assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); |
mbed_official | 235:685d5f11838f | 411 | |
mbed_official | 235:685d5f11838f | 412 | /* Enable Power ctrl clock */ |
mbed_official | 235:685d5f11838f | 413 | __PWR_CLK_ENABLE(); |
mbed_official | 235:685d5f11838f | 414 | /* Enable the Under-drive Mode ---------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 415 | /* Clear Under-drive flag */ |
mbed_official | 235:685d5f11838f | 416 | __HAL_PWR_CLEAR_ODRUDR_FLAG(); |
mbed_official | 235:685d5f11838f | 417 | |
mbed_official | 235:685d5f11838f | 418 | /* Enable the Under-drive */ |
mbed_official | 235:685d5f11838f | 419 | __HAL_PWR_UNDERDRIVE_ENABLE(); |
mbed_official | 235:685d5f11838f | 420 | |
mbed_official | 235:685d5f11838f | 421 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 422 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 423 | |
mbed_official | 235:685d5f11838f | 424 | /* Wait for UnderDrive mode is ready */ |
mbed_official | 235:685d5f11838f | 425 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_UDRDY)) |
mbed_official | 235:685d5f11838f | 426 | { |
mbed_official | 235:685d5f11838f | 427 | if((HAL_GetTick() - tickstart ) > PWR_UDERDRIVE_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 428 | { |
mbed_official | 235:685d5f11838f | 429 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 430 | } |
mbed_official | 235:685d5f11838f | 431 | } |
mbed_official | 235:685d5f11838f | 432 | |
mbed_official | 235:685d5f11838f | 433 | /* Select the regulator state in STOP mode ---------------------------------*/ |
mbed_official | 235:685d5f11838f | 434 | tmpreg = PWR->CR; |
mbed_official | 235:685d5f11838f | 435 | /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */ |
mbed_official | 235:685d5f11838f | 436 | tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_LPUDS | PWR_CR_MRUDS); |
mbed_official | 235:685d5f11838f | 437 | |
mbed_official | 235:685d5f11838f | 438 | /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */ |
mbed_official | 235:685d5f11838f | 439 | tmpreg |= Regulator; |
mbed_official | 235:685d5f11838f | 440 | |
mbed_official | 235:685d5f11838f | 441 | /* Store the new value */ |
mbed_official | 235:685d5f11838f | 442 | PWR->CR = tmpreg; |
mbed_official | 235:685d5f11838f | 443 | |
mbed_official | 235:685d5f11838f | 444 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 235:685d5f11838f | 445 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
mbed_official | 235:685d5f11838f | 446 | |
mbed_official | 235:685d5f11838f | 447 | /* Select STOP mode entry --------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 448 | if(STOPEntry == PWR_SLEEPENTRY_WFI) |
mbed_official | 235:685d5f11838f | 449 | { |
mbed_official | 235:685d5f11838f | 450 | /* Request Wait For Interrupt */ |
mbed_official | 235:685d5f11838f | 451 | __WFI(); |
mbed_official | 235:685d5f11838f | 452 | } |
mbed_official | 235:685d5f11838f | 453 | else |
mbed_official | 235:685d5f11838f | 454 | { |
mbed_official | 235:685d5f11838f | 455 | /* Request Wait For Event */ |
mbed_official | 235:685d5f11838f | 456 | __WFE(); |
mbed_official | 235:685d5f11838f | 457 | } |
mbed_official | 235:685d5f11838f | 458 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 235:685d5f11838f | 459 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); |
mbed_official | 235:685d5f11838f | 460 | |
mbed_official | 235:685d5f11838f | 461 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 462 | } |
mbed_official | 235:685d5f11838f | 463 | |
mbed_official | 235:685d5f11838f | 464 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
mbed_official | 235:685d5f11838f | 465 | /** |
mbed_official | 235:685d5f11838f | 466 | * @} |
mbed_official | 235:685d5f11838f | 467 | */ |
mbed_official | 235:685d5f11838f | 468 | |
mbed_official | 235:685d5f11838f | 469 | /** |
mbed_official | 235:685d5f11838f | 470 | * @} |
mbed_official | 235:685d5f11838f | 471 | */ |
mbed_official | 235:685d5f11838f | 472 | |
mbed_official | 235:685d5f11838f | 473 | #endif /* HAL_PWR_MODULE_ENABLED */ |
mbed_official | 235:685d5f11838f | 474 | /** |
mbed_official | 235:685d5f11838f | 475 | * @} |
mbed_official | 235:685d5f11838f | 476 | */ |
mbed_official | 235:685d5f11838f | 477 | |
mbed_official | 235:685d5f11838f | 478 | /** |
mbed_official | 235:685d5f11838f | 479 | * @} |
mbed_official | 235:685d5f11838f | 480 | */ |
mbed_official | 235:685d5f11838f | 481 | |
mbed_official | 235:685d5f11838f | 482 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |