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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_dma.h@80:66393a7b209d, 2014-01-30 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Jan 30 12:15:05 2014 +0000
- Revision:
- 80:66393a7b209d
- Parent:
- 76:aeb1df146756
- Child:
- 106:ced8cbb51063
Synchronized with git revision dba523f83fe09b7fce11fc1299dd1216e9776359
Full URL: https://github.com/mbedmicro/mbed/commit/dba523f83fe09b7fce11fc1299dd1216e9776359/
Update of I2C, SPI, SLEEP for NUCLEO_F103RB and L152RE
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 76:aeb1df146756 | 1 | /** |
mbed_official | 76:aeb1df146756 | 2 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 3 | * @file stm32l1xx_dma.h |
mbed_official | 76:aeb1df146756 | 4 | * @author MCD Application Team |
mbed_official | 80:66393a7b209d | 5 | * @version V1.3.0 |
mbed_official | 80:66393a7b209d | 6 | * @date 31-January-2014 |
mbed_official | 76:aeb1df146756 | 7 | * @brief This file contains all the functions prototypes for the DMA firmware |
mbed_official | 76:aeb1df146756 | 8 | * library. |
mbed_official | 76:aeb1df146756 | 9 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 10 | * @attention |
mbed_official | 76:aeb1df146756 | 11 | * |
mbed_official | 80:66393a7b209d | 12 | * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> |
mbed_official | 76:aeb1df146756 | 13 | * |
mbed_official | 76:aeb1df146756 | 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
mbed_official | 76:aeb1df146756 | 15 | * You may not use this file except in compliance with the License. |
mbed_official | 76:aeb1df146756 | 16 | * You may obtain a copy of the License at: |
mbed_official | 76:aeb1df146756 | 17 | * |
mbed_official | 76:aeb1df146756 | 18 | * http://www.st.com/software_license_agreement_liberty_v2 |
mbed_official | 76:aeb1df146756 | 19 | * |
mbed_official | 76:aeb1df146756 | 20 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 76:aeb1df146756 | 21 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 76:aeb1df146756 | 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 76:aeb1df146756 | 23 | * See the License for the specific language governing permissions and |
mbed_official | 76:aeb1df146756 | 24 | * limitations under the License. |
mbed_official | 76:aeb1df146756 | 25 | * |
mbed_official | 76:aeb1df146756 | 26 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 27 | */ |
mbed_official | 76:aeb1df146756 | 28 | |
mbed_official | 76:aeb1df146756 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 30 | #ifndef __STM32L1xx_DMA_H |
mbed_official | 76:aeb1df146756 | 31 | #define __STM32L1xx_DMA_H |
mbed_official | 76:aeb1df146756 | 32 | |
mbed_official | 76:aeb1df146756 | 33 | #ifdef __cplusplus |
mbed_official | 76:aeb1df146756 | 34 | extern "C" { |
mbed_official | 76:aeb1df146756 | 35 | #endif |
mbed_official | 76:aeb1df146756 | 36 | |
mbed_official | 76:aeb1df146756 | 37 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 38 | #include "stm32l1xx.h" |
mbed_official | 76:aeb1df146756 | 39 | |
mbed_official | 76:aeb1df146756 | 40 | /** @addtogroup STM32L1xx_StdPeriph_Driver |
mbed_official | 76:aeb1df146756 | 41 | * @{ |
mbed_official | 76:aeb1df146756 | 42 | */ |
mbed_official | 76:aeb1df146756 | 43 | |
mbed_official | 76:aeb1df146756 | 44 | /** @addtogroup DMA |
mbed_official | 76:aeb1df146756 | 45 | * @{ |
mbed_official | 76:aeb1df146756 | 46 | */ |
mbed_official | 76:aeb1df146756 | 47 | |
mbed_official | 76:aeb1df146756 | 48 | /* Exported types ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 49 | |
mbed_official | 76:aeb1df146756 | 50 | /** |
mbed_official | 76:aeb1df146756 | 51 | * @brief DMA Init structure definition |
mbed_official | 76:aeb1df146756 | 52 | */ |
mbed_official | 76:aeb1df146756 | 53 | |
mbed_official | 76:aeb1df146756 | 54 | typedef struct |
mbed_official | 76:aeb1df146756 | 55 | { |
mbed_official | 76:aeb1df146756 | 56 | uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */ |
mbed_official | 76:aeb1df146756 | 57 | |
mbed_official | 76:aeb1df146756 | 58 | uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */ |
mbed_official | 76:aeb1df146756 | 59 | |
mbed_official | 76:aeb1df146756 | 60 | uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination. |
mbed_official | 76:aeb1df146756 | 61 | This parameter can be a value of @ref DMA_data_transfer_direction */ |
mbed_official | 76:aeb1df146756 | 62 | |
mbed_official | 76:aeb1df146756 | 63 | uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel. |
mbed_official | 76:aeb1df146756 | 64 | The data unit is equal to the configuration set in DMA_PeripheralDataSize |
mbed_official | 76:aeb1df146756 | 65 | or DMA_MemoryDataSize members depending in the transfer direction. */ |
mbed_official | 76:aeb1df146756 | 66 | |
mbed_official | 76:aeb1df146756 | 67 | uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not. |
mbed_official | 76:aeb1df146756 | 68 | This parameter can be a value of @ref DMA_peripheral_incremented_mode */ |
mbed_official | 76:aeb1df146756 | 69 | |
mbed_official | 76:aeb1df146756 | 70 | uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not. |
mbed_official | 76:aeb1df146756 | 71 | This parameter can be a value of @ref DMA_memory_incremented_mode */ |
mbed_official | 76:aeb1df146756 | 72 | |
mbed_official | 76:aeb1df146756 | 73 | uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width. |
mbed_official | 76:aeb1df146756 | 74 | This parameter can be a value of @ref DMA_peripheral_data_size */ |
mbed_official | 76:aeb1df146756 | 75 | |
mbed_official | 76:aeb1df146756 | 76 | uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width. |
mbed_official | 76:aeb1df146756 | 77 | This parameter can be a value of @ref DMA_memory_data_size */ |
mbed_official | 76:aeb1df146756 | 78 | |
mbed_official | 76:aeb1df146756 | 79 | uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx. |
mbed_official | 76:aeb1df146756 | 80 | This parameter can be a value of @ref DMA_circular_normal_mode |
mbed_official | 76:aeb1df146756 | 81 | @note: The circular buffer mode cannot be used if the memory-to-memory |
mbed_official | 76:aeb1df146756 | 82 | data transfer is configured on the selected Channel */ |
mbed_official | 76:aeb1df146756 | 83 | |
mbed_official | 76:aeb1df146756 | 84 | uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx. |
mbed_official | 76:aeb1df146756 | 85 | This parameter can be a value of @ref DMA_priority_level */ |
mbed_official | 76:aeb1df146756 | 86 | |
mbed_official | 76:aeb1df146756 | 87 | uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer. |
mbed_official | 76:aeb1df146756 | 88 | This parameter can be a value of @ref DMA_memory_to_memory */ |
mbed_official | 76:aeb1df146756 | 89 | }DMA_InitTypeDef; |
mbed_official | 76:aeb1df146756 | 90 | |
mbed_official | 76:aeb1df146756 | 91 | /* Exported constants --------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 92 | |
mbed_official | 76:aeb1df146756 | 93 | /** @defgroup DMA_Exported_Constants |
mbed_official | 76:aeb1df146756 | 94 | * @{ |
mbed_official | 76:aeb1df146756 | 95 | */ |
mbed_official | 76:aeb1df146756 | 96 | |
mbed_official | 76:aeb1df146756 | 97 | #define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \ |
mbed_official | 76:aeb1df146756 | 98 | ((PERIPH) == DMA1_Channel2) || \ |
mbed_official | 76:aeb1df146756 | 99 | ((PERIPH) == DMA1_Channel3) || \ |
mbed_official | 76:aeb1df146756 | 100 | ((PERIPH) == DMA1_Channel4) || \ |
mbed_official | 76:aeb1df146756 | 101 | ((PERIPH) == DMA1_Channel5) || \ |
mbed_official | 76:aeb1df146756 | 102 | ((PERIPH) == DMA1_Channel6) || \ |
mbed_official | 76:aeb1df146756 | 103 | ((PERIPH) == DMA1_Channel7) || \ |
mbed_official | 76:aeb1df146756 | 104 | ((PERIPH) == DMA2_Channel1) || \ |
mbed_official | 76:aeb1df146756 | 105 | ((PERIPH) == DMA2_Channel2) || \ |
mbed_official | 76:aeb1df146756 | 106 | ((PERIPH) == DMA2_Channel3) || \ |
mbed_official | 76:aeb1df146756 | 107 | ((PERIPH) == DMA2_Channel4) || \ |
mbed_official | 76:aeb1df146756 | 108 | ((PERIPH) == DMA2_Channel5)) |
mbed_official | 76:aeb1df146756 | 109 | |
mbed_official | 76:aeb1df146756 | 110 | /** @defgroup DMA_data_transfer_direction |
mbed_official | 76:aeb1df146756 | 111 | * @{ |
mbed_official | 76:aeb1df146756 | 112 | */ |
mbed_official | 76:aeb1df146756 | 113 | |
mbed_official | 76:aeb1df146756 | 114 | #define DMA_DIR_PeripheralDST ((uint32_t)0x00000010) |
mbed_official | 76:aeb1df146756 | 115 | #define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000) |
mbed_official | 76:aeb1df146756 | 116 | #define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \ |
mbed_official | 76:aeb1df146756 | 117 | ((DIR) == DMA_DIR_PeripheralSRC)) |
mbed_official | 76:aeb1df146756 | 118 | /** |
mbed_official | 76:aeb1df146756 | 119 | * @} |
mbed_official | 76:aeb1df146756 | 120 | */ |
mbed_official | 76:aeb1df146756 | 121 | |
mbed_official | 76:aeb1df146756 | 122 | /** @defgroup DMA_peripheral_incremented_mode |
mbed_official | 76:aeb1df146756 | 123 | * @{ |
mbed_official | 76:aeb1df146756 | 124 | */ |
mbed_official | 76:aeb1df146756 | 125 | |
mbed_official | 76:aeb1df146756 | 126 | #define DMA_PeripheralInc_Enable ((uint32_t)0x00000040) |
mbed_official | 76:aeb1df146756 | 127 | #define DMA_PeripheralInc_Disable ((uint32_t)0x00000000) |
mbed_official | 76:aeb1df146756 | 128 | #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \ |
mbed_official | 76:aeb1df146756 | 129 | ((STATE) == DMA_PeripheralInc_Disable)) |
mbed_official | 76:aeb1df146756 | 130 | /** |
mbed_official | 76:aeb1df146756 | 131 | * @} |
mbed_official | 76:aeb1df146756 | 132 | */ |
mbed_official | 76:aeb1df146756 | 133 | |
mbed_official | 76:aeb1df146756 | 134 | /** @defgroup DMA_memory_incremented_mode |
mbed_official | 76:aeb1df146756 | 135 | * @{ |
mbed_official | 76:aeb1df146756 | 136 | */ |
mbed_official | 76:aeb1df146756 | 137 | |
mbed_official | 76:aeb1df146756 | 138 | #define DMA_MemoryInc_Enable ((uint32_t)0x00000080) |
mbed_official | 76:aeb1df146756 | 139 | #define DMA_MemoryInc_Disable ((uint32_t)0x00000000) |
mbed_official | 76:aeb1df146756 | 140 | #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \ |
mbed_official | 76:aeb1df146756 | 141 | ((STATE) == DMA_MemoryInc_Disable)) |
mbed_official | 76:aeb1df146756 | 142 | /** |
mbed_official | 76:aeb1df146756 | 143 | * @} |
mbed_official | 76:aeb1df146756 | 144 | */ |
mbed_official | 76:aeb1df146756 | 145 | |
mbed_official | 76:aeb1df146756 | 146 | /** @defgroup DMA_peripheral_data_size |
mbed_official | 76:aeb1df146756 | 147 | * @{ |
mbed_official | 76:aeb1df146756 | 148 | */ |
mbed_official | 76:aeb1df146756 | 149 | |
mbed_official | 76:aeb1df146756 | 150 | #define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000) |
mbed_official | 76:aeb1df146756 | 151 | #define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100) |
mbed_official | 76:aeb1df146756 | 152 | #define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200) |
mbed_official | 76:aeb1df146756 | 153 | #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \ |
mbed_official | 76:aeb1df146756 | 154 | ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \ |
mbed_official | 76:aeb1df146756 | 155 | ((SIZE) == DMA_PeripheralDataSize_Word)) |
mbed_official | 76:aeb1df146756 | 156 | /** |
mbed_official | 76:aeb1df146756 | 157 | * @} |
mbed_official | 76:aeb1df146756 | 158 | */ |
mbed_official | 76:aeb1df146756 | 159 | |
mbed_official | 76:aeb1df146756 | 160 | /** @defgroup DMA_memory_data_size |
mbed_official | 76:aeb1df146756 | 161 | * @{ |
mbed_official | 76:aeb1df146756 | 162 | */ |
mbed_official | 76:aeb1df146756 | 163 | |
mbed_official | 76:aeb1df146756 | 164 | #define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000) |
mbed_official | 76:aeb1df146756 | 165 | #define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400) |
mbed_official | 76:aeb1df146756 | 166 | #define DMA_MemoryDataSize_Word ((uint32_t)0x00000800) |
mbed_official | 76:aeb1df146756 | 167 | #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \ |
mbed_official | 76:aeb1df146756 | 168 | ((SIZE) == DMA_MemoryDataSize_HalfWord) || \ |
mbed_official | 76:aeb1df146756 | 169 | ((SIZE) == DMA_MemoryDataSize_Word)) |
mbed_official | 76:aeb1df146756 | 170 | /** |
mbed_official | 76:aeb1df146756 | 171 | * @} |
mbed_official | 76:aeb1df146756 | 172 | */ |
mbed_official | 76:aeb1df146756 | 173 | |
mbed_official | 76:aeb1df146756 | 174 | /** @defgroup DMA_circular_normal_mode |
mbed_official | 76:aeb1df146756 | 175 | * @{ |
mbed_official | 76:aeb1df146756 | 176 | */ |
mbed_official | 76:aeb1df146756 | 177 | |
mbed_official | 76:aeb1df146756 | 178 | #define DMA_Mode_Circular ((uint32_t)0x00000020) |
mbed_official | 76:aeb1df146756 | 179 | #define DMA_Mode_Normal ((uint32_t)0x00000000) |
mbed_official | 76:aeb1df146756 | 180 | #define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal)) |
mbed_official | 76:aeb1df146756 | 181 | /** |
mbed_official | 76:aeb1df146756 | 182 | * @} |
mbed_official | 76:aeb1df146756 | 183 | */ |
mbed_official | 76:aeb1df146756 | 184 | |
mbed_official | 76:aeb1df146756 | 185 | /** @defgroup DMA_priority_level |
mbed_official | 76:aeb1df146756 | 186 | * @{ |
mbed_official | 76:aeb1df146756 | 187 | */ |
mbed_official | 76:aeb1df146756 | 188 | |
mbed_official | 76:aeb1df146756 | 189 | #define DMA_Priority_VeryHigh ((uint32_t)0x00003000) |
mbed_official | 76:aeb1df146756 | 190 | #define DMA_Priority_High ((uint32_t)0x00002000) |
mbed_official | 76:aeb1df146756 | 191 | #define DMA_Priority_Medium ((uint32_t)0x00001000) |
mbed_official | 76:aeb1df146756 | 192 | #define DMA_Priority_Low ((uint32_t)0x00000000) |
mbed_official | 76:aeb1df146756 | 193 | #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \ |
mbed_official | 76:aeb1df146756 | 194 | ((PRIORITY) == DMA_Priority_High) || \ |
mbed_official | 76:aeb1df146756 | 195 | ((PRIORITY) == DMA_Priority_Medium) || \ |
mbed_official | 76:aeb1df146756 | 196 | ((PRIORITY) == DMA_Priority_Low)) |
mbed_official | 76:aeb1df146756 | 197 | /** |
mbed_official | 76:aeb1df146756 | 198 | * @} |
mbed_official | 76:aeb1df146756 | 199 | */ |
mbed_official | 76:aeb1df146756 | 200 | |
mbed_official | 76:aeb1df146756 | 201 | /** @defgroup DMA_memory_to_memory |
mbed_official | 76:aeb1df146756 | 202 | * @{ |
mbed_official | 76:aeb1df146756 | 203 | */ |
mbed_official | 76:aeb1df146756 | 204 | |
mbed_official | 76:aeb1df146756 | 205 | #define DMA_M2M_Enable ((uint32_t)0x00004000) |
mbed_official | 76:aeb1df146756 | 206 | #define DMA_M2M_Disable ((uint32_t)0x00000000) |
mbed_official | 76:aeb1df146756 | 207 | #define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable)) |
mbed_official | 76:aeb1df146756 | 208 | |
mbed_official | 76:aeb1df146756 | 209 | /** |
mbed_official | 76:aeb1df146756 | 210 | * @} |
mbed_official | 76:aeb1df146756 | 211 | */ |
mbed_official | 76:aeb1df146756 | 212 | |
mbed_official | 76:aeb1df146756 | 213 | /** @defgroup DMA_interrupts_definition |
mbed_official | 76:aeb1df146756 | 214 | * @{ |
mbed_official | 76:aeb1df146756 | 215 | */ |
mbed_official | 76:aeb1df146756 | 216 | |
mbed_official | 76:aeb1df146756 | 217 | #define DMA_IT_TC ((uint32_t)0x00000002) |
mbed_official | 76:aeb1df146756 | 218 | #define DMA_IT_HT ((uint32_t)0x00000004) |
mbed_official | 76:aeb1df146756 | 219 | #define DMA_IT_TE ((uint32_t)0x00000008) |
mbed_official | 76:aeb1df146756 | 220 | #define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00)) |
mbed_official | 76:aeb1df146756 | 221 | |
mbed_official | 76:aeb1df146756 | 222 | #define DMA1_IT_GL1 ((uint32_t)0x00000001) |
mbed_official | 76:aeb1df146756 | 223 | #define DMA1_IT_TC1 ((uint32_t)0x00000002) |
mbed_official | 76:aeb1df146756 | 224 | #define DMA1_IT_HT1 ((uint32_t)0x00000004) |
mbed_official | 76:aeb1df146756 | 225 | #define DMA1_IT_TE1 ((uint32_t)0x00000008) |
mbed_official | 76:aeb1df146756 | 226 | #define DMA1_IT_GL2 ((uint32_t)0x00000010) |
mbed_official | 76:aeb1df146756 | 227 | #define DMA1_IT_TC2 ((uint32_t)0x00000020) |
mbed_official | 76:aeb1df146756 | 228 | #define DMA1_IT_HT2 ((uint32_t)0x00000040) |
mbed_official | 76:aeb1df146756 | 229 | #define DMA1_IT_TE2 ((uint32_t)0x00000080) |
mbed_official | 76:aeb1df146756 | 230 | #define DMA1_IT_GL3 ((uint32_t)0x00000100) |
mbed_official | 76:aeb1df146756 | 231 | #define DMA1_IT_TC3 ((uint32_t)0x00000200) |
mbed_official | 76:aeb1df146756 | 232 | #define DMA1_IT_HT3 ((uint32_t)0x00000400) |
mbed_official | 76:aeb1df146756 | 233 | #define DMA1_IT_TE3 ((uint32_t)0x00000800) |
mbed_official | 76:aeb1df146756 | 234 | #define DMA1_IT_GL4 ((uint32_t)0x00001000) |
mbed_official | 76:aeb1df146756 | 235 | #define DMA1_IT_TC4 ((uint32_t)0x00002000) |
mbed_official | 76:aeb1df146756 | 236 | #define DMA1_IT_HT4 ((uint32_t)0x00004000) |
mbed_official | 76:aeb1df146756 | 237 | #define DMA1_IT_TE4 ((uint32_t)0x00008000) |
mbed_official | 76:aeb1df146756 | 238 | #define DMA1_IT_GL5 ((uint32_t)0x00010000) |
mbed_official | 76:aeb1df146756 | 239 | #define DMA1_IT_TC5 ((uint32_t)0x00020000) |
mbed_official | 76:aeb1df146756 | 240 | #define DMA1_IT_HT5 ((uint32_t)0x00040000) |
mbed_official | 76:aeb1df146756 | 241 | #define DMA1_IT_TE5 ((uint32_t)0x00080000) |
mbed_official | 76:aeb1df146756 | 242 | #define DMA1_IT_GL6 ((uint32_t)0x00100000) |
mbed_official | 76:aeb1df146756 | 243 | #define DMA1_IT_TC6 ((uint32_t)0x00200000) |
mbed_official | 76:aeb1df146756 | 244 | #define DMA1_IT_HT6 ((uint32_t)0x00400000) |
mbed_official | 76:aeb1df146756 | 245 | #define DMA1_IT_TE6 ((uint32_t)0x00800000) |
mbed_official | 76:aeb1df146756 | 246 | #define DMA1_IT_GL7 ((uint32_t)0x01000000) |
mbed_official | 76:aeb1df146756 | 247 | #define DMA1_IT_TC7 ((uint32_t)0x02000000) |
mbed_official | 76:aeb1df146756 | 248 | #define DMA1_IT_HT7 ((uint32_t)0x04000000) |
mbed_official | 76:aeb1df146756 | 249 | #define DMA1_IT_TE7 ((uint32_t)0x08000000) |
mbed_official | 76:aeb1df146756 | 250 | |
mbed_official | 76:aeb1df146756 | 251 | #define DMA2_IT_GL1 ((uint32_t)0x10000001) |
mbed_official | 76:aeb1df146756 | 252 | #define DMA2_IT_TC1 ((uint32_t)0x10000002) |
mbed_official | 76:aeb1df146756 | 253 | #define DMA2_IT_HT1 ((uint32_t)0x10000004) |
mbed_official | 76:aeb1df146756 | 254 | #define DMA2_IT_TE1 ((uint32_t)0x10000008) |
mbed_official | 76:aeb1df146756 | 255 | #define DMA2_IT_GL2 ((uint32_t)0x10000010) |
mbed_official | 76:aeb1df146756 | 256 | #define DMA2_IT_TC2 ((uint32_t)0x10000020) |
mbed_official | 76:aeb1df146756 | 257 | #define DMA2_IT_HT2 ((uint32_t)0x10000040) |
mbed_official | 76:aeb1df146756 | 258 | #define DMA2_IT_TE2 ((uint32_t)0x10000080) |
mbed_official | 76:aeb1df146756 | 259 | #define DMA2_IT_GL3 ((uint32_t)0x10000100) |
mbed_official | 76:aeb1df146756 | 260 | #define DMA2_IT_TC3 ((uint32_t)0x10000200) |
mbed_official | 76:aeb1df146756 | 261 | #define DMA2_IT_HT3 ((uint32_t)0x10000400) |
mbed_official | 76:aeb1df146756 | 262 | #define DMA2_IT_TE3 ((uint32_t)0x10000800) |
mbed_official | 76:aeb1df146756 | 263 | #define DMA2_IT_GL4 ((uint32_t)0x10001000) |
mbed_official | 76:aeb1df146756 | 264 | #define DMA2_IT_TC4 ((uint32_t)0x10002000) |
mbed_official | 76:aeb1df146756 | 265 | #define DMA2_IT_HT4 ((uint32_t)0x10004000) |
mbed_official | 76:aeb1df146756 | 266 | #define DMA2_IT_TE4 ((uint32_t)0x10008000) |
mbed_official | 76:aeb1df146756 | 267 | #define DMA2_IT_GL5 ((uint32_t)0x10010000) |
mbed_official | 76:aeb1df146756 | 268 | #define DMA2_IT_TC5 ((uint32_t)0x10020000) |
mbed_official | 76:aeb1df146756 | 269 | #define DMA2_IT_HT5 ((uint32_t)0x10040000) |
mbed_official | 76:aeb1df146756 | 270 | #define DMA2_IT_TE5 ((uint32_t)0x10080000) |
mbed_official | 76:aeb1df146756 | 271 | |
mbed_official | 76:aeb1df146756 | 272 | #define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00)) |
mbed_official | 76:aeb1df146756 | 273 | |
mbed_official | 76:aeb1df146756 | 274 | #define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \ |
mbed_official | 76:aeb1df146756 | 275 | ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \ |
mbed_official | 76:aeb1df146756 | 276 | ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \ |
mbed_official | 76:aeb1df146756 | 277 | ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \ |
mbed_official | 76:aeb1df146756 | 278 | ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \ |
mbed_official | 76:aeb1df146756 | 279 | ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \ |
mbed_official | 76:aeb1df146756 | 280 | ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \ |
mbed_official | 76:aeb1df146756 | 281 | ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \ |
mbed_official | 76:aeb1df146756 | 282 | ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \ |
mbed_official | 76:aeb1df146756 | 283 | ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \ |
mbed_official | 76:aeb1df146756 | 284 | ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \ |
mbed_official | 76:aeb1df146756 | 285 | ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \ |
mbed_official | 76:aeb1df146756 | 286 | ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \ |
mbed_official | 76:aeb1df146756 | 287 | ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \ |
mbed_official | 76:aeb1df146756 | 288 | ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \ |
mbed_official | 76:aeb1df146756 | 289 | ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \ |
mbed_official | 76:aeb1df146756 | 290 | ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \ |
mbed_official | 76:aeb1df146756 | 291 | ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \ |
mbed_official | 76:aeb1df146756 | 292 | ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \ |
mbed_official | 76:aeb1df146756 | 293 | ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \ |
mbed_official | 76:aeb1df146756 | 294 | ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \ |
mbed_official | 76:aeb1df146756 | 295 | ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \ |
mbed_official | 76:aeb1df146756 | 296 | ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \ |
mbed_official | 76:aeb1df146756 | 297 | ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5)) |
mbed_official | 76:aeb1df146756 | 298 | /** |
mbed_official | 76:aeb1df146756 | 299 | * @} |
mbed_official | 76:aeb1df146756 | 300 | */ |
mbed_official | 76:aeb1df146756 | 301 | |
mbed_official | 76:aeb1df146756 | 302 | /** @defgroup DMA_flags_definition |
mbed_official | 76:aeb1df146756 | 303 | * @{ |
mbed_official | 76:aeb1df146756 | 304 | */ |
mbed_official | 76:aeb1df146756 | 305 | #define DMA1_FLAG_GL1 ((uint32_t)0x00000001) |
mbed_official | 76:aeb1df146756 | 306 | #define DMA1_FLAG_TC1 ((uint32_t)0x00000002) |
mbed_official | 76:aeb1df146756 | 307 | #define DMA1_FLAG_HT1 ((uint32_t)0x00000004) |
mbed_official | 76:aeb1df146756 | 308 | #define DMA1_FLAG_TE1 ((uint32_t)0x00000008) |
mbed_official | 76:aeb1df146756 | 309 | #define DMA1_FLAG_GL2 ((uint32_t)0x00000010) |
mbed_official | 76:aeb1df146756 | 310 | #define DMA1_FLAG_TC2 ((uint32_t)0x00000020) |
mbed_official | 76:aeb1df146756 | 311 | #define DMA1_FLAG_HT2 ((uint32_t)0x00000040) |
mbed_official | 76:aeb1df146756 | 312 | #define DMA1_FLAG_TE2 ((uint32_t)0x00000080) |
mbed_official | 76:aeb1df146756 | 313 | #define DMA1_FLAG_GL3 ((uint32_t)0x00000100) |
mbed_official | 76:aeb1df146756 | 314 | #define DMA1_FLAG_TC3 ((uint32_t)0x00000200) |
mbed_official | 76:aeb1df146756 | 315 | #define DMA1_FLAG_HT3 ((uint32_t)0x00000400) |
mbed_official | 76:aeb1df146756 | 316 | #define DMA1_FLAG_TE3 ((uint32_t)0x00000800) |
mbed_official | 76:aeb1df146756 | 317 | #define DMA1_FLAG_GL4 ((uint32_t)0x00001000) |
mbed_official | 76:aeb1df146756 | 318 | #define DMA1_FLAG_TC4 ((uint32_t)0x00002000) |
mbed_official | 76:aeb1df146756 | 319 | #define DMA1_FLAG_HT4 ((uint32_t)0x00004000) |
mbed_official | 76:aeb1df146756 | 320 | #define DMA1_FLAG_TE4 ((uint32_t)0x00008000) |
mbed_official | 76:aeb1df146756 | 321 | #define DMA1_FLAG_GL5 ((uint32_t)0x00010000) |
mbed_official | 76:aeb1df146756 | 322 | #define DMA1_FLAG_TC5 ((uint32_t)0x00020000) |
mbed_official | 76:aeb1df146756 | 323 | #define DMA1_FLAG_HT5 ((uint32_t)0x00040000) |
mbed_official | 76:aeb1df146756 | 324 | #define DMA1_FLAG_TE5 ((uint32_t)0x00080000) |
mbed_official | 76:aeb1df146756 | 325 | #define DMA1_FLAG_GL6 ((uint32_t)0x00100000) |
mbed_official | 76:aeb1df146756 | 326 | #define DMA1_FLAG_TC6 ((uint32_t)0x00200000) |
mbed_official | 76:aeb1df146756 | 327 | #define DMA1_FLAG_HT6 ((uint32_t)0x00400000) |
mbed_official | 76:aeb1df146756 | 328 | #define DMA1_FLAG_TE6 ((uint32_t)0x00800000) |
mbed_official | 76:aeb1df146756 | 329 | #define DMA1_FLAG_GL7 ((uint32_t)0x01000000) |
mbed_official | 76:aeb1df146756 | 330 | #define DMA1_FLAG_TC7 ((uint32_t)0x02000000) |
mbed_official | 76:aeb1df146756 | 331 | #define DMA1_FLAG_HT7 ((uint32_t)0x04000000) |
mbed_official | 76:aeb1df146756 | 332 | #define DMA1_FLAG_TE7 ((uint32_t)0x08000000) |
mbed_official | 76:aeb1df146756 | 333 | |
mbed_official | 76:aeb1df146756 | 334 | #define DMA2_FLAG_GL1 ((uint32_t)0x10000001) |
mbed_official | 76:aeb1df146756 | 335 | #define DMA2_FLAG_TC1 ((uint32_t)0x10000002) |
mbed_official | 76:aeb1df146756 | 336 | #define DMA2_FLAG_HT1 ((uint32_t)0x10000004) |
mbed_official | 76:aeb1df146756 | 337 | #define DMA2_FLAG_TE1 ((uint32_t)0x10000008) |
mbed_official | 76:aeb1df146756 | 338 | #define DMA2_FLAG_GL2 ((uint32_t)0x10000010) |
mbed_official | 76:aeb1df146756 | 339 | #define DMA2_FLAG_TC2 ((uint32_t)0x10000020) |
mbed_official | 76:aeb1df146756 | 340 | #define DMA2_FLAG_HT2 ((uint32_t)0x10000040) |
mbed_official | 76:aeb1df146756 | 341 | #define DMA2_FLAG_TE2 ((uint32_t)0x10000080) |
mbed_official | 76:aeb1df146756 | 342 | #define DMA2_FLAG_GL3 ((uint32_t)0x10000100) |
mbed_official | 76:aeb1df146756 | 343 | #define DMA2_FLAG_TC3 ((uint32_t)0x10000200) |
mbed_official | 76:aeb1df146756 | 344 | #define DMA2_FLAG_HT3 ((uint32_t)0x10000400) |
mbed_official | 76:aeb1df146756 | 345 | #define DMA2_FLAG_TE3 ((uint32_t)0x10000800) |
mbed_official | 76:aeb1df146756 | 346 | #define DMA2_FLAG_GL4 ((uint32_t)0x10001000) |
mbed_official | 76:aeb1df146756 | 347 | #define DMA2_FLAG_TC4 ((uint32_t)0x10002000) |
mbed_official | 76:aeb1df146756 | 348 | #define DMA2_FLAG_HT4 ((uint32_t)0x10004000) |
mbed_official | 76:aeb1df146756 | 349 | #define DMA2_FLAG_TE4 ((uint32_t)0x10008000) |
mbed_official | 76:aeb1df146756 | 350 | #define DMA2_FLAG_GL5 ((uint32_t)0x10010000) |
mbed_official | 76:aeb1df146756 | 351 | #define DMA2_FLAG_TC5 ((uint32_t)0x10020000) |
mbed_official | 76:aeb1df146756 | 352 | #define DMA2_FLAG_HT5 ((uint32_t)0x10040000) |
mbed_official | 76:aeb1df146756 | 353 | #define DMA2_FLAG_TE5 ((uint32_t)0x10080000) |
mbed_official | 76:aeb1df146756 | 354 | |
mbed_official | 76:aeb1df146756 | 355 | #define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00)) |
mbed_official | 76:aeb1df146756 | 356 | |
mbed_official | 76:aeb1df146756 | 357 | #define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \ |
mbed_official | 76:aeb1df146756 | 358 | ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \ |
mbed_official | 76:aeb1df146756 | 359 | ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \ |
mbed_official | 76:aeb1df146756 | 360 | ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \ |
mbed_official | 76:aeb1df146756 | 361 | ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \ |
mbed_official | 76:aeb1df146756 | 362 | ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \ |
mbed_official | 76:aeb1df146756 | 363 | ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \ |
mbed_official | 76:aeb1df146756 | 364 | ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \ |
mbed_official | 76:aeb1df146756 | 365 | ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \ |
mbed_official | 76:aeb1df146756 | 366 | ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \ |
mbed_official | 76:aeb1df146756 | 367 | ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \ |
mbed_official | 76:aeb1df146756 | 368 | ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \ |
mbed_official | 76:aeb1df146756 | 369 | ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \ |
mbed_official | 76:aeb1df146756 | 370 | ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \ |
mbed_official | 76:aeb1df146756 | 371 | ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \ |
mbed_official | 76:aeb1df146756 | 372 | ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \ |
mbed_official | 76:aeb1df146756 | 373 | ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \ |
mbed_official | 76:aeb1df146756 | 374 | ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \ |
mbed_official | 76:aeb1df146756 | 375 | ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \ |
mbed_official | 76:aeb1df146756 | 376 | ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \ |
mbed_official | 76:aeb1df146756 | 377 | ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \ |
mbed_official | 76:aeb1df146756 | 378 | ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \ |
mbed_official | 76:aeb1df146756 | 379 | ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \ |
mbed_official | 76:aeb1df146756 | 380 | ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5)) |
mbed_official | 76:aeb1df146756 | 381 | /** |
mbed_official | 76:aeb1df146756 | 382 | * @} |
mbed_official | 76:aeb1df146756 | 383 | */ |
mbed_official | 76:aeb1df146756 | 384 | |
mbed_official | 76:aeb1df146756 | 385 | /** @defgroup DMA_Buffer_Size |
mbed_official | 76:aeb1df146756 | 386 | * @{ |
mbed_official | 76:aeb1df146756 | 387 | */ |
mbed_official | 76:aeb1df146756 | 388 | |
mbed_official | 76:aeb1df146756 | 389 | #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) |
mbed_official | 76:aeb1df146756 | 390 | |
mbed_official | 76:aeb1df146756 | 391 | /** |
mbed_official | 76:aeb1df146756 | 392 | * @} |
mbed_official | 76:aeb1df146756 | 393 | */ |
mbed_official | 76:aeb1df146756 | 394 | |
mbed_official | 76:aeb1df146756 | 395 | /** |
mbed_official | 76:aeb1df146756 | 396 | * @} |
mbed_official | 76:aeb1df146756 | 397 | */ |
mbed_official | 76:aeb1df146756 | 398 | |
mbed_official | 76:aeb1df146756 | 399 | /* Exported macro ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 400 | /* Exported functions ------------------------------------------------------- */ |
mbed_official | 76:aeb1df146756 | 401 | |
mbed_official | 76:aeb1df146756 | 402 | /* Function used to set the DMA configuration to the default reset state *****/ |
mbed_official | 76:aeb1df146756 | 403 | void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx); |
mbed_official | 76:aeb1df146756 | 404 | |
mbed_official | 76:aeb1df146756 | 405 | /* Initialization and Configuration functions *********************************/ |
mbed_official | 76:aeb1df146756 | 406 | void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct); |
mbed_official | 76:aeb1df146756 | 407 | void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct); |
mbed_official | 76:aeb1df146756 | 408 | void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 409 | |
mbed_official | 76:aeb1df146756 | 410 | /* Data Counter functions *****************************************************/ |
mbed_official | 76:aeb1df146756 | 411 | void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber); |
mbed_official | 76:aeb1df146756 | 412 | uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx); |
mbed_official | 76:aeb1df146756 | 413 | |
mbed_official | 76:aeb1df146756 | 414 | /* Interrupts and flags management functions **********************************/ |
mbed_official | 76:aeb1df146756 | 415 | void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 416 | FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG); |
mbed_official | 76:aeb1df146756 | 417 | void DMA_ClearFlag(uint32_t DMAy_FLAG); |
mbed_official | 76:aeb1df146756 | 418 | ITStatus DMA_GetITStatus(uint32_t DMAy_IT); |
mbed_official | 76:aeb1df146756 | 419 | void DMA_ClearITPendingBit(uint32_t DMAy_IT); |
mbed_official | 76:aeb1df146756 | 420 | |
mbed_official | 76:aeb1df146756 | 421 | #ifdef __cplusplus |
mbed_official | 76:aeb1df146756 | 422 | } |
mbed_official | 76:aeb1df146756 | 423 | #endif |
mbed_official | 76:aeb1df146756 | 424 | |
mbed_official | 76:aeb1df146756 | 425 | #endif /*__STM32L1xx_DMA_H */ |
mbed_official | 76:aeb1df146756 | 426 | |
mbed_official | 76:aeb1df146756 | 427 | /** |
mbed_official | 76:aeb1df146756 | 428 | * @} |
mbed_official | 76:aeb1df146756 | 429 | */ |
mbed_official | 76:aeb1df146756 | 430 | |
mbed_official | 76:aeb1df146756 | 431 | /** |
mbed_official | 76:aeb1df146756 | 432 | * @} |
mbed_official | 76:aeb1df146756 | 433 | */ |
mbed_official | 76:aeb1df146756 | 434 | |
mbed_official | 76:aeb1df146756 | 435 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |