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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_cryp_ex.c@308:59cc78a25982, 2014-09-05 (annotated)
- Committer:
- todotani
- Date:
- Fri Sep 05 14:20:33 2014 +0000
- Revision:
- 308:59cc78a25982
- Parent:
- 235:685d5f11838f
BLE_Health_Thermometer for mbed HRM1017 with BLE library 0.1.0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 235:685d5f11838f | 1 | /** |
mbed_official | 235:685d5f11838f | 2 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 3 | * @file stm32f4xx_hal_cryp_ex.c |
mbed_official | 235:685d5f11838f | 4 | * @author MCD Application Team |
mbed_official | 235:685d5f11838f | 5 | * @version V1.1.0 |
mbed_official | 235:685d5f11838f | 6 | * @date 19-June-2014 |
mbed_official | 235:685d5f11838f | 7 | * @brief Extended CRYP HAL module driver |
mbed_official | 235:685d5f11838f | 8 | * This file provides firmware functions to manage the following |
mbed_official | 235:685d5f11838f | 9 | * functionalities of CRYP extension peripheral: |
mbed_official | 235:685d5f11838f | 10 | * + Extended AES processing functions |
mbed_official | 235:685d5f11838f | 11 | * |
mbed_official | 235:685d5f11838f | 12 | @verbatim |
mbed_official | 235:685d5f11838f | 13 | ============================================================================== |
mbed_official | 235:685d5f11838f | 14 | ##### How to use this driver ##### |
mbed_official | 235:685d5f11838f | 15 | ============================================================================== |
mbed_official | 235:685d5f11838f | 16 | [..] |
mbed_official | 235:685d5f11838f | 17 | The CRYP Extension HAL driver can be used as follows: |
mbed_official | 235:685d5f11838f | 18 | (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit(): |
mbed_official | 235:685d5f11838f | 19 | (##) Enable the CRYP interface clock using __CRYP_CLK_ENABLE() |
mbed_official | 235:685d5f11838f | 20 | (##) In case of using interrupts (e.g. HAL_CRYPEx_AESGCM_Encrypt_IT()) |
mbed_official | 235:685d5f11838f | 21 | (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority() |
mbed_official | 235:685d5f11838f | 22 | (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ() |
mbed_official | 235:685d5f11838f | 23 | (+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler() |
mbed_official | 235:685d5f11838f | 24 | (##) In case of using DMA to control data transfer (e.g. HAL_AES_ECB_Encrypt_DMA()) |
mbed_official | 235:685d5f11838f | 25 | (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE() |
mbed_official | 235:685d5f11838f | 26 | (+++) Configure and enable two DMA streams one for managing data transfer from |
mbed_official | 235:685d5f11838f | 27 | memory to peripheral (input stream) and another stream for managing data |
mbed_official | 235:685d5f11838f | 28 | transfer from peripheral to memory (output stream) |
mbed_official | 235:685d5f11838f | 29 | (+++) Associate the initilalized DMA handle to the CRYP DMA handle |
mbed_official | 235:685d5f11838f | 30 | using __HAL_LINKDMA() |
mbed_official | 235:685d5f11838f | 31 | (+++) Configure the priority and enable the NVIC for the transfer complete |
mbed_official | 235:685d5f11838f | 32 | interrupt on the two DMA Streams. The output stream should have higher |
mbed_official | 235:685d5f11838f | 33 | priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ() |
mbed_official | 235:685d5f11838f | 34 | (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly: |
mbed_official | 235:685d5f11838f | 35 | (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit |
mbed_official | 235:685d5f11838f | 36 | (##) The key size: 128, 192 and 256. This parameter is relevant only for AES |
mbed_official | 235:685d5f11838f | 37 | (##) The encryption/decryption key. Its size depends on the algorithm |
mbed_official | 235:685d5f11838f | 38 | used for encryption/decryption |
mbed_official | 235:685d5f11838f | 39 | (##) The initialization vector (counter). It is not used ECB mode. |
mbed_official | 235:685d5f11838f | 40 | (#)Three processing (encryption/decryption) functions are available: |
mbed_official | 235:685d5f11838f | 41 | (##) Polling mode: encryption and decryption APIs are blocking functions |
mbed_official | 235:685d5f11838f | 42 | i.e. they process the data and wait till the processing is finished |
mbed_official | 235:685d5f11838f | 43 | e.g. HAL_CRYPEx_AESGCM_Encrypt() |
mbed_official | 235:685d5f11838f | 44 | (##) Interrupt mode: encryption and decryption APIs are not blocking functions |
mbed_official | 235:685d5f11838f | 45 | i.e. they process the data under interrupt |
mbed_official | 235:685d5f11838f | 46 | e.g. HAL_CRYPEx_AESGCM_Encrypt_IT() |
mbed_official | 235:685d5f11838f | 47 | (##) DMA mode: encryption and decryption APIs are not blocking functions |
mbed_official | 235:685d5f11838f | 48 | i.e. the data transfer is ensured by DMA |
mbed_official | 235:685d5f11838f | 49 | e.g. HAL_CRYPEx_AESGCM_Encrypt_DMA() |
mbed_official | 235:685d5f11838f | 50 | (#)When the processing function is called at first time after HAL_CRYP_Init() |
mbed_official | 235:685d5f11838f | 51 | the CRYP peripheral is initialized and processes the buffer in input. |
mbed_official | 235:685d5f11838f | 52 | At second call, the processing function performs an append of the already |
mbed_official | 235:685d5f11838f | 53 | processed buffer. |
mbed_official | 235:685d5f11838f | 54 | When a new data block is to be processed, call HAL_CRYP_Init() then the |
mbed_official | 235:685d5f11838f | 55 | processing function. |
mbed_official | 235:685d5f11838f | 56 | (#)In AES-GCM and AES-CCM modes are an authenticated encryption algorithms |
mbed_official | 235:685d5f11838f | 57 | which provide authentication messages. |
mbed_official | 235:685d5f11838f | 58 | HAL_AES_GCM_Finish() and HAL_AES_CCM_Finish() are used to provide those |
mbed_official | 235:685d5f11838f | 59 | authentication messages. |
mbed_official | 235:685d5f11838f | 60 | Call those functions after the processing ones (polling, interrupt or DMA). |
mbed_official | 235:685d5f11838f | 61 | e.g. in AES-CCM mode call HAL_CRYPEx_AESCCM_Encrypt() to encrypt the plain data |
mbed_official | 235:685d5f11838f | 62 | then call HAL_CRYPEx_AESCCM_Finish() to get the authentication message |
mbed_official | 235:685d5f11838f | 63 | (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral. |
mbed_official | 235:685d5f11838f | 64 | |
mbed_official | 235:685d5f11838f | 65 | @endverbatim |
mbed_official | 235:685d5f11838f | 66 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 67 | * @attention |
mbed_official | 235:685d5f11838f | 68 | * |
mbed_official | 235:685d5f11838f | 69 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 235:685d5f11838f | 70 | * |
mbed_official | 235:685d5f11838f | 71 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 235:685d5f11838f | 72 | * are permitted provided that the following conditions are met: |
mbed_official | 235:685d5f11838f | 73 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 235:685d5f11838f | 74 | * this list of conditions and the following disclaimer. |
mbed_official | 235:685d5f11838f | 75 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 235:685d5f11838f | 76 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 235:685d5f11838f | 77 | * and/or other materials provided with the distribution. |
mbed_official | 235:685d5f11838f | 78 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 235:685d5f11838f | 79 | * may be used to endorse or promote products derived from this software |
mbed_official | 235:685d5f11838f | 80 | * without specific prior written permission. |
mbed_official | 235:685d5f11838f | 81 | * |
mbed_official | 235:685d5f11838f | 82 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 235:685d5f11838f | 83 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 235:685d5f11838f | 84 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 235:685d5f11838f | 85 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 235:685d5f11838f | 86 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 235:685d5f11838f | 87 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 235:685d5f11838f | 88 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 235:685d5f11838f | 89 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 235:685d5f11838f | 90 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 235:685d5f11838f | 91 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 235:685d5f11838f | 92 | * |
mbed_official | 235:685d5f11838f | 93 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 94 | */ |
mbed_official | 235:685d5f11838f | 95 | |
mbed_official | 235:685d5f11838f | 96 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 97 | #include "stm32f4xx_hal.h" |
mbed_official | 235:685d5f11838f | 98 | |
mbed_official | 235:685d5f11838f | 99 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 235:685d5f11838f | 100 | * @{ |
mbed_official | 235:685d5f11838f | 101 | */ |
mbed_official | 235:685d5f11838f | 102 | |
mbed_official | 235:685d5f11838f | 103 | /** @defgroup CRYPEx |
mbed_official | 235:685d5f11838f | 104 | * @brief CRYP Extension HAL module driver. |
mbed_official | 235:685d5f11838f | 105 | * @{ |
mbed_official | 235:685d5f11838f | 106 | */ |
mbed_official | 235:685d5f11838f | 107 | |
mbed_official | 235:685d5f11838f | 108 | #ifdef HAL_CRYP_MODULE_ENABLED |
mbed_official | 235:685d5f11838f | 109 | |
mbed_official | 235:685d5f11838f | 110 | #if defined(STM32F437xx) || defined(STM32F439xx) |
mbed_official | 235:685d5f11838f | 111 | |
mbed_official | 235:685d5f11838f | 112 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 113 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 114 | #define CRYPEx_TIMEOUT_VALUE 1 |
mbed_official | 235:685d5f11838f | 115 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 116 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 117 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 118 | static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize); |
mbed_official | 235:685d5f11838f | 119 | static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize); |
mbed_official | 235:685d5f11838f | 120 | static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t *Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout); |
mbed_official | 235:685d5f11838f | 121 | static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint32_t Timeout); |
mbed_official | 235:685d5f11838f | 122 | static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 123 | static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 124 | static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 125 | static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr); |
mbed_official | 235:685d5f11838f | 126 | |
mbed_official | 235:685d5f11838f | 127 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 128 | |
mbed_official | 235:685d5f11838f | 129 | /** @defgroup CRYPEx_Private_Functions |
mbed_official | 235:685d5f11838f | 130 | * @{ |
mbed_official | 235:685d5f11838f | 131 | */ |
mbed_official | 235:685d5f11838f | 132 | |
mbed_official | 235:685d5f11838f | 133 | /** @defgroup CRYPEx_Group1 Extended AES processing functions |
mbed_official | 235:685d5f11838f | 134 | * @brief Extended processing functions. |
mbed_official | 235:685d5f11838f | 135 | * |
mbed_official | 235:685d5f11838f | 136 | @verbatim |
mbed_official | 235:685d5f11838f | 137 | ============================================================================== |
mbed_official | 235:685d5f11838f | 138 | ##### Extended AES processing functions ##### |
mbed_official | 235:685d5f11838f | 139 | ============================================================================== |
mbed_official | 235:685d5f11838f | 140 | [..] This section provides functions allowing to: |
mbed_official | 235:685d5f11838f | 141 | (+) Encrypt plaintext using AES-128/192/256 using GCM and CCM chaining modes |
mbed_official | 235:685d5f11838f | 142 | (+) Decrypt cyphertext using AES-128/192/256 using GCM and CCM chaining modes |
mbed_official | 235:685d5f11838f | 143 | (+) Finish the processing. This function is available only for GCM and CCM |
mbed_official | 235:685d5f11838f | 144 | [..] Three processing methods are available: |
mbed_official | 235:685d5f11838f | 145 | (+) Polling mode |
mbed_official | 235:685d5f11838f | 146 | (+) Interrupt mode |
mbed_official | 235:685d5f11838f | 147 | (+) DMA mode |
mbed_official | 235:685d5f11838f | 148 | |
mbed_official | 235:685d5f11838f | 149 | @endverbatim |
mbed_official | 235:685d5f11838f | 150 | * @{ |
mbed_official | 235:685d5f11838f | 151 | */ |
mbed_official | 235:685d5f11838f | 152 | |
mbed_official | 235:685d5f11838f | 153 | |
mbed_official | 235:685d5f11838f | 154 | /** |
mbed_official | 235:685d5f11838f | 155 | * @brief Initializes the CRYP peripheral in AES CCM encryption mode then |
mbed_official | 235:685d5f11838f | 156 | * encrypt pPlainData. The cypher data are available in pCypherData. |
mbed_official | 235:685d5f11838f | 157 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 158 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 159 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 160 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 161 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 162 | * @param Timeout: Timeout duration |
mbed_official | 235:685d5f11838f | 163 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 164 | */ |
mbed_official | 235:685d5f11838f | 165 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 166 | { |
mbed_official | 235:685d5f11838f | 167 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 168 | uint32_t headersize = hcryp->Init.HeaderSize; |
mbed_official | 235:685d5f11838f | 169 | uint32_t headeraddr = (uint32_t)hcryp->Init.Header; |
mbed_official | 235:685d5f11838f | 170 | uint32_t loopcounter = 0; |
mbed_official | 235:685d5f11838f | 171 | uint32_t bufferidx = 0; |
mbed_official | 235:685d5f11838f | 172 | uint8_t blockb0[16] = {0};/* Block B0 */ |
mbed_official | 235:685d5f11838f | 173 | uint8_t ctr[16] = {0}; /* Counter */ |
mbed_official | 235:685d5f11838f | 174 | uint32_t b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 175 | |
mbed_official | 235:685d5f11838f | 176 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 177 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 178 | |
mbed_official | 235:685d5f11838f | 179 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 180 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 181 | |
mbed_official | 235:685d5f11838f | 182 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 183 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 184 | { |
mbed_official | 235:685d5f11838f | 185 | /************************ Formatting the header block *********************/ |
mbed_official | 235:685d5f11838f | 186 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 187 | { |
mbed_official | 235:685d5f11838f | 188 | /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ |
mbed_official | 235:685d5f11838f | 189 | if(headersize < 65280) |
mbed_official | 235:685d5f11838f | 190 | { |
mbed_official | 235:685d5f11838f | 191 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); |
mbed_official | 235:685d5f11838f | 192 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); |
mbed_official | 235:685d5f11838f | 193 | headersize += 2; |
mbed_official | 235:685d5f11838f | 194 | } |
mbed_official | 235:685d5f11838f | 195 | else |
mbed_official | 235:685d5f11838f | 196 | { |
mbed_official | 235:685d5f11838f | 197 | /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ |
mbed_official | 235:685d5f11838f | 198 | hcryp->Init.pScratch[bufferidx++] = 0xFF; |
mbed_official | 235:685d5f11838f | 199 | hcryp->Init.pScratch[bufferidx++] = 0xFE; |
mbed_official | 235:685d5f11838f | 200 | hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; |
mbed_official | 235:685d5f11838f | 201 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; |
mbed_official | 235:685d5f11838f | 202 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; |
mbed_official | 235:685d5f11838f | 203 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; |
mbed_official | 235:685d5f11838f | 204 | headersize += 6; |
mbed_official | 235:685d5f11838f | 205 | } |
mbed_official | 235:685d5f11838f | 206 | /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ |
mbed_official | 235:685d5f11838f | 207 | for(loopcounter = 0; loopcounter < headersize; loopcounter++) |
mbed_official | 235:685d5f11838f | 208 | { |
mbed_official | 235:685d5f11838f | 209 | hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; |
mbed_official | 235:685d5f11838f | 210 | } |
mbed_official | 235:685d5f11838f | 211 | /* Check if the header size is modulo 16 */ |
mbed_official | 235:685d5f11838f | 212 | if ((headersize % 16) != 0) |
mbed_official | 235:685d5f11838f | 213 | { |
mbed_official | 235:685d5f11838f | 214 | /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ |
mbed_official | 235:685d5f11838f | 215 | for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) |
mbed_official | 235:685d5f11838f | 216 | { |
mbed_official | 235:685d5f11838f | 217 | hcryp->Init.pScratch[loopcounter] = 0; |
mbed_official | 235:685d5f11838f | 218 | } |
mbed_official | 235:685d5f11838f | 219 | /* Set the header size to modulo 16 */ |
mbed_official | 235:685d5f11838f | 220 | headersize = ((headersize/16) + 1) * 16; |
mbed_official | 235:685d5f11838f | 221 | } |
mbed_official | 235:685d5f11838f | 222 | /* Set the pointer headeraddr to hcryp->Init.pScratch */ |
mbed_official | 235:685d5f11838f | 223 | headeraddr = (uint32_t)hcryp->Init.pScratch; |
mbed_official | 235:685d5f11838f | 224 | } |
mbed_official | 235:685d5f11838f | 225 | /*********************** Formatting the block B0 **************************/ |
mbed_official | 235:685d5f11838f | 226 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 227 | { |
mbed_official | 235:685d5f11838f | 228 | blockb0[0] = 0x40; |
mbed_official | 235:685d5f11838f | 229 | } |
mbed_official | 235:685d5f11838f | 230 | /* Flags byte */ |
mbed_official | 235:685d5f11838f | 231 | /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ |
mbed_official | 235:685d5f11838f | 232 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); |
mbed_official | 235:685d5f11838f | 233 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); |
mbed_official | 235:685d5f11838f | 234 | |
mbed_official | 235:685d5f11838f | 235 | for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) |
mbed_official | 235:685d5f11838f | 236 | { |
mbed_official | 235:685d5f11838f | 237 | blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; |
mbed_official | 235:685d5f11838f | 238 | } |
mbed_official | 235:685d5f11838f | 239 | for ( ; loopcounter < 13; loopcounter++) |
mbed_official | 235:685d5f11838f | 240 | { |
mbed_official | 235:685d5f11838f | 241 | blockb0[loopcounter+1] = 0; |
mbed_official | 235:685d5f11838f | 242 | } |
mbed_official | 235:685d5f11838f | 243 | |
mbed_official | 235:685d5f11838f | 244 | blockb0[14] = (Size >> 8); |
mbed_official | 235:685d5f11838f | 245 | blockb0[15] = (Size & 0xFF); |
mbed_official | 235:685d5f11838f | 246 | |
mbed_official | 235:685d5f11838f | 247 | /************************* Formatting the initial counter *****************/ |
mbed_official | 235:685d5f11838f | 248 | /* Byte 0: |
mbed_official | 235:685d5f11838f | 249 | Bits 7 and 6 are reserved and shall be set to 0 |
mbed_official | 235:685d5f11838f | 250 | Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks |
mbed_official | 235:685d5f11838f | 251 | are distinct from B0 |
mbed_official | 235:685d5f11838f | 252 | Bits 0, 1, and 2 contain the same encoding of q as in B0 |
mbed_official | 235:685d5f11838f | 253 | */ |
mbed_official | 235:685d5f11838f | 254 | ctr[0] = blockb0[0] & 0x07; |
mbed_official | 235:685d5f11838f | 255 | /* byte 1 to NonceSize is the IV (Nonce) */ |
mbed_official | 235:685d5f11838f | 256 | for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) |
mbed_official | 235:685d5f11838f | 257 | { |
mbed_official | 235:685d5f11838f | 258 | ctr[loopcounter] = blockb0[loopcounter]; |
mbed_official | 235:685d5f11838f | 259 | } |
mbed_official | 235:685d5f11838f | 260 | /* Set the LSB to 1 */ |
mbed_official | 235:685d5f11838f | 261 | ctr[15] |= 0x01; |
mbed_official | 235:685d5f11838f | 262 | |
mbed_official | 235:685d5f11838f | 263 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 264 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 265 | |
mbed_official | 235:685d5f11838f | 266 | /* Set the CRYP peripheral in AES CCM mode */ |
mbed_official | 235:685d5f11838f | 267 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT); |
mbed_official | 235:685d5f11838f | 268 | |
mbed_official | 235:685d5f11838f | 269 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 270 | CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 271 | |
mbed_official | 235:685d5f11838f | 272 | /* Select init phase */ |
mbed_official | 235:685d5f11838f | 273 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT); |
mbed_official | 235:685d5f11838f | 274 | |
mbed_official | 235:685d5f11838f | 275 | b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 276 | /* Write the blockb0 block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 277 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 278 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 279 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 280 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 281 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 282 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 283 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 284 | |
mbed_official | 235:685d5f11838f | 285 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 286 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 287 | |
mbed_official | 235:685d5f11838f | 288 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 289 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 290 | |
mbed_official | 235:685d5f11838f | 291 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 292 | { |
mbed_official | 235:685d5f11838f | 293 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 294 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 295 | { |
mbed_official | 235:685d5f11838f | 296 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 297 | { |
mbed_official | 235:685d5f11838f | 298 | /* Change state */ |
mbed_official | 235:685d5f11838f | 299 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 300 | |
mbed_official | 235:685d5f11838f | 301 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 302 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 303 | |
mbed_official | 235:685d5f11838f | 304 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 305 | } |
mbed_official | 235:685d5f11838f | 306 | } |
mbed_official | 235:685d5f11838f | 307 | } |
mbed_official | 235:685d5f11838f | 308 | /***************************** Header phase *******************************/ |
mbed_official | 235:685d5f11838f | 309 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 310 | { |
mbed_official | 235:685d5f11838f | 311 | /* Select header phase */ |
mbed_official | 235:685d5f11838f | 312 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER); |
mbed_official | 235:685d5f11838f | 313 | |
mbed_official | 235:685d5f11838f | 314 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 315 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 316 | |
mbed_official | 235:685d5f11838f | 317 | for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) |
mbed_official | 235:685d5f11838f | 318 | { |
mbed_official | 235:685d5f11838f | 319 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 320 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 321 | |
mbed_official | 235:685d5f11838f | 322 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM)) |
mbed_official | 235:685d5f11838f | 323 | { |
mbed_official | 235:685d5f11838f | 324 | { |
mbed_official | 235:685d5f11838f | 325 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 326 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 327 | { |
mbed_official | 235:685d5f11838f | 328 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 329 | { |
mbed_official | 235:685d5f11838f | 330 | /* Change state */ |
mbed_official | 235:685d5f11838f | 331 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 332 | |
mbed_official | 235:685d5f11838f | 333 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 334 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 335 | |
mbed_official | 235:685d5f11838f | 336 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 337 | } |
mbed_official | 235:685d5f11838f | 338 | } |
mbed_official | 235:685d5f11838f | 339 | } |
mbed_official | 235:685d5f11838f | 340 | } |
mbed_official | 235:685d5f11838f | 341 | /* Write the header block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 342 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 343 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 344 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 345 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 346 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 347 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 348 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 349 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 350 | } |
mbed_official | 235:685d5f11838f | 351 | |
mbed_official | 235:685d5f11838f | 352 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 353 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 354 | |
mbed_official | 235:685d5f11838f | 355 | while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) |
mbed_official | 235:685d5f11838f | 356 | { |
mbed_official | 235:685d5f11838f | 357 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 358 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 359 | { |
mbed_official | 235:685d5f11838f | 360 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 361 | { |
mbed_official | 235:685d5f11838f | 362 | /* Change state */ |
mbed_official | 235:685d5f11838f | 363 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 364 | |
mbed_official | 235:685d5f11838f | 365 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 366 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 367 | |
mbed_official | 235:685d5f11838f | 368 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 369 | } |
mbed_official | 235:685d5f11838f | 370 | } |
mbed_official | 235:685d5f11838f | 371 | } |
mbed_official | 235:685d5f11838f | 372 | } |
mbed_official | 235:685d5f11838f | 373 | /* Save formatted counter into the scratch buffer pScratch */ |
mbed_official | 235:685d5f11838f | 374 | for(loopcounter = 0; (loopcounter < 16); loopcounter++) |
mbed_official | 235:685d5f11838f | 375 | { |
mbed_official | 235:685d5f11838f | 376 | hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; |
mbed_official | 235:685d5f11838f | 377 | } |
mbed_official | 235:685d5f11838f | 378 | /* Reset bit 0 */ |
mbed_official | 235:685d5f11838f | 379 | hcryp->Init.pScratch[15] &= 0xfe; |
mbed_official | 235:685d5f11838f | 380 | |
mbed_official | 235:685d5f11838f | 381 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 382 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 383 | |
mbed_official | 235:685d5f11838f | 384 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 385 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 386 | |
mbed_official | 235:685d5f11838f | 387 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 388 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 389 | |
mbed_official | 235:685d5f11838f | 390 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 391 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 392 | } |
mbed_official | 235:685d5f11838f | 393 | |
mbed_official | 235:685d5f11838f | 394 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 235:685d5f11838f | 395 | if(CRYPEx_GCMCCM_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 396 | { |
mbed_official | 235:685d5f11838f | 397 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 398 | } |
mbed_official | 235:685d5f11838f | 399 | |
mbed_official | 235:685d5f11838f | 400 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 401 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 402 | |
mbed_official | 235:685d5f11838f | 403 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 404 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 405 | |
mbed_official | 235:685d5f11838f | 406 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 407 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 408 | } |
mbed_official | 235:685d5f11838f | 409 | |
mbed_official | 235:685d5f11838f | 410 | /** |
mbed_official | 235:685d5f11838f | 411 | * @brief Initializes the CRYP peripheral in AES GCM encryption mode then |
mbed_official | 235:685d5f11838f | 412 | * encrypt pPlainData. The cypher data are available in pCypherData. |
mbed_official | 235:685d5f11838f | 413 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 414 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 415 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 416 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 417 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 418 | * @param Timeout: Timeout duration |
mbed_official | 235:685d5f11838f | 419 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 420 | */ |
mbed_official | 235:685d5f11838f | 421 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 422 | { |
mbed_official | 235:685d5f11838f | 423 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 424 | |
mbed_official | 235:685d5f11838f | 425 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 426 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 427 | |
mbed_official | 235:685d5f11838f | 428 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 429 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 430 | |
mbed_official | 235:685d5f11838f | 431 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 432 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 433 | { |
mbed_official | 235:685d5f11838f | 434 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 435 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 436 | |
mbed_official | 235:685d5f11838f | 437 | /* Set the CRYP peripheral in AES GCM mode */ |
mbed_official | 235:685d5f11838f | 438 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT); |
mbed_official | 235:685d5f11838f | 439 | |
mbed_official | 235:685d5f11838f | 440 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 441 | CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 442 | |
mbed_official | 235:685d5f11838f | 443 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 444 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 445 | |
mbed_official | 235:685d5f11838f | 446 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 447 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 448 | |
mbed_official | 235:685d5f11838f | 449 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 450 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 451 | |
mbed_official | 235:685d5f11838f | 452 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 453 | { |
mbed_official | 235:685d5f11838f | 454 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 455 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 456 | { |
mbed_official | 235:685d5f11838f | 457 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 458 | { |
mbed_official | 235:685d5f11838f | 459 | /* Change state */ |
mbed_official | 235:685d5f11838f | 460 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 461 | |
mbed_official | 235:685d5f11838f | 462 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 463 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 464 | |
mbed_official | 235:685d5f11838f | 465 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 466 | } |
mbed_official | 235:685d5f11838f | 467 | } |
mbed_official | 235:685d5f11838f | 468 | } |
mbed_official | 235:685d5f11838f | 469 | |
mbed_official | 235:685d5f11838f | 470 | /* Set the header phase */ |
mbed_official | 235:685d5f11838f | 471 | if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 472 | { |
mbed_official | 235:685d5f11838f | 473 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 474 | } |
mbed_official | 235:685d5f11838f | 475 | |
mbed_official | 235:685d5f11838f | 476 | /* Disable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 477 | __HAL_CRYP_DISABLE(); |
mbed_official | 235:685d5f11838f | 478 | |
mbed_official | 235:685d5f11838f | 479 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 480 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 481 | |
mbed_official | 235:685d5f11838f | 482 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 483 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 484 | |
mbed_official | 235:685d5f11838f | 485 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 486 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 487 | |
mbed_official | 235:685d5f11838f | 488 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 489 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 490 | } |
mbed_official | 235:685d5f11838f | 491 | |
mbed_official | 235:685d5f11838f | 492 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 235:685d5f11838f | 493 | if(CRYPEx_GCMCCM_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 494 | { |
mbed_official | 235:685d5f11838f | 495 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 496 | } |
mbed_official | 235:685d5f11838f | 497 | |
mbed_official | 235:685d5f11838f | 498 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 499 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 500 | |
mbed_official | 235:685d5f11838f | 501 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 502 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 503 | |
mbed_official | 235:685d5f11838f | 504 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 505 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 506 | } |
mbed_official | 235:685d5f11838f | 507 | |
mbed_official | 235:685d5f11838f | 508 | /** |
mbed_official | 235:685d5f11838f | 509 | * @brief Initializes the CRYP peripheral in AES GCM decryption mode then |
mbed_official | 235:685d5f11838f | 510 | * decrypted pCypherData. The cypher data are available in pPlainData. |
mbed_official | 235:685d5f11838f | 511 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 512 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 513 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 514 | * @param Size: Length of the cyphertext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 515 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 516 | * @param Timeout: Timeout duration |
mbed_official | 235:685d5f11838f | 517 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 518 | */ |
mbed_official | 235:685d5f11838f | 519 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 520 | { |
mbed_official | 235:685d5f11838f | 521 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 522 | |
mbed_official | 235:685d5f11838f | 523 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 524 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 525 | |
mbed_official | 235:685d5f11838f | 526 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 527 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 528 | |
mbed_official | 235:685d5f11838f | 529 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 530 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 531 | { |
mbed_official | 235:685d5f11838f | 532 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 533 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 534 | |
mbed_official | 235:685d5f11838f | 535 | /* Set the CRYP peripheral in AES GCM decryption mode */ |
mbed_official | 235:685d5f11838f | 536 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_DECRYPT); |
mbed_official | 235:685d5f11838f | 537 | |
mbed_official | 235:685d5f11838f | 538 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 539 | CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 540 | |
mbed_official | 235:685d5f11838f | 541 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 542 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 543 | |
mbed_official | 235:685d5f11838f | 544 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 545 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 546 | |
mbed_official | 235:685d5f11838f | 547 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 548 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 549 | |
mbed_official | 235:685d5f11838f | 550 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 551 | { |
mbed_official | 235:685d5f11838f | 552 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 553 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 554 | { |
mbed_official | 235:685d5f11838f | 555 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 556 | { |
mbed_official | 235:685d5f11838f | 557 | /* Change state */ |
mbed_official | 235:685d5f11838f | 558 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 559 | |
mbed_official | 235:685d5f11838f | 560 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 561 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 562 | |
mbed_official | 235:685d5f11838f | 563 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 564 | } |
mbed_official | 235:685d5f11838f | 565 | } |
mbed_official | 235:685d5f11838f | 566 | } |
mbed_official | 235:685d5f11838f | 567 | |
mbed_official | 235:685d5f11838f | 568 | /* Set the header phase */ |
mbed_official | 235:685d5f11838f | 569 | if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 570 | { |
mbed_official | 235:685d5f11838f | 571 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 572 | } |
mbed_official | 235:685d5f11838f | 573 | /* Disable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 574 | __HAL_CRYP_DISABLE(); |
mbed_official | 235:685d5f11838f | 575 | |
mbed_official | 235:685d5f11838f | 576 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 577 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 578 | |
mbed_official | 235:685d5f11838f | 579 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 580 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 581 | |
mbed_official | 235:685d5f11838f | 582 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 583 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 584 | } |
mbed_official | 235:685d5f11838f | 585 | |
mbed_official | 235:685d5f11838f | 586 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 235:685d5f11838f | 587 | if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 588 | { |
mbed_official | 235:685d5f11838f | 589 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 590 | } |
mbed_official | 235:685d5f11838f | 591 | |
mbed_official | 235:685d5f11838f | 592 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 593 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 594 | |
mbed_official | 235:685d5f11838f | 595 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 596 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 597 | |
mbed_official | 235:685d5f11838f | 598 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 599 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 600 | } |
mbed_official | 235:685d5f11838f | 601 | |
mbed_official | 235:685d5f11838f | 602 | /** |
mbed_official | 235:685d5f11838f | 603 | * @brief Computes the authentication TAG. |
mbed_official | 235:685d5f11838f | 604 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 605 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 606 | * @param Size: Total length of the plain/cyphertext buffer |
mbed_official | 235:685d5f11838f | 607 | * @param AuthTag: Pointer to the authentication buffer |
mbed_official | 235:685d5f11838f | 608 | * @param Timeout: Timeout duration |
mbed_official | 235:685d5f11838f | 609 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 610 | */ |
mbed_official | 235:685d5f11838f | 611 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Finish(CRYP_HandleTypeDef *hcryp, uint16_t Size, uint8_t *AuthTag, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 612 | { |
mbed_official | 235:685d5f11838f | 613 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 614 | uint32_t headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */ |
mbed_official | 235:685d5f11838f | 615 | uint32_t inputlength = Size * 8; /* input length in bits */ |
mbed_official | 235:685d5f11838f | 616 | uint32_t tagaddr = (uint32_t)AuthTag; |
mbed_official | 235:685d5f11838f | 617 | |
mbed_official | 235:685d5f11838f | 618 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 619 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 620 | |
mbed_official | 235:685d5f11838f | 621 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 622 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 623 | |
mbed_official | 235:685d5f11838f | 624 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 625 | if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS) |
mbed_official | 235:685d5f11838f | 626 | { |
mbed_official | 235:685d5f11838f | 627 | /* Change the CRYP phase */ |
mbed_official | 235:685d5f11838f | 628 | hcryp->Phase = HAL_CRYP_PHASE_FINAL; |
mbed_official | 235:685d5f11838f | 629 | |
mbed_official | 235:685d5f11838f | 630 | /* Disable CRYP to start the final phase */ |
mbed_official | 235:685d5f11838f | 631 | __HAL_CRYP_DISABLE(); |
mbed_official | 235:685d5f11838f | 632 | |
mbed_official | 235:685d5f11838f | 633 | /* Select final phase */ |
mbed_official | 235:685d5f11838f | 634 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_FINAL); |
mbed_official | 235:685d5f11838f | 635 | |
mbed_official | 235:685d5f11838f | 636 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 637 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 638 | |
mbed_official | 235:685d5f11838f | 639 | /* Write the number of bits in header (64 bits) followed by the number of bits |
mbed_official | 235:685d5f11838f | 640 | in the payload */ |
mbed_official | 235:685d5f11838f | 641 | if(hcryp->Init.DataType == CRYP_DATATYPE_1B) |
mbed_official | 235:685d5f11838f | 642 | { |
mbed_official | 235:685d5f11838f | 643 | CRYP->DR = 0; |
mbed_official | 235:685d5f11838f | 644 | CRYP->DR = __RBIT(headerlength); |
mbed_official | 235:685d5f11838f | 645 | CRYP->DR = 0; |
mbed_official | 235:685d5f11838f | 646 | CRYP->DR = __RBIT(inputlength); |
mbed_official | 235:685d5f11838f | 647 | } |
mbed_official | 235:685d5f11838f | 648 | else if(hcryp->Init.DataType == CRYP_DATATYPE_8B) |
mbed_official | 235:685d5f11838f | 649 | { |
mbed_official | 235:685d5f11838f | 650 | CRYP->DR = 0; |
mbed_official | 235:685d5f11838f | 651 | CRYP->DR = __REV(headerlength); |
mbed_official | 235:685d5f11838f | 652 | CRYP->DR = 0; |
mbed_official | 235:685d5f11838f | 653 | CRYP->DR = __REV(inputlength); |
mbed_official | 235:685d5f11838f | 654 | } |
mbed_official | 235:685d5f11838f | 655 | else if(hcryp->Init.DataType == CRYP_DATATYPE_16B) |
mbed_official | 235:685d5f11838f | 656 | { |
mbed_official | 235:685d5f11838f | 657 | CRYP->DR = 0; |
mbed_official | 235:685d5f11838f | 658 | CRYP->DR = __REV16(headerlength); |
mbed_official | 235:685d5f11838f | 659 | CRYP->DR = 0; |
mbed_official | 235:685d5f11838f | 660 | CRYP->DR = __REV16(inputlength); |
mbed_official | 235:685d5f11838f | 661 | } |
mbed_official | 235:685d5f11838f | 662 | else if(hcryp->Init.DataType == CRYP_DATATYPE_32B) |
mbed_official | 235:685d5f11838f | 663 | { |
mbed_official | 235:685d5f11838f | 664 | CRYP->DR = 0; |
mbed_official | 235:685d5f11838f | 665 | CRYP->DR = (uint32_t)(headerlength); |
mbed_official | 235:685d5f11838f | 666 | CRYP->DR = 0; |
mbed_official | 235:685d5f11838f | 667 | CRYP->DR = (uint32_t)(inputlength); |
mbed_official | 235:685d5f11838f | 668 | } |
mbed_official | 235:685d5f11838f | 669 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 670 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 671 | |
mbed_official | 235:685d5f11838f | 672 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE)) |
mbed_official | 235:685d5f11838f | 673 | { |
mbed_official | 235:685d5f11838f | 674 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 675 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 676 | { |
mbed_official | 235:685d5f11838f | 677 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 678 | { |
mbed_official | 235:685d5f11838f | 679 | /* Change state */ |
mbed_official | 235:685d5f11838f | 680 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 681 | |
mbed_official | 235:685d5f11838f | 682 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 683 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 684 | |
mbed_official | 235:685d5f11838f | 685 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 686 | } |
mbed_official | 235:685d5f11838f | 687 | } |
mbed_official | 235:685d5f11838f | 688 | } |
mbed_official | 235:685d5f11838f | 689 | |
mbed_official | 235:685d5f11838f | 690 | /* Read the Auth TAG in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 691 | *(uint32_t*)(tagaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 692 | tagaddr+=4; |
mbed_official | 235:685d5f11838f | 693 | *(uint32_t*)(tagaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 694 | tagaddr+=4; |
mbed_official | 235:685d5f11838f | 695 | *(uint32_t*)(tagaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 696 | tagaddr+=4; |
mbed_official | 235:685d5f11838f | 697 | *(uint32_t*)(tagaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 698 | } |
mbed_official | 235:685d5f11838f | 699 | |
mbed_official | 235:685d5f11838f | 700 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 701 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 702 | |
mbed_official | 235:685d5f11838f | 703 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 704 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 705 | |
mbed_official | 235:685d5f11838f | 706 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 707 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 708 | } |
mbed_official | 235:685d5f11838f | 709 | |
mbed_official | 235:685d5f11838f | 710 | /** |
mbed_official | 235:685d5f11838f | 711 | * @brief Computes the authentication TAG for AES CCM mode. |
mbed_official | 235:685d5f11838f | 712 | * @note This API is called after HAL_AES_CCM_Encrypt()/HAL_AES_CCM_Decrypt() |
mbed_official | 235:685d5f11838f | 713 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 714 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 715 | * @param AuthTag: Pointer to the authentication buffer |
mbed_official | 235:685d5f11838f | 716 | * @param Timeout: Timeout duration |
mbed_official | 235:685d5f11838f | 717 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 718 | */ |
mbed_official | 235:685d5f11838f | 719 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef *hcryp, uint8_t *AuthTag, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 720 | { |
mbed_official | 235:685d5f11838f | 721 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 722 | uint32_t tagaddr = (uint32_t)AuthTag; |
mbed_official | 235:685d5f11838f | 723 | uint32_t ctraddr = (uint32_t)hcryp->Init.pScratch; |
mbed_official | 235:685d5f11838f | 724 | uint32_t temptag[4] = {0}; /* Temporary TAG (MAC) */ |
mbed_official | 235:685d5f11838f | 725 | uint32_t loopcounter; |
mbed_official | 235:685d5f11838f | 726 | |
mbed_official | 235:685d5f11838f | 727 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 728 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 729 | |
mbed_official | 235:685d5f11838f | 730 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 731 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 732 | |
mbed_official | 235:685d5f11838f | 733 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 734 | if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS) |
mbed_official | 235:685d5f11838f | 735 | { |
mbed_official | 235:685d5f11838f | 736 | /* Change the CRYP phase */ |
mbed_official | 235:685d5f11838f | 737 | hcryp->Phase = HAL_CRYP_PHASE_FINAL; |
mbed_official | 235:685d5f11838f | 738 | |
mbed_official | 235:685d5f11838f | 739 | /* Disable CRYP to start the final phase */ |
mbed_official | 235:685d5f11838f | 740 | __HAL_CRYP_DISABLE(); |
mbed_official | 235:685d5f11838f | 741 | |
mbed_official | 235:685d5f11838f | 742 | /* Select final phase */ |
mbed_official | 235:685d5f11838f | 743 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_FINAL); |
mbed_official | 235:685d5f11838f | 744 | |
mbed_official | 235:685d5f11838f | 745 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 746 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 747 | |
mbed_official | 235:685d5f11838f | 748 | /* Write the counter block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 749 | CRYP->DR = *(uint32_t*)ctraddr; |
mbed_official | 235:685d5f11838f | 750 | ctraddr+=4; |
mbed_official | 235:685d5f11838f | 751 | CRYP->DR = *(uint32_t*)ctraddr; |
mbed_official | 235:685d5f11838f | 752 | ctraddr+=4; |
mbed_official | 235:685d5f11838f | 753 | CRYP->DR = *(uint32_t*)ctraddr; |
mbed_official | 235:685d5f11838f | 754 | ctraddr+=4; |
mbed_official | 235:685d5f11838f | 755 | CRYP->DR = *(uint32_t*)ctraddr; |
mbed_official | 235:685d5f11838f | 756 | |
mbed_official | 235:685d5f11838f | 757 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 758 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 759 | |
mbed_official | 235:685d5f11838f | 760 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE)) |
mbed_official | 235:685d5f11838f | 761 | { |
mbed_official | 235:685d5f11838f | 762 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 763 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 764 | { |
mbed_official | 235:685d5f11838f | 765 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 766 | { |
mbed_official | 235:685d5f11838f | 767 | /* Change state */ |
mbed_official | 235:685d5f11838f | 768 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 769 | |
mbed_official | 235:685d5f11838f | 770 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 771 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 772 | |
mbed_official | 235:685d5f11838f | 773 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 774 | } |
mbed_official | 235:685d5f11838f | 775 | } |
mbed_official | 235:685d5f11838f | 776 | } |
mbed_official | 235:685d5f11838f | 777 | |
mbed_official | 235:685d5f11838f | 778 | /* Read the Auth TAG in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 779 | temptag[0] = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 780 | temptag[1] = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 781 | temptag[2] = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 782 | temptag[3] = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 783 | } |
mbed_official | 235:685d5f11838f | 784 | |
mbed_official | 235:685d5f11838f | 785 | /* Copy temporary authentication TAG in user TAG buffer */ |
mbed_official | 235:685d5f11838f | 786 | for(loopcounter = 0; loopcounter < hcryp->Init.TagSize ; loopcounter++) |
mbed_official | 235:685d5f11838f | 787 | { |
mbed_official | 235:685d5f11838f | 788 | /* Set the authentication TAG buffer */ |
mbed_official | 235:685d5f11838f | 789 | *((uint8_t*)tagaddr+loopcounter) = *((uint8_t*)temptag+loopcounter); |
mbed_official | 235:685d5f11838f | 790 | } |
mbed_official | 235:685d5f11838f | 791 | |
mbed_official | 235:685d5f11838f | 792 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 793 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 794 | |
mbed_official | 235:685d5f11838f | 795 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 796 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 797 | |
mbed_official | 235:685d5f11838f | 798 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 799 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 800 | } |
mbed_official | 235:685d5f11838f | 801 | |
mbed_official | 235:685d5f11838f | 802 | /** |
mbed_official | 235:685d5f11838f | 803 | * @brief Initializes the CRYP peripheral in AES CCM decryption mode then |
mbed_official | 235:685d5f11838f | 804 | * decrypted pCypherData. The cypher data are available in pPlainData. |
mbed_official | 235:685d5f11838f | 805 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 806 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 807 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 808 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 809 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 810 | * @param Timeout: Timeout duration |
mbed_official | 235:685d5f11838f | 811 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 812 | */ |
mbed_official | 235:685d5f11838f | 813 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 814 | { |
mbed_official | 235:685d5f11838f | 815 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 816 | uint32_t headersize = hcryp->Init.HeaderSize; |
mbed_official | 235:685d5f11838f | 817 | uint32_t headeraddr = (uint32_t)hcryp->Init.Header; |
mbed_official | 235:685d5f11838f | 818 | uint32_t loopcounter = 0; |
mbed_official | 235:685d5f11838f | 819 | uint32_t bufferidx = 0; |
mbed_official | 235:685d5f11838f | 820 | uint8_t blockb0[16] = {0};/* Block B0 */ |
mbed_official | 235:685d5f11838f | 821 | uint8_t ctr[16] = {0}; /* Counter */ |
mbed_official | 235:685d5f11838f | 822 | uint32_t b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 823 | |
mbed_official | 235:685d5f11838f | 824 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 825 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 826 | |
mbed_official | 235:685d5f11838f | 827 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 828 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 829 | |
mbed_official | 235:685d5f11838f | 830 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 831 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 832 | { |
mbed_official | 235:685d5f11838f | 833 | /************************ Formatting the header block *********************/ |
mbed_official | 235:685d5f11838f | 834 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 835 | { |
mbed_official | 235:685d5f11838f | 836 | /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ |
mbed_official | 235:685d5f11838f | 837 | if(headersize < 65280) |
mbed_official | 235:685d5f11838f | 838 | { |
mbed_official | 235:685d5f11838f | 839 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); |
mbed_official | 235:685d5f11838f | 840 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); |
mbed_official | 235:685d5f11838f | 841 | headersize += 2; |
mbed_official | 235:685d5f11838f | 842 | } |
mbed_official | 235:685d5f11838f | 843 | else |
mbed_official | 235:685d5f11838f | 844 | { |
mbed_official | 235:685d5f11838f | 845 | /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ |
mbed_official | 235:685d5f11838f | 846 | hcryp->Init.pScratch[bufferidx++] = 0xFF; |
mbed_official | 235:685d5f11838f | 847 | hcryp->Init.pScratch[bufferidx++] = 0xFE; |
mbed_official | 235:685d5f11838f | 848 | hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; |
mbed_official | 235:685d5f11838f | 849 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; |
mbed_official | 235:685d5f11838f | 850 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; |
mbed_official | 235:685d5f11838f | 851 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; |
mbed_official | 235:685d5f11838f | 852 | headersize += 6; |
mbed_official | 235:685d5f11838f | 853 | } |
mbed_official | 235:685d5f11838f | 854 | /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ |
mbed_official | 235:685d5f11838f | 855 | for(loopcounter = 0; loopcounter < headersize; loopcounter++) |
mbed_official | 235:685d5f11838f | 856 | { |
mbed_official | 235:685d5f11838f | 857 | hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; |
mbed_official | 235:685d5f11838f | 858 | } |
mbed_official | 235:685d5f11838f | 859 | /* Check if the header size is modulo 16 */ |
mbed_official | 235:685d5f11838f | 860 | if ((headersize % 16) != 0) |
mbed_official | 235:685d5f11838f | 861 | { |
mbed_official | 235:685d5f11838f | 862 | /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ |
mbed_official | 235:685d5f11838f | 863 | for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) |
mbed_official | 235:685d5f11838f | 864 | { |
mbed_official | 235:685d5f11838f | 865 | hcryp->Init.pScratch[loopcounter] = 0; |
mbed_official | 235:685d5f11838f | 866 | } |
mbed_official | 235:685d5f11838f | 867 | /* Set the header size to modulo 16 */ |
mbed_official | 235:685d5f11838f | 868 | headersize = ((headersize/16) + 1) * 16; |
mbed_official | 235:685d5f11838f | 869 | } |
mbed_official | 235:685d5f11838f | 870 | /* Set the pointer headeraddr to hcryp->Init.pScratch */ |
mbed_official | 235:685d5f11838f | 871 | headeraddr = (uint32_t)hcryp->Init.pScratch; |
mbed_official | 235:685d5f11838f | 872 | } |
mbed_official | 235:685d5f11838f | 873 | /*********************** Formatting the block B0 **************************/ |
mbed_official | 235:685d5f11838f | 874 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 875 | { |
mbed_official | 235:685d5f11838f | 876 | blockb0[0] = 0x40; |
mbed_official | 235:685d5f11838f | 877 | } |
mbed_official | 235:685d5f11838f | 878 | /* Flags byte */ |
mbed_official | 235:685d5f11838f | 879 | /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ |
mbed_official | 235:685d5f11838f | 880 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); |
mbed_official | 235:685d5f11838f | 881 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); |
mbed_official | 235:685d5f11838f | 882 | |
mbed_official | 235:685d5f11838f | 883 | for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) |
mbed_official | 235:685d5f11838f | 884 | { |
mbed_official | 235:685d5f11838f | 885 | blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; |
mbed_official | 235:685d5f11838f | 886 | } |
mbed_official | 235:685d5f11838f | 887 | for ( ; loopcounter < 13; loopcounter++) |
mbed_official | 235:685d5f11838f | 888 | { |
mbed_official | 235:685d5f11838f | 889 | blockb0[loopcounter+1] = 0; |
mbed_official | 235:685d5f11838f | 890 | } |
mbed_official | 235:685d5f11838f | 891 | |
mbed_official | 235:685d5f11838f | 892 | blockb0[14] = (Size >> 8); |
mbed_official | 235:685d5f11838f | 893 | blockb0[15] = (Size & 0xFF); |
mbed_official | 235:685d5f11838f | 894 | |
mbed_official | 235:685d5f11838f | 895 | /************************* Formatting the initial counter *****************/ |
mbed_official | 235:685d5f11838f | 896 | /* Byte 0: |
mbed_official | 235:685d5f11838f | 897 | Bits 7 and 6 are reserved and shall be set to 0 |
mbed_official | 235:685d5f11838f | 898 | Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter |
mbed_official | 235:685d5f11838f | 899 | blocks are distinct from B0 |
mbed_official | 235:685d5f11838f | 900 | Bits 0, 1, and 2 contain the same encoding of q as in B0 |
mbed_official | 235:685d5f11838f | 901 | */ |
mbed_official | 235:685d5f11838f | 902 | ctr[0] = blockb0[0] & 0x07; |
mbed_official | 235:685d5f11838f | 903 | /* byte 1 to NonceSize is the IV (Nonce) */ |
mbed_official | 235:685d5f11838f | 904 | for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) |
mbed_official | 235:685d5f11838f | 905 | { |
mbed_official | 235:685d5f11838f | 906 | ctr[loopcounter] = blockb0[loopcounter]; |
mbed_official | 235:685d5f11838f | 907 | } |
mbed_official | 235:685d5f11838f | 908 | /* Set the LSB to 1 */ |
mbed_official | 235:685d5f11838f | 909 | ctr[15] |= 0x01; |
mbed_official | 235:685d5f11838f | 910 | |
mbed_official | 235:685d5f11838f | 911 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 912 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 913 | |
mbed_official | 235:685d5f11838f | 914 | /* Set the CRYP peripheral in AES CCM mode */ |
mbed_official | 235:685d5f11838f | 915 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_DECRYPT); |
mbed_official | 235:685d5f11838f | 916 | |
mbed_official | 235:685d5f11838f | 917 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 918 | CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 919 | |
mbed_official | 235:685d5f11838f | 920 | /* Select init phase */ |
mbed_official | 235:685d5f11838f | 921 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT); |
mbed_official | 235:685d5f11838f | 922 | |
mbed_official | 235:685d5f11838f | 923 | b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 924 | /* Write the blockb0 block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 925 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 926 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 927 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 928 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 929 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 930 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 931 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 932 | |
mbed_official | 235:685d5f11838f | 933 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 934 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 935 | |
mbed_official | 235:685d5f11838f | 936 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 937 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 938 | |
mbed_official | 235:685d5f11838f | 939 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 940 | { |
mbed_official | 235:685d5f11838f | 941 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 942 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 943 | { |
mbed_official | 235:685d5f11838f | 944 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 945 | { |
mbed_official | 235:685d5f11838f | 946 | /* Change state */ |
mbed_official | 235:685d5f11838f | 947 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 948 | |
mbed_official | 235:685d5f11838f | 949 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 950 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 951 | |
mbed_official | 235:685d5f11838f | 952 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 953 | } |
mbed_official | 235:685d5f11838f | 954 | } |
mbed_official | 235:685d5f11838f | 955 | } |
mbed_official | 235:685d5f11838f | 956 | /***************************** Header phase *******************************/ |
mbed_official | 235:685d5f11838f | 957 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 958 | { |
mbed_official | 235:685d5f11838f | 959 | /* Select header phase */ |
mbed_official | 235:685d5f11838f | 960 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER); |
mbed_official | 235:685d5f11838f | 961 | |
mbed_official | 235:685d5f11838f | 962 | /* Enable Crypto processor */ |
mbed_official | 235:685d5f11838f | 963 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 964 | |
mbed_official | 235:685d5f11838f | 965 | for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) |
mbed_official | 235:685d5f11838f | 966 | { |
mbed_official | 235:685d5f11838f | 967 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 968 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 969 | |
mbed_official | 235:685d5f11838f | 970 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM)) |
mbed_official | 235:685d5f11838f | 971 | { |
mbed_official | 235:685d5f11838f | 972 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 973 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 974 | { |
mbed_official | 235:685d5f11838f | 975 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 976 | { |
mbed_official | 235:685d5f11838f | 977 | /* Change state */ |
mbed_official | 235:685d5f11838f | 978 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 979 | |
mbed_official | 235:685d5f11838f | 980 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 981 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 982 | |
mbed_official | 235:685d5f11838f | 983 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 984 | } |
mbed_official | 235:685d5f11838f | 985 | } |
mbed_official | 235:685d5f11838f | 986 | } |
mbed_official | 235:685d5f11838f | 987 | /* Write the header block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 988 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 989 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 990 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 991 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 992 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 993 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 994 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 995 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 996 | } |
mbed_official | 235:685d5f11838f | 997 | |
mbed_official | 235:685d5f11838f | 998 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 999 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1000 | |
mbed_official | 235:685d5f11838f | 1001 | while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) |
mbed_official | 235:685d5f11838f | 1002 | { |
mbed_official | 235:685d5f11838f | 1003 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1004 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 1005 | { |
mbed_official | 235:685d5f11838f | 1006 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 1007 | { |
mbed_official | 235:685d5f11838f | 1008 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1009 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1010 | |
mbed_official | 235:685d5f11838f | 1011 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1012 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1013 | |
mbed_official | 235:685d5f11838f | 1014 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1015 | } |
mbed_official | 235:685d5f11838f | 1016 | } |
mbed_official | 235:685d5f11838f | 1017 | } |
mbed_official | 235:685d5f11838f | 1018 | } |
mbed_official | 235:685d5f11838f | 1019 | /* Save formatted counter into the scratch buffer pScratch */ |
mbed_official | 235:685d5f11838f | 1020 | for(loopcounter = 0; (loopcounter < 16); loopcounter++) |
mbed_official | 235:685d5f11838f | 1021 | { |
mbed_official | 235:685d5f11838f | 1022 | hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; |
mbed_official | 235:685d5f11838f | 1023 | } |
mbed_official | 235:685d5f11838f | 1024 | /* Reset bit 0 */ |
mbed_official | 235:685d5f11838f | 1025 | hcryp->Init.pScratch[15] &= 0xfe; |
mbed_official | 235:685d5f11838f | 1026 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 1027 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 1028 | |
mbed_official | 235:685d5f11838f | 1029 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 1030 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 1031 | |
mbed_official | 235:685d5f11838f | 1032 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 1033 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1034 | |
mbed_official | 235:685d5f11838f | 1035 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 1036 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 1037 | } |
mbed_official | 235:685d5f11838f | 1038 | |
mbed_official | 235:685d5f11838f | 1039 | /* Write Plain Data and Get Cypher Data */ |
mbed_official | 235:685d5f11838f | 1040 | if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 1041 | { |
mbed_official | 235:685d5f11838f | 1042 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1043 | } |
mbed_official | 235:685d5f11838f | 1044 | |
mbed_official | 235:685d5f11838f | 1045 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1046 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 1047 | |
mbed_official | 235:685d5f11838f | 1048 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1049 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1050 | |
mbed_official | 235:685d5f11838f | 1051 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 1052 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1053 | } |
mbed_official | 235:685d5f11838f | 1054 | |
mbed_official | 235:685d5f11838f | 1055 | /** |
mbed_official | 235:685d5f11838f | 1056 | * @brief Initializes the CRYP peripheral in AES GCM encryption mode using IT. |
mbed_official | 235:685d5f11838f | 1057 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1058 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 1059 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 1060 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 1061 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 1062 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1063 | */ |
mbed_official | 235:685d5f11838f | 1064 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 235:685d5f11838f | 1065 | { |
mbed_official | 235:685d5f11838f | 1066 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 1067 | uint32_t inputaddr; |
mbed_official | 235:685d5f11838f | 1068 | uint32_t outputaddr; |
mbed_official | 235:685d5f11838f | 1069 | |
mbed_official | 235:685d5f11838f | 1070 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 235:685d5f11838f | 1071 | { |
mbed_official | 235:685d5f11838f | 1072 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1073 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1074 | |
mbed_official | 235:685d5f11838f | 1075 | /* Get the buffer addresses and sizes */ |
mbed_official | 235:685d5f11838f | 1076 | hcryp->CrypInCount = Size; |
mbed_official | 235:685d5f11838f | 1077 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 235:685d5f11838f | 1078 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 235:685d5f11838f | 1079 | hcryp->CrypOutCount = Size; |
mbed_official | 235:685d5f11838f | 1080 | |
mbed_official | 235:685d5f11838f | 1081 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1082 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 1083 | |
mbed_official | 235:685d5f11838f | 1084 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 1085 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 1086 | { |
mbed_official | 235:685d5f11838f | 1087 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 1088 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 1089 | |
mbed_official | 235:685d5f11838f | 1090 | /* Set the CRYP peripheral in AES GCM mode */ |
mbed_official | 235:685d5f11838f | 1091 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT); |
mbed_official | 235:685d5f11838f | 1092 | |
mbed_official | 235:685d5f11838f | 1093 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 1094 | CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 1095 | |
mbed_official | 235:685d5f11838f | 1096 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 1097 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 1098 | |
mbed_official | 235:685d5f11838f | 1099 | /* Enable CRYP to start the init phase */ |
mbed_official | 235:685d5f11838f | 1100 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1101 | |
mbed_official | 235:685d5f11838f | 1102 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 1103 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1104 | |
mbed_official | 235:685d5f11838f | 1105 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 1106 | { |
mbed_official | 235:685d5f11838f | 1107 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1108 | |
mbed_official | 235:685d5f11838f | 1109 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 1110 | { |
mbed_official | 235:685d5f11838f | 1111 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1112 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1113 | |
mbed_official | 235:685d5f11838f | 1114 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1115 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1116 | |
mbed_official | 235:685d5f11838f | 1117 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1118 | |
mbed_official | 235:685d5f11838f | 1119 | } |
mbed_official | 235:685d5f11838f | 1120 | } |
mbed_official | 235:685d5f11838f | 1121 | |
mbed_official | 235:685d5f11838f | 1122 | /* Set the header phase */ |
mbed_official | 235:685d5f11838f | 1123 | if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK) |
mbed_official | 235:685d5f11838f | 1124 | { |
mbed_official | 235:685d5f11838f | 1125 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1126 | } |
mbed_official | 235:685d5f11838f | 1127 | /* Disable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 1128 | __HAL_CRYP_DISABLE(); |
mbed_official | 235:685d5f11838f | 1129 | |
mbed_official | 235:685d5f11838f | 1130 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 1131 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 1132 | |
mbed_official | 235:685d5f11838f | 1133 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 1134 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 1135 | |
mbed_official | 235:685d5f11838f | 1136 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 1137 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 1138 | } |
mbed_official | 235:685d5f11838f | 1139 | |
mbed_official | 235:685d5f11838f | 1140 | if(Size != 0) |
mbed_official | 235:685d5f11838f | 1141 | { |
mbed_official | 235:685d5f11838f | 1142 | /* Enable Interrupts */ |
mbed_official | 235:685d5f11838f | 1143 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 235:685d5f11838f | 1144 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 1145 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1146 | } |
mbed_official | 235:685d5f11838f | 1147 | else |
mbed_official | 235:685d5f11838f | 1148 | { |
mbed_official | 235:685d5f11838f | 1149 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1150 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1151 | /* Change the CRYP state and phase */ |
mbed_official | 235:685d5f11838f | 1152 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 1153 | } |
mbed_official | 235:685d5f11838f | 1154 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 1155 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1156 | } |
mbed_official | 235:685d5f11838f | 1157 | else if (__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 235:685d5f11838f | 1158 | { |
mbed_official | 235:685d5f11838f | 1159 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 235:685d5f11838f | 1160 | /* Write the Input block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 1161 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1162 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1163 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1164 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1165 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1166 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1167 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1168 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 235:685d5f11838f | 1169 | hcryp->CrypInCount -= 16; |
mbed_official | 235:685d5f11838f | 1170 | if(hcryp->CrypInCount == 0) |
mbed_official | 235:685d5f11838f | 1171 | { |
mbed_official | 235:685d5f11838f | 1172 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 235:685d5f11838f | 1173 | /* Call the Input data transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1174 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 1175 | } |
mbed_official | 235:685d5f11838f | 1176 | } |
mbed_official | 235:685d5f11838f | 1177 | else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 235:685d5f11838f | 1178 | { |
mbed_official | 235:685d5f11838f | 1179 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 235:685d5f11838f | 1180 | /* Read the Output block from the Output FIFO */ |
mbed_official | 235:685d5f11838f | 1181 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1182 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1183 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1184 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1185 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1186 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1187 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1188 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 235:685d5f11838f | 1189 | hcryp->CrypOutCount -= 16; |
mbed_official | 235:685d5f11838f | 1190 | if(hcryp->CrypOutCount == 0) |
mbed_official | 235:685d5f11838f | 1191 | { |
mbed_official | 235:685d5f11838f | 1192 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 235:685d5f11838f | 1193 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1194 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1195 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1196 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 1197 | /* Call Input transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1198 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 1199 | } |
mbed_official | 235:685d5f11838f | 1200 | } |
mbed_official | 235:685d5f11838f | 1201 | |
mbed_official | 235:685d5f11838f | 1202 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 1203 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1204 | } |
mbed_official | 235:685d5f11838f | 1205 | |
mbed_official | 235:685d5f11838f | 1206 | /** |
mbed_official | 235:685d5f11838f | 1207 | * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt. |
mbed_official | 235:685d5f11838f | 1208 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1209 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 1210 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 1211 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 1212 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 1213 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1214 | */ |
mbed_official | 235:685d5f11838f | 1215 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 235:685d5f11838f | 1216 | { |
mbed_official | 235:685d5f11838f | 1217 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 1218 | uint32_t inputaddr; |
mbed_official | 235:685d5f11838f | 1219 | uint32_t outputaddr; |
mbed_official | 235:685d5f11838f | 1220 | |
mbed_official | 235:685d5f11838f | 1221 | uint32_t headersize = hcryp->Init.HeaderSize; |
mbed_official | 235:685d5f11838f | 1222 | uint32_t headeraddr = (uint32_t)hcryp->Init.Header; |
mbed_official | 235:685d5f11838f | 1223 | uint32_t loopcounter = 0; |
mbed_official | 235:685d5f11838f | 1224 | uint32_t bufferidx = 0; |
mbed_official | 235:685d5f11838f | 1225 | uint8_t blockb0[16] = {0};/* Block B0 */ |
mbed_official | 235:685d5f11838f | 1226 | uint8_t ctr[16] = {0}; /* Counter */ |
mbed_official | 235:685d5f11838f | 1227 | uint32_t b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 1228 | |
mbed_official | 235:685d5f11838f | 1229 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 235:685d5f11838f | 1230 | { |
mbed_official | 235:685d5f11838f | 1231 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1232 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1233 | |
mbed_official | 235:685d5f11838f | 1234 | hcryp->CrypInCount = Size; |
mbed_official | 235:685d5f11838f | 1235 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 235:685d5f11838f | 1236 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 235:685d5f11838f | 1237 | hcryp->CrypOutCount = Size; |
mbed_official | 235:685d5f11838f | 1238 | |
mbed_official | 235:685d5f11838f | 1239 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1240 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 1241 | |
mbed_official | 235:685d5f11838f | 1242 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 1243 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 1244 | { |
mbed_official | 235:685d5f11838f | 1245 | /************************ Formatting the header block *******************/ |
mbed_official | 235:685d5f11838f | 1246 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 1247 | { |
mbed_official | 235:685d5f11838f | 1248 | /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ |
mbed_official | 235:685d5f11838f | 1249 | if(headersize < 65280) |
mbed_official | 235:685d5f11838f | 1250 | { |
mbed_official | 235:685d5f11838f | 1251 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); |
mbed_official | 235:685d5f11838f | 1252 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); |
mbed_official | 235:685d5f11838f | 1253 | headersize += 2; |
mbed_official | 235:685d5f11838f | 1254 | } |
mbed_official | 235:685d5f11838f | 1255 | else |
mbed_official | 235:685d5f11838f | 1256 | { |
mbed_official | 235:685d5f11838f | 1257 | /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ |
mbed_official | 235:685d5f11838f | 1258 | hcryp->Init.pScratch[bufferidx++] = 0xFF; |
mbed_official | 235:685d5f11838f | 1259 | hcryp->Init.pScratch[bufferidx++] = 0xFE; |
mbed_official | 235:685d5f11838f | 1260 | hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; |
mbed_official | 235:685d5f11838f | 1261 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; |
mbed_official | 235:685d5f11838f | 1262 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; |
mbed_official | 235:685d5f11838f | 1263 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; |
mbed_official | 235:685d5f11838f | 1264 | headersize += 6; |
mbed_official | 235:685d5f11838f | 1265 | } |
mbed_official | 235:685d5f11838f | 1266 | /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ |
mbed_official | 235:685d5f11838f | 1267 | for(loopcounter = 0; loopcounter < headersize; loopcounter++) |
mbed_official | 235:685d5f11838f | 1268 | { |
mbed_official | 235:685d5f11838f | 1269 | hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; |
mbed_official | 235:685d5f11838f | 1270 | } |
mbed_official | 235:685d5f11838f | 1271 | /* Check if the header size is modulo 16 */ |
mbed_official | 235:685d5f11838f | 1272 | if ((headersize % 16) != 0) |
mbed_official | 235:685d5f11838f | 1273 | { |
mbed_official | 235:685d5f11838f | 1274 | /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ |
mbed_official | 235:685d5f11838f | 1275 | for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) |
mbed_official | 235:685d5f11838f | 1276 | { |
mbed_official | 235:685d5f11838f | 1277 | hcryp->Init.pScratch[loopcounter] = 0; |
mbed_official | 235:685d5f11838f | 1278 | } |
mbed_official | 235:685d5f11838f | 1279 | /* Set the header size to modulo 16 */ |
mbed_official | 235:685d5f11838f | 1280 | headersize = ((headersize/16) + 1) * 16; |
mbed_official | 235:685d5f11838f | 1281 | } |
mbed_official | 235:685d5f11838f | 1282 | /* Set the pointer headeraddr to hcryp->Init.pScratch */ |
mbed_official | 235:685d5f11838f | 1283 | headeraddr = (uint32_t)hcryp->Init.pScratch; |
mbed_official | 235:685d5f11838f | 1284 | } |
mbed_official | 235:685d5f11838f | 1285 | /*********************** Formatting the block B0 ************************/ |
mbed_official | 235:685d5f11838f | 1286 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 1287 | { |
mbed_official | 235:685d5f11838f | 1288 | blockb0[0] = 0x40; |
mbed_official | 235:685d5f11838f | 1289 | } |
mbed_official | 235:685d5f11838f | 1290 | /* Flags byte */ |
mbed_official | 235:685d5f11838f | 1291 | /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ |
mbed_official | 235:685d5f11838f | 1292 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); |
mbed_official | 235:685d5f11838f | 1293 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); |
mbed_official | 235:685d5f11838f | 1294 | |
mbed_official | 235:685d5f11838f | 1295 | for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) |
mbed_official | 235:685d5f11838f | 1296 | { |
mbed_official | 235:685d5f11838f | 1297 | blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; |
mbed_official | 235:685d5f11838f | 1298 | } |
mbed_official | 235:685d5f11838f | 1299 | for ( ; loopcounter < 13; loopcounter++) |
mbed_official | 235:685d5f11838f | 1300 | { |
mbed_official | 235:685d5f11838f | 1301 | blockb0[loopcounter+1] = 0; |
mbed_official | 235:685d5f11838f | 1302 | } |
mbed_official | 235:685d5f11838f | 1303 | |
mbed_official | 235:685d5f11838f | 1304 | blockb0[14] = (Size >> 8); |
mbed_official | 235:685d5f11838f | 1305 | blockb0[15] = (Size & 0xFF); |
mbed_official | 235:685d5f11838f | 1306 | |
mbed_official | 235:685d5f11838f | 1307 | /************************* Formatting the initial counter ***************/ |
mbed_official | 235:685d5f11838f | 1308 | /* Byte 0: |
mbed_official | 235:685d5f11838f | 1309 | Bits 7 and 6 are reserved and shall be set to 0 |
mbed_official | 235:685d5f11838f | 1310 | Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter |
mbed_official | 235:685d5f11838f | 1311 | blocks are distinct from B0 |
mbed_official | 235:685d5f11838f | 1312 | Bits 0, 1, and 2 contain the same encoding of q as in B0 |
mbed_official | 235:685d5f11838f | 1313 | */ |
mbed_official | 235:685d5f11838f | 1314 | ctr[0] = blockb0[0] & 0x07; |
mbed_official | 235:685d5f11838f | 1315 | /* byte 1 to NonceSize is the IV (Nonce) */ |
mbed_official | 235:685d5f11838f | 1316 | for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) |
mbed_official | 235:685d5f11838f | 1317 | { |
mbed_official | 235:685d5f11838f | 1318 | ctr[loopcounter] = blockb0[loopcounter]; |
mbed_official | 235:685d5f11838f | 1319 | } |
mbed_official | 235:685d5f11838f | 1320 | /* Set the LSB to 1 */ |
mbed_official | 235:685d5f11838f | 1321 | ctr[15] |= 0x01; |
mbed_official | 235:685d5f11838f | 1322 | |
mbed_official | 235:685d5f11838f | 1323 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 1324 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 1325 | |
mbed_official | 235:685d5f11838f | 1326 | /* Set the CRYP peripheral in AES CCM mode */ |
mbed_official | 235:685d5f11838f | 1327 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT); |
mbed_official | 235:685d5f11838f | 1328 | |
mbed_official | 235:685d5f11838f | 1329 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 1330 | CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 1331 | |
mbed_official | 235:685d5f11838f | 1332 | /* Select init phase */ |
mbed_official | 235:685d5f11838f | 1333 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT); |
mbed_official | 235:685d5f11838f | 1334 | |
mbed_official | 235:685d5f11838f | 1335 | b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 1336 | /* Write the blockb0 block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 1337 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 1338 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 1339 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 1340 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 1341 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 1342 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 1343 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 1344 | |
mbed_official | 235:685d5f11838f | 1345 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 1346 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1347 | |
mbed_official | 235:685d5f11838f | 1348 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 1349 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1350 | |
mbed_official | 235:685d5f11838f | 1351 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 1352 | { |
mbed_official | 235:685d5f11838f | 1353 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1354 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 1355 | { |
mbed_official | 235:685d5f11838f | 1356 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1357 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1358 | |
mbed_official | 235:685d5f11838f | 1359 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1360 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1361 | |
mbed_official | 235:685d5f11838f | 1362 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1363 | } |
mbed_official | 235:685d5f11838f | 1364 | } |
mbed_official | 235:685d5f11838f | 1365 | /***************************** Header phase *****************************/ |
mbed_official | 235:685d5f11838f | 1366 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 1367 | { |
mbed_official | 235:685d5f11838f | 1368 | /* Select header phase */ |
mbed_official | 235:685d5f11838f | 1369 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER); |
mbed_official | 235:685d5f11838f | 1370 | |
mbed_official | 235:685d5f11838f | 1371 | /* Enable Crypto processor */ |
mbed_official | 235:685d5f11838f | 1372 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1373 | |
mbed_official | 235:685d5f11838f | 1374 | for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) |
mbed_official | 235:685d5f11838f | 1375 | { |
mbed_official | 235:685d5f11838f | 1376 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 1377 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1378 | |
mbed_official | 235:685d5f11838f | 1379 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM)) |
mbed_official | 235:685d5f11838f | 1380 | { |
mbed_official | 235:685d5f11838f | 1381 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1382 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 1383 | { |
mbed_official | 235:685d5f11838f | 1384 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1385 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1386 | |
mbed_official | 235:685d5f11838f | 1387 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1388 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1389 | |
mbed_official | 235:685d5f11838f | 1390 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1391 | } |
mbed_official | 235:685d5f11838f | 1392 | } |
mbed_official | 235:685d5f11838f | 1393 | /* Write the header block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 1394 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 1395 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 1396 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 1397 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 1398 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 1399 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 1400 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 1401 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 1402 | } |
mbed_official | 235:685d5f11838f | 1403 | |
mbed_official | 235:685d5f11838f | 1404 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 1405 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1406 | |
mbed_official | 235:685d5f11838f | 1407 | while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) |
mbed_official | 235:685d5f11838f | 1408 | { |
mbed_official | 235:685d5f11838f | 1409 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1410 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 1411 | { |
mbed_official | 235:685d5f11838f | 1412 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1413 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1414 | |
mbed_official | 235:685d5f11838f | 1415 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1416 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1417 | |
mbed_official | 235:685d5f11838f | 1418 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1419 | } |
mbed_official | 235:685d5f11838f | 1420 | } |
mbed_official | 235:685d5f11838f | 1421 | } |
mbed_official | 235:685d5f11838f | 1422 | /* Save formatted counter into the scratch buffer pScratch */ |
mbed_official | 235:685d5f11838f | 1423 | for(loopcounter = 0; (loopcounter < 16); loopcounter++) |
mbed_official | 235:685d5f11838f | 1424 | { |
mbed_official | 235:685d5f11838f | 1425 | hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; |
mbed_official | 235:685d5f11838f | 1426 | } |
mbed_official | 235:685d5f11838f | 1427 | /* Reset bit 0 */ |
mbed_official | 235:685d5f11838f | 1428 | hcryp->Init.pScratch[15] &= 0xfe; |
mbed_official | 235:685d5f11838f | 1429 | |
mbed_official | 235:685d5f11838f | 1430 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 1431 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 1432 | |
mbed_official | 235:685d5f11838f | 1433 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 1434 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 1435 | |
mbed_official | 235:685d5f11838f | 1436 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 1437 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 1438 | } |
mbed_official | 235:685d5f11838f | 1439 | |
mbed_official | 235:685d5f11838f | 1440 | if(Size != 0) |
mbed_official | 235:685d5f11838f | 1441 | { |
mbed_official | 235:685d5f11838f | 1442 | /* Enable Interrupts */ |
mbed_official | 235:685d5f11838f | 1443 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 235:685d5f11838f | 1444 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 1445 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1446 | } |
mbed_official | 235:685d5f11838f | 1447 | else |
mbed_official | 235:685d5f11838f | 1448 | { |
mbed_official | 235:685d5f11838f | 1449 | /* Change the CRYP state and phase */ |
mbed_official | 235:685d5f11838f | 1450 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 1451 | } |
mbed_official | 235:685d5f11838f | 1452 | |
mbed_official | 235:685d5f11838f | 1453 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 1454 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1455 | } |
mbed_official | 235:685d5f11838f | 1456 | else if (__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 235:685d5f11838f | 1457 | { |
mbed_official | 235:685d5f11838f | 1458 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 235:685d5f11838f | 1459 | /* Write the Input block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 1460 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1461 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1462 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1463 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1464 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1465 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1466 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1467 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 235:685d5f11838f | 1468 | hcryp->CrypInCount -= 16; |
mbed_official | 235:685d5f11838f | 1469 | if(hcryp->CrypInCount == 0) |
mbed_official | 235:685d5f11838f | 1470 | { |
mbed_official | 235:685d5f11838f | 1471 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 235:685d5f11838f | 1472 | /* Call Input transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1473 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 1474 | } |
mbed_official | 235:685d5f11838f | 1475 | } |
mbed_official | 235:685d5f11838f | 1476 | else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 235:685d5f11838f | 1477 | { |
mbed_official | 235:685d5f11838f | 1478 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 235:685d5f11838f | 1479 | /* Read the Output block from the Output FIFO */ |
mbed_official | 235:685d5f11838f | 1480 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1481 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1482 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1483 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1484 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1485 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1486 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1487 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 235:685d5f11838f | 1488 | hcryp->CrypOutCount -= 16; |
mbed_official | 235:685d5f11838f | 1489 | if(hcryp->CrypOutCount == 0) |
mbed_official | 235:685d5f11838f | 1490 | { |
mbed_official | 235:685d5f11838f | 1491 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 235:685d5f11838f | 1492 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1493 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1494 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1495 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 1496 | /* Call Input transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1497 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 1498 | } |
mbed_official | 235:685d5f11838f | 1499 | } |
mbed_official | 235:685d5f11838f | 1500 | |
mbed_official | 235:685d5f11838f | 1501 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 1502 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1503 | } |
mbed_official | 235:685d5f11838f | 1504 | |
mbed_official | 235:685d5f11838f | 1505 | /** |
mbed_official | 235:685d5f11838f | 1506 | * @brief Initializes the CRYP peripheral in AES GCM decryption mode using IT. |
mbed_official | 235:685d5f11838f | 1507 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1508 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 1509 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 1510 | * @param Size: Length of the cyphertext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 1511 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 1512 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1513 | */ |
mbed_official | 235:685d5f11838f | 1514 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 235:685d5f11838f | 1515 | { |
mbed_official | 235:685d5f11838f | 1516 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 1517 | uint32_t inputaddr; |
mbed_official | 235:685d5f11838f | 1518 | uint32_t outputaddr; |
mbed_official | 235:685d5f11838f | 1519 | |
mbed_official | 235:685d5f11838f | 1520 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 235:685d5f11838f | 1521 | { |
mbed_official | 235:685d5f11838f | 1522 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1523 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1524 | |
mbed_official | 235:685d5f11838f | 1525 | /* Get the buffer addresses and sizes */ |
mbed_official | 235:685d5f11838f | 1526 | hcryp->CrypInCount = Size; |
mbed_official | 235:685d5f11838f | 1527 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 235:685d5f11838f | 1528 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 235:685d5f11838f | 1529 | hcryp->CrypOutCount = Size; |
mbed_official | 235:685d5f11838f | 1530 | |
mbed_official | 235:685d5f11838f | 1531 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1532 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 1533 | |
mbed_official | 235:685d5f11838f | 1534 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 1535 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 1536 | { |
mbed_official | 235:685d5f11838f | 1537 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 1538 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 1539 | |
mbed_official | 235:685d5f11838f | 1540 | /* Set the CRYP peripheral in AES GCM decryption mode */ |
mbed_official | 235:685d5f11838f | 1541 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_DECRYPT); |
mbed_official | 235:685d5f11838f | 1542 | |
mbed_official | 235:685d5f11838f | 1543 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 1544 | CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 1545 | |
mbed_official | 235:685d5f11838f | 1546 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 1547 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 1548 | |
mbed_official | 235:685d5f11838f | 1549 | /* Enable CRYP to start the init phase */ |
mbed_official | 235:685d5f11838f | 1550 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1551 | |
mbed_official | 235:685d5f11838f | 1552 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 1553 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1554 | |
mbed_official | 235:685d5f11838f | 1555 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 1556 | { |
mbed_official | 235:685d5f11838f | 1557 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1558 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 1559 | { |
mbed_official | 235:685d5f11838f | 1560 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1561 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1562 | |
mbed_official | 235:685d5f11838f | 1563 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1564 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1565 | |
mbed_official | 235:685d5f11838f | 1566 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1567 | } |
mbed_official | 235:685d5f11838f | 1568 | } |
mbed_official | 235:685d5f11838f | 1569 | |
mbed_official | 235:685d5f11838f | 1570 | /* Set the header phase */ |
mbed_official | 235:685d5f11838f | 1571 | if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK) |
mbed_official | 235:685d5f11838f | 1572 | { |
mbed_official | 235:685d5f11838f | 1573 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1574 | } |
mbed_official | 235:685d5f11838f | 1575 | /* Disable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 1576 | __HAL_CRYP_DISABLE(); |
mbed_official | 235:685d5f11838f | 1577 | |
mbed_official | 235:685d5f11838f | 1578 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 1579 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 1580 | |
mbed_official | 235:685d5f11838f | 1581 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 1582 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 1583 | } |
mbed_official | 235:685d5f11838f | 1584 | |
mbed_official | 235:685d5f11838f | 1585 | if(Size != 0) |
mbed_official | 235:685d5f11838f | 1586 | { |
mbed_official | 235:685d5f11838f | 1587 | /* Enable Interrupts */ |
mbed_official | 235:685d5f11838f | 1588 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 235:685d5f11838f | 1589 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 1590 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1591 | } |
mbed_official | 235:685d5f11838f | 1592 | else |
mbed_official | 235:685d5f11838f | 1593 | { |
mbed_official | 235:685d5f11838f | 1594 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1595 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1596 | /* Change the CRYP state and phase */ |
mbed_official | 235:685d5f11838f | 1597 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 1598 | } |
mbed_official | 235:685d5f11838f | 1599 | |
mbed_official | 235:685d5f11838f | 1600 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 1601 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1602 | } |
mbed_official | 235:685d5f11838f | 1603 | else if (__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 235:685d5f11838f | 1604 | { |
mbed_official | 235:685d5f11838f | 1605 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 235:685d5f11838f | 1606 | /* Write the Input block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 1607 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1608 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1609 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1610 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1611 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1612 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1613 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1614 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 235:685d5f11838f | 1615 | hcryp->CrypInCount -= 16; |
mbed_official | 235:685d5f11838f | 1616 | if(hcryp->CrypInCount == 0) |
mbed_official | 235:685d5f11838f | 1617 | { |
mbed_official | 235:685d5f11838f | 1618 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 235:685d5f11838f | 1619 | /* Call the Input data transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1620 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 1621 | } |
mbed_official | 235:685d5f11838f | 1622 | } |
mbed_official | 235:685d5f11838f | 1623 | else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 235:685d5f11838f | 1624 | { |
mbed_official | 235:685d5f11838f | 1625 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 235:685d5f11838f | 1626 | /* Read the Output block from the Output FIFO */ |
mbed_official | 235:685d5f11838f | 1627 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1628 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1629 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1630 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1631 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1632 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1633 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1634 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 235:685d5f11838f | 1635 | hcryp->CrypOutCount -= 16; |
mbed_official | 235:685d5f11838f | 1636 | if(hcryp->CrypOutCount == 0) |
mbed_official | 235:685d5f11838f | 1637 | { |
mbed_official | 235:685d5f11838f | 1638 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 235:685d5f11838f | 1639 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1640 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1641 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1642 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 1643 | /* Call Input transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1644 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 1645 | } |
mbed_official | 235:685d5f11838f | 1646 | } |
mbed_official | 235:685d5f11838f | 1647 | |
mbed_official | 235:685d5f11838f | 1648 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 1649 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1650 | } |
mbed_official | 235:685d5f11838f | 1651 | |
mbed_official | 235:685d5f11838f | 1652 | /** |
mbed_official | 235:685d5f11838f | 1653 | * @brief Initializes the CRYP peripheral in AES CCM decryption mode using interrupt |
mbed_official | 235:685d5f11838f | 1654 | * then decrypted pCypherData. The cypher data are available in pPlainData. |
mbed_official | 235:685d5f11838f | 1655 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1656 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 1657 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 1658 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 1659 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 1660 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1661 | */ |
mbed_official | 235:685d5f11838f | 1662 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 235:685d5f11838f | 1663 | { |
mbed_official | 235:685d5f11838f | 1664 | uint32_t inputaddr; |
mbed_official | 235:685d5f11838f | 1665 | uint32_t outputaddr; |
mbed_official | 235:685d5f11838f | 1666 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 1667 | uint32_t headersize = hcryp->Init.HeaderSize; |
mbed_official | 235:685d5f11838f | 1668 | uint32_t headeraddr = (uint32_t)hcryp->Init.Header; |
mbed_official | 235:685d5f11838f | 1669 | uint32_t loopcounter = 0; |
mbed_official | 235:685d5f11838f | 1670 | uint32_t bufferidx = 0; |
mbed_official | 235:685d5f11838f | 1671 | uint8_t blockb0[16] = {0};/* Block B0 */ |
mbed_official | 235:685d5f11838f | 1672 | uint8_t ctr[16] = {0}; /* Counter */ |
mbed_official | 235:685d5f11838f | 1673 | uint32_t b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 1674 | |
mbed_official | 235:685d5f11838f | 1675 | if(hcryp->State == HAL_CRYP_STATE_READY) |
mbed_official | 235:685d5f11838f | 1676 | { |
mbed_official | 235:685d5f11838f | 1677 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1678 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1679 | |
mbed_official | 235:685d5f11838f | 1680 | hcryp->CrypInCount = Size; |
mbed_official | 235:685d5f11838f | 1681 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 235:685d5f11838f | 1682 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 235:685d5f11838f | 1683 | hcryp->CrypOutCount = Size; |
mbed_official | 235:685d5f11838f | 1684 | |
mbed_official | 235:685d5f11838f | 1685 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1686 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 1687 | |
mbed_official | 235:685d5f11838f | 1688 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 1689 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 1690 | { |
mbed_official | 235:685d5f11838f | 1691 | /************************ Formatting the header block *******************/ |
mbed_official | 235:685d5f11838f | 1692 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 1693 | { |
mbed_official | 235:685d5f11838f | 1694 | /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ |
mbed_official | 235:685d5f11838f | 1695 | if(headersize < 65280) |
mbed_official | 235:685d5f11838f | 1696 | { |
mbed_official | 235:685d5f11838f | 1697 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); |
mbed_official | 235:685d5f11838f | 1698 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); |
mbed_official | 235:685d5f11838f | 1699 | headersize += 2; |
mbed_official | 235:685d5f11838f | 1700 | } |
mbed_official | 235:685d5f11838f | 1701 | else |
mbed_official | 235:685d5f11838f | 1702 | { |
mbed_official | 235:685d5f11838f | 1703 | /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ |
mbed_official | 235:685d5f11838f | 1704 | hcryp->Init.pScratch[bufferidx++] = 0xFF; |
mbed_official | 235:685d5f11838f | 1705 | hcryp->Init.pScratch[bufferidx++] = 0xFE; |
mbed_official | 235:685d5f11838f | 1706 | hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; |
mbed_official | 235:685d5f11838f | 1707 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; |
mbed_official | 235:685d5f11838f | 1708 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; |
mbed_official | 235:685d5f11838f | 1709 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; |
mbed_official | 235:685d5f11838f | 1710 | headersize += 6; |
mbed_official | 235:685d5f11838f | 1711 | } |
mbed_official | 235:685d5f11838f | 1712 | /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ |
mbed_official | 235:685d5f11838f | 1713 | for(loopcounter = 0; loopcounter < headersize; loopcounter++) |
mbed_official | 235:685d5f11838f | 1714 | { |
mbed_official | 235:685d5f11838f | 1715 | hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; |
mbed_official | 235:685d5f11838f | 1716 | } |
mbed_official | 235:685d5f11838f | 1717 | /* Check if the header size is modulo 16 */ |
mbed_official | 235:685d5f11838f | 1718 | if ((headersize % 16) != 0) |
mbed_official | 235:685d5f11838f | 1719 | { |
mbed_official | 235:685d5f11838f | 1720 | /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ |
mbed_official | 235:685d5f11838f | 1721 | for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) |
mbed_official | 235:685d5f11838f | 1722 | { |
mbed_official | 235:685d5f11838f | 1723 | hcryp->Init.pScratch[loopcounter] = 0; |
mbed_official | 235:685d5f11838f | 1724 | } |
mbed_official | 235:685d5f11838f | 1725 | /* Set the header size to modulo 16 */ |
mbed_official | 235:685d5f11838f | 1726 | headersize = ((headersize/16) + 1) * 16; |
mbed_official | 235:685d5f11838f | 1727 | } |
mbed_official | 235:685d5f11838f | 1728 | /* Set the pointer headeraddr to hcryp->Init.pScratch */ |
mbed_official | 235:685d5f11838f | 1729 | headeraddr = (uint32_t)hcryp->Init.pScratch; |
mbed_official | 235:685d5f11838f | 1730 | } |
mbed_official | 235:685d5f11838f | 1731 | /*********************** Formatting the block B0 ************************/ |
mbed_official | 235:685d5f11838f | 1732 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 1733 | { |
mbed_official | 235:685d5f11838f | 1734 | blockb0[0] = 0x40; |
mbed_official | 235:685d5f11838f | 1735 | } |
mbed_official | 235:685d5f11838f | 1736 | /* Flags byte */ |
mbed_official | 235:685d5f11838f | 1737 | /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ |
mbed_official | 235:685d5f11838f | 1738 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); |
mbed_official | 235:685d5f11838f | 1739 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); |
mbed_official | 235:685d5f11838f | 1740 | |
mbed_official | 235:685d5f11838f | 1741 | for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) |
mbed_official | 235:685d5f11838f | 1742 | { |
mbed_official | 235:685d5f11838f | 1743 | blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; |
mbed_official | 235:685d5f11838f | 1744 | } |
mbed_official | 235:685d5f11838f | 1745 | for ( ; loopcounter < 13; loopcounter++) |
mbed_official | 235:685d5f11838f | 1746 | { |
mbed_official | 235:685d5f11838f | 1747 | blockb0[loopcounter+1] = 0; |
mbed_official | 235:685d5f11838f | 1748 | } |
mbed_official | 235:685d5f11838f | 1749 | |
mbed_official | 235:685d5f11838f | 1750 | blockb0[14] = (Size >> 8); |
mbed_official | 235:685d5f11838f | 1751 | blockb0[15] = (Size & 0xFF); |
mbed_official | 235:685d5f11838f | 1752 | |
mbed_official | 235:685d5f11838f | 1753 | /************************* Formatting the initial counter ***************/ |
mbed_official | 235:685d5f11838f | 1754 | /* Byte 0: |
mbed_official | 235:685d5f11838f | 1755 | Bits 7 and 6 are reserved and shall be set to 0 |
mbed_official | 235:685d5f11838f | 1756 | Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter |
mbed_official | 235:685d5f11838f | 1757 | blocks are distinct from B0 |
mbed_official | 235:685d5f11838f | 1758 | Bits 0, 1, and 2 contain the same encoding of q as in B0 |
mbed_official | 235:685d5f11838f | 1759 | */ |
mbed_official | 235:685d5f11838f | 1760 | ctr[0] = blockb0[0] & 0x07; |
mbed_official | 235:685d5f11838f | 1761 | /* byte 1 to NonceSize is the IV (Nonce) */ |
mbed_official | 235:685d5f11838f | 1762 | for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) |
mbed_official | 235:685d5f11838f | 1763 | { |
mbed_official | 235:685d5f11838f | 1764 | ctr[loopcounter] = blockb0[loopcounter]; |
mbed_official | 235:685d5f11838f | 1765 | } |
mbed_official | 235:685d5f11838f | 1766 | /* Set the LSB to 1 */ |
mbed_official | 235:685d5f11838f | 1767 | ctr[15] |= 0x01; |
mbed_official | 235:685d5f11838f | 1768 | |
mbed_official | 235:685d5f11838f | 1769 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 1770 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 1771 | |
mbed_official | 235:685d5f11838f | 1772 | /* Set the CRYP peripheral in AES CCM mode */ |
mbed_official | 235:685d5f11838f | 1773 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_DECRYPT); |
mbed_official | 235:685d5f11838f | 1774 | |
mbed_official | 235:685d5f11838f | 1775 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 1776 | CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 1777 | |
mbed_official | 235:685d5f11838f | 1778 | /* Select init phase */ |
mbed_official | 235:685d5f11838f | 1779 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT); |
mbed_official | 235:685d5f11838f | 1780 | |
mbed_official | 235:685d5f11838f | 1781 | b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 1782 | /* Write the blockb0 block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 1783 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 1784 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 1785 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 1786 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 1787 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 1788 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 1789 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 1790 | |
mbed_official | 235:685d5f11838f | 1791 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 1792 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1793 | |
mbed_official | 235:685d5f11838f | 1794 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 1795 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1796 | |
mbed_official | 235:685d5f11838f | 1797 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 1798 | { |
mbed_official | 235:685d5f11838f | 1799 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1800 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 1801 | { |
mbed_official | 235:685d5f11838f | 1802 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1803 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1804 | |
mbed_official | 235:685d5f11838f | 1805 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1806 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1807 | |
mbed_official | 235:685d5f11838f | 1808 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1809 | } |
mbed_official | 235:685d5f11838f | 1810 | } |
mbed_official | 235:685d5f11838f | 1811 | /***************************** Header phase *****************************/ |
mbed_official | 235:685d5f11838f | 1812 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 1813 | { |
mbed_official | 235:685d5f11838f | 1814 | /* Select header phase */ |
mbed_official | 235:685d5f11838f | 1815 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER); |
mbed_official | 235:685d5f11838f | 1816 | |
mbed_official | 235:685d5f11838f | 1817 | /* Enable Crypto processor */ |
mbed_official | 235:685d5f11838f | 1818 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1819 | |
mbed_official | 235:685d5f11838f | 1820 | for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) |
mbed_official | 235:685d5f11838f | 1821 | { |
mbed_official | 235:685d5f11838f | 1822 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 1823 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1824 | |
mbed_official | 235:685d5f11838f | 1825 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM)) |
mbed_official | 235:685d5f11838f | 1826 | { |
mbed_official | 235:685d5f11838f | 1827 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1828 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 1829 | { |
mbed_official | 235:685d5f11838f | 1830 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1831 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1832 | |
mbed_official | 235:685d5f11838f | 1833 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1834 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1835 | |
mbed_official | 235:685d5f11838f | 1836 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1837 | } |
mbed_official | 235:685d5f11838f | 1838 | } |
mbed_official | 235:685d5f11838f | 1839 | /* Write the header block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 1840 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 1841 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 1842 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 1843 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 1844 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 1845 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 1846 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 1847 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 1848 | } |
mbed_official | 235:685d5f11838f | 1849 | |
mbed_official | 235:685d5f11838f | 1850 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 1851 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1852 | |
mbed_official | 235:685d5f11838f | 1853 | while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) |
mbed_official | 235:685d5f11838f | 1854 | { |
mbed_official | 235:685d5f11838f | 1855 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1856 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 1857 | { |
mbed_official | 235:685d5f11838f | 1858 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1859 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1860 | |
mbed_official | 235:685d5f11838f | 1861 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1862 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1863 | |
mbed_official | 235:685d5f11838f | 1864 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1865 | } |
mbed_official | 235:685d5f11838f | 1866 | } |
mbed_official | 235:685d5f11838f | 1867 | } |
mbed_official | 235:685d5f11838f | 1868 | /* Save formatted counter into the scratch buffer pScratch */ |
mbed_official | 235:685d5f11838f | 1869 | for(loopcounter = 0; (loopcounter < 16); loopcounter++) |
mbed_official | 235:685d5f11838f | 1870 | { |
mbed_official | 235:685d5f11838f | 1871 | hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; |
mbed_official | 235:685d5f11838f | 1872 | } |
mbed_official | 235:685d5f11838f | 1873 | /* Reset bit 0 */ |
mbed_official | 235:685d5f11838f | 1874 | hcryp->Init.pScratch[15] &= 0xfe; |
mbed_official | 235:685d5f11838f | 1875 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 1876 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 1877 | |
mbed_official | 235:685d5f11838f | 1878 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 1879 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 1880 | |
mbed_official | 235:685d5f11838f | 1881 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 1882 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 1883 | } |
mbed_official | 235:685d5f11838f | 1884 | |
mbed_official | 235:685d5f11838f | 1885 | /* Enable Interrupts */ |
mbed_official | 235:685d5f11838f | 1886 | __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI); |
mbed_official | 235:685d5f11838f | 1887 | |
mbed_official | 235:685d5f11838f | 1888 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 1889 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1890 | |
mbed_official | 235:685d5f11838f | 1891 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 1892 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1893 | } |
mbed_official | 235:685d5f11838f | 1894 | else if (__HAL_CRYP_GET_IT(CRYP_IT_INI)) |
mbed_official | 235:685d5f11838f | 1895 | { |
mbed_official | 235:685d5f11838f | 1896 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
mbed_official | 235:685d5f11838f | 1897 | /* Write the Input block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 1898 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1899 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1900 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1901 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1902 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1903 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 1904 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 1905 | hcryp->pCrypInBuffPtr += 16; |
mbed_official | 235:685d5f11838f | 1906 | hcryp->CrypInCount -= 16; |
mbed_official | 235:685d5f11838f | 1907 | if(hcryp->CrypInCount == 0) |
mbed_official | 235:685d5f11838f | 1908 | { |
mbed_official | 235:685d5f11838f | 1909 | __HAL_CRYP_DISABLE_IT(CRYP_IT_INI); |
mbed_official | 235:685d5f11838f | 1910 | /* Call the Input data transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1911 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 1912 | } |
mbed_official | 235:685d5f11838f | 1913 | } |
mbed_official | 235:685d5f11838f | 1914 | else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI)) |
mbed_official | 235:685d5f11838f | 1915 | { |
mbed_official | 235:685d5f11838f | 1916 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
mbed_official | 235:685d5f11838f | 1917 | /* Read the Output block from the Output FIFO */ |
mbed_official | 235:685d5f11838f | 1918 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1919 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1920 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1921 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1922 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1923 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 1924 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 1925 | hcryp->pCrypOutBuffPtr += 16; |
mbed_official | 235:685d5f11838f | 1926 | hcryp->CrypOutCount -= 16; |
mbed_official | 235:685d5f11838f | 1927 | if(hcryp->CrypOutCount == 0) |
mbed_official | 235:685d5f11838f | 1928 | { |
mbed_official | 235:685d5f11838f | 1929 | __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI); |
mbed_official | 235:685d5f11838f | 1930 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1931 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1932 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1933 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 1934 | /* Call Input transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1935 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 1936 | } |
mbed_official | 235:685d5f11838f | 1937 | } |
mbed_official | 235:685d5f11838f | 1938 | |
mbed_official | 235:685d5f11838f | 1939 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 1940 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1941 | } |
mbed_official | 235:685d5f11838f | 1942 | |
mbed_official | 235:685d5f11838f | 1943 | /** |
mbed_official | 235:685d5f11838f | 1944 | * @brief Initializes the CRYP peripheral in AES GCM encryption mode using DMA. |
mbed_official | 235:685d5f11838f | 1945 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1946 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 1947 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 1948 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 1949 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 1950 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1951 | */ |
mbed_official | 235:685d5f11838f | 1952 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 235:685d5f11838f | 1953 | { |
mbed_official | 235:685d5f11838f | 1954 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 1955 | uint32_t inputaddr; |
mbed_official | 235:685d5f11838f | 1956 | uint32_t outputaddr; |
mbed_official | 235:685d5f11838f | 1957 | |
mbed_official | 235:685d5f11838f | 1958 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 235:685d5f11838f | 1959 | { |
mbed_official | 235:685d5f11838f | 1960 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1961 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 1962 | |
mbed_official | 235:685d5f11838f | 1963 | inputaddr = (uint32_t)pPlainData; |
mbed_official | 235:685d5f11838f | 1964 | outputaddr = (uint32_t)pCypherData; |
mbed_official | 235:685d5f11838f | 1965 | |
mbed_official | 235:685d5f11838f | 1966 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 1967 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 1968 | |
mbed_official | 235:685d5f11838f | 1969 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 1970 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 1971 | { |
mbed_official | 235:685d5f11838f | 1972 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 1973 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 1974 | |
mbed_official | 235:685d5f11838f | 1975 | /* Set the CRYP peripheral in AES GCM mode */ |
mbed_official | 235:685d5f11838f | 1976 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT); |
mbed_official | 235:685d5f11838f | 1977 | |
mbed_official | 235:685d5f11838f | 1978 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 1979 | CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 1980 | |
mbed_official | 235:685d5f11838f | 1981 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 1982 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 1983 | |
mbed_official | 235:685d5f11838f | 1984 | /* Enable CRYP to start the init phase */ |
mbed_official | 235:685d5f11838f | 1985 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 1986 | |
mbed_official | 235:685d5f11838f | 1987 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 1988 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 1989 | |
mbed_official | 235:685d5f11838f | 1990 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 1991 | { |
mbed_official | 235:685d5f11838f | 1992 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 1993 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 1994 | { |
mbed_official | 235:685d5f11838f | 1995 | /* Change state */ |
mbed_official | 235:685d5f11838f | 1996 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 1997 | |
mbed_official | 235:685d5f11838f | 1998 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1999 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2000 | |
mbed_official | 235:685d5f11838f | 2001 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2002 | } |
mbed_official | 235:685d5f11838f | 2003 | } |
mbed_official | 235:685d5f11838f | 2004 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 2005 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 2006 | |
mbed_official | 235:685d5f11838f | 2007 | /* Set the header phase */ |
mbed_official | 235:685d5f11838f | 2008 | if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK) |
mbed_official | 235:685d5f11838f | 2009 | { |
mbed_official | 235:685d5f11838f | 2010 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2011 | } |
mbed_official | 235:685d5f11838f | 2012 | /* Disable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 2013 | __HAL_CRYP_DISABLE(); |
mbed_official | 235:685d5f11838f | 2014 | |
mbed_official | 235:685d5f11838f | 2015 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 2016 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 2017 | |
mbed_official | 235:685d5f11838f | 2018 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 2019 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 2020 | |
mbed_official | 235:685d5f11838f | 2021 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 2022 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 2023 | } |
mbed_official | 235:685d5f11838f | 2024 | |
mbed_official | 235:685d5f11838f | 2025 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 235:685d5f11838f | 2026 | CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 235:685d5f11838f | 2027 | |
mbed_official | 235:685d5f11838f | 2028 | /* Unlock process */ |
mbed_official | 235:685d5f11838f | 2029 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2030 | |
mbed_official | 235:685d5f11838f | 2031 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 2032 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 2033 | } |
mbed_official | 235:685d5f11838f | 2034 | else |
mbed_official | 235:685d5f11838f | 2035 | { |
mbed_official | 235:685d5f11838f | 2036 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 2037 | } |
mbed_official | 235:685d5f11838f | 2038 | } |
mbed_official | 235:685d5f11838f | 2039 | |
mbed_official | 235:685d5f11838f | 2040 | /** |
mbed_official | 235:685d5f11838f | 2041 | * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt. |
mbed_official | 235:685d5f11838f | 2042 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2043 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 2044 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 2045 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 2046 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 2047 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 2048 | */ |
mbed_official | 235:685d5f11838f | 2049 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
mbed_official | 235:685d5f11838f | 2050 | { |
mbed_official | 235:685d5f11838f | 2051 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 2052 | uint32_t inputaddr; |
mbed_official | 235:685d5f11838f | 2053 | uint32_t outputaddr; |
mbed_official | 235:685d5f11838f | 2054 | uint32_t headersize; |
mbed_official | 235:685d5f11838f | 2055 | uint32_t headeraddr; |
mbed_official | 235:685d5f11838f | 2056 | uint32_t loopcounter = 0; |
mbed_official | 235:685d5f11838f | 2057 | uint32_t bufferidx = 0; |
mbed_official | 235:685d5f11838f | 2058 | uint8_t blockb0[16] = {0};/* Block B0 */ |
mbed_official | 235:685d5f11838f | 2059 | uint8_t ctr[16] = {0}; /* Counter */ |
mbed_official | 235:685d5f11838f | 2060 | uint32_t b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 2061 | |
mbed_official | 235:685d5f11838f | 2062 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 235:685d5f11838f | 2063 | { |
mbed_official | 235:685d5f11838f | 2064 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 2065 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2066 | |
mbed_official | 235:685d5f11838f | 2067 | inputaddr = (uint32_t)pPlainData; |
mbed_official | 235:685d5f11838f | 2068 | outputaddr = (uint32_t)pCypherData; |
mbed_official | 235:685d5f11838f | 2069 | |
mbed_official | 235:685d5f11838f | 2070 | headersize = hcryp->Init.HeaderSize; |
mbed_official | 235:685d5f11838f | 2071 | headeraddr = (uint32_t)hcryp->Init.Header; |
mbed_official | 235:685d5f11838f | 2072 | |
mbed_official | 235:685d5f11838f | 2073 | hcryp->CrypInCount = Size; |
mbed_official | 235:685d5f11838f | 2074 | hcryp->pCrypInBuffPtr = pPlainData; |
mbed_official | 235:685d5f11838f | 2075 | hcryp->pCrypOutBuffPtr = pCypherData; |
mbed_official | 235:685d5f11838f | 2076 | hcryp->CrypOutCount = Size; |
mbed_official | 235:685d5f11838f | 2077 | |
mbed_official | 235:685d5f11838f | 2078 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 2079 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 2080 | |
mbed_official | 235:685d5f11838f | 2081 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 2082 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 2083 | { |
mbed_official | 235:685d5f11838f | 2084 | /************************ Formatting the header block *******************/ |
mbed_official | 235:685d5f11838f | 2085 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 2086 | { |
mbed_official | 235:685d5f11838f | 2087 | /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ |
mbed_official | 235:685d5f11838f | 2088 | if(headersize < 65280) |
mbed_official | 235:685d5f11838f | 2089 | { |
mbed_official | 235:685d5f11838f | 2090 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); |
mbed_official | 235:685d5f11838f | 2091 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); |
mbed_official | 235:685d5f11838f | 2092 | headersize += 2; |
mbed_official | 235:685d5f11838f | 2093 | } |
mbed_official | 235:685d5f11838f | 2094 | else |
mbed_official | 235:685d5f11838f | 2095 | { |
mbed_official | 235:685d5f11838f | 2096 | /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ |
mbed_official | 235:685d5f11838f | 2097 | hcryp->Init.pScratch[bufferidx++] = 0xFF; |
mbed_official | 235:685d5f11838f | 2098 | hcryp->Init.pScratch[bufferidx++] = 0xFE; |
mbed_official | 235:685d5f11838f | 2099 | hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; |
mbed_official | 235:685d5f11838f | 2100 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; |
mbed_official | 235:685d5f11838f | 2101 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; |
mbed_official | 235:685d5f11838f | 2102 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; |
mbed_official | 235:685d5f11838f | 2103 | headersize += 6; |
mbed_official | 235:685d5f11838f | 2104 | } |
mbed_official | 235:685d5f11838f | 2105 | /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ |
mbed_official | 235:685d5f11838f | 2106 | for(loopcounter = 0; loopcounter < headersize; loopcounter++) |
mbed_official | 235:685d5f11838f | 2107 | { |
mbed_official | 235:685d5f11838f | 2108 | hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; |
mbed_official | 235:685d5f11838f | 2109 | } |
mbed_official | 235:685d5f11838f | 2110 | /* Check if the header size is modulo 16 */ |
mbed_official | 235:685d5f11838f | 2111 | if ((headersize % 16) != 0) |
mbed_official | 235:685d5f11838f | 2112 | { |
mbed_official | 235:685d5f11838f | 2113 | /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ |
mbed_official | 235:685d5f11838f | 2114 | for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) |
mbed_official | 235:685d5f11838f | 2115 | { |
mbed_official | 235:685d5f11838f | 2116 | hcryp->Init.pScratch[loopcounter] = 0; |
mbed_official | 235:685d5f11838f | 2117 | } |
mbed_official | 235:685d5f11838f | 2118 | /* Set the header size to modulo 16 */ |
mbed_official | 235:685d5f11838f | 2119 | headersize = ((headersize/16) + 1) * 16; |
mbed_official | 235:685d5f11838f | 2120 | } |
mbed_official | 235:685d5f11838f | 2121 | /* Set the pointer headeraddr to hcryp->Init.pScratch */ |
mbed_official | 235:685d5f11838f | 2122 | headeraddr = (uint32_t)hcryp->Init.pScratch; |
mbed_official | 235:685d5f11838f | 2123 | } |
mbed_official | 235:685d5f11838f | 2124 | /*********************** Formatting the block B0 ************************/ |
mbed_official | 235:685d5f11838f | 2125 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 2126 | { |
mbed_official | 235:685d5f11838f | 2127 | blockb0[0] = 0x40; |
mbed_official | 235:685d5f11838f | 2128 | } |
mbed_official | 235:685d5f11838f | 2129 | /* Flags byte */ |
mbed_official | 235:685d5f11838f | 2130 | /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ |
mbed_official | 235:685d5f11838f | 2131 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); |
mbed_official | 235:685d5f11838f | 2132 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); |
mbed_official | 235:685d5f11838f | 2133 | |
mbed_official | 235:685d5f11838f | 2134 | for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) |
mbed_official | 235:685d5f11838f | 2135 | { |
mbed_official | 235:685d5f11838f | 2136 | blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; |
mbed_official | 235:685d5f11838f | 2137 | } |
mbed_official | 235:685d5f11838f | 2138 | for ( ; loopcounter < 13; loopcounter++) |
mbed_official | 235:685d5f11838f | 2139 | { |
mbed_official | 235:685d5f11838f | 2140 | blockb0[loopcounter+1] = 0; |
mbed_official | 235:685d5f11838f | 2141 | } |
mbed_official | 235:685d5f11838f | 2142 | |
mbed_official | 235:685d5f11838f | 2143 | blockb0[14] = (Size >> 8); |
mbed_official | 235:685d5f11838f | 2144 | blockb0[15] = (Size & 0xFF); |
mbed_official | 235:685d5f11838f | 2145 | |
mbed_official | 235:685d5f11838f | 2146 | /************************* Formatting the initial counter ***************/ |
mbed_official | 235:685d5f11838f | 2147 | /* Byte 0: |
mbed_official | 235:685d5f11838f | 2148 | Bits 7 and 6 are reserved and shall be set to 0 |
mbed_official | 235:685d5f11838f | 2149 | Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter |
mbed_official | 235:685d5f11838f | 2150 | blocks are distinct from B0 |
mbed_official | 235:685d5f11838f | 2151 | Bits 0, 1, and 2 contain the same encoding of q as in B0 |
mbed_official | 235:685d5f11838f | 2152 | */ |
mbed_official | 235:685d5f11838f | 2153 | ctr[0] = blockb0[0] & 0x07; |
mbed_official | 235:685d5f11838f | 2154 | /* byte 1 to NonceSize is the IV (Nonce) */ |
mbed_official | 235:685d5f11838f | 2155 | for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) |
mbed_official | 235:685d5f11838f | 2156 | { |
mbed_official | 235:685d5f11838f | 2157 | ctr[loopcounter] = blockb0[loopcounter]; |
mbed_official | 235:685d5f11838f | 2158 | } |
mbed_official | 235:685d5f11838f | 2159 | /* Set the LSB to 1 */ |
mbed_official | 235:685d5f11838f | 2160 | ctr[15] |= 0x01; |
mbed_official | 235:685d5f11838f | 2161 | |
mbed_official | 235:685d5f11838f | 2162 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 2163 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 2164 | |
mbed_official | 235:685d5f11838f | 2165 | /* Set the CRYP peripheral in AES CCM mode */ |
mbed_official | 235:685d5f11838f | 2166 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT); |
mbed_official | 235:685d5f11838f | 2167 | |
mbed_official | 235:685d5f11838f | 2168 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 2169 | CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 2170 | |
mbed_official | 235:685d5f11838f | 2171 | /* Select init phase */ |
mbed_official | 235:685d5f11838f | 2172 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT); |
mbed_official | 235:685d5f11838f | 2173 | |
mbed_official | 235:685d5f11838f | 2174 | b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 2175 | /* Write the blockb0 block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 2176 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 2177 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 2178 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 2179 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 2180 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 2181 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 2182 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 2183 | |
mbed_official | 235:685d5f11838f | 2184 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 2185 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 2186 | |
mbed_official | 235:685d5f11838f | 2187 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2188 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2189 | |
mbed_official | 235:685d5f11838f | 2190 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 2191 | { |
mbed_official | 235:685d5f11838f | 2192 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2193 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 2194 | { |
mbed_official | 235:685d5f11838f | 2195 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2196 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2197 | |
mbed_official | 235:685d5f11838f | 2198 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2199 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2200 | |
mbed_official | 235:685d5f11838f | 2201 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2202 | } |
mbed_official | 235:685d5f11838f | 2203 | } |
mbed_official | 235:685d5f11838f | 2204 | /***************************** Header phase *****************************/ |
mbed_official | 235:685d5f11838f | 2205 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 2206 | { |
mbed_official | 235:685d5f11838f | 2207 | /* Select header phase */ |
mbed_official | 235:685d5f11838f | 2208 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER); |
mbed_official | 235:685d5f11838f | 2209 | |
mbed_official | 235:685d5f11838f | 2210 | /* Enable Crypto processor */ |
mbed_official | 235:685d5f11838f | 2211 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 2212 | |
mbed_official | 235:685d5f11838f | 2213 | for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) |
mbed_official | 235:685d5f11838f | 2214 | { |
mbed_official | 235:685d5f11838f | 2215 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2216 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2217 | |
mbed_official | 235:685d5f11838f | 2218 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM)) |
mbed_official | 235:685d5f11838f | 2219 | { |
mbed_official | 235:685d5f11838f | 2220 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2221 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 2222 | { |
mbed_official | 235:685d5f11838f | 2223 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2224 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2225 | |
mbed_official | 235:685d5f11838f | 2226 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2227 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2228 | |
mbed_official | 235:685d5f11838f | 2229 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2230 | } |
mbed_official | 235:685d5f11838f | 2231 | } |
mbed_official | 235:685d5f11838f | 2232 | /* Write the header block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 2233 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2234 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2235 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2236 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2237 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2238 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2239 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2240 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2241 | } |
mbed_official | 235:685d5f11838f | 2242 | |
mbed_official | 235:685d5f11838f | 2243 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2244 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2245 | |
mbed_official | 235:685d5f11838f | 2246 | while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) |
mbed_official | 235:685d5f11838f | 2247 | { |
mbed_official | 235:685d5f11838f | 2248 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2249 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 2250 | { |
mbed_official | 235:685d5f11838f | 2251 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2252 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2253 | |
mbed_official | 235:685d5f11838f | 2254 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2255 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2256 | |
mbed_official | 235:685d5f11838f | 2257 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2258 | } |
mbed_official | 235:685d5f11838f | 2259 | } |
mbed_official | 235:685d5f11838f | 2260 | } |
mbed_official | 235:685d5f11838f | 2261 | /* Save formatted counter into the scratch buffer pScratch */ |
mbed_official | 235:685d5f11838f | 2262 | for(loopcounter = 0; (loopcounter < 16); loopcounter++) |
mbed_official | 235:685d5f11838f | 2263 | { |
mbed_official | 235:685d5f11838f | 2264 | hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; |
mbed_official | 235:685d5f11838f | 2265 | } |
mbed_official | 235:685d5f11838f | 2266 | /* Reset bit 0 */ |
mbed_official | 235:685d5f11838f | 2267 | hcryp->Init.pScratch[15] &= 0xfe; |
mbed_official | 235:685d5f11838f | 2268 | |
mbed_official | 235:685d5f11838f | 2269 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 2270 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 2271 | |
mbed_official | 235:685d5f11838f | 2272 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 2273 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 2274 | |
mbed_official | 235:685d5f11838f | 2275 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 2276 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 2277 | } |
mbed_official | 235:685d5f11838f | 2278 | |
mbed_official | 235:685d5f11838f | 2279 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 235:685d5f11838f | 2280 | CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 235:685d5f11838f | 2281 | |
mbed_official | 235:685d5f11838f | 2282 | /* Unlock process */ |
mbed_official | 235:685d5f11838f | 2283 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2284 | |
mbed_official | 235:685d5f11838f | 2285 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 2286 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 2287 | } |
mbed_official | 235:685d5f11838f | 2288 | else |
mbed_official | 235:685d5f11838f | 2289 | { |
mbed_official | 235:685d5f11838f | 2290 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 2291 | } |
mbed_official | 235:685d5f11838f | 2292 | } |
mbed_official | 235:685d5f11838f | 2293 | |
mbed_official | 235:685d5f11838f | 2294 | /** |
mbed_official | 235:685d5f11838f | 2295 | * @brief Initializes the CRYP peripheral in AES GCM decryption mode using DMA. |
mbed_official | 235:685d5f11838f | 2296 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2297 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 2298 | * @param pCypherData: Pointer to the cyphertext buffer. |
mbed_official | 235:685d5f11838f | 2299 | * @param Size: Length of the cyphertext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 2300 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 2301 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 2302 | */ |
mbed_official | 235:685d5f11838f | 2303 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 235:685d5f11838f | 2304 | { |
mbed_official | 235:685d5f11838f | 2305 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 2306 | uint32_t inputaddr; |
mbed_official | 235:685d5f11838f | 2307 | uint32_t outputaddr; |
mbed_official | 235:685d5f11838f | 2308 | |
mbed_official | 235:685d5f11838f | 2309 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 235:685d5f11838f | 2310 | { |
mbed_official | 235:685d5f11838f | 2311 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 2312 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2313 | |
mbed_official | 235:685d5f11838f | 2314 | inputaddr = (uint32_t)pCypherData; |
mbed_official | 235:685d5f11838f | 2315 | outputaddr = (uint32_t)pPlainData; |
mbed_official | 235:685d5f11838f | 2316 | |
mbed_official | 235:685d5f11838f | 2317 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 2318 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 2319 | |
mbed_official | 235:685d5f11838f | 2320 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 2321 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 2322 | { |
mbed_official | 235:685d5f11838f | 2323 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 2324 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 2325 | |
mbed_official | 235:685d5f11838f | 2326 | /* Set the CRYP peripheral in AES GCM decryption mode */ |
mbed_official | 235:685d5f11838f | 2327 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_DECRYPT); |
mbed_official | 235:685d5f11838f | 2328 | |
mbed_official | 235:685d5f11838f | 2329 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 2330 | CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 2331 | |
mbed_official | 235:685d5f11838f | 2332 | /* Enable CRYP to start the init phase */ |
mbed_official | 235:685d5f11838f | 2333 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 2334 | |
mbed_official | 235:685d5f11838f | 2335 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2336 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2337 | |
mbed_official | 235:685d5f11838f | 2338 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 2339 | { |
mbed_official | 235:685d5f11838f | 2340 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2341 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 2342 | { |
mbed_official | 235:685d5f11838f | 2343 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2344 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2345 | |
mbed_official | 235:685d5f11838f | 2346 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2347 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2348 | |
mbed_official | 235:685d5f11838f | 2349 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2350 | } |
mbed_official | 235:685d5f11838f | 2351 | } |
mbed_official | 235:685d5f11838f | 2352 | |
mbed_official | 235:685d5f11838f | 2353 | /* Set the header phase */ |
mbed_official | 235:685d5f11838f | 2354 | if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK) |
mbed_official | 235:685d5f11838f | 2355 | { |
mbed_official | 235:685d5f11838f | 2356 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2357 | } |
mbed_official | 235:685d5f11838f | 2358 | /* Disable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 2359 | __HAL_CRYP_DISABLE(); |
mbed_official | 235:685d5f11838f | 2360 | |
mbed_official | 235:685d5f11838f | 2361 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 2362 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 2363 | |
mbed_official | 235:685d5f11838f | 2364 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 2365 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 2366 | } |
mbed_official | 235:685d5f11838f | 2367 | |
mbed_official | 235:685d5f11838f | 2368 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 235:685d5f11838f | 2369 | CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 235:685d5f11838f | 2370 | |
mbed_official | 235:685d5f11838f | 2371 | /* Unlock process */ |
mbed_official | 235:685d5f11838f | 2372 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2373 | |
mbed_official | 235:685d5f11838f | 2374 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 2375 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 2376 | } |
mbed_official | 235:685d5f11838f | 2377 | else |
mbed_official | 235:685d5f11838f | 2378 | { |
mbed_official | 235:685d5f11838f | 2379 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 2380 | } |
mbed_official | 235:685d5f11838f | 2381 | } |
mbed_official | 235:685d5f11838f | 2382 | |
mbed_official | 235:685d5f11838f | 2383 | /** |
mbed_official | 235:685d5f11838f | 2384 | * @brief Initializes the CRYP peripheral in AES CCM decryption mode using DMA |
mbed_official | 235:685d5f11838f | 2385 | * then decrypted pCypherData. The cypher data are available in pPlainData. |
mbed_official | 235:685d5f11838f | 2386 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2387 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 2388 | * @param pCypherData: Pointer to the cyphertext buffer |
mbed_official | 235:685d5f11838f | 2389 | * @param Size: Length of the plaintext buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 2390 | * @param pPlainData: Pointer to the plaintext buffer |
mbed_official | 235:685d5f11838f | 2391 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 2392 | */ |
mbed_official | 235:685d5f11838f | 2393 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
mbed_official | 235:685d5f11838f | 2394 | { |
mbed_official | 235:685d5f11838f | 2395 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 2396 | uint32_t inputaddr; |
mbed_official | 235:685d5f11838f | 2397 | uint32_t outputaddr; |
mbed_official | 235:685d5f11838f | 2398 | uint32_t headersize; |
mbed_official | 235:685d5f11838f | 2399 | uint32_t headeraddr; |
mbed_official | 235:685d5f11838f | 2400 | uint32_t loopcounter = 0; |
mbed_official | 235:685d5f11838f | 2401 | uint32_t bufferidx = 0; |
mbed_official | 235:685d5f11838f | 2402 | uint8_t blockb0[16] = {0};/* Block B0 */ |
mbed_official | 235:685d5f11838f | 2403 | uint8_t ctr[16] = {0}; /* Counter */ |
mbed_official | 235:685d5f11838f | 2404 | uint32_t b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 2405 | |
mbed_official | 235:685d5f11838f | 2406 | if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS)) |
mbed_official | 235:685d5f11838f | 2407 | { |
mbed_official | 235:685d5f11838f | 2408 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 2409 | __HAL_LOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2410 | |
mbed_official | 235:685d5f11838f | 2411 | inputaddr = (uint32_t)pCypherData; |
mbed_official | 235:685d5f11838f | 2412 | outputaddr = (uint32_t)pPlainData; |
mbed_official | 235:685d5f11838f | 2413 | |
mbed_official | 235:685d5f11838f | 2414 | headersize = hcryp->Init.HeaderSize; |
mbed_official | 235:685d5f11838f | 2415 | headeraddr = (uint32_t)hcryp->Init.Header; |
mbed_official | 235:685d5f11838f | 2416 | |
mbed_official | 235:685d5f11838f | 2417 | hcryp->CrypInCount = Size; |
mbed_official | 235:685d5f11838f | 2418 | hcryp->pCrypInBuffPtr = pCypherData; |
mbed_official | 235:685d5f11838f | 2419 | hcryp->pCrypOutBuffPtr = pPlainData; |
mbed_official | 235:685d5f11838f | 2420 | hcryp->CrypOutCount = Size; |
mbed_official | 235:685d5f11838f | 2421 | |
mbed_official | 235:685d5f11838f | 2422 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 2423 | hcryp->State = HAL_CRYP_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 2424 | |
mbed_official | 235:685d5f11838f | 2425 | /* Check if initialization phase has already been performed */ |
mbed_official | 235:685d5f11838f | 2426 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
mbed_official | 235:685d5f11838f | 2427 | { |
mbed_official | 235:685d5f11838f | 2428 | /************************ Formatting the header block *******************/ |
mbed_official | 235:685d5f11838f | 2429 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 2430 | { |
mbed_official | 235:685d5f11838f | 2431 | /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */ |
mbed_official | 235:685d5f11838f | 2432 | if(headersize < 65280) |
mbed_official | 235:685d5f11838f | 2433 | { |
mbed_official | 235:685d5f11838f | 2434 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF); |
mbed_official | 235:685d5f11838f | 2435 | hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF); |
mbed_official | 235:685d5f11838f | 2436 | headersize += 2; |
mbed_official | 235:685d5f11838f | 2437 | } |
mbed_official | 235:685d5f11838f | 2438 | else |
mbed_official | 235:685d5f11838f | 2439 | { |
mbed_official | 235:685d5f11838f | 2440 | /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */ |
mbed_official | 235:685d5f11838f | 2441 | hcryp->Init.pScratch[bufferidx++] = 0xFF; |
mbed_official | 235:685d5f11838f | 2442 | hcryp->Init.pScratch[bufferidx++] = 0xFE; |
mbed_official | 235:685d5f11838f | 2443 | hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000; |
mbed_official | 235:685d5f11838f | 2444 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000; |
mbed_official | 235:685d5f11838f | 2445 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00; |
mbed_official | 235:685d5f11838f | 2446 | hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff; |
mbed_official | 235:685d5f11838f | 2447 | headersize += 6; |
mbed_official | 235:685d5f11838f | 2448 | } |
mbed_official | 235:685d5f11838f | 2449 | /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */ |
mbed_official | 235:685d5f11838f | 2450 | for(loopcounter = 0; loopcounter < headersize; loopcounter++) |
mbed_official | 235:685d5f11838f | 2451 | { |
mbed_official | 235:685d5f11838f | 2452 | hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter]; |
mbed_official | 235:685d5f11838f | 2453 | } |
mbed_official | 235:685d5f11838f | 2454 | /* Check if the header size is modulo 16 */ |
mbed_official | 235:685d5f11838f | 2455 | if ((headersize % 16) != 0) |
mbed_official | 235:685d5f11838f | 2456 | { |
mbed_official | 235:685d5f11838f | 2457 | /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */ |
mbed_official | 235:685d5f11838f | 2458 | for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++) |
mbed_official | 235:685d5f11838f | 2459 | { |
mbed_official | 235:685d5f11838f | 2460 | hcryp->Init.pScratch[loopcounter] = 0; |
mbed_official | 235:685d5f11838f | 2461 | } |
mbed_official | 235:685d5f11838f | 2462 | /* Set the header size to modulo 16 */ |
mbed_official | 235:685d5f11838f | 2463 | headersize = ((headersize/16) + 1) * 16; |
mbed_official | 235:685d5f11838f | 2464 | } |
mbed_official | 235:685d5f11838f | 2465 | /* Set the pointer headeraddr to hcryp->Init.pScratch */ |
mbed_official | 235:685d5f11838f | 2466 | headeraddr = (uint32_t)hcryp->Init.pScratch; |
mbed_official | 235:685d5f11838f | 2467 | } |
mbed_official | 235:685d5f11838f | 2468 | /*********************** Formatting the block B0 ************************/ |
mbed_official | 235:685d5f11838f | 2469 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 2470 | { |
mbed_official | 235:685d5f11838f | 2471 | blockb0[0] = 0x40; |
mbed_official | 235:685d5f11838f | 2472 | } |
mbed_official | 235:685d5f11838f | 2473 | /* Flags byte */ |
mbed_official | 235:685d5f11838f | 2474 | /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */ |
mbed_official | 235:685d5f11838f | 2475 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3); |
mbed_official | 235:685d5f11838f | 2476 | blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07); |
mbed_official | 235:685d5f11838f | 2477 | |
mbed_official | 235:685d5f11838f | 2478 | for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++) |
mbed_official | 235:685d5f11838f | 2479 | { |
mbed_official | 235:685d5f11838f | 2480 | blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter]; |
mbed_official | 235:685d5f11838f | 2481 | } |
mbed_official | 235:685d5f11838f | 2482 | for ( ; loopcounter < 13; loopcounter++) |
mbed_official | 235:685d5f11838f | 2483 | { |
mbed_official | 235:685d5f11838f | 2484 | blockb0[loopcounter+1] = 0; |
mbed_official | 235:685d5f11838f | 2485 | } |
mbed_official | 235:685d5f11838f | 2486 | |
mbed_official | 235:685d5f11838f | 2487 | blockb0[14] = (Size >> 8); |
mbed_official | 235:685d5f11838f | 2488 | blockb0[15] = (Size & 0xFF); |
mbed_official | 235:685d5f11838f | 2489 | |
mbed_official | 235:685d5f11838f | 2490 | /************************* Formatting the initial counter ***************/ |
mbed_official | 235:685d5f11838f | 2491 | /* Byte 0: |
mbed_official | 235:685d5f11838f | 2492 | Bits 7 and 6 are reserved and shall be set to 0 |
mbed_official | 235:685d5f11838f | 2493 | Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter |
mbed_official | 235:685d5f11838f | 2494 | blocks are distinct from B0 |
mbed_official | 235:685d5f11838f | 2495 | Bits 0, 1, and 2 contain the same encoding of q as in B0 |
mbed_official | 235:685d5f11838f | 2496 | */ |
mbed_official | 235:685d5f11838f | 2497 | ctr[0] = blockb0[0] & 0x07; |
mbed_official | 235:685d5f11838f | 2498 | /* byte 1 to NonceSize is the IV (Nonce) */ |
mbed_official | 235:685d5f11838f | 2499 | for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++) |
mbed_official | 235:685d5f11838f | 2500 | { |
mbed_official | 235:685d5f11838f | 2501 | ctr[loopcounter] = blockb0[loopcounter]; |
mbed_official | 235:685d5f11838f | 2502 | } |
mbed_official | 235:685d5f11838f | 2503 | /* Set the LSB to 1 */ |
mbed_official | 235:685d5f11838f | 2504 | ctr[15] |= 0x01; |
mbed_official | 235:685d5f11838f | 2505 | |
mbed_official | 235:685d5f11838f | 2506 | /* Set the key */ |
mbed_official | 235:685d5f11838f | 2507 | CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize); |
mbed_official | 235:685d5f11838f | 2508 | |
mbed_official | 235:685d5f11838f | 2509 | /* Set the CRYP peripheral in AES CCM mode */ |
mbed_official | 235:685d5f11838f | 2510 | __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_DECRYPT); |
mbed_official | 235:685d5f11838f | 2511 | |
mbed_official | 235:685d5f11838f | 2512 | /* Set the Initialization Vector */ |
mbed_official | 235:685d5f11838f | 2513 | CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B); |
mbed_official | 235:685d5f11838f | 2514 | |
mbed_official | 235:685d5f11838f | 2515 | /* Select init phase */ |
mbed_official | 235:685d5f11838f | 2516 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT); |
mbed_official | 235:685d5f11838f | 2517 | |
mbed_official | 235:685d5f11838f | 2518 | b0addr = (uint32_t)blockb0; |
mbed_official | 235:685d5f11838f | 2519 | /* Write the blockb0 block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 2520 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 2521 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 2522 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 2523 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 2524 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 2525 | b0addr+=4; |
mbed_official | 235:685d5f11838f | 2526 | CRYP->DR = *(uint32_t*)(b0addr); |
mbed_official | 235:685d5f11838f | 2527 | |
mbed_official | 235:685d5f11838f | 2528 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 2529 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 2530 | |
mbed_official | 235:685d5f11838f | 2531 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2532 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2533 | |
mbed_official | 235:685d5f11838f | 2534 | while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN) |
mbed_official | 235:685d5f11838f | 2535 | { |
mbed_official | 235:685d5f11838f | 2536 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2537 | |
mbed_official | 235:685d5f11838f | 2538 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 2539 | { |
mbed_official | 235:685d5f11838f | 2540 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2541 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2542 | |
mbed_official | 235:685d5f11838f | 2543 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2544 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2545 | |
mbed_official | 235:685d5f11838f | 2546 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2547 | |
mbed_official | 235:685d5f11838f | 2548 | } |
mbed_official | 235:685d5f11838f | 2549 | } |
mbed_official | 235:685d5f11838f | 2550 | /***************************** Header phase *****************************/ |
mbed_official | 235:685d5f11838f | 2551 | if(headersize != 0) |
mbed_official | 235:685d5f11838f | 2552 | { |
mbed_official | 235:685d5f11838f | 2553 | /* Select header phase */ |
mbed_official | 235:685d5f11838f | 2554 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER); |
mbed_official | 235:685d5f11838f | 2555 | |
mbed_official | 235:685d5f11838f | 2556 | /* Enable Crypto processor */ |
mbed_official | 235:685d5f11838f | 2557 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 2558 | |
mbed_official | 235:685d5f11838f | 2559 | for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16) |
mbed_official | 235:685d5f11838f | 2560 | { |
mbed_official | 235:685d5f11838f | 2561 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2562 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2563 | |
mbed_official | 235:685d5f11838f | 2564 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM)) |
mbed_official | 235:685d5f11838f | 2565 | { |
mbed_official | 235:685d5f11838f | 2566 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2567 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 2568 | { |
mbed_official | 235:685d5f11838f | 2569 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2570 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2571 | |
mbed_official | 235:685d5f11838f | 2572 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2573 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2574 | |
mbed_official | 235:685d5f11838f | 2575 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2576 | } |
mbed_official | 235:685d5f11838f | 2577 | } |
mbed_official | 235:685d5f11838f | 2578 | /* Write the header block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 2579 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2580 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2581 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2582 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2583 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2584 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2585 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2586 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2587 | } |
mbed_official | 235:685d5f11838f | 2588 | |
mbed_official | 235:685d5f11838f | 2589 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2590 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2591 | |
mbed_official | 235:685d5f11838f | 2592 | while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) |
mbed_official | 235:685d5f11838f | 2593 | { |
mbed_official | 235:685d5f11838f | 2594 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2595 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 2596 | { |
mbed_official | 235:685d5f11838f | 2597 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2598 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2599 | |
mbed_official | 235:685d5f11838f | 2600 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2601 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2602 | |
mbed_official | 235:685d5f11838f | 2603 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2604 | } |
mbed_official | 235:685d5f11838f | 2605 | } |
mbed_official | 235:685d5f11838f | 2606 | } |
mbed_official | 235:685d5f11838f | 2607 | /* Save formatted counter into the scratch buffer pScratch */ |
mbed_official | 235:685d5f11838f | 2608 | for(loopcounter = 0; (loopcounter < 16); loopcounter++) |
mbed_official | 235:685d5f11838f | 2609 | { |
mbed_official | 235:685d5f11838f | 2610 | hcryp->Init.pScratch[loopcounter] = ctr[loopcounter]; |
mbed_official | 235:685d5f11838f | 2611 | } |
mbed_official | 235:685d5f11838f | 2612 | /* Reset bit 0 */ |
mbed_official | 235:685d5f11838f | 2613 | hcryp->Init.pScratch[15] &= 0xfe; |
mbed_official | 235:685d5f11838f | 2614 | /* Select payload phase once the header phase is performed */ |
mbed_official | 235:685d5f11838f | 2615 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD); |
mbed_official | 235:685d5f11838f | 2616 | |
mbed_official | 235:685d5f11838f | 2617 | /* Flush FIFO */ |
mbed_official | 235:685d5f11838f | 2618 | __HAL_CRYP_FIFO_FLUSH(); |
mbed_official | 235:685d5f11838f | 2619 | |
mbed_official | 235:685d5f11838f | 2620 | /* Set the phase */ |
mbed_official | 235:685d5f11838f | 2621 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
mbed_official | 235:685d5f11838f | 2622 | } |
mbed_official | 235:685d5f11838f | 2623 | /* Set the input and output addresses and start DMA transfer */ |
mbed_official | 235:685d5f11838f | 2624 | CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
mbed_official | 235:685d5f11838f | 2625 | |
mbed_official | 235:685d5f11838f | 2626 | /* Unlock process */ |
mbed_official | 235:685d5f11838f | 2627 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2628 | |
mbed_official | 235:685d5f11838f | 2629 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 2630 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 2631 | } |
mbed_official | 235:685d5f11838f | 2632 | else |
mbed_official | 235:685d5f11838f | 2633 | { |
mbed_official | 235:685d5f11838f | 2634 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 2635 | } |
mbed_official | 235:685d5f11838f | 2636 | } |
mbed_official | 235:685d5f11838f | 2637 | |
mbed_official | 235:685d5f11838f | 2638 | /** |
mbed_official | 235:685d5f11838f | 2639 | * @brief This function handles CRYP interrupt request. |
mbed_official | 235:685d5f11838f | 2640 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2641 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 2642 | * @retval None |
mbed_official | 235:685d5f11838f | 2643 | */ |
mbed_official | 235:685d5f11838f | 2644 | void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp) |
mbed_official | 235:685d5f11838f | 2645 | { |
mbed_official | 235:685d5f11838f | 2646 | switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION) |
mbed_official | 235:685d5f11838f | 2647 | { |
mbed_official | 235:685d5f11838f | 2648 | case CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT: |
mbed_official | 235:685d5f11838f | 2649 | HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 235:685d5f11838f | 2650 | break; |
mbed_official | 235:685d5f11838f | 2651 | |
mbed_official | 235:685d5f11838f | 2652 | case CRYP_CR_ALGOMODE_AES_GCM_DECRYPT: |
mbed_official | 235:685d5f11838f | 2653 | HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 235:685d5f11838f | 2654 | break; |
mbed_official | 235:685d5f11838f | 2655 | |
mbed_official | 235:685d5f11838f | 2656 | case CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT: |
mbed_official | 235:685d5f11838f | 2657 | HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 235:685d5f11838f | 2658 | break; |
mbed_official | 235:685d5f11838f | 2659 | |
mbed_official | 235:685d5f11838f | 2660 | case CRYP_CR_ALGOMODE_AES_CCM_DECRYPT: |
mbed_official | 235:685d5f11838f | 2661 | HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, NULL, 0, NULL); |
mbed_official | 235:685d5f11838f | 2662 | break; |
mbed_official | 235:685d5f11838f | 2663 | |
mbed_official | 235:685d5f11838f | 2664 | default: |
mbed_official | 235:685d5f11838f | 2665 | break; |
mbed_official | 235:685d5f11838f | 2666 | } |
mbed_official | 235:685d5f11838f | 2667 | } |
mbed_official | 235:685d5f11838f | 2668 | |
mbed_official | 235:685d5f11838f | 2669 | /** |
mbed_official | 235:685d5f11838f | 2670 | * @} |
mbed_official | 235:685d5f11838f | 2671 | */ |
mbed_official | 235:685d5f11838f | 2672 | |
mbed_official | 235:685d5f11838f | 2673 | /** |
mbed_official | 235:685d5f11838f | 2674 | * @brief DMA CRYP Input Data process complete callback. |
mbed_official | 235:685d5f11838f | 2675 | * @param hdma: DMA handle |
mbed_official | 235:685d5f11838f | 2676 | * @retval None |
mbed_official | 235:685d5f11838f | 2677 | */ |
mbed_official | 235:685d5f11838f | 2678 | static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 2679 | { |
mbed_official | 235:685d5f11838f | 2680 | CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 2681 | |
mbed_official | 235:685d5f11838f | 2682 | /* Disable the DMA transfer for input Fifo request by resetting the DIEN bit |
mbed_official | 235:685d5f11838f | 2683 | in the DMACR register */ |
mbed_official | 235:685d5f11838f | 2684 | CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN); |
mbed_official | 235:685d5f11838f | 2685 | |
mbed_official | 235:685d5f11838f | 2686 | /* Call input data transfer complete callback */ |
mbed_official | 235:685d5f11838f | 2687 | HAL_CRYP_InCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 2688 | } |
mbed_official | 235:685d5f11838f | 2689 | |
mbed_official | 235:685d5f11838f | 2690 | /** |
mbed_official | 235:685d5f11838f | 2691 | * @brief DMA CRYP Output Data process complete callback. |
mbed_official | 235:685d5f11838f | 2692 | * @param hdma: DMA handle |
mbed_official | 235:685d5f11838f | 2693 | * @retval None |
mbed_official | 235:685d5f11838f | 2694 | */ |
mbed_official | 235:685d5f11838f | 2695 | static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 2696 | { |
mbed_official | 235:685d5f11838f | 2697 | CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 2698 | |
mbed_official | 235:685d5f11838f | 2699 | /* Disable the DMA transfer for output Fifo request by resetting the DOEN bit |
mbed_official | 235:685d5f11838f | 2700 | in the DMACR register */ |
mbed_official | 235:685d5f11838f | 2701 | CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN); |
mbed_official | 235:685d5f11838f | 2702 | |
mbed_official | 235:685d5f11838f | 2703 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 2704 | __HAL_CRYP_DISABLE(); |
mbed_official | 235:685d5f11838f | 2705 | |
mbed_official | 235:685d5f11838f | 2706 | /* Change the CRYP peripheral state */ |
mbed_official | 235:685d5f11838f | 2707 | hcryp->State = HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 2708 | |
mbed_official | 235:685d5f11838f | 2709 | /* Call output data transfer complete callback */ |
mbed_official | 235:685d5f11838f | 2710 | HAL_CRYP_OutCpltCallback(hcryp); |
mbed_official | 235:685d5f11838f | 2711 | } |
mbed_official | 235:685d5f11838f | 2712 | |
mbed_official | 235:685d5f11838f | 2713 | /** |
mbed_official | 235:685d5f11838f | 2714 | * @brief DMA CRYP communication error callback. |
mbed_official | 235:685d5f11838f | 2715 | * @param hdma: DMA handle |
mbed_official | 235:685d5f11838f | 2716 | * @retval None |
mbed_official | 235:685d5f11838f | 2717 | */ |
mbed_official | 235:685d5f11838f | 2718 | static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 2719 | { |
mbed_official | 235:685d5f11838f | 2720 | CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 2721 | hcryp->State= HAL_CRYP_STATE_READY; |
mbed_official | 235:685d5f11838f | 2722 | HAL_CRYP_ErrorCallback(hcryp); |
mbed_official | 235:685d5f11838f | 2723 | } |
mbed_official | 235:685d5f11838f | 2724 | |
mbed_official | 235:685d5f11838f | 2725 | /** |
mbed_official | 235:685d5f11838f | 2726 | * @brief Writes the Key in Key registers. |
mbed_official | 235:685d5f11838f | 2727 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2728 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 2729 | * @param Key: Pointer to Key buffer |
mbed_official | 235:685d5f11838f | 2730 | * @param KeySize: Size of Key |
mbed_official | 235:685d5f11838f | 2731 | * @retval None |
mbed_official | 235:685d5f11838f | 2732 | */ |
mbed_official | 235:685d5f11838f | 2733 | static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize) |
mbed_official | 235:685d5f11838f | 2734 | { |
mbed_official | 235:685d5f11838f | 2735 | uint32_t keyaddr = (uint32_t)Key; |
mbed_official | 235:685d5f11838f | 2736 | |
mbed_official | 235:685d5f11838f | 2737 | switch(KeySize) |
mbed_official | 235:685d5f11838f | 2738 | { |
mbed_official | 235:685d5f11838f | 2739 | case CRYP_KEYSIZE_256B: |
mbed_official | 235:685d5f11838f | 2740 | /* Key Initialisation */ |
mbed_official | 235:685d5f11838f | 2741 | CRYP->K0LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2742 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2743 | CRYP->K0RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2744 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2745 | CRYP->K1LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2746 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2747 | CRYP->K1RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2748 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2749 | CRYP->K2LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2750 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2751 | CRYP->K2RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2752 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2753 | CRYP->K3LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2754 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2755 | CRYP->K3RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2756 | break; |
mbed_official | 235:685d5f11838f | 2757 | case CRYP_KEYSIZE_192B: |
mbed_official | 235:685d5f11838f | 2758 | CRYP->K1LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2759 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2760 | CRYP->K1RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2761 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2762 | CRYP->K2LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2763 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2764 | CRYP->K2RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2765 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2766 | CRYP->K3LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2767 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2768 | CRYP->K3RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2769 | break; |
mbed_official | 235:685d5f11838f | 2770 | case CRYP_KEYSIZE_128B: |
mbed_official | 235:685d5f11838f | 2771 | CRYP->K2LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2772 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2773 | CRYP->K2RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2774 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2775 | CRYP->K3LR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2776 | keyaddr+=4; |
mbed_official | 235:685d5f11838f | 2777 | CRYP->K3RR = __REV(*(uint32_t*)(keyaddr)); |
mbed_official | 235:685d5f11838f | 2778 | break; |
mbed_official | 235:685d5f11838f | 2779 | default: |
mbed_official | 235:685d5f11838f | 2780 | break; |
mbed_official | 235:685d5f11838f | 2781 | } |
mbed_official | 235:685d5f11838f | 2782 | } |
mbed_official | 235:685d5f11838f | 2783 | |
mbed_official | 235:685d5f11838f | 2784 | /** |
mbed_official | 235:685d5f11838f | 2785 | * @brief Writes the InitVector/InitCounter in IV registers. |
mbed_official | 235:685d5f11838f | 2786 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2787 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 2788 | * @param InitVector: Pointer to InitVector/InitCounter buffer |
mbed_official | 235:685d5f11838f | 2789 | * @param IVSize: Size of the InitVector/InitCounter |
mbed_official | 235:685d5f11838f | 2790 | * @retval None |
mbed_official | 235:685d5f11838f | 2791 | */ |
mbed_official | 235:685d5f11838f | 2792 | static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize) |
mbed_official | 235:685d5f11838f | 2793 | { |
mbed_official | 235:685d5f11838f | 2794 | uint32_t ivaddr = (uint32_t)InitVector; |
mbed_official | 235:685d5f11838f | 2795 | |
mbed_official | 235:685d5f11838f | 2796 | switch(IVSize) |
mbed_official | 235:685d5f11838f | 2797 | { |
mbed_official | 235:685d5f11838f | 2798 | case CRYP_KEYSIZE_128B: |
mbed_official | 235:685d5f11838f | 2799 | CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 235:685d5f11838f | 2800 | ivaddr+=4; |
mbed_official | 235:685d5f11838f | 2801 | CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 235:685d5f11838f | 2802 | ivaddr+=4; |
mbed_official | 235:685d5f11838f | 2803 | CRYP->IV1LR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 235:685d5f11838f | 2804 | ivaddr+=4; |
mbed_official | 235:685d5f11838f | 2805 | CRYP->IV1RR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 235:685d5f11838f | 2806 | break; |
mbed_official | 235:685d5f11838f | 2807 | /* Whatever key size 192 or 256, Init vector is written in IV0LR and IV0RR */ |
mbed_official | 235:685d5f11838f | 2808 | case CRYP_KEYSIZE_192B: |
mbed_official | 235:685d5f11838f | 2809 | CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 235:685d5f11838f | 2810 | ivaddr+=4; |
mbed_official | 235:685d5f11838f | 2811 | CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 235:685d5f11838f | 2812 | break; |
mbed_official | 235:685d5f11838f | 2813 | case CRYP_KEYSIZE_256B: |
mbed_official | 235:685d5f11838f | 2814 | CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 235:685d5f11838f | 2815 | ivaddr+=4; |
mbed_official | 235:685d5f11838f | 2816 | CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr)); |
mbed_official | 235:685d5f11838f | 2817 | break; |
mbed_official | 235:685d5f11838f | 2818 | default: |
mbed_official | 235:685d5f11838f | 2819 | break; |
mbed_official | 235:685d5f11838f | 2820 | } |
mbed_official | 235:685d5f11838f | 2821 | } |
mbed_official | 235:685d5f11838f | 2822 | |
mbed_official | 235:685d5f11838f | 2823 | /** |
mbed_official | 235:685d5f11838f | 2824 | * @brief Process Data: Writes Input data in polling mode and read the Output data. |
mbed_official | 235:685d5f11838f | 2825 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2826 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 2827 | * @param Input: Pointer to the Input buffer. |
mbed_official | 235:685d5f11838f | 2828 | * @param Ilength: Length of the Input buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 2829 | * @param Output: Pointer to the returned buffer |
mbed_official | 235:685d5f11838f | 2830 | * @param Timeout: Timeout value |
mbed_official | 235:685d5f11838f | 2831 | * @retval None |
mbed_official | 235:685d5f11838f | 2832 | */ |
mbed_official | 235:685d5f11838f | 2833 | static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t *Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 2834 | { |
mbed_official | 235:685d5f11838f | 2835 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 2836 | uint32_t i = 0; |
mbed_official | 235:685d5f11838f | 2837 | uint32_t inputaddr = (uint32_t)Input; |
mbed_official | 235:685d5f11838f | 2838 | uint32_t outputaddr = (uint32_t)Output; |
mbed_official | 235:685d5f11838f | 2839 | |
mbed_official | 235:685d5f11838f | 2840 | for(i=0; (i < Ilength); i+=16) |
mbed_official | 235:685d5f11838f | 2841 | { |
mbed_official | 235:685d5f11838f | 2842 | /* Write the Input block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 2843 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 2844 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 2845 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 2846 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 2847 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 2848 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 2849 | CRYP->DR = *(uint32_t*)(inputaddr); |
mbed_official | 235:685d5f11838f | 2850 | inputaddr+=4; |
mbed_official | 235:685d5f11838f | 2851 | |
mbed_official | 235:685d5f11838f | 2852 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2853 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2854 | |
mbed_official | 235:685d5f11838f | 2855 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE)) |
mbed_official | 235:685d5f11838f | 2856 | { |
mbed_official | 235:685d5f11838f | 2857 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2858 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 2859 | { |
mbed_official | 235:685d5f11838f | 2860 | if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE) |
mbed_official | 235:685d5f11838f | 2861 | { |
mbed_official | 235:685d5f11838f | 2862 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2863 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2864 | |
mbed_official | 235:685d5f11838f | 2865 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2866 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2867 | |
mbed_official | 235:685d5f11838f | 2868 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2869 | } |
mbed_official | 235:685d5f11838f | 2870 | } |
mbed_official | 235:685d5f11838f | 2871 | } |
mbed_official | 235:685d5f11838f | 2872 | /* Read the Output block from the OUT FIFO */ |
mbed_official | 235:685d5f11838f | 2873 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 2874 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 2875 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 2876 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 2877 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 2878 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 2879 | *(uint32_t*)(outputaddr) = CRYP->DOUT; |
mbed_official | 235:685d5f11838f | 2880 | outputaddr+=4; |
mbed_official | 235:685d5f11838f | 2881 | } |
mbed_official | 235:685d5f11838f | 2882 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 2883 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 2884 | } |
mbed_official | 235:685d5f11838f | 2885 | |
mbed_official | 235:685d5f11838f | 2886 | /** |
mbed_official | 235:685d5f11838f | 2887 | * @brief Sets the header phase |
mbed_official | 235:685d5f11838f | 2888 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2889 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 2890 | * @param Input: Pointer to the Input buffer. |
mbed_official | 235:685d5f11838f | 2891 | * @param Ilength: Length of the Input buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 2892 | * @param Timeout: Timeout value |
mbed_official | 235:685d5f11838f | 2893 | * @retval None |
mbed_official | 235:685d5f11838f | 2894 | */ |
mbed_official | 235:685d5f11838f | 2895 | static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 2896 | { |
mbed_official | 235:685d5f11838f | 2897 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 2898 | uint32_t loopcounter = 0; |
mbed_official | 235:685d5f11838f | 2899 | uint32_t headeraddr = (uint32_t)Input; |
mbed_official | 235:685d5f11838f | 2900 | |
mbed_official | 235:685d5f11838f | 2901 | /***************************** Header phase *********************************/ |
mbed_official | 235:685d5f11838f | 2902 | if(hcryp->Init.HeaderSize != 0) |
mbed_official | 235:685d5f11838f | 2903 | { |
mbed_official | 235:685d5f11838f | 2904 | /* Select header phase */ |
mbed_official | 235:685d5f11838f | 2905 | __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER); |
mbed_official | 235:685d5f11838f | 2906 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 2907 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 2908 | |
mbed_official | 235:685d5f11838f | 2909 | for(loopcounter = 0; (loopcounter < hcryp->Init.HeaderSize); loopcounter+=16) |
mbed_official | 235:685d5f11838f | 2910 | { |
mbed_official | 235:685d5f11838f | 2911 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2912 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2913 | |
mbed_official | 235:685d5f11838f | 2914 | while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM)) |
mbed_official | 235:685d5f11838f | 2915 | { |
mbed_official | 235:685d5f11838f | 2916 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2917 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 2918 | { |
mbed_official | 235:685d5f11838f | 2919 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 2920 | { |
mbed_official | 235:685d5f11838f | 2921 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2922 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2923 | |
mbed_official | 235:685d5f11838f | 2924 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2925 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2926 | |
mbed_official | 235:685d5f11838f | 2927 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2928 | } |
mbed_official | 235:685d5f11838f | 2929 | } |
mbed_official | 235:685d5f11838f | 2930 | } |
mbed_official | 235:685d5f11838f | 2931 | /* Write the Input block in the IN FIFO */ |
mbed_official | 235:685d5f11838f | 2932 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2933 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2934 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2935 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2936 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2937 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2938 | CRYP->DR = *(uint32_t*)(headeraddr); |
mbed_official | 235:685d5f11838f | 2939 | headeraddr+=4; |
mbed_official | 235:685d5f11838f | 2940 | } |
mbed_official | 235:685d5f11838f | 2941 | |
mbed_official | 235:685d5f11838f | 2942 | /* Wait until the complete message has been processed */ |
mbed_official | 235:685d5f11838f | 2943 | |
mbed_official | 235:685d5f11838f | 2944 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2945 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2946 | |
mbed_official | 235:685d5f11838f | 2947 | while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY) |
mbed_official | 235:685d5f11838f | 2948 | { |
mbed_official | 235:685d5f11838f | 2949 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 2950 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 2951 | { |
mbed_official | 235:685d5f11838f | 2952 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 2953 | { |
mbed_official | 235:685d5f11838f | 2954 | /* Change state */ |
mbed_official | 235:685d5f11838f | 2955 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2956 | |
mbed_official | 235:685d5f11838f | 2957 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2958 | __HAL_UNLOCK(hcryp); |
mbed_official | 235:685d5f11838f | 2959 | |
mbed_official | 235:685d5f11838f | 2960 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2961 | } |
mbed_official | 235:685d5f11838f | 2962 | } |
mbed_official | 235:685d5f11838f | 2963 | } |
mbed_official | 235:685d5f11838f | 2964 | } |
mbed_official | 235:685d5f11838f | 2965 | /* Return function status */ |
mbed_official | 235:685d5f11838f | 2966 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 2967 | } |
mbed_official | 235:685d5f11838f | 2968 | |
mbed_official | 235:685d5f11838f | 2969 | /** |
mbed_official | 235:685d5f11838f | 2970 | * @brief Sets the DMA configuration and start the DMA transfert. |
mbed_official | 235:685d5f11838f | 2971 | * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2972 | * the configuration information for CRYP module |
mbed_official | 235:685d5f11838f | 2973 | * @param inputaddr: Address of the Input buffer |
mbed_official | 235:685d5f11838f | 2974 | * @param Size: Size of the Input buffer, must be a multiple of 16 |
mbed_official | 235:685d5f11838f | 2975 | * @param outputaddr: Address of the Output buffer |
mbed_official | 235:685d5f11838f | 2976 | * @retval None |
mbed_official | 235:685d5f11838f | 2977 | */ |
mbed_official | 235:685d5f11838f | 2978 | static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr) |
mbed_official | 235:685d5f11838f | 2979 | { |
mbed_official | 235:685d5f11838f | 2980 | /* Set the CRYP DMA transfer complete callback */ |
mbed_official | 235:685d5f11838f | 2981 | hcryp->hdmain->XferCpltCallback = CRYPEx_GCMCCM_DMAInCplt; |
mbed_official | 235:685d5f11838f | 2982 | /* Set the DMA error callback */ |
mbed_official | 235:685d5f11838f | 2983 | hcryp->hdmain->XferErrorCallback = CRYPEx_GCMCCM_DMAError; |
mbed_official | 235:685d5f11838f | 2984 | |
mbed_official | 235:685d5f11838f | 2985 | /* Set the CRYP DMA transfer complete callback */ |
mbed_official | 235:685d5f11838f | 2986 | hcryp->hdmaout->XferCpltCallback = CRYPEx_GCMCCM_DMAOutCplt; |
mbed_official | 235:685d5f11838f | 2987 | /* Set the DMA error callback */ |
mbed_official | 235:685d5f11838f | 2988 | hcryp->hdmaout->XferErrorCallback = CRYPEx_GCMCCM_DMAError; |
mbed_official | 235:685d5f11838f | 2989 | |
mbed_official | 235:685d5f11838f | 2990 | /* Enable the CRYP peripheral */ |
mbed_official | 235:685d5f11838f | 2991 | __HAL_CRYP_ENABLE(); |
mbed_official | 235:685d5f11838f | 2992 | |
mbed_official | 235:685d5f11838f | 2993 | /* Enable the DMA In DMA Stream */ |
mbed_official | 235:685d5f11838f | 2994 | HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&CRYP->DR, Size/4); |
mbed_official | 235:685d5f11838f | 2995 | |
mbed_official | 235:685d5f11838f | 2996 | /* Enable In DMA request */ |
mbed_official | 235:685d5f11838f | 2997 | CRYP->DMACR = CRYP_DMACR_DIEN; |
mbed_official | 235:685d5f11838f | 2998 | |
mbed_official | 235:685d5f11838f | 2999 | /* Enable the DMA Out DMA Stream */ |
mbed_official | 235:685d5f11838f | 3000 | HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&CRYP->DOUT, outputaddr, Size/4); |
mbed_official | 235:685d5f11838f | 3001 | |
mbed_official | 235:685d5f11838f | 3002 | /* Enable Out DMA request */ |
mbed_official | 235:685d5f11838f | 3003 | CRYP->DMACR |= CRYP_DMACR_DOEN; |
mbed_official | 235:685d5f11838f | 3004 | } |
mbed_official | 235:685d5f11838f | 3005 | |
mbed_official | 235:685d5f11838f | 3006 | /** |
mbed_official | 235:685d5f11838f | 3007 | * @} |
mbed_official | 235:685d5f11838f | 3008 | */ |
mbed_official | 235:685d5f11838f | 3009 | #endif /* STM32F437xx || STM32F439xx */ |
mbed_official | 235:685d5f11838f | 3010 | |
mbed_official | 235:685d5f11838f | 3011 | #endif /* HAL_CRYP_MODULE_ENABLED */ |
mbed_official | 235:685d5f11838f | 3012 | /** |
mbed_official | 235:685d5f11838f | 3013 | * @} |
mbed_official | 235:685d5f11838f | 3014 | */ |
mbed_official | 235:685d5f11838f | 3015 | |
mbed_official | 235:685d5f11838f | 3016 | /** |
mbed_official | 235:685d5f11838f | 3017 | * @} |
mbed_official | 235:685d5f11838f | 3018 | */ |
mbed_official | 235:685d5f11838f | 3019 | |
mbed_official | 235:685d5f11838f | 3020 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |