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targets/cmsis/TARGET_STM/TARGET_DISCO_F051R8/stm32f0xx_syscfg.c@130:1dec54e4aec3, 2014-03-21 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Mar 21 11:45:09 2014 +0000
- Revision:
- 130:1dec54e4aec3
Synchronized with git revision e5c9ff6781a4e277a5a454e5a0b037f76e31739d
Full URL: https://github.com/mbedmicro/mbed/commit/e5c9ff6781a4e277a5a454e5a0b037f76e31739d/
STM32F0-Discovery (STM32F051R8) initial port
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 130:1dec54e4aec3 | 1 | /** |
mbed_official | 130:1dec54e4aec3 | 2 | ****************************************************************************** |
mbed_official | 130:1dec54e4aec3 | 3 | * @file stm32f0xx_syscfg.c |
mbed_official | 130:1dec54e4aec3 | 4 | * @author MCD Application Team |
mbed_official | 130:1dec54e4aec3 | 5 | * @version V1.3.0 |
mbed_official | 130:1dec54e4aec3 | 6 | * @date 16-January-2014 |
mbed_official | 130:1dec54e4aec3 | 7 | * @brief This file provides firmware functions to manage the following |
mbed_official | 130:1dec54e4aec3 | 8 | * functionalities of the SYSCFG peripheral: |
mbed_official | 130:1dec54e4aec3 | 9 | * + Remapping the memory mapped at 0x00000000 |
mbed_official | 130:1dec54e4aec3 | 10 | * + Remapping the DMA channels |
mbed_official | 130:1dec54e4aec3 | 11 | * + Enabling I2C fast mode plus driving capability for I2C pins |
mbed_official | 130:1dec54e4aec3 | 12 | * + Configuring the EXTI lines connection to the GPIO port |
mbed_official | 130:1dec54e4aec3 | 13 | * + Configuring the CFGR2 features (Connecting some internal signal |
mbed_official | 130:1dec54e4aec3 | 14 | * to the break input of TIM1) |
mbed_official | 130:1dec54e4aec3 | 15 | * |
mbed_official | 130:1dec54e4aec3 | 16 | * @verbatim |
mbed_official | 130:1dec54e4aec3 | 17 | =============================================================================== |
mbed_official | 130:1dec54e4aec3 | 18 | ##### How to use this driver ##### |
mbed_official | 130:1dec54e4aec3 | 19 | =============================================================================== |
mbed_official | 130:1dec54e4aec3 | 20 | [..] |
mbed_official | 130:1dec54e4aec3 | 21 | The SYSCFG registers can be accessed only when the SYSCFG |
mbed_official | 130:1dec54e4aec3 | 22 | interface APB clock is enabled. |
mbed_official | 130:1dec54e4aec3 | 23 | To enable SYSCFG APB clock use: |
mbed_official | 130:1dec54e4aec3 | 24 | RCC_APBPeriphClockCmd(RCC_APBPeriph_SYSCFG, ENABLE). |
mbed_official | 130:1dec54e4aec3 | 25 | * @endverbatim |
mbed_official | 130:1dec54e4aec3 | 26 | * |
mbed_official | 130:1dec54e4aec3 | 27 | ****************************************************************************** |
mbed_official | 130:1dec54e4aec3 | 28 | * @attention |
mbed_official | 130:1dec54e4aec3 | 29 | * |
mbed_official | 130:1dec54e4aec3 | 30 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 130:1dec54e4aec3 | 31 | * |
mbed_official | 130:1dec54e4aec3 | 32 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 130:1dec54e4aec3 | 33 | * are permitted provided that the following conditions are met: |
mbed_official | 130:1dec54e4aec3 | 34 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 130:1dec54e4aec3 | 35 | * this list of conditions and the following disclaimer. |
mbed_official | 130:1dec54e4aec3 | 36 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 130:1dec54e4aec3 | 37 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 130:1dec54e4aec3 | 38 | * and/or other materials provided with the distribution. |
mbed_official | 130:1dec54e4aec3 | 39 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 130:1dec54e4aec3 | 40 | * may be used to endorse or promote products derived from this software |
mbed_official | 130:1dec54e4aec3 | 41 | * without specific prior written permission. |
mbed_official | 130:1dec54e4aec3 | 42 | * |
mbed_official | 130:1dec54e4aec3 | 43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 130:1dec54e4aec3 | 44 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 130:1dec54e4aec3 | 45 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 130:1dec54e4aec3 | 46 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 130:1dec54e4aec3 | 47 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 130:1dec54e4aec3 | 48 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 130:1dec54e4aec3 | 49 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 130:1dec54e4aec3 | 50 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 130:1dec54e4aec3 | 51 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 130:1dec54e4aec3 | 52 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 130:1dec54e4aec3 | 53 | * |
mbed_official | 130:1dec54e4aec3 | 54 | ****************************************************************************** |
mbed_official | 130:1dec54e4aec3 | 55 | */ |
mbed_official | 130:1dec54e4aec3 | 56 | |
mbed_official | 130:1dec54e4aec3 | 57 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 130:1dec54e4aec3 | 58 | #include "stm32f0xx_syscfg.h" |
mbed_official | 130:1dec54e4aec3 | 59 | |
mbed_official | 130:1dec54e4aec3 | 60 | /** @addtogroup STM32F0xx_StdPeriph_Driver |
mbed_official | 130:1dec54e4aec3 | 61 | * @{ |
mbed_official | 130:1dec54e4aec3 | 62 | */ |
mbed_official | 130:1dec54e4aec3 | 63 | |
mbed_official | 130:1dec54e4aec3 | 64 | /** @defgroup SYSCFG |
mbed_official | 130:1dec54e4aec3 | 65 | * @brief SYSCFG driver modules |
mbed_official | 130:1dec54e4aec3 | 66 | * @{ |
mbed_official | 130:1dec54e4aec3 | 67 | */ |
mbed_official | 130:1dec54e4aec3 | 68 | |
mbed_official | 130:1dec54e4aec3 | 69 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 130:1dec54e4aec3 | 70 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 130:1dec54e4aec3 | 71 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 130:1dec54e4aec3 | 72 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 130:1dec54e4aec3 | 73 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 130:1dec54e4aec3 | 74 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 130:1dec54e4aec3 | 75 | |
mbed_official | 130:1dec54e4aec3 | 76 | /** @defgroup SYSCFG_Private_Functions |
mbed_official | 130:1dec54e4aec3 | 77 | * @{ |
mbed_official | 130:1dec54e4aec3 | 78 | */ |
mbed_official | 130:1dec54e4aec3 | 79 | |
mbed_official | 130:1dec54e4aec3 | 80 | /** @defgroup SYSCFG_Group1 SYSCFG Initialization and Configuration functions |
mbed_official | 130:1dec54e4aec3 | 81 | * @brief SYSCFG Initialization and Configuration functions |
mbed_official | 130:1dec54e4aec3 | 82 | * |
mbed_official | 130:1dec54e4aec3 | 83 | @verbatim |
mbed_official | 130:1dec54e4aec3 | 84 | =============================================================================== |
mbed_official | 130:1dec54e4aec3 | 85 | ##### SYSCFG Initialization and Configuration functions ##### |
mbed_official | 130:1dec54e4aec3 | 86 | =============================================================================== |
mbed_official | 130:1dec54e4aec3 | 87 | |
mbed_official | 130:1dec54e4aec3 | 88 | @endverbatim |
mbed_official | 130:1dec54e4aec3 | 89 | * @{ |
mbed_official | 130:1dec54e4aec3 | 90 | */ |
mbed_official | 130:1dec54e4aec3 | 91 | |
mbed_official | 130:1dec54e4aec3 | 92 | /** |
mbed_official | 130:1dec54e4aec3 | 93 | * @brief Deinitializes the SYSCFG registers to their default reset values. |
mbed_official | 130:1dec54e4aec3 | 94 | * @param None |
mbed_official | 130:1dec54e4aec3 | 95 | * @retval None |
mbed_official | 130:1dec54e4aec3 | 96 | * @note MEM_MODE bits are not affected by APB reset. |
mbed_official | 130:1dec54e4aec3 | 97 | * @note MEM_MODE bits took the value from the user option bytes. |
mbed_official | 130:1dec54e4aec3 | 98 | * @note CFGR2 register is not affected by APB reset. |
mbed_official | 130:1dec54e4aec3 | 99 | * @note CLABBB configuration bits are locked when set. |
mbed_official | 130:1dec54e4aec3 | 100 | * @note To unlock the configuration, perform a system reset. |
mbed_official | 130:1dec54e4aec3 | 101 | */ |
mbed_official | 130:1dec54e4aec3 | 102 | void SYSCFG_DeInit(void) |
mbed_official | 130:1dec54e4aec3 | 103 | { |
mbed_official | 130:1dec54e4aec3 | 104 | /* Set SYSCFG_CFGR1 register to reset value without affecting MEM_MODE bits */ |
mbed_official | 130:1dec54e4aec3 | 105 | SYSCFG->CFGR1 &= SYSCFG_CFGR1_MEM_MODE; |
mbed_official | 130:1dec54e4aec3 | 106 | /* Set EXTICRx registers to reset value */ |
mbed_official | 130:1dec54e4aec3 | 107 | SYSCFG->EXTICR[0] = 0; |
mbed_official | 130:1dec54e4aec3 | 108 | SYSCFG->EXTICR[1] = 0; |
mbed_official | 130:1dec54e4aec3 | 109 | SYSCFG->EXTICR[2] = 0; |
mbed_official | 130:1dec54e4aec3 | 110 | SYSCFG->EXTICR[3] = 0; |
mbed_official | 130:1dec54e4aec3 | 111 | /* Set CFGR2 register to reset value: clear SRAM parity error flag */ |
mbed_official | 130:1dec54e4aec3 | 112 | SYSCFG->CFGR2 |= (uint32_t) SYSCFG_CFGR2_SRAM_PE; |
mbed_official | 130:1dec54e4aec3 | 113 | } |
mbed_official | 130:1dec54e4aec3 | 114 | |
mbed_official | 130:1dec54e4aec3 | 115 | /** |
mbed_official | 130:1dec54e4aec3 | 116 | * @brief Configures the memory mapping at address 0x00000000. |
mbed_official | 130:1dec54e4aec3 | 117 | * @param SYSCFG_MemoryRemap: selects the memory remapping. |
mbed_official | 130:1dec54e4aec3 | 118 | * This parameter can be one of the following values: |
mbed_official | 130:1dec54e4aec3 | 119 | * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000 |
mbed_official | 130:1dec54e4aec3 | 120 | * @arg SYSCFG_MemoryRemap_SystemMemory: System Flash memory mapped at 0x00000000 |
mbed_official | 130:1dec54e4aec3 | 121 | * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000 |
mbed_official | 130:1dec54e4aec3 | 122 | * @retval None |
mbed_official | 130:1dec54e4aec3 | 123 | */ |
mbed_official | 130:1dec54e4aec3 | 124 | void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap) |
mbed_official | 130:1dec54e4aec3 | 125 | { |
mbed_official | 130:1dec54e4aec3 | 126 | uint32_t tmpctrl = 0; |
mbed_official | 130:1dec54e4aec3 | 127 | |
mbed_official | 130:1dec54e4aec3 | 128 | /* Check the parameter */ |
mbed_official | 130:1dec54e4aec3 | 129 | assert_param(IS_SYSCFG_MEMORY_REMAP(SYSCFG_MemoryRemap)); |
mbed_official | 130:1dec54e4aec3 | 130 | |
mbed_official | 130:1dec54e4aec3 | 131 | /* Get CFGR1 register value */ |
mbed_official | 130:1dec54e4aec3 | 132 | tmpctrl = SYSCFG->CFGR1; |
mbed_official | 130:1dec54e4aec3 | 133 | |
mbed_official | 130:1dec54e4aec3 | 134 | /* Clear MEM_MODE bits */ |
mbed_official | 130:1dec54e4aec3 | 135 | tmpctrl &= (uint32_t) (~SYSCFG_CFGR1_MEM_MODE); |
mbed_official | 130:1dec54e4aec3 | 136 | |
mbed_official | 130:1dec54e4aec3 | 137 | /* Set the new MEM_MODE bits value */ |
mbed_official | 130:1dec54e4aec3 | 138 | tmpctrl |= (uint32_t) SYSCFG_MemoryRemap; |
mbed_official | 130:1dec54e4aec3 | 139 | |
mbed_official | 130:1dec54e4aec3 | 140 | /* Set CFGR1 register with the new memory remap configuration */ |
mbed_official | 130:1dec54e4aec3 | 141 | SYSCFG->CFGR1 = tmpctrl; |
mbed_official | 130:1dec54e4aec3 | 142 | } |
mbed_official | 130:1dec54e4aec3 | 143 | |
mbed_official | 130:1dec54e4aec3 | 144 | /** |
mbed_official | 130:1dec54e4aec3 | 145 | * @brief Configure the DMA channels remapping. |
mbed_official | 130:1dec54e4aec3 | 146 | * @param SYSCFG_DMARemap: selects the DMA channels remap. |
mbed_official | 130:1dec54e4aec3 | 147 | * This parameter can be one of the following values: |
mbed_official | 130:1dec54e4aec3 | 148 | * @arg SYSCFG_DMARemap_TIM17: Remap TIM17 DMA requests from channel1 to channel2 |
mbed_official | 130:1dec54e4aec3 | 149 | * @arg SYSCFG_DMARemap_TIM16: Remap TIM16 DMA requests from channel3 to channel4 |
mbed_official | 130:1dec54e4aec3 | 150 | * @arg SYSCFG_DMARemap_USART1Rx: Remap USART1 Rx DMA requests from channel3 to channel5 |
mbed_official | 130:1dec54e4aec3 | 151 | * @arg SYSCFG_DMARemap_USART1Tx: Remap USART1 Tx DMA requests from channel2 to channel4 |
mbed_official | 130:1dec54e4aec3 | 152 | * @arg SYSCFG_DMARemap_ADC1: Remap ADC1 DMA requests from channel1 to channel2 |
mbed_official | 130:1dec54e4aec3 | 153 | * @param NewState: new state of the DMA channel remapping. |
mbed_official | 130:1dec54e4aec3 | 154 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 130:1dec54e4aec3 | 155 | * @note When enabled, DMA channel of the selected peripheral is remapped |
mbed_official | 130:1dec54e4aec3 | 156 | * @note When disabled, Default DMA channel is mapped to the selected peripheral |
mbed_official | 130:1dec54e4aec3 | 157 | * @note By default TIM17 DMA requests is mapped to channel 1, |
mbed_official | 130:1dec54e4aec3 | 158 | * use SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Enable) to remap |
mbed_official | 130:1dec54e4aec3 | 159 | * TIM17 DMA requests to channel 2 and use |
mbed_official | 130:1dec54e4aec3 | 160 | * SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Disable) to map |
mbed_official | 130:1dec54e4aec3 | 161 | * TIM17 DMA requests to channel 1 (default mapping) |
mbed_official | 130:1dec54e4aec3 | 162 | * @retval None |
mbed_official | 130:1dec54e4aec3 | 163 | */ |
mbed_official | 130:1dec54e4aec3 | 164 | void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState) |
mbed_official | 130:1dec54e4aec3 | 165 | { |
mbed_official | 130:1dec54e4aec3 | 166 | /* Check the parameters */ |
mbed_official | 130:1dec54e4aec3 | 167 | assert_param(IS_SYSCFG_DMA_REMAP(SYSCFG_DMARemap)); |
mbed_official | 130:1dec54e4aec3 | 168 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 130:1dec54e4aec3 | 169 | |
mbed_official | 130:1dec54e4aec3 | 170 | if (NewState != DISABLE) |
mbed_official | 130:1dec54e4aec3 | 171 | { |
mbed_official | 130:1dec54e4aec3 | 172 | /* Remap the DMA channel */ |
mbed_official | 130:1dec54e4aec3 | 173 | SYSCFG->CFGR1 |= (uint32_t)SYSCFG_DMARemap; |
mbed_official | 130:1dec54e4aec3 | 174 | } |
mbed_official | 130:1dec54e4aec3 | 175 | else |
mbed_official | 130:1dec54e4aec3 | 176 | { |
mbed_official | 130:1dec54e4aec3 | 177 | /* use the default DMA channel mapping */ |
mbed_official | 130:1dec54e4aec3 | 178 | SYSCFG->CFGR1 &= (uint32_t)(~SYSCFG_DMARemap); |
mbed_official | 130:1dec54e4aec3 | 179 | } |
mbed_official | 130:1dec54e4aec3 | 180 | } |
mbed_official | 130:1dec54e4aec3 | 181 | |
mbed_official | 130:1dec54e4aec3 | 182 | /** |
mbed_official | 130:1dec54e4aec3 | 183 | * @brief Configure the I2C fast mode plus driving capability. |
mbed_official | 130:1dec54e4aec3 | 184 | * @param SYSCFG_I2CFastModePlus: selects the pin. |
mbed_official | 130:1dec54e4aec3 | 185 | * This parameter can be one of the following values: |
mbed_official | 130:1dec54e4aec3 | 186 | * @arg SYSCFG_I2CFastModePlus_PB6: Configure fast mode plus driving capability for PB6 |
mbed_official | 130:1dec54e4aec3 | 187 | * @arg SYSCFG_I2CFastModePlus_PB7: Configure fast mode plus driving capability for PB7 |
mbed_official | 130:1dec54e4aec3 | 188 | * @arg SYSCFG_I2CFastModePlus_PB8: Configure fast mode plus driving capability for PB8 |
mbed_official | 130:1dec54e4aec3 | 189 | * @arg SYSCFG_I2CFastModePlus_PB9: Configure fast mode plus driving capability for PB9 |
mbed_official | 130:1dec54e4aec3 | 190 | * @arg SYSCFG_I2CFastModePlus_PA9: Configure fast mode plus driving capability for PA9 (only for STM32F031 and STM32F030 devices) |
mbed_official | 130:1dec54e4aec3 | 191 | * @arg SYSCFG_I2CFastModePlus_PA10: Configure fast mode plus driving capability for PA10 (only for STM32F031 and STM32F030 devices) |
mbed_official | 130:1dec54e4aec3 | 192 | * @arg SYSCFG_I2CFastModePlus_I2C1: Configure fast mode plus driving capability for PB10, PB11, PF6 and PF7(only for STM32F031 and STM32F030 devices) |
mbed_official | 130:1dec54e4aec3 | 193 | * @arg SYSCFG_I2CFastModePlus_I2C2: Configure fast mode plus driving capability for I2C2 pins, available only for STM32F072 devices |
mbed_official | 130:1dec54e4aec3 | 194 | * |
mbed_official | 130:1dec54e4aec3 | 195 | * @param NewState: new state of the DMA channel remapping. |
mbed_official | 130:1dec54e4aec3 | 196 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 130:1dec54e4aec3 | 197 | * @note ENABLE: Enable fast mode plus driving capability for selected I2C pin |
mbed_official | 130:1dec54e4aec3 | 198 | * @note DISABLE: Disable fast mode plus driving capability for selected I2C pin |
mbed_official | 130:1dec54e4aec3 | 199 | * @note For I2C1, fast mode plus driving capability can be enabled on all selected |
mbed_official | 130:1dec54e4aec3 | 200 | * I2C1 pins using SYSCFG_I2CFastModePlus_I2C1 parameter or independently |
mbed_official | 130:1dec54e4aec3 | 201 | * on each one of the following pins PB6, PB7, PB8 and PB9. |
mbed_official | 130:1dec54e4aec3 | 202 | * @note For remaing I2C1 pins (PA14, PA15...) fast mode plus driving capability |
mbed_official | 130:1dec54e4aec3 | 203 | * can be enabled only by using SYSCFG_I2CFastModePlus_I2C1 parameter. |
mbed_official | 130:1dec54e4aec3 | 204 | * @note For all I2C2 pins fast mode plus driving capability can be enabled |
mbed_official | 130:1dec54e4aec3 | 205 | * only by using SYSCFG_I2CFastModePlus_I2C2 parameter. |
mbed_official | 130:1dec54e4aec3 | 206 | * @retval None |
mbed_official | 130:1dec54e4aec3 | 207 | */ |
mbed_official | 130:1dec54e4aec3 | 208 | void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState) |
mbed_official | 130:1dec54e4aec3 | 209 | { |
mbed_official | 130:1dec54e4aec3 | 210 | /* Check the parameters */ |
mbed_official | 130:1dec54e4aec3 | 211 | assert_param(IS_SYSCFG_I2C_FMP(SYSCFG_I2CFastModePlus)); |
mbed_official | 130:1dec54e4aec3 | 212 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 130:1dec54e4aec3 | 213 | |
mbed_official | 130:1dec54e4aec3 | 214 | if (NewState != DISABLE) |
mbed_official | 130:1dec54e4aec3 | 215 | { |
mbed_official | 130:1dec54e4aec3 | 216 | /* Enable fast mode plus driving capability for selected pin */ |
mbed_official | 130:1dec54e4aec3 | 217 | SYSCFG->CFGR1 |= (uint32_t)SYSCFG_I2CFastModePlus; |
mbed_official | 130:1dec54e4aec3 | 218 | } |
mbed_official | 130:1dec54e4aec3 | 219 | else |
mbed_official | 130:1dec54e4aec3 | 220 | { |
mbed_official | 130:1dec54e4aec3 | 221 | /* Disable fast mode plus driving capability for selected pin */ |
mbed_official | 130:1dec54e4aec3 | 222 | SYSCFG->CFGR1 &= (uint32_t)(~SYSCFG_I2CFastModePlus); |
mbed_official | 130:1dec54e4aec3 | 223 | } |
mbed_official | 130:1dec54e4aec3 | 224 | } |
mbed_official | 130:1dec54e4aec3 | 225 | |
mbed_official | 130:1dec54e4aec3 | 226 | /** |
mbed_official | 130:1dec54e4aec3 | 227 | * @brief Selects the GPIO pin used as EXTI Line. |
mbed_official | 130:1dec54e4aec3 | 228 | * @param EXTI_PortSourceGPIOx: selects the GPIO port to be used as source |
mbed_official | 130:1dec54e4aec3 | 229 | * for EXTI lines where x can be (A, B, C, D, E or F). |
mbed_official | 130:1dec54e4aec3 | 230 | * @note GPIOE is available only for STM32F072. |
mbed_official | 130:1dec54e4aec3 | 231 | * @note GPIOD is not available for STM32F031. |
mbed_official | 130:1dec54e4aec3 | 232 | * @param EXTI_PinSourcex: specifies the EXTI line to be configured. |
mbed_official | 130:1dec54e4aec3 | 233 | * @note This parameter can be EXTI_PinSourcex where x can be: |
mbed_official | 130:1dec54e4aec3 | 234 | * For STM32F051 and STM32F030: (0..15) for GPIOA, GPIOB, GPIOC, (2) for GPIOD and (0..1, 4..7) for GIIOF. |
mbed_official | 130:1dec54e4aec3 | 235 | * For STM32F072: (0..15) for GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, (0..10) for GPIOF. |
mbed_official | 130:1dec54e4aec3 | 236 | * For STM32F031: (0..15) for GPIOA, GPIOB, (13..15) for GPIOC and (0..1, 6..7) for GPIOF. |
mbed_official | 130:1dec54e4aec3 | 237 | * @retval None |
mbed_official | 130:1dec54e4aec3 | 238 | */ |
mbed_official | 130:1dec54e4aec3 | 239 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex) |
mbed_official | 130:1dec54e4aec3 | 240 | { |
mbed_official | 130:1dec54e4aec3 | 241 | uint32_t tmp = 0x00; |
mbed_official | 130:1dec54e4aec3 | 242 | |
mbed_official | 130:1dec54e4aec3 | 243 | /* Check the parameters */ |
mbed_official | 130:1dec54e4aec3 | 244 | assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx)); |
mbed_official | 130:1dec54e4aec3 | 245 | assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex)); |
mbed_official | 130:1dec54e4aec3 | 246 | |
mbed_official | 130:1dec54e4aec3 | 247 | tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)); |
mbed_official | 130:1dec54e4aec3 | 248 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp; |
mbed_official | 130:1dec54e4aec3 | 249 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03))); |
mbed_official | 130:1dec54e4aec3 | 250 | } |
mbed_official | 130:1dec54e4aec3 | 251 | |
mbed_official | 130:1dec54e4aec3 | 252 | /** |
mbed_official | 130:1dec54e4aec3 | 253 | * @brief Connect the selected parameter to the break input of TIM1. |
mbed_official | 130:1dec54e4aec3 | 254 | * @note The selected configuration is locked and can be unlocked by system reset |
mbed_official | 130:1dec54e4aec3 | 255 | * @param SYSCFG_Break: selects the configuration to be connected to break |
mbed_official | 130:1dec54e4aec3 | 256 | * input of TIM1 |
mbed_official | 130:1dec54e4aec3 | 257 | * This parameter can be any combination of the following values: |
mbed_official | 130:1dec54e4aec3 | 258 | * @arg SYSCFG_Break_PVD: Connects the PVD event to the Break Input of TIM1,, not avaailable for STM32F030 devices. |
mbed_official | 130:1dec54e4aec3 | 259 | * @arg SYSCFG_Break_SRAMParity: Connects the SRAM_PARITY error signal to the Break Input of TIM1 . |
mbed_official | 130:1dec54e4aec3 | 260 | * @arg SYSCFG_Break_Lockup: Connects Lockup output of CortexM0 to the break input of TIM1. |
mbed_official | 130:1dec54e4aec3 | 261 | * @retval None |
mbed_official | 130:1dec54e4aec3 | 262 | */ |
mbed_official | 130:1dec54e4aec3 | 263 | void SYSCFG_BreakConfig(uint32_t SYSCFG_Break) |
mbed_official | 130:1dec54e4aec3 | 264 | { |
mbed_official | 130:1dec54e4aec3 | 265 | /* Check the parameter */ |
mbed_official | 130:1dec54e4aec3 | 266 | assert_param(IS_SYSCFG_LOCK_CONFIG(SYSCFG_Break)); |
mbed_official | 130:1dec54e4aec3 | 267 | |
mbed_official | 130:1dec54e4aec3 | 268 | SYSCFG->CFGR2 |= (uint32_t) SYSCFG_Break; |
mbed_official | 130:1dec54e4aec3 | 269 | } |
mbed_official | 130:1dec54e4aec3 | 270 | |
mbed_official | 130:1dec54e4aec3 | 271 | /** |
mbed_official | 130:1dec54e4aec3 | 272 | * @brief Checks whether the specified SYSCFG flag is set or not. |
mbed_official | 130:1dec54e4aec3 | 273 | * @param SYSCFG_Flag: specifies the SYSCFG flag to check. |
mbed_official | 130:1dec54e4aec3 | 274 | * This parameter can be one of the following values: |
mbed_official | 130:1dec54e4aec3 | 275 | * @arg SYSCFG_FLAG_PE: SRAM parity error flag. |
mbed_official | 130:1dec54e4aec3 | 276 | * @retval The new state of SYSCFG_Flag (SET or RESET). |
mbed_official | 130:1dec54e4aec3 | 277 | */ |
mbed_official | 130:1dec54e4aec3 | 278 | FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag) |
mbed_official | 130:1dec54e4aec3 | 279 | { |
mbed_official | 130:1dec54e4aec3 | 280 | FlagStatus bitstatus = RESET; |
mbed_official | 130:1dec54e4aec3 | 281 | |
mbed_official | 130:1dec54e4aec3 | 282 | /* Check the parameter */ |
mbed_official | 130:1dec54e4aec3 | 283 | assert_param(IS_SYSCFG_FLAG(SYSCFG_Flag)); |
mbed_official | 130:1dec54e4aec3 | 284 | |
mbed_official | 130:1dec54e4aec3 | 285 | /* Check the status of the specified SPI flag */ |
mbed_official | 130:1dec54e4aec3 | 286 | if ((SYSCFG->CFGR2 & SYSCFG_CFGR2_SRAM_PE) != (uint32_t)RESET) |
mbed_official | 130:1dec54e4aec3 | 287 | { |
mbed_official | 130:1dec54e4aec3 | 288 | /* SYSCFG_Flag is set */ |
mbed_official | 130:1dec54e4aec3 | 289 | bitstatus = SET; |
mbed_official | 130:1dec54e4aec3 | 290 | } |
mbed_official | 130:1dec54e4aec3 | 291 | else |
mbed_official | 130:1dec54e4aec3 | 292 | { |
mbed_official | 130:1dec54e4aec3 | 293 | /* SYSCFG_Flag is reset */ |
mbed_official | 130:1dec54e4aec3 | 294 | bitstatus = RESET; |
mbed_official | 130:1dec54e4aec3 | 295 | } |
mbed_official | 130:1dec54e4aec3 | 296 | /* Return the SYSCFG_Flag status */ |
mbed_official | 130:1dec54e4aec3 | 297 | return bitstatus; |
mbed_official | 130:1dec54e4aec3 | 298 | } |
mbed_official | 130:1dec54e4aec3 | 299 | |
mbed_official | 130:1dec54e4aec3 | 300 | /** |
mbed_official | 130:1dec54e4aec3 | 301 | * @brief Clear the selected SYSCFG flag. |
mbed_official | 130:1dec54e4aec3 | 302 | * @param SYSCFG_Flag: selects the flag to be cleared. |
mbed_official | 130:1dec54e4aec3 | 303 | * This parameter can be any combination of the following values: |
mbed_official | 130:1dec54e4aec3 | 304 | * @arg SYSCFG_FLAG_PE: SRAM parity error flag. |
mbed_official | 130:1dec54e4aec3 | 305 | * @retval None |
mbed_official | 130:1dec54e4aec3 | 306 | */ |
mbed_official | 130:1dec54e4aec3 | 307 | void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag) |
mbed_official | 130:1dec54e4aec3 | 308 | { |
mbed_official | 130:1dec54e4aec3 | 309 | /* Check the parameter */ |
mbed_official | 130:1dec54e4aec3 | 310 | assert_param(IS_SYSCFG_FLAG(SYSCFG_Flag)); |
mbed_official | 130:1dec54e4aec3 | 311 | |
mbed_official | 130:1dec54e4aec3 | 312 | SYSCFG->CFGR2 |= (uint32_t) SYSCFG_Flag; |
mbed_official | 130:1dec54e4aec3 | 313 | } |
mbed_official | 130:1dec54e4aec3 | 314 | |
mbed_official | 130:1dec54e4aec3 | 315 | /** |
mbed_official | 130:1dec54e4aec3 | 316 | * @} |
mbed_official | 130:1dec54e4aec3 | 317 | */ |
mbed_official | 130:1dec54e4aec3 | 318 | |
mbed_official | 130:1dec54e4aec3 | 319 | /** |
mbed_official | 130:1dec54e4aec3 | 320 | * @} |
mbed_official | 130:1dec54e4aec3 | 321 | */ |
mbed_official | 130:1dec54e4aec3 | 322 | |
mbed_official | 130:1dec54e4aec3 | 323 | /** |
mbed_official | 130:1dec54e4aec3 | 324 | * @} |
mbed_official | 130:1dec54e4aec3 | 325 | */ |
mbed_official | 130:1dec54e4aec3 | 326 | |
mbed_official | 130:1dec54e4aec3 | 327 | /** |
mbed_official | 130:1dec54e4aec3 | 328 | * @} |
mbed_official | 130:1dec54e4aec3 | 329 | */ |
mbed_official | 130:1dec54e4aec3 | 330 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |