Ken Todotani / Mbed 2 deprecated DMA_M2M

Memory to Memory DMA demo from CMSIS example. This demo execute 1000 times of 32 word memory to memory DMA (copy), and also measures number of dummy loop execution during DMA cylcles. Line 56 of "DMA_M2M.c" can change DMA source. where; 1)static : source is SRAM 2)const : source is Flash ROM

Dependencies:   mbed

CMSIS_Lib/lpc17xx_clkpwr.c@0:692bf16d1455, 2010-11-14 (annotated)

Committer:
todotani
Date:
Sun Nov 14 03:26:04 2010 +0000
Revision:
0:692bf16d1455
2010/11/14

Who changed what in which revision?

UserRevisionLine numberNew contents of line
todotani 0:692bf16d1455 1 /***********************************************************************//**
todotani 0:692bf16d1455 2 * @file lpc17xx_clkpwr.c
todotani 0:692bf16d1455 3 * @brief Contains all functions support for Clock and Power Control
todotani 0:692bf16d1455 4 * firmware library on LPC17xx
todotani 0:692bf16d1455 5 * @version 3.0
todotani 0:692bf16d1455 6 * @date 18. June. 2010
todotani 0:692bf16d1455 7 * @author NXP MCU SW Application Team
todotani 0:692bf16d1455 8 **************************************************************************
todotani 0:692bf16d1455 9 * Software that is described herein is for illustrative purposes only
todotani 0:692bf16d1455 10 * which provides customers with programming information regarding the
todotani 0:692bf16d1455 11 * products. This software is supplied "AS IS" without any warranties.
todotani 0:692bf16d1455 12 * NXP Semiconductors assumes no responsibility or liability for the
todotani 0:692bf16d1455 13 * use of the software, conveys no license or title under any patent,
todotani 0:692bf16d1455 14 * copyright, or mask work right to the product. NXP Semiconductors
todotani 0:692bf16d1455 15 * reserves the right to make changes in the software without
todotani 0:692bf16d1455 16 * notification. NXP Semiconductors also make no representation or
todotani 0:692bf16d1455 17 * warranty that such application will be suitable for the specified
todotani 0:692bf16d1455 18 * use without further testing or modification.
todotani 0:692bf16d1455 19 **********************************************************************/
todotani 0:692bf16d1455 20
todotani 0:692bf16d1455 21 /* Peripheral group ----------------------------------------------------------- */
todotani 0:692bf16d1455 22 /** @addtogroup CLKPWR
todotani 0:692bf16d1455 23 * @{
todotani 0:692bf16d1455 24 */
todotani 0:692bf16d1455 25
todotani 0:692bf16d1455 26 /* Includes ------------------------------------------------------------------- */
todotani 0:692bf16d1455 27 #include "lpc17xx_clkpwr.h"
todotani 0:692bf16d1455 28
todotani 0:692bf16d1455 29
todotani 0:692bf16d1455 30 /* Public Functions ----------------------------------------------------------- */
todotani 0:692bf16d1455 31 /** @addtogroup CLKPWR_Public_Functions
todotani 0:692bf16d1455 32 * @{
todotani 0:692bf16d1455 33 */
todotani 0:692bf16d1455 34
todotani 0:692bf16d1455 35 /*********************************************************************//**
todotani 0:692bf16d1455 36 * @brief Set value of each Peripheral Clock Selection
todotani 0:692bf16d1455 37 * @param[in] ClkType Peripheral Clock Selection of each type,
todotani 0:692bf16d1455 38 * should be one of the following:
todotani 0:692bf16d1455 39 * - CLKPWR_PCLKSEL_WDT : WDT
todotani 0:692bf16d1455 40 - CLKPWR_PCLKSEL_TIMER0 : Timer 0
todotani 0:692bf16d1455 41 - CLKPWR_PCLKSEL_TIMER1 : Timer 1
todotani 0:692bf16d1455 42 - CLKPWR_PCLKSEL_UART0 : UART 0
todotani 0:692bf16d1455 43 - CLKPWR_PCLKSEL_UART1 : UART 1
todotani 0:692bf16d1455 44 - CLKPWR_PCLKSEL_PWM1 : PWM 1
todotani 0:692bf16d1455 45 - CLKPWR_PCLKSEL_I2C0 : I2C 0
todotani 0:692bf16d1455 46 - CLKPWR_PCLKSEL_SPI : SPI
todotani 0:692bf16d1455 47 - CLKPWR_PCLKSEL_SSP1 : SSP 1
todotani 0:692bf16d1455 48 - CLKPWR_PCLKSEL_DAC : DAC
todotani 0:692bf16d1455 49 - CLKPWR_PCLKSEL_ADC : ADC
todotani 0:692bf16d1455 50 - CLKPWR_PCLKSEL_CAN1 : CAN 1
todotani 0:692bf16d1455 51 - CLKPWR_PCLKSEL_CAN2 : CAN 2
todotani 0:692bf16d1455 52 - CLKPWR_PCLKSEL_ACF : ACF
todotani 0:692bf16d1455 53 - CLKPWR_PCLKSEL_QEI : QEI
todotani 0:692bf16d1455 54 - CLKPWR_PCLKSEL_PCB : PCB
todotani 0:692bf16d1455 55 - CLKPWR_PCLKSEL_I2C1 : I2C 1
todotani 0:692bf16d1455 56 - CLKPWR_PCLKSEL_SSP0 : SSP 0
todotani 0:692bf16d1455 57 - CLKPWR_PCLKSEL_TIMER2 : Timer 2
todotani 0:692bf16d1455 58 - CLKPWR_PCLKSEL_TIMER3 : Timer 3
todotani 0:692bf16d1455 59 - CLKPWR_PCLKSEL_UART2 : UART 2
todotani 0:692bf16d1455 60 - CLKPWR_PCLKSEL_UART3 : UART 3
todotani 0:692bf16d1455 61 - CLKPWR_PCLKSEL_I2C2 : I2C 2
todotani 0:692bf16d1455 62 - CLKPWR_PCLKSEL_I2S : I2S
todotani 0:692bf16d1455 63 - CLKPWR_PCLKSEL_RIT : RIT
todotani 0:692bf16d1455 64 - CLKPWR_PCLKSEL_SYSCON : SYSCON
todotani 0:692bf16d1455 65 - CLKPWR_PCLKSEL_MC : MC
todotani 0:692bf16d1455 66
todotani 0:692bf16d1455 67 * @param[in] DivVal Value of divider, should be:
todotani 0:692bf16d1455 68 * - CLKPWR_PCLKSEL_CCLK_DIV_4 : PCLK_peripheral = CCLK/4
todotani 0:692bf16d1455 69 * - CLKPWR_PCLKSEL_CCLK_DIV_1 : PCLK_peripheral = CCLK/1
todotani 0:692bf16d1455 70 * - CLKPWR_PCLKSEL_CCLK_DIV_2 : PCLK_peripheral = CCLK/2
todotani 0:692bf16d1455 71 *
todotani 0:692bf16d1455 72 * @return none
todotani 0:692bf16d1455 73 **********************************************************************/
todotani 0:692bf16d1455 74 void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
todotani 0:692bf16d1455 75 {
todotani 0:692bf16d1455 76 uint32_t bitpos;
todotani 0:692bf16d1455 77
todotani 0:692bf16d1455 78 bitpos = (ClkType < 32) ? (ClkType) : (ClkType - 32);
todotani 0:692bf16d1455 79
todotani 0:692bf16d1455 80 /* PCLKSEL0 selected */
todotani 0:692bf16d1455 81 if (ClkType < 32)
todotani 0:692bf16d1455 82 {
todotani 0:692bf16d1455 83 /* Clear two bit at bit position */
todotani 0:692bf16d1455 84 LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos)));
todotani 0:692bf16d1455 85
todotani 0:692bf16d1455 86 /* Set two selected bit */
todotani 0:692bf16d1455 87 LPC_SC->PCLKSEL0 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
todotani 0:692bf16d1455 88 }
todotani 0:692bf16d1455 89 /* PCLKSEL1 selected */
todotani 0:692bf16d1455 90 else
todotani 0:692bf16d1455 91 {
todotani 0:692bf16d1455 92 /* Clear two bit at bit position */
todotani 0:692bf16d1455 93 LPC_SC->PCLKSEL1 &= ~(CLKPWR_PCLKSEL_BITMASK(bitpos));
todotani 0:692bf16d1455 94
todotani 0:692bf16d1455 95 /* Set two selected bit */
todotani 0:692bf16d1455 96 LPC_SC->PCLKSEL1 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
todotani 0:692bf16d1455 97 }
todotani 0:692bf16d1455 98 }
todotani 0:692bf16d1455 99
todotani 0:692bf16d1455 100
todotani 0:692bf16d1455 101 /*********************************************************************//**
todotani 0:692bf16d1455 102 * @brief Get current value of each Peripheral Clock Selection
todotani 0:692bf16d1455 103 * @param[in] ClkType Peripheral Clock Selection of each type,
todotani 0:692bf16d1455 104 * should be one of the following:
todotani 0:692bf16d1455 105 * - CLKPWR_PCLKSEL_WDT : WDT
todotani 0:692bf16d1455 106 - CLKPWR_PCLKSEL_TIMER0 : Timer 0
todotani 0:692bf16d1455 107 - CLKPWR_PCLKSEL_TIMER1 : Timer 1
todotani 0:692bf16d1455 108 - CLKPWR_PCLKSEL_UART0 : UART 0
todotani 0:692bf16d1455 109 - CLKPWR_PCLKSEL_UART1 : UART 1
todotani 0:692bf16d1455 110 - CLKPWR_PCLKSEL_PWM1 : PWM 1
todotani 0:692bf16d1455 111 - CLKPWR_PCLKSEL_I2C0 : I2C 0
todotani 0:692bf16d1455 112 - CLKPWR_PCLKSEL_SPI : SPI
todotani 0:692bf16d1455 113 - CLKPWR_PCLKSEL_SSP1 : SSP 1
todotani 0:692bf16d1455 114 - CLKPWR_PCLKSEL_DAC : DAC
todotani 0:692bf16d1455 115 - CLKPWR_PCLKSEL_ADC : ADC
todotani 0:692bf16d1455 116 - CLKPWR_PCLKSEL_CAN1 : CAN 1
todotani 0:692bf16d1455 117 - CLKPWR_PCLKSEL_CAN2 : CAN 2
todotani 0:692bf16d1455 118 - CLKPWR_PCLKSEL_ACF : ACF
todotani 0:692bf16d1455 119 - CLKPWR_PCLKSEL_QEI : QEI
todotani 0:692bf16d1455 120 - CLKPWR_PCLKSEL_PCB : PCB
todotani 0:692bf16d1455 121 - CLKPWR_PCLKSEL_I2C1 : I2C 1
todotani 0:692bf16d1455 122 - CLKPWR_PCLKSEL_SSP0 : SSP 0
todotani 0:692bf16d1455 123 - CLKPWR_PCLKSEL_TIMER2 : Timer 2
todotani 0:692bf16d1455 124 - CLKPWR_PCLKSEL_TIMER3 : Timer 3
todotani 0:692bf16d1455 125 - CLKPWR_PCLKSEL_UART2 : UART 2
todotani 0:692bf16d1455 126 - CLKPWR_PCLKSEL_UART3 : UART 3
todotani 0:692bf16d1455 127 - CLKPWR_PCLKSEL_I2C2 : I2C 2
todotani 0:692bf16d1455 128 - CLKPWR_PCLKSEL_I2S : I2S
todotani 0:692bf16d1455 129 - CLKPWR_PCLKSEL_RIT : RIT
todotani 0:692bf16d1455 130 - CLKPWR_PCLKSEL_SYSCON : SYSCON
todotani 0:692bf16d1455 131 - CLKPWR_PCLKSEL_MC : MC
todotani 0:692bf16d1455 132
todotani 0:692bf16d1455 133 * @return Value of Selected Peripheral Clock Selection
todotani 0:692bf16d1455 134 **********************************************************************/
todotani 0:692bf16d1455 135 uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType)
todotani 0:692bf16d1455 136 {
todotani 0:692bf16d1455 137 uint32_t bitpos, retval;
todotani 0:692bf16d1455 138
todotani 0:692bf16d1455 139 if (ClkType < 32)
todotani 0:692bf16d1455 140 {
todotani 0:692bf16d1455 141 bitpos = ClkType;
todotani 0:692bf16d1455 142 retval = LPC_SC->PCLKSEL0;
todotani 0:692bf16d1455 143 }
todotani 0:692bf16d1455 144 else
todotani 0:692bf16d1455 145 {
todotani 0:692bf16d1455 146 bitpos = ClkType - 32;
todotani 0:692bf16d1455 147 retval = LPC_SC->PCLKSEL1;
todotani 0:692bf16d1455 148 }
todotani 0:692bf16d1455 149
todotani 0:692bf16d1455 150 retval = CLKPWR_PCLKSEL_GET(bitpos, retval);
todotani 0:692bf16d1455 151 return retval;
todotani 0:692bf16d1455 152 }
todotani 0:692bf16d1455 153
todotani 0:692bf16d1455 154
todotani 0:692bf16d1455 155
todotani 0:692bf16d1455 156 /*********************************************************************//**
todotani 0:692bf16d1455 157 * @brief Get current value of each Peripheral Clock
todotani 0:692bf16d1455 158 * @param[in] ClkType Peripheral Clock Selection of each type,
todotani 0:692bf16d1455 159 * should be one of the following:
todotani 0:692bf16d1455 160 * - CLKPWR_PCLKSEL_WDT : WDT
todotani 0:692bf16d1455 161 - CLKPWR_PCLKSEL_TIMER0 : Timer 0
todotani 0:692bf16d1455 162 - CLKPWR_PCLKSEL_TIMER1 : Timer 1
todotani 0:692bf16d1455 163 - CLKPWR_PCLKSEL_UART0 : UART 0
todotani 0:692bf16d1455 164 - CLKPWR_PCLKSEL_UART1 : UART 1
todotani 0:692bf16d1455 165 - CLKPWR_PCLKSEL_PWM1 : PWM 1
todotani 0:692bf16d1455 166 - CLKPWR_PCLKSEL_I2C0 : I2C 0
todotani 0:692bf16d1455 167 - CLKPWR_PCLKSEL_SPI : SPI
todotani 0:692bf16d1455 168 - CLKPWR_PCLKSEL_SSP1 : SSP 1
todotani 0:692bf16d1455 169 - CLKPWR_PCLKSEL_DAC : DAC
todotani 0:692bf16d1455 170 - CLKPWR_PCLKSEL_ADC : ADC
todotani 0:692bf16d1455 171 - CLKPWR_PCLKSEL_CAN1 : CAN 1
todotani 0:692bf16d1455 172 - CLKPWR_PCLKSEL_CAN2 : CAN 2
todotani 0:692bf16d1455 173 - CLKPWR_PCLKSEL_ACF : ACF
todotani 0:692bf16d1455 174 - CLKPWR_PCLKSEL_QEI : QEI
todotani 0:692bf16d1455 175 - CLKPWR_PCLKSEL_PCB : PCB
todotani 0:692bf16d1455 176 - CLKPWR_PCLKSEL_I2C1 : I2C 1
todotani 0:692bf16d1455 177 - CLKPWR_PCLKSEL_SSP0 : SSP 0
todotani 0:692bf16d1455 178 - CLKPWR_PCLKSEL_TIMER2 : Timer 2
todotani 0:692bf16d1455 179 - CLKPWR_PCLKSEL_TIMER3 : Timer 3
todotani 0:692bf16d1455 180 - CLKPWR_PCLKSEL_UART2 : UART 2
todotani 0:692bf16d1455 181 - CLKPWR_PCLKSEL_UART3 : UART 3
todotani 0:692bf16d1455 182 - CLKPWR_PCLKSEL_I2C2 : I2C 2
todotani 0:692bf16d1455 183 - CLKPWR_PCLKSEL_I2S : I2S
todotani 0:692bf16d1455 184 - CLKPWR_PCLKSEL_RIT : RIT
todotani 0:692bf16d1455 185 - CLKPWR_PCLKSEL_SYSCON : SYSCON
todotani 0:692bf16d1455 186 - CLKPWR_PCLKSEL_MC : MC
todotani 0:692bf16d1455 187
todotani 0:692bf16d1455 188 * @return Value of Selected Peripheral Clock
todotani 0:692bf16d1455 189 **********************************************************************/
todotani 0:692bf16d1455 190 uint32_t CLKPWR_GetPCLK (uint32_t ClkType)
todotani 0:692bf16d1455 191 {
todotani 0:692bf16d1455 192 uint32_t retval, div;
todotani 0:692bf16d1455 193
todotani 0:692bf16d1455 194 retval = SystemCoreClock;
todotani 0:692bf16d1455 195 div = CLKPWR_GetPCLKSEL(ClkType);
todotani 0:692bf16d1455 196
todotani 0:692bf16d1455 197 switch (div)
todotani 0:692bf16d1455 198 {
todotani 0:692bf16d1455 199 case 0:
todotani 0:692bf16d1455 200 div = 4;
todotani 0:692bf16d1455 201 break;
todotani 0:692bf16d1455 202
todotani 0:692bf16d1455 203 case 1:
todotani 0:692bf16d1455 204 div = 1;
todotani 0:692bf16d1455 205 break;
todotani 0:692bf16d1455 206
todotani 0:692bf16d1455 207 case 2:
todotani 0:692bf16d1455 208 div = 2;
todotani 0:692bf16d1455 209 break;
todotani 0:692bf16d1455 210
todotani 0:692bf16d1455 211 case 3:
todotani 0:692bf16d1455 212 div = 8;
todotani 0:692bf16d1455 213 break;
todotani 0:692bf16d1455 214 }
todotani 0:692bf16d1455 215 retval /= div;
todotani 0:692bf16d1455 216
todotani 0:692bf16d1455 217 return retval;
todotani 0:692bf16d1455 218 }
todotani 0:692bf16d1455 219
todotani 0:692bf16d1455 220
todotani 0:692bf16d1455 221
todotani 0:692bf16d1455 222 /*********************************************************************//**
todotani 0:692bf16d1455 223 * @brief Configure power supply for each peripheral according to NewState
todotani 0:692bf16d1455 224 * @param[in] PPType Type of peripheral used to enable power,
todotani 0:692bf16d1455 225 * should be one of the following:
todotani 0:692bf16d1455 226 * - CLKPWR_PCONP_PCTIM0 : Timer 0
todotani 0:692bf16d1455 227 - CLKPWR_PCONP_PCTIM1 : Timer 1
todotani 0:692bf16d1455 228 - CLKPWR_PCONP_PCUART0 : UART 0
todotani 0:692bf16d1455 229 - CLKPWR_PCONP_PCUART1 : UART 1
todotani 0:692bf16d1455 230 - CLKPWR_PCONP_PCPWM1 : PWM 1
todotani 0:692bf16d1455 231 - CLKPWR_PCONP_PCI2C0 : I2C 0
todotani 0:692bf16d1455 232 - CLKPWR_PCONP_PCSPI : SPI
todotani 0:692bf16d1455 233 - CLKPWR_PCONP_PCRTC : RTC
todotani 0:692bf16d1455 234 - CLKPWR_PCONP_PCSSP1 : SSP 1
todotani 0:692bf16d1455 235 - CLKPWR_PCONP_PCAD : ADC
todotani 0:692bf16d1455 236 - CLKPWR_PCONP_PCAN1 : CAN 1
todotani 0:692bf16d1455 237 - CLKPWR_PCONP_PCAN2 : CAN 2
todotani 0:692bf16d1455 238 - CLKPWR_PCONP_PCGPIO : GPIO
todotani 0:692bf16d1455 239 - CLKPWR_PCONP_PCRIT : RIT
todotani 0:692bf16d1455 240 - CLKPWR_PCONP_PCMC : MC
todotani 0:692bf16d1455 241 - CLKPWR_PCONP_PCQEI : QEI
todotani 0:692bf16d1455 242 - CLKPWR_PCONP_PCI2C1 : I2C 1
todotani 0:692bf16d1455 243 - CLKPWR_PCONP_PCSSP0 : SSP 0
todotani 0:692bf16d1455 244 - CLKPWR_PCONP_PCTIM2 : Timer 2
todotani 0:692bf16d1455 245 - CLKPWR_PCONP_PCTIM3 : Timer 3
todotani 0:692bf16d1455 246 - CLKPWR_PCONP_PCUART2 : UART 2
todotani 0:692bf16d1455 247 - CLKPWR_PCONP_PCUART3 : UART 3
todotani 0:692bf16d1455 248 - CLKPWR_PCONP_PCI2C2 : I2C 2
todotani 0:692bf16d1455 249 - CLKPWR_PCONP_PCI2S : I2S
todotani 0:692bf16d1455 250 - CLKPWR_PCONP_PCGPDMA : GPDMA
todotani 0:692bf16d1455 251 - CLKPWR_PCONP_PCENET : Ethernet
todotani 0:692bf16d1455 252 - CLKPWR_PCONP_PCUSB : USB
todotani 0:692bf16d1455 253 *
todotani 0:692bf16d1455 254 * @param[in] NewState New state of Peripheral Power, should be:
todotani 0:692bf16d1455 255 * - ENABLE : Enable power for this peripheral
todotani 0:692bf16d1455 256 * - DISABLE : Disable power for this peripheral
todotani 0:692bf16d1455 257 *
todotani 0:692bf16d1455 258 * @return none
todotani 0:692bf16d1455 259 **********************************************************************/
todotani 0:692bf16d1455 260 void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
todotani 0:692bf16d1455 261 {
todotani 0:692bf16d1455 262 if (NewState == ENABLE)
todotani 0:692bf16d1455 263 {
todotani 0:692bf16d1455 264 LPC_SC->PCONP |= PPType & CLKPWR_PCONP_BITMASK;
todotani 0:692bf16d1455 265 }
todotani 0:692bf16d1455 266 else if (NewState == DISABLE)
todotani 0:692bf16d1455 267 {
todotani 0:692bf16d1455 268 LPC_SC->PCONP &= (~PPType) & CLKPWR_PCONP_BITMASK;
todotani 0:692bf16d1455 269 }
todotani 0:692bf16d1455 270 }
todotani 0:692bf16d1455 271
todotani 0:692bf16d1455 272
todotani 0:692bf16d1455 273 /*********************************************************************//**
todotani 0:692bf16d1455 274 * @brief Enter Sleep mode with co-operated instruction by the Cortex-M3.
todotani 0:692bf16d1455 275 * @param[in] None
todotani 0:692bf16d1455 276 * @return None
todotani 0:692bf16d1455 277 **********************************************************************/
todotani 0:692bf16d1455 278 void CLKPWR_Sleep(void)
todotani 0:692bf16d1455 279 {
todotani 0:692bf16d1455 280 LPC_SC->PCON = 0x00;
todotani 0:692bf16d1455 281 /* Sleep Mode*/
todotani 0:692bf16d1455 282 __WFI();
todotani 0:692bf16d1455 283 }
todotani 0:692bf16d1455 284
todotani 0:692bf16d1455 285
todotani 0:692bf16d1455 286 /*********************************************************************//**
todotani 0:692bf16d1455 287 * @brief Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
todotani 0:692bf16d1455 288 * @param[in] None
todotani 0:692bf16d1455 289 * @return None
todotani 0:692bf16d1455 290 **********************************************************************/
todotani 0:692bf16d1455 291 void CLKPWR_DeepSleep(void)
todotani 0:692bf16d1455 292 {
todotani 0:692bf16d1455 293 /* Deep-Sleep Mode, set SLEEPDEEP bit */
todotani 0:692bf16d1455 294 SCB->SCR = 0x4;
todotani 0:692bf16d1455 295 LPC_SC->PCON = 0x8;
todotani 0:692bf16d1455 296 /* Deep Sleep Mode*/
todotani 0:692bf16d1455 297 __WFI();
todotani 0:692bf16d1455 298 }
todotani 0:692bf16d1455 299
todotani 0:692bf16d1455 300
todotani 0:692bf16d1455 301 /*********************************************************************//**
todotani 0:692bf16d1455 302 * @brief Enter Power Down mode with co-operated instruction by the Cortex-M3.
todotani 0:692bf16d1455 303 * @param[in] None
todotani 0:692bf16d1455 304 * @return None
todotani 0:692bf16d1455 305 **********************************************************************/
todotani 0:692bf16d1455 306 void CLKPWR_PowerDown(void)
todotani 0:692bf16d1455 307 {
todotani 0:692bf16d1455 308 /* Deep-Sleep Mode, set SLEEPDEEP bit */
todotani 0:692bf16d1455 309 SCB->SCR = 0x4;
todotani 0:692bf16d1455 310 LPC_SC->PCON = 0x09;
todotani 0:692bf16d1455 311 /* Power Down Mode*/
todotani 0:692bf16d1455 312 __WFI();
todotani 0:692bf16d1455 313 }
todotani 0:692bf16d1455 314
todotani 0:692bf16d1455 315
todotani 0:692bf16d1455 316 /*********************************************************************//**
todotani 0:692bf16d1455 317 * @brief Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.
todotani 0:692bf16d1455 318 * @param[in] None
todotani 0:692bf16d1455 319 * @return None
todotani 0:692bf16d1455 320 **********************************************************************/
todotani 0:692bf16d1455 321 void CLKPWR_DeepPowerDown(void)
todotani 0:692bf16d1455 322 {
todotani 0:692bf16d1455 323 /* Deep-Sleep Mode, set SLEEPDEEP bit */
todotani 0:692bf16d1455 324 SCB->SCR = 0x4;
todotani 0:692bf16d1455 325 LPC_SC->PCON = 0x03;
todotani 0:692bf16d1455 326 /* Deep Power Down Mode*/
todotani 0:692bf16d1455 327 __WFI();
todotani 0:692bf16d1455 328 }
todotani 0:692bf16d1455 329
todotani 0:692bf16d1455 330 /**
todotani 0:692bf16d1455 331 * @}
todotani 0:692bf16d1455 332 */
todotani 0:692bf16d1455 333
todotani 0:692bf16d1455 334 /**
todotani 0:692bf16d1455 335 * @}
todotani 0:692bf16d1455 336 */
todotani 0:692bf16d1455 337
todotani 0:692bf16d1455 338 /* --------------------------------- End Of File ------------------------------ */