Timothy Mulrooney / SX1272Libx

test

Dependents:   LoRaWAN-lmic-app_tjm

Fork of SX1276Lib by Semtech

sx1272/sx1272-hal.cpp@24:54935d8f4b9e, 2016-02-25 (annotated)

Committer:
tmulrooney
Date:
Thu Feb 25 15:39:46 2016 +0000
Revision:
24:54935d8f4b9e
Parent:
23:952530fa968d 
added ferq printout

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tmulrooney 23:952530fa968d 1 /*
tmulrooney 23:952530fa968d 2 / _____) _ | |
tmulrooney 23:952530fa968d 3 ( (____ _____ ____ _| |_ _____ ____| |__
tmulrooney 23:952530fa968d 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
tmulrooney 23:952530fa968d 5 _____) ) ____| | | || |_| ____( (___| | | |
tmulrooney 23:952530fa968d 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
tmulrooney 23:952530fa968d 7 (C) 2014 Semtech
tmulrooney 23:952530fa968d 8
tmulrooney 23:952530fa968d 9 Description: -
tmulrooney 23:952530fa968d 10
tmulrooney 23:952530fa968d 11 License: Revised BSD License, see LICENSE.TXT file include in the project
tmulrooney 23:952530fa968d 12
tmulrooney 23:952530fa968d 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
tmulrooney 23:952530fa968d 14 */
tmulrooney 23:952530fa968d 15 #include "sx1272-hal.h"
tmulrooney 23:952530fa968d 16 #include "debug.h"
tmulrooney 23:952530fa968d 17
tmulrooney 23:952530fa968d 18 const RadioRegisters_t SX1272MB1xAS::RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE;
tmulrooney 23:952530fa968d 19
tmulrooney 23:952530fa968d 20 SX1272MB1xAS::SX1272MB1xAS( RadioEvents_t *events,
tmulrooney 23:952530fa968d 21 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
tmulrooney 23:952530fa968d 22 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
tmulrooney 23:952530fa968d 23 PinName antSwitch )
tmulrooney 23:952530fa968d 24 : SX1272( events, mosi, miso, sclk, nss, reset, dio0, dio1, dio2, dio3, dio4, dio5 ),
tmulrooney 23:952530fa968d 25 antSwitch( antSwitch ),
tmulrooney 23:952530fa968d 26 #if( defined ( TARGET_NUCLEO_L152RE ) )
tmulrooney 23:952530fa968d 27 fake( D8 )
tmulrooney 23:952530fa968d 28 #else
tmulrooney 23:952530fa968d 29 fake( A3 )
tmulrooney 23:952530fa968d 30 #endif
tmulrooney 23:952530fa968d 31 {
tmulrooney 23:952530fa968d 32 debug("SX1272MB1xAS constructor\r\n");
tmulrooney 23:952530fa968d 33 this->RadioEvents = events;
tmulrooney 23:952530fa968d 34
tmulrooney 23:952530fa968d 35 Reset( );
tmulrooney 23:952530fa968d 36
tmulrooney 23:952530fa968d 37 RxChainCalibration( );
tmulrooney 23:952530fa968d 38
tmulrooney 23:952530fa968d 39 IoInit( );
tmulrooney 23:952530fa968d 40
tmulrooney 23:952530fa968d 41 SetOpMode( RF_OPMODE_SLEEP );
tmulrooney 23:952530fa968d 42
tmulrooney 23:952530fa968d 43 IoIrqInit( dioIrq );
tmulrooney 23:952530fa968d 44
tmulrooney 23:952530fa968d 45 RadioRegistersInit( );
tmulrooney 23:952530fa968d 46
tmulrooney 23:952530fa968d 47 SetModem( MODEM_FSK );
tmulrooney 23:952530fa968d 48
tmulrooney 23:952530fa968d 49
tmulrooney 23:952530fa968d 50 this->settings.State = RF_IDLE ;
tmulrooney 23:952530fa968d 51 }
tmulrooney 23:952530fa968d 52
tmulrooney 23:952530fa968d 53 SX1272MB1xAS::SX1272MB1xAS( RadioEvents_t *events )
tmulrooney 23:952530fa968d 54 #if defined ( TARGET_NUCLEO_L152RE )
tmulrooney 23:952530fa968d 55 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, A3, D9 ), // For NUCLEO L152RE dio4 is on port A3
tmulrooney 23:952530fa968d 56 antSwitch( A4 ),
tmulrooney 23:952530fa968d 57 fake( D8 )
tmulrooney 23:952530fa968d 58 #elif defined( TARGET_LPC11U6X )
tmulrooney 23:952530fa968d 59 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, D8, D9 ),
tmulrooney 23:952530fa968d 60 antSwitch( P0_23 ),
tmulrooney 23:952530fa968d 61 fake( A3 )
tmulrooney 23:952530fa968d 62 #else
tmulrooney 24:54935d8f4b9e 63 : SX1272( events, PTD6, PTD7, PTD5, PTD4, PTA2, PTC2, PTB1, PTC3, D5, PTC4, D9 ),
tmulrooney 23:952530fa968d 64 antSwitch( PTC6 ), //changed from A4 to PTC6 by jlc
tmulrooney 24:54935d8f4b9e 65 fake( PTA2 )
tmulrooney 23:952530fa968d 66 #endif
tmulrooney 23:952530fa968d 67 {
tmulrooney 24:54935d8f4b9e 68 debug("SX1272MB1xAS constructor1\r\n");
tmulrooney 24:54935d8f4b9e 69 this->RadioEvents = events;
tmulrooney 23:952530fa968d 70
tmulrooney 23:952530fa968d 71 Reset( );
tmulrooney 23:952530fa968d 72
tmulrooney 23:952530fa968d 73 boardConnected = UNKNOWN;
tmulrooney 23:952530fa968d 74
tmulrooney 23:952530fa968d 75 DetectBoardType( );
tmulrooney 23:952530fa968d 76
tmulrooney 23:952530fa968d 77 RxChainCalibration( );
tmulrooney 23:952530fa968d 78
tmulrooney 23:952530fa968d 79 IoInit( );
tmulrooney 23:952530fa968d 80
tmulrooney 23:952530fa968d 81 SetOpMode( RF_OPMODE_SLEEP );
tmulrooney 23:952530fa968d 82 IoIrqInit( dioIrq );
tmulrooney 23:952530fa968d 83
tmulrooney 23:952530fa968d 84 RadioRegistersInit( );
tmulrooney 23:952530fa968d 85
tmulrooney 23:952530fa968d 86
tmulrooney 23:952530fa968d 87 // SetModem( MODEM_LORA );
tmulrooney 23:952530fa968d 88
tmulrooney 23:952530fa968d 89 this->settings.State = RF_IDLE ;
tmulrooney 23:952530fa968d 90 }
tmulrooney 23:952530fa968d 91
tmulrooney 23:952530fa968d 92 //-------------------------------------------------------------------------
tmulrooney 23:952530fa968d 93 // Board relative functions
tmulrooney 23:952530fa968d 94 //-------------------------------------------------------------------------
tmulrooney 23:952530fa968d 95 uint8_t SX1272MB1xAS::DetectBoardType( void )
tmulrooney 23:952530fa968d 96 {
tmulrooney 23:952530fa968d 97 if( boardConnected == UNKNOWN )
tmulrooney 23:952530fa968d 98 {
tmulrooney 23:952530fa968d 99 antSwitch.input( );
tmulrooney 23:952530fa968d 100 wait_ms( 1 );
tmulrooney 23:952530fa968d 101 if( antSwitch == 1 )
tmulrooney 23:952530fa968d 102 {
tmulrooney 23:952530fa968d 103 boardConnected = SX1272RF1;
tmulrooney 23:952530fa968d 104 }
tmulrooney 23:952530fa968d 105 else
tmulrooney 23:952530fa968d 106 {
tmulrooney 23:952530fa968d 107 boardConnected = SX1272RF1;
tmulrooney 23:952530fa968d 108 }
tmulrooney 23:952530fa968d 109 antSwitch.output( );
tmulrooney 23:952530fa968d 110 wait_ms( 1 );
tmulrooney 23:952530fa968d 111 }
tmulrooney 23:952530fa968d 112 debug("DetectBoardType exit %d\r\n",boardConnected);
tmulrooney 23:952530fa968d 113 return ( boardConnected );
tmulrooney 23:952530fa968d 114 }
tmulrooney 23:952530fa968d 115
tmulrooney 23:952530fa968d 116 void SX1272MB1xAS::IoInit( void )
tmulrooney 23:952530fa968d 117 {
tmulrooney 23:952530fa968d 118 debug("IoInit enter\r\n");
tmulrooney 23:952530fa968d 119 AntSwInit( );
tmulrooney 23:952530fa968d 120 SpiInit( );
tmulrooney 23:952530fa968d 121 }
tmulrooney 23:952530fa968d 122
tmulrooney 23:952530fa968d 123 void SX1272MB1xAS::RadioRegistersInit( )
tmulrooney 23:952530fa968d 124 {
tmulrooney 23:952530fa968d 125 uint8_t i = 0;
tmulrooney 23:952530fa968d 126 for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
tmulrooney 23:952530fa968d 127 {
tmulrooney 23:952530fa968d 128 debug("RadioRegistersInit %d %02X %02X\r\n",RadioRegsInit[i].Modem ,RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
tmulrooney 23:952530fa968d 129 SetModem( RadioRegsInit[i].Modem );
tmulrooney 23:952530fa968d 130 Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
tmulrooney 23:952530fa968d 131 }
tmulrooney 23:952530fa968d 132 }
tmulrooney 23:952530fa968d 133
tmulrooney 23:952530fa968d 134 void SX1272MB1xAS::SpiInit( void )
tmulrooney 23:952530fa968d 135 {
tmulrooney 23:952530fa968d 136 debug("SpiInit enter\r\n");
tmulrooney 23:952530fa968d 137 nss = 1;
tmulrooney 23:952530fa968d 138 spi.format( 8,0 );
tmulrooney 23:952530fa968d 139 uint32_t frequencyToSet = 1000000;
tmulrooney 23:952530fa968d 140 // uint32_t frequencyToSet = 8000000;
tmulrooney 23:952530fa968d 141 // #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_LPC11U6X ) )
tmulrooney 23:952530fa968d 142 spi.frequency( frequencyToSet );
tmulrooney 23:952530fa968d 143 // #elif( defined ( TARGET_KL25Z ) ) //busclock frequency is halved -> double the spi frequency to compensate
tmulrooney 23:952530fa968d 144 // spi.frequency( frequencyToSet * 2 );
tmulrooney 23:952530fa968d 145 // #else
tmulrooney 23:952530fa968d 146 // #warning "Check the board's SPI frequency"
tmulrooney 23:952530fa968d 147 // #endif
tmulrooney 23:952530fa968d 148 wait(0.1);
tmulrooney 23:952530fa968d 149 }
tmulrooney 23:952530fa968d 150
tmulrooney 23:952530fa968d 151 void SX1272MB1xAS::IoIrqInit( DioIrqHandler *irqHandlers )
tmulrooney 23:952530fa968d 152 {
tmulrooney 23:952530fa968d 153 debug("IoIrqInit enter\r\n");
tmulrooney 23:952530fa968d 154 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_LPC11U6X ) )
tmulrooney 23:952530fa968d 155 dio0.mode(PullDown);
tmulrooney 23:952530fa968d 156 dio1.mode(PullDown);
tmulrooney 23:952530fa968d 157 dio2.mode(PullDown);
tmulrooney 23:952530fa968d 158 dio3.mode(PullDown);
tmulrooney 23:952530fa968d 159 dio4.mode(PullDown);
tmulrooney 23:952530fa968d 160 #endif
tmulrooney 23:952530fa968d 161 dio0.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[0] ) );
tmulrooney 23:952530fa968d 162 dio1.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[1] ) );
tmulrooney 23:952530fa968d 163 dio2.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[2] ) );
tmulrooney 23:952530fa968d 164 dio3.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[3] ) );
tmulrooney 23:952530fa968d 165 dio4.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[4] ) );
tmulrooney 23:952530fa968d 166 }
tmulrooney 23:952530fa968d 167
tmulrooney 23:952530fa968d 168 void SX1272MB1xAS::IoDeInit( void )
tmulrooney 23:952530fa968d 169 {
tmulrooney 23:952530fa968d 170 debug("IoDeInit\r\n");
tmulrooney 23:952530fa968d 171 //nothing
tmulrooney 23:952530fa968d 172 }
tmulrooney 23:952530fa968d 173
tmulrooney 23:952530fa968d 174 uint8_t SX1272MB1xAS::GetPaSelect( uint32_t channel )
tmulrooney 23:952530fa968d 175 {
tmulrooney 23:952530fa968d 176 debug("GetPaSelect\r\n");
tmulrooney 23:952530fa968d 177 if( channel > RF_MID_BAND_THRESH )
tmulrooney 23:952530fa968d 178 {
tmulrooney 23:952530fa968d 179 if( boardConnected == SX1276MB1LAS )
tmulrooney 23:952530fa968d 180 {
tmulrooney 23:952530fa968d 181 return RF_PACONFIG_PASELECT_PABOOST;
tmulrooney 23:952530fa968d 182 }
tmulrooney 23:952530fa968d 183 else
tmulrooney 23:952530fa968d 184 {
tmulrooney 23:952530fa968d 185 return RF_PACONFIG_PASELECT_RFO;
tmulrooney 23:952530fa968d 186 }
tmulrooney 23:952530fa968d 187 }
tmulrooney 23:952530fa968d 188 else
tmulrooney 23:952530fa968d 189 {
tmulrooney 23:952530fa968d 190 return RF_PACONFIG_PASELECT_RFO;
tmulrooney 23:952530fa968d 191 }
tmulrooney 23:952530fa968d 192 }
tmulrooney 23:952530fa968d 193
tmulrooney 23:952530fa968d 194 void SX1272MB1xAS::SetAntSwLowPower( bool status )
tmulrooney 23:952530fa968d 195 {
tmulrooney 23:952530fa968d 196 debug("SetAntSwLowPower enter %d\r\n",status);
tmulrooney 23:952530fa968d 197 if( isRadioActive != status )
tmulrooney 23:952530fa968d 198 {
tmulrooney 23:952530fa968d 199 isRadioActive = status;
tmulrooney 23:952530fa968d 200
tmulrooney 23:952530fa968d 201 if( status == false )
tmulrooney 23:952530fa968d 202 {
tmulrooney 23:952530fa968d 203 AntSwInit( );
tmulrooney 23:952530fa968d 204 }
tmulrooney 23:952530fa968d 205 else
tmulrooney 23:952530fa968d 206 {
tmulrooney 23:952530fa968d 207 AntSwDeInit( );
tmulrooney 23:952530fa968d 208 }
tmulrooney 23:952530fa968d 209 }
tmulrooney 23:952530fa968d 210 }
tmulrooney 23:952530fa968d 211
tmulrooney 23:952530fa968d 212 void SX1272MB1xAS::AntSwInit( void )
tmulrooney 23:952530fa968d 213 {
tmulrooney 23:952530fa968d 214 debug("AntSwInit enter\r\n");
tmulrooney 23:952530fa968d 215 antSwitch = 0;
tmulrooney 23:952530fa968d 216 }
tmulrooney 23:952530fa968d 217
tmulrooney 23:952530fa968d 218 void SX1272MB1xAS::AntSwDeInit( void )
tmulrooney 23:952530fa968d 219 {
tmulrooney 23:952530fa968d 220 debug("AntSwDeInit enter\r\n");
tmulrooney 23:952530fa968d 221 antSwitch = 0;
tmulrooney 23:952530fa968d 222 }
tmulrooney 23:952530fa968d 223
tmulrooney 23:952530fa968d 224 void SX1272MB1xAS::SetAntSw( uint8_t rxTx )
tmulrooney 23:952530fa968d 225 {
tmulrooney 23:952530fa968d 226 debug("SetAntSw enter %d\r\n",rxTx);
tmulrooney 23:952530fa968d 227 if( this->rxTx == rxTx )
tmulrooney 23:952530fa968d 228 {
tmulrooney 23:952530fa968d 229 //no need to go further
tmulrooney 23:952530fa968d 230 return;
tmulrooney 23:952530fa968d 231 }
tmulrooney 23:952530fa968d 232
tmulrooney 23:952530fa968d 233 debug("SetAntSw set %d\r\n",rxTx);
tmulrooney 23:952530fa968d 234 this->rxTx = rxTx;
tmulrooney 23:952530fa968d 235
tmulrooney 23:952530fa968d 236 if( rxTx != 0 )
tmulrooney 23:952530fa968d 237 {
tmulrooney 23:952530fa968d 238 antSwitch = 1;
tmulrooney 23:952530fa968d 239 }
tmulrooney 23:952530fa968d 240 else
tmulrooney 23:952530fa968d 241 {
tmulrooney 23:952530fa968d 242 antSwitch = 0;
tmulrooney 23:952530fa968d 243 }
tmulrooney 23:952530fa968d 244 }
tmulrooney 23:952530fa968d 245
tmulrooney 23:952530fa968d 246 bool SX1272MB1xAS::CheckRfFrequency( uint32_t frequency )
tmulrooney 23:952530fa968d 247 {
tmulrooney 23:952530fa968d 248 debug("CheckRfFrequency\r\n");
tmulrooney 23:952530fa968d 249 //TODO: Implement check, currently all frequencies are supported
tmulrooney 23:952530fa968d 250 return true;
tmulrooney 23:952530fa968d 251 }
tmulrooney 23:952530fa968d 252
tmulrooney 23:952530fa968d 253
tmulrooney 23:952530fa968d 254 void SX1272MB1xAS::Reset( void )
tmulrooney 23:952530fa968d 255 {
tmulrooney 23:952530fa968d 256 debug("Reset enter\r\n");
tmulrooney 23:952530fa968d 257 reset.output();
tmulrooney 23:952530fa968d 258 reset = 0;
tmulrooney 23:952530fa968d 259 wait_ms( 1 );
tmulrooney 23:952530fa968d 260 reset.input();
tmulrooney 23:952530fa968d 261 wait_ms( 6 );
tmulrooney 23:952530fa968d 262 }
tmulrooney 23:952530fa968d 263
tmulrooney 23:952530fa968d 264 void SX1272MB1xAS::Write( uint8_t addr, uint8_t data )
tmulrooney 23:952530fa968d 265 {
tmulrooney 23:952530fa968d 266 debug("Write %02X %02X\r\n",addr, data);
tmulrooney 23:952530fa968d 267 Write( addr, &data, 1 );
tmulrooney 23:952530fa968d 268 }
tmulrooney 23:952530fa968d 269
tmulrooney 23:952530fa968d 270 uint8_t SX1272MB1xAS::Read( uint8_t addr )
tmulrooney 23:952530fa968d 271 {
tmulrooney 23:952530fa968d 272 uint8_t data;
tmulrooney 23:952530fa968d 273 Read( addr, &data, 1 );
tmulrooney 23:952530fa968d 274 debug("Read %02X %02X\r\n",addr ,data);
tmulrooney 23:952530fa968d 275 return data;
tmulrooney 23:952530fa968d 276 }
tmulrooney 23:952530fa968d 277
tmulrooney 23:952530fa968d 278 void SX1272MB1xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size )
tmulrooney 23:952530fa968d 279 {
tmulrooney 23:952530fa968d 280 uint8_t i;
tmulrooney 23:952530fa968d 281
tmulrooney 23:952530fa968d 282 nss = 0;
tmulrooney 23:952530fa968d 283 spi.write( addr | 0x80 );
tmulrooney 23:952530fa968d 284 for( i = 0; i < size; i++ )
tmulrooney 23:952530fa968d 285 {
tmulrooney 23:952530fa968d 286 spi.write( buffer[i] );
tmulrooney 23:952530fa968d 287 }
tmulrooney 23:952530fa968d 288 nss = 1;
tmulrooney 23:952530fa968d 289 }
tmulrooney 23:952530fa968d 290
tmulrooney 23:952530fa968d 291 void SX1272MB1xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size )
tmulrooney 23:952530fa968d 292 {
tmulrooney 23:952530fa968d 293 uint8_t i;
tmulrooney 23:952530fa968d 294
tmulrooney 23:952530fa968d 295 nss = 0;
tmulrooney 23:952530fa968d 296 spi.write( addr & 0x7F );
tmulrooney 23:952530fa968d 297 for( i = 0; i < size; i++ )
tmulrooney 23:952530fa968d 298 {
tmulrooney 23:952530fa968d 299 buffer[i] = spi.write( 0 );
tmulrooney 23:952530fa968d 300 }
tmulrooney 23:952530fa968d 301 nss = 1;
tmulrooney 23:952530fa968d 302 }
tmulrooney 23:952530fa968d 303
tmulrooney 23:952530fa968d 304 void SX1272MB1xAS::WriteFifo( uint8_t *buffer, uint8_t size )
tmulrooney 23:952530fa968d 305 {
tmulrooney 23:952530fa968d 306 debug("WriteFifo\r\n");
tmulrooney 23:952530fa968d 307 Write( 0, buffer, size );
tmulrooney 23:952530fa968d 308 }
tmulrooney 23:952530fa968d 309
tmulrooney 23:952530fa968d 310 void SX1272MB1xAS::ReadFifo( uint8_t *buffer, uint8_t size )
tmulrooney 23:952530fa968d 311 {
tmulrooney 23:952530fa968d 312 debug("ReadFifo\r\n");
tmulrooney 23:952530fa968d 313 Read( 0, buffer, size );
tmulrooney 23:952530fa968d 314 }