KBrat-SSD645-HW-8_1_MMA8451Q8
Fork of MMA8451Q8 by
Diff: MMA8451Q8.cpp
- Revision:
- 9:1e7f9d65ad29
- Parent:
- 8:65da360cf088
--- a/MMA8451Q8.cpp Mon Mar 06 17:39:43 2017 +0000 +++ b/MMA8451Q8.cpp Wed Mar 08 03:59:56 2017 +0000 @@ -34,6 +34,14 @@ #define MAX_8G 0x02 #define GSCALING 1024.0 +//#define GSCALING 4096.0 +#define NUM_DATA 2 +#define ADDRESS_INDEX 0 +#define DATA_INDEX 1 + + + +float gScaling[3] = {4095.0, 2048.0,1024.0}; //scaling for acceleration of gravity values MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) { // activate the peripheral @@ -49,24 +57,35 @@ return who_am_i; } -void MMA8451Q::standbyMode(void){ - byte n; - uint8_t data[2] = {REG_CTRL_REG_1, 0x00}; - n= readRegs(data, 2); - data[0] = XYZ_DATA_CFG; - data[1] = MAX_8G; - writeRegs(data, 2 , n); +void MMA8451Q::standbyMode(){ +#define ACTIVEMASK 0x01 + uint8_t registerData[1]; + uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00}; + + readRegs(REG_CTRL_REG_1, registerData, 1); + data[1] = registerData[0] & ~ACTIVEMASK; + writeRegs(data, NUM_DATA); //Standby Mode } void MMA8451Q::activeMode(){ +#define ACTIVEMASK 0x01 + uint8_t registerData[1]; + uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00}; + + readRegs(REG_CTRL_REG_1, registerData, 1); data[0] = REG_CTRL_REG_1; - data[1] = 0x01; - writeRegs(data, 2, (readRegs(data, 2))); + data[1] = registerData[0] | ACTIVEMASK; + writeRegs(data, NUM_DATA); //Active Mode } -void MMA8451Q::setGLimit() { +void MMA8451Q::setGLimit(int gSelect) { + uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00}; + gChosen = gSelect; standbyMode(); + data[ADDRESS_INDEX] = XYZ_DATA_CFG; + data[DATA_INDEX] = gChosen; + writeRegs(data, 2);//change GLimit activeMode(); } @@ -93,6 +112,7 @@ return (float(getAccAxis(REG_OUT_Z_MSB))/GSCALING); } + void MMA8451Q::getAccAllAxis(float * res) { res[0] = getAccX(); res[1] = getAccY();