Keisha Brathwaite / KBrat-SSD645-HW-8_1_MMA8451Q8

KBrat-SSD645-HW-8_1_MMA8451Q8

Fork of MMA8451Q8 by Keisha Brathwaite

MMA8451Q8.cpp@7:7812354ef684, 2017-02-22 (annotated)

Committer:
scohennm
Date:
Wed Feb 22 15:35:47 2017 +0000
Revision:
7:7812354ef684
Parent:
6:c29386367dcf
Child:
8:65da360cf088
Change #define for MAX_8G

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 1:d2630136d51e 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:d2630136d51e 2 *
samux 1:d2630136d51e 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:d2630136d51e 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:d2630136d51e 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:d2630136d51e 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:d2630136d51e 7 * Software is furnished to do so, subject to the following conditions:
samux 1:d2630136d51e 8 *
samux 1:d2630136d51e 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:d2630136d51e 10 * substantial portions of the Software.
samux 1:d2630136d51e 11 *
samux 1:d2630136d51e 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:d2630136d51e 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:d2630136d51e 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:d2630136d51e 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:d2630136d51e 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:d2630136d51e 17 */
scohennm 5:be042e8c1756 18 // Modify to change full scale gravity range 141207 sc
samux 1:d2630136d51e 19
scohennm 5:be042e8c1756 20
scohennm 5:be042e8c1756 21 #include "MMA8451Q8.h"
emilmont 0:6149091f755d 22
samux 1:d2630136d51e 23 #define REG_WHO_AM_I 0x0D
samux 1:d2630136d51e 24 #define REG_CTRL_REG_1 0x2A
emilmont 0:6149091f755d 25 #define REG_OUT_X_MSB 0x01
emilmont 0:6149091f755d 26 #define REG_OUT_Y_MSB 0x03
emilmont 0:6149091f755d 27 #define REG_OUT_Z_MSB 0x05
scohennm 5:be042e8c1756 28 #define XYZ_DATA_CFG 0x0E
emilmont 0:6149091f755d 29
samux 1:d2630136d51e 30 #define UINT14_MAX 16383
emilmont 0:6149091f755d 31
scohennm 5:be042e8c1756 32 #define MAX_2G 0x00
scohennm 5:be042e8c1756 33 #define MAX_4G 0x01
scohennm 6:c29386367dcf 34 #define MAX_8G 0x02
scohennm 5:be042e8c1756 35
scohennm 5:be042e8c1756 36 #define GSCALING 1024.0
scohennm 5:be042e8c1756 37
emilmont 0:6149091f755d 38 MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) {
emilmont 0:6149091f755d 39 // activate the peripheral
emilmont 0:6149091f755d 40 uint8_t data[2] = {REG_CTRL_REG_1, 0x01};
samux 1:d2630136d51e 41 writeRegs(data, 2);
emilmont 0:6149091f755d 42 }
emilmont 0:6149091f755d 43
emilmont 0:6149091f755d 44 MMA8451Q::~MMA8451Q() { }
emilmont 0:6149091f755d 45
emilmont 0:6149091f755d 46 uint8_t MMA8451Q::getWhoAmI() {
emilmont 0:6149091f755d 47 uint8_t who_am_i = 0;
samux 1:d2630136d51e 48 readRegs(REG_WHO_AM_I, &who_am_i, 1);
emilmont 0:6149091f755d 49 return who_am_i;
emilmont 0:6149091f755d 50 }
scohennm 5:be042e8c1756 51 void MMA8451Q::setGLimit() {
scohennm 5:be042e8c1756 52 uint8_t data[2] = {REG_CTRL_REG_1, 0x00};
scohennm 5:be042e8c1756 53 writeRegs(data, 2); // put in standby
scohennm 5:be042e8c1756 54 data[0] = XYZ_DATA_CFG;
scohennm 7:7812354ef684 55 data[1] = MAX_8G;
scohennm 5:be042e8c1756 56 writeRegs(data, 2);// change g limit
scohennm 5:be042e8c1756 57 data[0] = REG_CTRL_REG_1;
scohennm 5:be042e8c1756 58 data[1] = 0x01;
scohennm 5:be042e8c1756 59 writeRegs(data, 2); // make active
scohennm 5:be042e8c1756 60 }
emilmont 0:6149091f755d 61
chris 3:db7126dbd63f 62 float MMA8451Q::getAccX() {
scohennm 5:be042e8c1756 63 return (float(getAccAxis(REG_OUT_X_MSB))/GSCALING);
emilmont 0:6149091f755d 64 }
emilmont 0:6149091f755d 65
chris 3:db7126dbd63f 66 float MMA8451Q::getAccY() {
scohennm 5:be042e8c1756 67 return (float(getAccAxis(REG_OUT_Y_MSB))/GSCALING);
emilmont 0:6149091f755d 68 }
emilmont 0:6149091f755d 69
chris 3:db7126dbd63f 70 float MMA8451Q::getAccZ() {
scohennm 5:be042e8c1756 71 return (float(getAccAxis(REG_OUT_Z_MSB))/GSCALING);
emilmont 0:6149091f755d 72 }
emilmont 0:6149091f755d 73
chris 3:db7126dbd63f 74 void MMA8451Q::getAccAllAxis(float * res) {
emilmont 0:6149091f755d 75 res[0] = getAccX();
emilmont 0:6149091f755d 76 res[1] = getAccY();
emilmont 0:6149091f755d 77 res[2] = getAccZ();
emilmont 0:6149091f755d 78 }
emilmont 0:6149091f755d 79
emilmont 0:6149091f755d 80 int16_t MMA8451Q::getAccAxis(uint8_t addr) {
emilmont 0:6149091f755d 81 int16_t acc;
emilmont 0:6149091f755d 82 uint8_t res[2];
samux 1:d2630136d51e 83 readRegs(addr, res, 2);
emilmont 0:6149091f755d 84
emilmont 0:6149091f755d 85 acc = (res[0] << 6) | (res[1] >> 2);
emilmont 0:6149091f755d 86 if (acc > UINT14_MAX/2)
emilmont 0:6149091f755d 87 acc -= UINT14_MAX;
emilmont 0:6149091f755d 88
emilmont 0:6149091f755d 89 return acc;
emilmont 0:6149091f755d 90 }
emilmont 0:6149091f755d 91
samux 1:d2630136d51e 92 void MMA8451Q::readRegs(int addr, uint8_t * data, int len) {
emilmont 0:6149091f755d 93 char t[1] = {addr};
emilmont 0:6149091f755d 94 m_i2c.write(m_addr, t, 1, true);
emilmont 0:6149091f755d 95 m_i2c.read(m_addr, (char *)data, len);
emilmont 0:6149091f755d 96 }
emilmont 0:6149091f755d 97
samux 1:d2630136d51e 98 void MMA8451Q::writeRegs(uint8_t * data, int len) {
emilmont 0:6149091f755d 99 m_i2c.write(m_addr, (char *)data, len);
emilmont 0:6149091f755d 100 }